CN202171757U - DC (direct current) voltage stabilization power source capable of adjusting voltage - Google Patents

Abstract

The utility model relates to the field of electricity, in particular to a voltage-adjustable DC stabilized power supply. In a switching power supply or a linear power supply, a voltage setting circuit is connected to the switching power supply or the linear power supply through a setting resistor to generate Constant voltage, the control unit controls the set voltage output by the voltage setting circuit according to the sampled voltage and/or current information, through the embodiment of the utility model, the output voltage is adjusted electronically, avoiding the current There are problems such as wear and failure caused by the use of mechanical structure adjustment in the technology, and more accurate adjustment of the output voltage of the power supply can be realized through the control chip.

Description

A voltage-adjustable DC stabilized power supply

technical field

The utility model relates to the field of electricity, in particular to a voltage-adjustable DC stabilized power supply.

Background technique

DC power supply is an indispensable part of all kinds of electronic equipment. At the same time, in the process of developing different electronic products, DC power supplies with different voltage values may be required. Therefore, adjustable DC power supplies have become necessary equipment for electronic product research and development laboratories. one. In addition, in some electronic equipment maintenance occasions and electrical characteristic tests of hardware circuits, adjustable DC regulated power supplies are required.

There are many ways to generate DC voltage, which can be generally divided into two types: linear voltage regulation and switching voltage regulation. The linear DC power supply is realized by connecting a transistor in series between the input and the output. The series transistor works in the linear region of the voltage-current characteristic curve and acts as a variable resistor. Figure 1 is a schematic diagram of a linear regulated power supply in the prior art. The negative input terminal of the error amplifier is connected to the reference source, and the positive input terminal of the error amplifier is connected to the output feedback. The feedback is divided by the output voltage through R1 and R2. after getting. In fact, an ideal op amp changes the output so that the voltages at the positive and negative inputs are equal. Therefore, in steady state, the voltage at the node connecting R1 and R2 can be considered equal to VREF. Assuming that there is no current flowing out or in at the input terminal of the operational amplifier, it can be obtained by Ohm's law

$\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; REF</span>}}}{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}}$

So the output voltage is obtained as:

$V_{\mathrm{out}}=V_{\mathrm{REF}}*(1+\frac{R1}{R2})$ (Formula 1)

When applying control loop theory to this power supply, we are only concerned with changes (or disturbances), not DC quantities. If the error amplifier is just an ordinary voltage feedback operational amplifier, then the lower voltage divider resistor R2 is just a DC bias resistor, which does not play any (direct) role in the analysis of the AC loop.

The switching power supply adjusts the output voltage by adjusting the turn-on or turn-off time of the transistor working in the switch state. FIG. 2 is a schematic diagram of a switching regulated power supply with a buck topology in the prior art, and FIG. 3 is a schematic diagram of a switching regulated power supply with a boost topology in the prior art. It can be seen from Figure 2 and Figure 3 that the basic circuit of a switching regulated power supply includes an error amplifier, a reference source, a sawtooth wave generator, a PWM comparator, a switching tube, a diode and an inductor. Z1 and Z2 in the figure are compensation networks composed of resistors and capacitors.

When working, the output voltage first passes through the resistance sampling network and compares it with the internal reference voltage. Then the difference between the two is filtered, amplified and inverted by the error amplifier. The output of the error amplifier is used as one of the two inputs of the pulse width modulator (PWM), and the other input of the PWM comparator is a sawtooth wave. In this way, a square wave whose duty cycle is proportional to the output value of the error amplifier is obtained at the output terminal of the PWM comparator, that is, the output variation of the PWM comparator is the switching pulse width. Therefore, if the output rises, the output voltage of the error amplifier drops, and the duty cycle becomes smaller to make the output smaller; otherwise, the output voltage of the error amplifier rises, and the duty cycle becomes larger to make the output larger. This is how switching power supply regulation systems work. The calculation formula of its output voltage is the same as (Formula 1). When applying control loop theory to this power supply, we are only concerned with changes (or disturbances), not DC quantities. If the error amplifier is just an ordinary voltage feedback operational amplifier, then the lower voltage divider resistor R2 is just a DC bias resistor, which does not play any (direct) role in the analysis of the AC loop.

Generally, whether it is a linear regulated power supply or a switching regulated power supply, the output voltage value is adjusted by changing the sampling ratio of the output voltage. Ordinary adjustable DC regulated power supplies use multi-turn mechanical potentiometers for output voltage adjustment. The mechanical potentiometer has mechanical wear, is afraid of vibration, and is easily damaged by frequent actions.

Utility model content

The embodiment of the utility model provides a voltage-adjustable DC stabilized power supply, which is used to solve the problem that the voltage-adjustable DC stabilized power supply in the prior art requires a mechanically structured switch to adjust the voltage, which causes mechanical wear and tear. System instability problem.

The embodiment of the utility model provides a DC stabilized power supply with adjustable voltage. In the switching power supply or linear power supply, the first voltage dividing resistor and the second voltage dividing resistor in the switching power supply or linear power supply feed back the output voltage to the negative input of the error amplifier to regulate the output voltage, characterized in that it also includes:

Setting resistance, voltage setting circuit, sampling circuit and control unit;

One end of the setting resistor is connected to the feedback voltage point between the first voltage dividing resistor and the second voltage dividing resistor, and the other end is connected to the voltage setting circuit;

The voltage setting circuit is connected to the switching power supply or linear power supply through the setting resistor to generate a setting voltage, and the output voltage of the switching power supply or linear power supply is inversely proportional to the setting voltage. ;

The sampling circuit is connected in parallel with the output terminal of the switching power supply or the linear power supply, and the sampling circuit transmits the voltage and/or current information of the output terminal to the control unit;

The control unit controls the set voltage output by the voltage setting circuit according to the sampled voltage and/or current information.

According to a further aspect of the voltage-adjustable DC stabilized power supply described in the embodiment of the present utility model, the output voltage of the switching power supply or the linear power supply is inversely proportional to the set voltage and the linear relationship means,

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; REF</span>}}<span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; SET</span>}}<span\; class="notranslate">\; ;</span>$

Wherein VOUT is the output voltage, VREF is the reference voltage, VSET is the setting voltage, R1 is the first voltage dividing resistor, R2 is the second voltage dividing resistor, and R3 is the setting resistor.

According to a further aspect of the voltage-adjustable DC regulated power supply described in the embodiment of the present invention, the switching power supply includes a buck topology switching regulated power supply, a boost topology switching regulated power supply and a buck-boost topology of the inverting power supply.

According to another further aspect of the voltage-adjustable DC stabilized power supply described in the embodiment of the present invention, the linear power supply includes a transistor connected in series between the input terminal and the output terminal of the linear power supply, and the transistor also Connect the output terminal of the error amplifier, the negative input terminal of the error amplifier is connected to the reference source, the positive input terminal of the error amplifier is connected to the output feedback, the output feedback is divided by the output voltage through the first voltage dividing resistor and the second voltage dividing resistor get.

According to another further aspect of the voltage-adjustable DC stabilized power supply described in the embodiment of the present invention, the transistor is a PNP transistor, the emitter of the PNP transistor is connected to the input terminal, and the collector is connected to the output terminal. terminal, the base is connected to the output terminal of the error amplifier.

According to another further aspect of the voltage-adjustable DC stabilized power supply described in the embodiment of the present invention, the transistor is a PMOS transistor, the source of the PMOS transistor is connected to the input terminal, and the drain is connected to the output terminal , the gate is connected to the output of the error amplifier.

倍即可。Through the embodiment of the utility model, the output voltage can be adjusted, and at the same time, the dynamic performance of the power conversion circuit feedback is not changed. The added voltage setting circuit does not play any role in the AC analysis of the circuit, so the dynamic performance of the circuit is not affected. The current and voltage signals are sampled by the control unit to realize the output over-current and over-voltage protection. By sampling the output voltage signal and comparing it with the set output voltage value to adjust the output voltage, the error caused by the temperature drift, time drift and component parameter tolerance of the power supply can be reduced. The set voltage V _SET is obtained by converting the PWM signal into an analog signal, which can reduce system cost. The adjustment step of the output voltage can achieve high resolution such as 12 bits, 14 bits or 16 bits, as long as The magnitude of the value can reach the same resolution, so the resolution of the voltage setting value V _SET as long as it is the resolution of the output voltage

times.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description These are only some embodiments of the utility model, and those skilled in the art can also obtain other drawings based on these drawings without creative work.

Shown in Fig. 1 is the schematic diagram of a kind of linear regulated power supply in the prior art;

FIG. 2 is a schematic diagram of a switching regulated power supply with a buck topology in the prior art;

Fig. 3 is a schematic diagram of a switching regulated power supply with a boost topology in the prior art;

FIG. 4 is a schematic structural diagram of a voltage-adjustable DC stabilized power supply according to an embodiment of the present invention;

FIG. 5A is a circuit diagram of a voltage-adjustable DC regulated switching power supply according to an embodiment of the present invention;

Fig. 5B is a circuit diagram of the voltage setting circuit of the voltage-adjustable DC regulated switching power supply according to the embodiment of the present invention;

Fig. 6 shows the circuit diagram of the DC stabilized linear power supply with adjustable voltage in the embodiment of the utility model;

Fig. 7 shows the circuit diagram of the single-chip microcomputer in the voltage-adjustable DC stabilized power supply circuit of the utility model embodiment;

Figure 8 is a schematic diagram of a voltage-adjustable DC stabilized linear power supply according to an embodiment of the present invention;

Fig. 9A shows the circuit diagram of the output as +6V DC auxiliary power supply in the embodiment of the utility model;

Fig. 9B is a circuit diagram showing an output of +5VA auxiliary power supply in the embodiment of the present invention;

FIG. 9C is a circuit diagram of the output as +3.3V auxiliary power supply in the embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. example. Based on the embodiments of the present utility model, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of the present utility model.

FIG. 4 is a schematic structural diagram of a voltage-adjustable DC stabilized power supply according to an embodiment of the present invention.

In the switching power supply or linear power supply, it also includes a setting resistor R3, a voltage setting circuit 400, a sampling circuit 401, and a control unit 402;

One end of the setting resistor R3 is connected to the feedback voltage point between the first voltage dividing resistor and the second voltage dividing resistor, and the other end is connected to the voltage setting circuit;

The voltage setting circuit is connected to the switching power supply or linear power supply through the setting resistor, and is used to generate a setting voltage V _SET , the output voltage V _OUT of the switching power supply or linear power supply and the setting voltage V _SET is inversely proportional to a linear relationship, and by adjusting the set voltage, the output voltage of the switching power supply or linear power supply can be adjusted.

The sampling circuit 401 is connected in parallel with the output terminal of the switching power supply or the linear power supply, and the sampling circuit 401 transmits the voltage and/or current information of the output terminal to the control unit 402 .

The control unit 402 controls the set voltage V _SET output by the voltage setting circuit 400 according to the sampled voltage and/or current information.

As shown in the figure, the switching power supply or linear power supply includes an error amplifier 403, V _FB is the feedback voltage, Z1 and Z2 are the impedances in the negative feedback of the error amplifier itself, and the functions of Z1 and Z2 are to stabilize the power supply The loop performs zero-pole compensation to achieve good stability and fast response characteristics of the regulated power supply.

The output voltage V _OUT of the above-mentioned switching power supply or linear power supply is inversely proportional to the set voltage V _SET linear relationship. During steady state operation, assuming that there is no current flowing between Z1 and the three resistor nodes, then V _FB is equal to V _REF , so the relationship expressions among V _OUT , V _FB and V _SET are derived as follows:

(1) Sampling resistor R1, sampling resistor R2, setting resistor R3;

(2) Reference voltage V _REF , set voltage V _SET ;

Find the value of the output voltage V _OUT .

According to the superposition principle of the circuit:

$V_{\mathrm{Facebook}}=\frac{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2//R3}{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1+\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2//\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3}*V_{\mathrm{out}}+\frac{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1//R2}{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3+\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1//R2}{V}_{\mathrm{SET}}$ (Formula 2)

In the above formula, Rx//Ry is the resistance value of two resistors connected in parallel. Expand the parallel resistance in the above formula to get:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; Facebook</span>}}<span\; class="notranslate">\; =</span>\frac{\frac{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 3</span>}}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; +</span>\frac{\frac{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; SET</span>}}$

$\&DoubleRightArrow;V_{\mathrm{Facebook}}=\frac{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2*R3}{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1*\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2+\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1*\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3+\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2*\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3}*V_{\mathrm{out}}+\frac{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1*R2}{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1*\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2+\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout>}1*\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3+\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2*\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3}*V_{\mathrm{SET}}$ Will

$<span\; class="notranslate">\; \&DoubleRightArrow;</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; Facebook</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000041.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; SET</span>}}$

$<span\; class="notranslate">\; \&DoubleRightArrow;</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; Facebook</span>}}<span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; SET</span>}}$

Put V _FB ＝ V _REF into the above formula to get

$V_{\mathrm{out}}=(1+\frac{R1}{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="HDA0000074614870000041.png,HDA0000074614870000101.png"\; state="\{\{state\}\}">R</figure-callout>}2//R3})*V_{\mathrm{REF}}-\frac{R1}{\mathrm{<figure-callout\; id="3"\; label="R"\; filenames="HDA0000074614870000031.png,HDA0000074614870000091.png"\; state="\{\{state\}\}">R</figure-callout>}3}*V_{\mathrm{SET}}$ (Formula 3)

It can be seen from (Equation 3) that V _SET is inversely proportional to V _OUT and has a linear relationship, so by setting different given voltages, different output voltages can be obtained and the output voltage can be adjusted.

FIG. 5A is a circuit diagram of a voltage-adjustable DC regulated switching power supply according to an embodiment of the present invention. FIG. 5B is a circuit diagram of a voltage setting circuit of a voltage-adjustable DC regulated switching power supply according to an embodiment of the present invention.

Among them, the voltage-adjustable DC regulated switching power supply circuit adopts a buck topology, and the +24V power supply is supplied by a mature ACDC power supply circuit. The utility model does not improve the ACDC power supply part, and the ACDC power supply circuit in the prior art can be used. Therefore, the ACDC part is not described here. The embodiment of the utility model is also applicable to a boost topology switch regulated power supply and a buck-boost topology inverting power supply, and also adds a setting resistor and a corresponding voltage setting circuit and control unit between the voltage dividing resistors, Therefore, the purpose of adjusting the output voltage through the variable duty ratio is achieved.

In Fig. 5A, U2 includes TPS5430DDA, inductor (L2), freewheeling diode (VD2), capacitors C8, C9, resistors R1, R2 and R3 to form a buck topology DCDC step-down conversion circuit. The potential of pin 4 of the TPS5430DDA is clamped at 1.221V when it is working. Substituting the values of R1, R2 and R3 in Figure 5A into the above (Equation 3) gives the voltage output formula of the circuit in Figure 5A (in V):

V _OUT ＝25.641-10*V _SET (Formula 4)

From (Equation 4), when V _SET is less than 0.1641V, V _OUT reaches the maximum value, that is, the input voltage is 24V. After V _SET is greater than 0.1641V, V _OUT decreases linearly with the increase of V _SET , and its proportional coefficient is - 10. C6 and C7 are input capacitors; R6 and R9 form an output voltage sampling network. The single-chip microcomputer samples the output voltage signal through the on-chip 12-bit analog-to-digital converter to monitor the output voltage V _OUT . If necessary, the output voltage V _OUT Adjustment; U9 uses INA138NA, R27, R28, R29 and C41 to form an output current sampling circuit. The single-chip microcomputer samples the output current signal through the 12-bit analog-to-digital converter integrated on the chip to realize the monitoring and over-current protection of the output current. The microcontroller is the control unit described in Figure 4.

FIG. 5B is a circuit for converting a pulse width modulated signal with a second-order RC filter into an analog signal. The PWM wave output by the microcontroller drives the MOS transistor VT1, so that VT1 works in the switch state, ignoring the on-resistance of VT1, then its drain terminal is 0V when it is turned on, and 2.5V when it is turned off, so the second-order RC low-pass filter The input is a pulse width modulation signal with a pulse height of 2.5V. After filtering, the DC flow is amplified by OPA2350 and sent to R3 as a set voltage.

FIG. 6 is a circuit diagram of a voltage-adjustable DC stabilized linear power supply according to an embodiment of the present invention.

In Figure 6, U10 uses LT1764EQ, capacitors C12, C13, resistors R1, R2 and R3 to form a linear voltage conversion circuit. The potential of pin 5 of U10 is clamped at 1.21V when it is working. Substituting the values of R1, R2 and R3 in Figure 6 into the above (Formula 3) gives the voltage output formula of the circuit in Figure 6 (in V):

V _OUT ＝27.83-11*V _SET (Formula 5)

From (Formula 5), when V _SET is less than 0.718V, V _OUT reaches the maximum value, that is, when the input voltage is 20V, when V _SET is greater than 0.718V, V _OUT decreases linearly with the increase of V _SET , and its proportional coefficient is - 11. C30 and C31 are input capacitors; R6 and R9 form an output voltage sampling circuit. The single-chip microcomputer samples the output voltage signal through the on-chip 12-bit analog-to-digital converter to monitor the output voltage and adjust the output voltage when necessary. In this embodiment, only the voltage sampling circuit is shown, and in other embodiments, a current sampling circuit may also be included to provide overcurrent protection for the linear power supply of the embodiment of the present utility model. Wherein, the set voltage V _SET can be generated by using the voltage setting circuit in FIG. 5B above, or other voltage generating circuits in the prior art, and the single-chip microcomputer is the control unit described in FIG. 4 .

Fig. 7 is a circuit diagram of a single-chip microcomputer in the voltage-adjustable DC stabilized power supply circuit of the embodiment of the utility model.

The single-chip microcomputer U7 uses its own integrated 12-bit analog-to-digital converter to realize the sampling of the output current and voltage. Pin 61 is the input of the sampling current signal, and pin 60 is the input of the sampling voltage signal. After the single-chip microcomputer detects that the sampling current exceeds the set value , output the enable signal through pin 44, prohibit U2 and turn off the output voltage, and realize overcurrent protection; the single-chip microcomputer detects the sampling voltage, if the output deviates from the setting due to the discreteness of component parameters or system time drift or temperature drift, etc. value, the output voltage can be controlled and adjusted, thereby reducing the influence of system temperature drift, time drift, and component parameter tolerance. Pin 18 outputs a pulse width modulation signal (PWM) to the voltage setting circuit in Figure 5B, thereby Get the set voltage, the set voltage controls the output voltage of the voltage-adjustable DC power supply through the setting resistor R3, and the pin 44 outputs to the enable signal pin 5 of U2 (TPS5430DDA) (through R7 in the middle), only U2 can work only when pin 44 outputs a high level, and outputs an adjustable voltage. K1 of the keyboard circuit is connected to pin 20 of U7, and K2 is connected to pin 21 of U7. After the power is turned on, a default value is output. Press the K1 key to increase the output voltage, and press the K2 key to decrease the output voltage.

The voltage adjustment used as an adjustable DC stabilized power supply in the prior art also has disadvantages such as difficult voltage adjustment, low adjustment accuracy, and poor consistency. With the development of electronic technology, digital potentiometers have appeared to replace multi-turn potentiometers, but the output resolution of digital potentiometers is low, generally below 10 bits, and the adjustment accuracy cannot reach a high level. In the embodiment of the present invention, the resolution of the set voltage can be 12 bits, 14 bits, 16 bits, etc. To improve the resolution of the output voltage, it is only necessary to increase the resolution of the set voltage V _SET .

FIG. 8 is a schematic diagram of a voltage-adjustable DC linear power supply according to an embodiment of the present invention.

In this embodiment, a transistor is connected in series between the input terminal V _IN and the output terminal V _OUT , the transistor is also connected to the output terminal of the error amplifier, the negative input terminal of the error amplifier is connected to the reference source, and the positive input terminal of the error amplifier is connected to Output feedback, the output feedback is obtained by dividing the output voltage through the first voltage dividing resistor and the second voltage dividing resistor. The transistor may be a PNP transistor (the specific connection method is shown in the figure). The transistor can also be a PMOS transistor, wherein the input terminal V _IN is connected to the emitter E of the PNP transistor or the source S of the PMOS transistor; the output terminal V _OUT is connected to the collector C of the PNP transistor or the drain D of the PMOS transistor; The input terminal of the amplifier is connected to the base B of the PNP transistor or the gate G of the PMOS transistor; the positive input terminal of the error amplifier is connected to the common node of R1, R2 and R3; the negative input terminal of the error amplifier is connected to the reference source.

By connecting a setting resistor R3 to the connection point of the voltage dividing resistor R1 and R2, and inputting the setting voltage V _SET through the setting resistor R3, the output V _OUT of the DC stabilized linear power supply can be adjusted, and through the corresponding control unit ( (not shown in the figure) collect the voltage and current at the output terminal, and output the set voltage V _SET according to Equation 3, so as to adjust the output voltage V _OUT . The error amplifier outputs to the base (B) of the triode used as a variable resistor or the G pole of the MOS tube to adjust the resistance value, thereby changing the output voltage.

As shown in Figure 9A, the output is a circuit diagram of +6V DC auxiliary power supply in the embodiment of the utility model, as shown in Figure 9B, the circuit diagram of the output is +5VA auxiliary power supply in the embodiment of the utility model, as shown in Figure 9C. In the embodiment of the utility model, the output is the circuit diagram of +3.3V auxiliary power supply, in which the DCDC conversion chip TPS5430 and the power supply circuit composed of peripheral inductors, resistors, capacitors and diodes convert the DC voltage +24V into +6VDC, and +6VDC passes through the linear power supply chip LT1764EQ and its associated circuit components obtain +5VA power supply, and +5VA obtains +3.3V power supply through the linear power supply chip REG1117-3.3 and its associated circuit components. +3.3V supplies power to the single-chip microcomputer and digital interface of the system; +5VA supplies power to the operational amplifier OPA2350 and the voltage reference source.

Through the embodiment of the utility model, the output voltage is adjusted electronically, which avoids problems such as wear and failure caused by mechanical structure adjustment in the prior art, and more accurate adjustment of the output voltage of the power supply can be realized through the control chip.

The specific embodiments described above have further described the purpose, technical solutions and beneficial effects of the present utility model in detail. Within the protection scope of the utility model, any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the utility model shall be included in the protection scope of the utility model.

Claims (6)

1. A voltage-adjustable DC stabilized power supply. In a switching power supply or a linear power supply, the first voltage dividing resistor and the second voltage dividing resistor in the switching power supply or the linear power supply feed back the output voltage to the negative input of the error amplifier The terminal regulates the output voltage, and it is characterized in that it also includes: Setting resistance, voltage setting circuit, sampling circuit and control unit; One end of the setting resistor is connected to the feedback voltage point between the first voltage dividing resistor and the second voltage dividing resistor, and the other end is connected to the voltage setting circuit; The voltage setting circuit is connected to the switching power supply or linear power supply through the setting resistor to generate a setting voltage, and the output voltage of the switching power supply or linear power supply is inversely proportional to the setting voltage. ; The sampling circuit is connected in parallel with the output terminal of the switching power supply or the linear power supply, and the sampling circuit transmits the voltage and/or current information of the output terminal to the control unit; The control unit controls the set voltage output by the voltage setting circuit according to the sampled voltage and/or current information. 2. A voltage-adjustable DC stabilized power supply according to claim 1, characterized in that, the output voltage of the switching power supply or the linear power supply is inversely proportional to the set voltage and the linear relationship means, ${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; out</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; /</span><span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; REF</span>}}<span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; *</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; SET</span>}}<span\; class="notranslate">\; ;</span>$ Where VOUT is the output voltage, VREF is the reference voltage, VSET is the setting voltage, R1 is the first voltage dividing resistor, R2 is the second voltage dividing resistor, and R3 is the setting resistor. 3. A voltage-adjustable DC regulated power supply according to claim 1, characterized in that, said switching power supply comprises a buck topology switching regulated power supply, a boost topology switching regulated power supply and a buck-boost topology the inverting power supply. 4. A voltage-adjustable DC stabilized power supply according to claim 1, wherein the linear power supply comprises a transistor connected in series between the input end and the output end of the linear power supply, and the transistor is also connected to the error The output terminal of the amplifier, the negative input terminal of the error amplifier is connected to the reference source, the positive input terminal of the error amplifier is connected to the output feedback, and the output feedback is obtained by dividing the output voltage through the first voltage dividing resistor and the second voltage dividing resistor. 5. A voltage-adjustable DC stabilized power supply according to claim 4, wherein the transistor is a PNP transistor, the emitter of the PNP transistor is connected to the input terminal, and the collector is connected to the output terminal, The base is connected to the output of the error amplifier. 6. A voltage-adjustable DC stabilized power supply according to claim 4, wherein the transistor is a PMOS transistor, the source of the PMOS transistor is connected to the input terminal, the drain is connected to the output terminal, and the gate The pole is connected to the output terminal of the error amplifier.

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