CN201829483U - Lead frame and packaging structure of flipchip thin quad flat non-leaded package (FCTQFN) - Google Patents
Lead frame and packaging structure of flipchip thin quad flat non-leaded package (FCTQFN) Download PDFInfo
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- CN201829483U CN201829483U CN 201020269479 CN201020269479U CN201829483U CN 201829483 U CN201829483 U CN 201829483U CN 201020269479 CN201020269479 CN 201020269479 CN 201020269479 U CN201020269479 U CN 201020269479U CN 201829483 U CN201829483 U CN 201829483U
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- lead frame
- pin
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- fctqfn
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- Lead Frames For Integrated Circuits (AREA)
Abstract
The utility model provides a lead frame and a packaging structure of flipchip thin quad flat non-leaded package (FCTQFN), which belongs to the technical field of chip package. The lead frame comprises a first area part corresponding to the location of a packaged chip, and at the positon on the first area part corresponding to a pad of the chip, pins of the lead frame are arranged on the same plane approximately. A lead frame array of the FCTQFN comprises a plurality of lead frames of the FCTQFN which are arranged in rows and columns. The packaging structure of the FCTQFN comprises the lead frame of the FCTQFN, the packaged chip and a packaging body which is matched with the lead frame in structure, and the chip is directly flipchip welded onto the lead frame through flipchip bumping points on the pins of the lead frame. The lead frame of the utility model has simple and compact structure and low cost, and can meet the package demand of chip with large output current, and the packaging structure formed by the lead frame has small volume.
Description
Technical field
The utility model belongs to the chip encapsulation technology field, be specifically related to a kind of four thin limits and do not have lead packages (Thin Quad Flat Non-leaded Package, TQFN) lead frame, relate in particular to four thin limits of upside-down mounting and do not have lead packages (Flipchip Thin Quad Flat Non-leadedPackage, lead frame FCTQFN) and encapsulating structure thereof.
Background technology
Encapsulation is very important step in the electronic device manufacture process, by encapsulation process, various chips (chip die) direct circuit can be drawn, so that be electrically connected with external circuit.To various chip, the packing forms that can select it to be suitable for mutually usually.For being suitable for the miniaturization development of electronic device, comprise that the encapsulating structure of chip, lead frame, packaging body also requires miniaturization, slimming development.
Wherein, TQFN (Thin Quad Flat Non-leaded Package, four thin limits do not have lead packages) packing forms is commonly used to the chip that power requirement is arranged of thinner package.Other packing forms is outstanding relatively aspect miniaturization, slimming for TQFN.Also as in most encapsulating structures, include the lead frame of metal " skeleton " form that is used for directly being welded to connect chip, lead frame can support for chip provides machinery, and can realize being connected of chip and external circuit.Different packing forms correspondences have different lead frame structure.
Figure 1 shows that the TQFN lead frame structure schematic diagram of prior art.Lead frame 600 embodiment illustrated in fig. 1 comprises island 620 and is arranged at island 620 20 pins 610 all around that the pin 610 outside island 620 zones is traditionally arranged to be small size, as long as its area can satisfy the spun gold welding.Island 620 is generally used for carrying packaged chip (not shown), after the chip that will encapsulate is placed in island 620 zones, carries out gold wire bonding by routing technology between chip and the pin; Adopt plastic-sealed body (adopting potting resin to form usually) encapsulated moulding to form integrated circuit (IC) device after further finishing the subsequent technique process.
Yet along with development of electronic technology, increasing IC device is required to export big electric current with low-voltage, and still, big electric current is responsive unusually to interconnection resistance, and interconnection resistance is high more, and it is big more to generate heat, and loss obviously increases.Therefore, for this IC device, the interconnection resistance problem is more outstanding.Wherein, circuit package is to cause a major reason of high interconnection resistance, and for example, the gold wire bonding of the TQFN packing forms of lead frame shown in Figure 1 may bring bigger interconnection resistance.For reducing this part interconnection resistance, obviously be arm and a leg from the angle of overstriking spun gold.Therefore, when adopting TQFN lead frame shown in Figure 1 that the chip of big output current is carried out the TQFN encapsulation, can not satisfy the requirement of high-termal conductivity, big electric current low cost, low inductive effect.
Further, when adopting leadframe package shown in Figure 1, can only be with the structure that exposes with the mid portion island; And for satisfying the requirement of gold wire bonding, must leave bigger space between island and the pin, be unfavorable for the miniaturization of packaging.
In view of this, (Flipchip, FC) sealing packing technique have proposed the lead frame of a kind of TQFN of new structure to the utility model in conjunction with TQFN encapsulation technology and upside-down mounting.
The utility model content
The technical problems to be solved in the utility model is, satisfies the requirement of the big output current of chip and low packaging cost and makes encapsulating structure compact more.
For solving above technical problem, the utility model provides four thin limits of a kind of upside-down mounting not have the lead frame of lead packages, it comprises the first area part corresponding with the placement location of packed chip, it is characterized in that, corresponding to described bonding pads position, the pin of described lead frame is set on the roughly same plane on the part of described first area.
According to lead frame provided by the utility model, wherein, the pin of described lead frame comprises first pin at the edge that is arranged on described first area part, and described first pin is extended in the middle of described first area by the edge of described first area.Described pin is provided with one or more and is used for and the direct-connected ball point of planting of described bonding pads.
Particularly, described first pin can be long finger-like.
As the preferred technique scheme, the pin of described lead frame comprises second pin of the central authorities that are arranged on described first area part.
As the preferred technique scheme, described lead frame comprises the district that etches partially that is connected with described pin, the described thickness that etches partially the thickness in district less than described pin.
According to the another aspect of the utility model, the array of leadframes that provides four thin limits of a kind of upside-down mounting not have lead packages wherein, comprises a plurality of the above any lead frame that reach of arranging by row and column.
According to the utility model more on the one hand, provide four thin limits of a kind of upside-down mounting not have the encapsulating structure of lead packages, it comprises:
Any lead frame that the above reaches;
Packaged chip; And
Structure matching is in the packaging body of described lead frame;
Wherein, described chip is put direct flip chip bonding and is connected on the described lead frame by the ball of planting on the pin of described lead frame.
According to encapsulating structure provided by the utility model, the output current of described chip is about 10 amperes to 20 amperes.
As the preferred technique scheme, described lead frame comprises that described lead frame comprises the district that etches partially that is connected with described pin, the described thickness that etches partially the thickness in district less than described pin, and described packaging body parcel is described to etch partially the district so that it does not expose.
Technique effect of the present utility model is, during the leadframe package chip of this utility model, saved expensive spun gold fully, saved the operation of gold wire bonding and can save the needed space of gold wire bonding.Therefore, this lead frame structure is simple compact, cost is low, and is little with the volume of the encapsulating structure of its formation.In addition, planting the upside-down mounting of ball point when directly welding, the circuit that it is can conducting bigger and interconnection resistance is little, reliability is high, thus can adapt to the Chip Packaging requirement of big output current.
Description of drawings
Fig. 1 is the TQFN lead frame structure schematic diagram of prior art;
Fig. 2 is the structural representation of the FCTQFN lead frame that provided according to the utility model embodiment;
Fig. 3 is the A-A cross section structure schematic diagram after leadframe package chip shown in Figure 2 forms encapsulating structure;
Fig. 4 is the B-B cross section structure schematic diagram after leadframe package chip shown in Figure 2 forms encapsulating structure.
Embodiment
What introduce below is a plurality of some in may embodiment of the present utility model, aims to provide basic understanding of the present utility model, is not intended to confirm key of the present utility model or conclusive key element or limits claimed scope.In the accompanying drawings, for the sake of clarity, might amplify the thickness of layer or the area in zone, but should not be considered to the proportionate relationship that strictness has reflected physical dimension as schematic diagram.In the accompanying drawing, identical label refers to identical structure division, therefore will omit description of them.
The structural representation of the FCTQFN lead frame that is provided according to the utility model embodiment is provided; Figure 3 shows that the A-A cross section structure schematic diagram after leadframe package chip shown in Figure 2 forms encapsulating structure; Figure 4 shows that the B-B cross section structure schematic diagram after leadframe package chip shown in Figure 2 forms encapsulating structure.As shown in Figure 3 and Figure 4, this utility model also provides a kind of encapsulating structure, it comprises lead frame shown in Figure 2 700, packaged chip 1000 and packaging body 750, and chip 1000 is connected on the lead frame 700 by the ball point 760 direct flip chip bondings of planting on the pin of lead frame 700.
Complex chart 2 is to shown in Figure 4, and FCTQFN lead frame 700 is used for upside-down mounting welding packaged chip (chip die) 1000, and structure shown in Figure 2 is the front view of lead frame, and chip (not shown) flip chip bonding is connected to the back side of lead frame shown in the figure.Wherein, the lead frame 700 that dashed region is this embodiment is welded to connect chip 1000 backs, 1000 corresponding regional locations of placing of chip by planting ball point 760, and dashed region is substantially equal to the area of lead frame 700.In this utility model, the zone definitions that we place the frame of broken lines 730 of packed chip with shown in Figure 2 being used to is the first area part of FCTQFN lead frame, and the lead frame outside the first area other the zone we be defined as the second area part, just as shown in FIG., the FCTQFN lead frame is made up of the first area part basically, the second area part is only as the narrow and small reservation edge after the Chip Packaging, and it can be filled packaging body (being plastic-sealed body in this embodiment) to wrap up packed chip (as shown in Figure 3 and Figure 4) fully.In another embodiment, lead frame 700 only comprises the first area part, also is that the second area part can be saved fully.In this embodiment, the first area be shaped as rectangle, but the shape of first area and area size can be determined according to packaged chip 1000.Than the TQFN lead frame of prior art shown in Figure 1, in Fig. 1, packed chip is to be positioned over the island zone, and pin is to place fully outside the island zone, therefore, can not directly be welded to connect between chip and the lead frame; In FCTQFN lead frame 700 shown in Figure 2, pin can place in the part of first area fully, thereby the pin of lead frame can be set corresponding to the position of bonding pads.
Continuation as 2 is to shown in Figure 4, and FCTQFN lead frame 700 comprises a plurality of pins 7101 to 7120, and in this embodiment, FCTQFN lead frame 700 equally also is the lead frame of 20 pin configuration.But the pin number of FCTQFN lead frame is not limited by the utility model embodiment, and those skilled in the art can require to select the lead frame of the pin of concrete quantity according to the circuit function of packaged chip.Wherein, pin 7101 to 7119 is distributed in the edge, surrounding of first area, and pin 7101 to 7119 extends in the middle of the first area; Pin 7101 to 7110,7117,7118,7119 extends longer relatively to the centre, probably be long finger-like; Pin 7120 is arranged on the middle section of described first area, and area is bigger, and it can be corresponding be welded to connect with the pad of the middle section of chip 1000.Pin 7101 to 7120 concrete distributing positions and shape are not limited by the utility model embodiment, (pad is the I/O port of chip according to the pad of packaged chip 1000, its when encapsulation directly with plant ball point 760 and be welded to connect) the position, pin correspondingly is arranged at the pad locations place of chip 1000, thereby can directly directly be connected with bonding pads by planting ball point; Those skilled in the art can corresponding area and the shape that designs each pin.Therefore, the lead frame of this structure is when packaged chip 1000, and the pad locations of chip 1000 is not subjected to the position limit of the pin of lead frame, and the pad locations of chip 1000 can design more neatly.
Continue as 3 and shown in Figure 4, all pins are arranged on roughly the same plane, and therefore, chip can essentially horizontally be fixedly welded on the pin.Be provided with one or more on the pin and be used for the corresponding direct-connected ball point 760 of planting of pad with chip 1000; The structure of the opposed flattened that can form between the pin, its ball point 760 of planting that also helps on the pin well contacts with pad (not shown) on the chip 1000.
Continue as 2 to shown in Figure 4, in an embodiment, lead frame 700 also comprise be connected with pin etch partially the district 740, wherein, etching partially district 740 connects as one with pin, etch partially the thickness of district's thickness of 740 less than pin, in this embodiment, the thickness that etches partially district 740 is approximately half of thickness of pin.Therefore, after forming packaging body 750, the also packed body 750 in below that etches partially district 740 wraps up, and etches partially district 740 and does not expose, and is difficult for being stripped between chip 1000 and the pin thereby can make, and the reliability of encapsulating structure is provided.
From the above, when adopting this lead frame 700 upside-down mountings welding packaged chip, saved expensive spun gold fully, saved the operation of gold wire bonding and can save the needed space of gold wire bonding.Therefore, this lead frame structure is simple compact, cost is low, and is little with the volume of the encapsulating structure of its formation.In addition, the form resistance that ball point directly is welded to connect is less, contact area is big to plant, therefore can conducting bigger electric current and generate heat little, the encapsulation of this lead frame is born 5-10 that encapsulation that electric current can reach the encapsulation of the thick spun gold of corresponding employing bears electric current doubly, thereby can satisfy the encapsulation requirement of the chip of big output current.Therefore, chip 1000 can be the chip of big output current, and the output current scope of chip is about 10 amperes to 20 amperes, is in particular 12 amperes.
Continue as 2 to shown in Figure 4, in the encapsulating structure of embodiment, pin 7101 to 7110,7117,7118,7119 and 7120 bottom are that not packed body 750 wraps up, it exposes relatively so that further be connected with the outside line of encapsulating structure, and helps the heat radiation of the chip 1000 that is connected with pin.In this embodiment,, expose, chip 1000 is easy to by pin 7120 heat radiations by pin 7120 relative packaging bodies 750 are set because pin 7120 areas are bigger.And according to the chip cooling needs, those skilled in the art can further be provided with exposed area 770.
In addition, because lead frame 700 is to be welded to connect chip 1000 by planting ball point 760, for making its welding more firm, the surface of lead frame 700 prevents oxidized as far as possible.
The utility model further provides the FCTQFN array of leadframes of being made up of FCTQFN lead frame shown in a plurality of figure.In the actual package process, be to the encapsulation formation simultaneously side by side of a plurality of chips.Therefore, before encapsulation, the FCTQFN lead frame is not unit independently, but the form formation FCTQFN array of leadframes of will a plurality of FCTQFN lead frames 700 shown in Figure 2 arranging by multiple lines and multiple rows helps efficient encapsulation like this.
The utility model further provides a kind of FCTQFN encapsulating structure, this encapsulating structure be by the above and lead frame, packaged chip and structure matching in the packaging body (all not shown among Fig. 2, Fig. 3 and Fig. 4) of described lead frame; Chip is put direct flip chip bonding and is connected on the lead frame by the ball of planting on the interior pin of lead frame.Wherein, packaged chip can be the chip of big output current, and preferably, the output current scope of chip is about 10 amperes to 20 amperes, is in particular 12 amperes.The encapsulation of this encapsulating structure is born 5-10 that encapsulation that electric current can reach the encapsulation of the thick spun gold of corresponding employing bears electric current doubly.
Above example has mainly illustrated FCTQFN lead frame of the present utility model, FCTQFN array of leadframes and encapsulating structure.Although only some of them execution mode of the present utility model is described, those of ordinary skills should understand, and the utility model can be in not departing from its purport and scope be implemented with many other forms.Therefore, example of being showed and execution mode are regarded as illustrative and not restrictive, and under situation about not breaking away from as defined the utility model spirit of appended each claim and scope, the utility model may be contained various modifications and replacement.
Claims (10)
1. four thin limits of a upside-down mounting do not have the lead frame of lead packages, comprise the first area part corresponding with the placement location of packed chip, it is characterized in that corresponding to described bonding pads position, the pin of described lead frame is set up at grade on the part of described first area.
2. lead frame as claimed in claim 1 is characterized in that, the pin of described lead frame comprises first pin at the edge that is arranged on described first area part, and described first pin is extended in the middle of described first area by the edge of described first area.
3. lead frame as claimed in claim 2 is characterized in that, described first pin is long finger-like.
4. lead frame as claimed in claim 2 is characterized in that, the pin of described lead frame also comprises second pin of the central authorities that are arranged on described first area part.
5. lead frame as claimed in claim 1 is characterized in that, described pin is provided with one or more and is used for and the direct-connected ball point of planting of described bonding pads.
6. lead frame as claimed in claim 1 is characterized in that, described lead frame comprises the district that etches partially that is connected with described pin, the described thickness that etches partially the thickness in district less than described pin.
7. four thin limits of a upside-down mounting do not have the array of leadframes of lead packages, it is characterized in that, comprise a plurality of by row and column arrange as each described lead frame in the claim 1 to 6.
8. four thin limits of a upside-down mounting do not have the encapsulating structure of lead packages, it is characterized in that, comprising:
As each described lead frame in the claim 1 to 6;
Packaged chip; And
Structure matching is in the packaging body of described lead frame;
Wherein, described chip is put direct flip chip bonding and is connected on the described lead frame by the ball of planting on the pin of described lead frame.
9. encapsulating structure as claimed in claim 8 is characterized in that, the output current of described chip is about 10 amperes to 20 amperes.
10. encapsulating structure as claimed in claim 8 is characterized in that, described lead frame comprises the district that etches partially that is connected with described pin, the described thickness that etches partially the thickness in district less than described pin, and described packaging body parcel is described to etch partially the district so that it does not expose.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020269479 CN201829483U (en) | 2010-07-12 | 2010-07-12 | Lead frame and packaging structure of flipchip thin quad flat non-leaded package (FCTQFN) |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020269479 CN201829483U (en) | 2010-07-12 | 2010-07-12 | Lead frame and packaging structure of flipchip thin quad flat non-leaded package (FCTQFN) |
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| Publication Number | Publication Date |
|---|---|
| CN201829483U true CN201829483U (en) | 2011-05-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201020269479 Expired - Lifetime CN201829483U (en) | 2010-07-12 | 2010-07-12 | Lead frame and packaging structure of flipchip thin quad flat non-leaded package (FCTQFN) |
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| CN (1) | CN201829483U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332440A (en) * | 2010-07-12 | 2012-01-25 | 无锡华润安盛科技有限公司 | Inverted lead frame and packaging structure thereof |
| CN107680913A (en) * | 2011-10-10 | 2018-02-09 | 马克西姆综合产品公司 | Use the wafer-level packaging method of lead frame |
-
2010
- 2010-07-12 CN CN 201020269479 patent/CN201829483U/en not_active Expired - Lifetime
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102332440A (en) * | 2010-07-12 | 2012-01-25 | 无锡华润安盛科技有限公司 | Inverted lead frame and packaging structure thereof |
| CN107680913A (en) * | 2011-10-10 | 2018-02-09 | 马克西姆综合产品公司 | Use the wafer-level packaging method of lead frame |
| CN107680913B (en) * | 2011-10-10 | 2021-07-30 | 马克西姆综合产品公司 | Wafer level packaging method using lead frame |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CX01 | Expiry of patent term | ||
| CX01 | Expiry of patent term |
Granted publication date: 20110511 |