CN201813350U - Low Voltage Rail-to-Rail Operational Amplifier Circuit - Google Patents

Abstract

The utility model relates to a low-voltage rail-to-rail operational amplifier circuit. The utility model comprises three resistors, three capacitors, 19 P-type MOS tubes and 17 N-type MOS tubes. The circuit adopts sub-circuit structures such as a current-mode transconductor suitable for low voltage, a folded cascode amplifier circuit and a low-power class AB push-pull output circuit, which overcomes the shortcomings of the traditional voltage-type operational amplifier that is deeply limited by the threshold voltage , using circuit units suitable for low-voltage requirements, and improving the circuit structure, thereby achieving low-voltage, low-power performance under conventional CMOS technology. The utility model adopts a current-type transconductor to obtain a rail-to-rail common mode voltage input and a good frequency response; the gain stage adopts a folded cascode amplifier circuit to obtain a high voltage gain and a high power supply rejection ratio; The output stage adopts a class AB push-pull output circuit with two pairs of inverters to obtain high drive capability, rail-to-rail common mode voltage output and extremely low harmonic distortion.

Description

Low pressure rail-to-rail operational amplification circuit

Technical field

The utility model belongs to wireless communication field, relate to a kind of low pressure rail-to-rail operational amplification circuit, be mainly used in indoor cordless telephone, cellular mobile phone, personal digital assistant, portable sound system, battery monitoring system, with battery powered portable electric appts etc.

Technical background

Mobile phone in recent years, personal digital assistant, portable electronic measuring instrument etc. is used widely with battery powered electronic product, and an urgent demand we adopt the circuit of low-voltage, low-power consumption to reduce the battery number, prolongs battery service time.We know that the total power consumption of a Circuits System is approximately equal to the switch power consumption NC that capacitor charge and discharge causes _EqV ² _DD, quiescent current power consumption I _DDV _DDWith instantaneous short circuit current power dissipation I _ShortV _DDSum, the power consumption that can know circuit directly and supply voltage be directly proportional, therefore have only the reduction supply voltage could significantly reduce the power consumption of circuit.May cause the minimizing to a certain degree of circuit frequency bandwidth and voltage swing although reduce supply voltage, this point can overcome by the circuit optimization design.Another benefit that the reduction supply voltage brings is to have reduced the required battery number of circuit operate as normal, has also just reduced the volume of electronic product, makes them be more convenient for carrying.Reduce the withstand voltage reduction that supply voltage also makes transistor and born in addition, increased the stability of circuit.Yet we know that an electronic product always comprises artificial circuit part and digital circuit part, and the operating voltage of digital circuit requires low, and power consumption is less, and analog circuit to the requirement of supply voltage than digital circuit height, power consumption is also big than digital circuit.Therefore in order to reduce the power consumption of circuit, realize that analog-and digital-circuit can both be operated under the low-voltage with regard to the necessary analog circuit that adapts to low-voltage of designing.

Summary of the invention

The purpose of this utility model is in order to overcome the weak point of prior art, to propose a kind of low pressure rail-to-rail operational amplification circuit.

The utility model comprises three resistance, three electric capacity, 19 P type metal-oxide-semiconductors and 17 N type metal-oxide-semiconductors, specifically:

The one P type metal-oxide-semiconductor P ₁Drain electrode and biasing resistor R ₁An end connect a N type metal-oxide-semiconductor N ₁Source electrode and grid and the 4th N type metal-oxide-semiconductor N ₄Grid and the 2nd P type metal-oxide-semiconductor P ₂Drain electrode connect the 3rd P type metal-oxide-semiconductor P ₃Grid and drain electrode and divider resistance R ₂An end connect; The 4th P type metal-oxide-semiconductor P ₄Drain and gate and the 5th P type metal-oxide-semiconductor P ₅Grid and the 3rd P type metal-oxide-semiconductor P ₃Source electrode connect the 4th N type metal-oxide-semiconductor N ₄Source electrode, the 5th N type metal-oxide-semiconductor N ₅Drain electrode and the 6th N type metal-oxide-semiconductor N ₆Drain electrode and divider resistance R ₂The other end connect; The 3rd N type metal-oxide-semiconductor N ₃Grid and source electrode, the 2nd N type metal-oxide-semiconductor N ₂Grid, the 5th N type metal-oxide-semiconductor N ₅Grid and the 6th P type metal-oxide-semiconductor P ₆Source electrode connect the 5th P type metal-oxide-semiconductor P ₅Drain electrode, the 6th P type metal-oxide-semiconductor P ₆Drain electrode, the 6th N type metal-oxide-semiconductor N ₆Grid and the 7th P type metal-oxide-semiconductor P ₇Source electrode connect the 6th P type metal-oxide-semiconductor P ₆Grid be connected the 7th P type metal-oxide-semiconductor P with the negative terminal Vin-of differential signal input ₇Grid be connected with the anode Vin+ of differential signal input; The 2nd N type metal-oxide-semiconductor N ₂Source electrode, the 6th N type metal-oxide-semiconductor N ₆Source electrode, the 9th P type metal-oxide-semiconductor P ₉Source electrode and the 11 P type metal-oxide-semiconductor P ₁₁Drain electrode connect; The 8th P type metal-oxide-semiconductor P ₈Source electrode, the tenth P type metal-oxide-semiconductor P ₁₀Drain electrode, the 5th N type metal-oxide-semiconductor N ₅Source electrode and the 8th N type metal-oxide-semiconductor N ₈Source electrode connect; The 7th N type metal-oxide-semiconductor N ₇Grid and source electrode and the 8th N type metal-oxide-semiconductor N ₈Grid and the 7th P type metal-oxide-semiconductor P ₇Drain electrode connect the 9th N type metal-oxide-semiconductor N ₉Grid and source electrode and the tenth N type metal-oxide-semiconductor N ₁₀Grid and the 8th P type metal-oxide-semiconductor P ₈Drain electrode connect; The tenth N type metal-oxide-semiconductor N ₁₀Source electrode, the 11 N type metal-oxide-semiconductor N ₁₁The coral utmost point, the 9th P type metal-oxide-semiconductor P ₉Drain electrode and the 12 P type metal-oxide-semiconductor P ₁₂The drain electrode and the second filter capacitor C ₂An end connect the 13 N type metal-oxide-semiconductor N ₁₃Source electrode, the 14 N type metal-oxide-semiconductor N ₁₄Source electrode, 16 P type metal-oxide-semiconductor P ₁₆Drain electrode, 17 P type metal-oxide-semiconductor P ₁₇Drain electrode and load capacitance C ₃An end and load resistance R ₃An end and the second filter capacitor C ₂The other end connect load capacitance C ₃The other end and load resistance R ₃Other end ground connection; The 11 N type metal-oxide-semiconductor N ₁₁Source electrode, the 13 P type metal-oxide-semiconductor P ₁₃Drain electrode, the 14 P type metal-oxide-semiconductor P ₁₄The coral utmost point and the 18 P type metal-oxide-semiconductor P ₁₈The coral utmost point and the first filter capacitor C ₁An end connect the first filter capacitor C ₁The other end and the 12 P type metal-oxide-semiconductor P ₁₂Source electrode connect; The 15 P type metal-oxide-semiconductor P ₁₅Drain and gate, the 14 P type metal-oxide-semiconductor P ₁₄Drain electrode, the 16 P type metal-oxide-semiconductor P ₁₆Grid, the 12 N type metal-oxide-semiconductor N ₁₂Source electrode and the 13 N type metal-oxide-semiconductor N ₁₃The coral utmost point connect; The 15 N type metal-oxide-semiconductor N ₁₅Source electrode and grid, the 14 N type metal-oxide-semiconductor N ₁₄Grid, the 16 N type metal-oxide-semiconductor N ₁₆Source electrode, the 17 P type metal-oxide-semiconductor P ₁₇The coral utmost point and the 18 P type metal-oxide-semiconductor P ₁₈Drain electrode connect the 16 N type metal-oxide-semiconductor N ₁₆The coral utmost point and the 17 N type metal-oxide-semiconductor N ₁₇The coral utmost point and the 12 N type metal-oxide-semiconductor N ₁₂The coral utmost point connect the 17 N type metal-oxide-semiconductor N ₁₇Source electrode and 19 P type metal-oxide-semiconductor P ₁₉Drain electrode connect.

The one P type metal-oxide-semiconductor P ₁Grid, the 2nd P type metal-oxide-semiconductor P ₂Grid, the tenth P type metal-oxide-semiconductor P ₁₀Grid, the 11 P type metal-oxide-semiconductor P ₁₁Grid, the 13 P type metal-oxide-semiconductor P ₁₃Grid and the 19 P type metal-oxide-semiconductor P ₁₉Grid connect; The one P type metal-oxide-semiconductor P ₁Source electrode, the 2nd P type metal-oxide-semiconductor P ₂Source electrode, the 4th P type metal-oxide-semiconductor P ₄Source electrode, the 5th P type metal-oxide-semiconductor P ₅Source electrode, the tenth P type metal-oxide-semiconductor P ₁₀Source electrode, the 11 P type metal-oxide-semiconductor P ₁₁Source electrode, the 13 P type metal-oxide-semiconductor P ₁₃Source electrode, the 14 P type metal-oxide-semiconductor P ₁₄Source electrode, the 15 P type metal-oxide-semiconductor P ₁₅Source electrode, the 16 P type metal-oxide-semiconductor P ₁₆Source electrode, the 17 P type metal-oxide-semiconductor P ₁₇Source electrode, the 18 P type metal-oxide-semiconductor P ₁₈Source electrode, the 19 P type metal-oxide-semiconductor P ₁₉Source electrode and the 12 P type metal-oxide-semiconductor P ₁₂Substrate ground connection.

The one N type metal-oxide-semiconductor N ₁Drain electrode, the 2nd N type metal-oxide-semiconductor N ₂Drain electrode, the 3rd N type metal-oxide-semiconductor N ₃Drain electrode, the 4th N type metal-oxide-semiconductor N ₄Drain electrode, the 7th N type metal-oxide-semiconductor N ₇Drain electrode, the 8th N type metal-oxide-semiconductor N ₈Drain electrode, the 9th N type metal-oxide-semiconductor N ₉Drain electrode, the tenth N type metal-oxide-semiconductor N ₁₀Drain electrode, the 11 N type metal-oxide-semiconductor N ₁₁Drain electrode, the 12 N type metal-oxide-semiconductor N ₁₂Drain electrode, the 13 N type metal-oxide-semiconductor N ₁₃Drain electrode, the 14 N type metal-oxide-semiconductor N ₁₄Drain electrode, the 15 N type metal-oxide-semiconductor N ₁₅Drain electrode, the 16 N type metal-oxide-semiconductor N ₁₆Drain electrode, the 17 N type metal-oxide-semiconductor N ₁₇Drain electrode, the 5th N type metal-oxide-semiconductor N ₅Substrate, the 6th N type metal-oxide-semiconductor N ₆Substrate, the 8th P type metal-oxide-semiconductor P ₈The coral utmost point, the 9th P type metal-oxide-semiconductor P ₉The coral utmost point, the 12 P type metal-oxide-semiconductor P ₁₂The coral utmost point and biasing resistor R ₁The other end all be connected with 1.5V power vd D.

The utility model has overcome the shortcoming that traditional electrical die mould operational amplifier is limited by threshold voltage deeply, adopted and be suitable for the circuit unit that low-voltage requires, on circuit structure, improve, thereby under the CMOS of routine technology, realized the performance of low-voltage, low-power consumption.This circuit adopts the current mode trsanscondutor, has obtained input of rail-to-rail common-mode voltage and good frequency response; Gain stage adopts collapsible cascade amplifying circuit, has obtained high voltage gain and high Power Supply Rejection Ratio; Output stage adopts the AB class push-pull output circuit of two pairs of inverters, has obtained high driving ability, has output of rail-to-rail common-mode voltage and extremely low harmonic distortion.

Description of drawings

Fig. 1 is a circuit diagram of the present utility model.

Embodiment

As shown in Figure 1, a kind of low pressure rail-to-rail operational amplification circuit comprises three resistance, three electric capacity, 19 P type metal-oxide-semiconductors and 17 N type metal-oxide-semiconductors, specifically:

The one P type metal-oxide-semiconductor P ₁Drain electrode and biasing resistor R ₁An end connect a N type metal-oxide-semiconductor N ₁Source electrode and grid and the 4th N type metal-oxide-semiconductor N ₄Grid and the 2nd P type metal-oxide-semiconductor P ₂Drain electrode connect the 3rd P type metal-oxide-semiconductor P ₃Grid and drain electrode and divider resistance R ₂An end connect; The 4th P type metal-oxide-semiconductor P ₄Drain and gate and the 5th P type metal-oxide-semiconductor P ₅Grid and the 3rd P type metal-oxide-semiconductor P ₃Source electrode connect the 4th N type metal-oxide-semiconductor N ₄Source electrode, the 5th N type metal-oxide-semiconductor N ₅Drain electrode and the 6th N type metal-oxide-semiconductor N ₆Drain electrode and divider resistance R ₂The other end connect; The 3rd N type metal-oxide-semiconductor N ₃Grid and source electrode, the 2nd N type metal-oxide-semiconductor N ₂Grid, the 5th N type metal-oxide-semiconductor N ₅Grid and the 6th P type metal-oxide-semiconductor P ₆Source electrode connect the 5th P type metal-oxide-semiconductor P ₅Drain electrode, the 6th P type metal-oxide-semiconductor P ₆Drain electrode, the 6th N type metal-oxide-semiconductor N ₆Grid and the 7th P type metal-oxide-semiconductor P ₇Source electrode connect the 6th P type metal-oxide-semiconductor P ₆Grid be connected the 7th P type metal-oxide-semiconductor P with the negative terminal Vin-of differential signal input ₇Grid be connected with the anode Vin+ of differential signal input; The 2nd N type metal-oxide-semiconductor N ₂Source electrode, the 6th N type metal-oxide-semiconductor N ₆Source electrode, the 9th P type metal-oxide-semiconductor P ₉Source electrode and the 11 P type metal-oxide-semiconductor P ₁₁Drain electrode connect; The 8th P type metal-oxide-semiconductor P ₈Source electrode, the tenth P type metal-oxide-semiconductor P ₁₀Drain electrode, the 5th N type metal-oxide-semiconductor N ₅Source electrode and the 8th N type metal-oxide-semiconductor N ₈Source electrode connect; The 7th N type metal-oxide-semiconductor N ₇Grid and source electrode and the 8th N type metal-oxide-semiconductor N ₈Grid and the 7th P type metal-oxide-semiconductor P ₇Drain electrode connect the 9th N type metal-oxide-semiconductor N ₉Grid and source electrode and the tenth N type metal-oxide-semiconductor N ₁₀Grid and the 8th P type metal-oxide-semiconductor P ₈Drain electrode connect; The tenth N type metal-oxide-semiconductor N ₁₀Source electrode, the 11 N type metal-oxide-semiconductor N ₁₁The coral utmost point, the 9th P type metal-oxide-semiconductor P ₉Drain electrode and the 12 P type metal-oxide-semiconductor P ₁₂The drain electrode and the second filter capacitor C ₂An end connect the 13 N type metal-oxide-semiconductor N ₁₃Source electrode, the 14 N type metal-oxide-semiconductor N ₁₄Source electrode, 16 P type metal-oxide-semiconductor P ₁₆Drain electrode, 17 P type metal-oxide-semiconductor P ₁₇Drain electrode and load capacitance C ₃An end and load resistance R ₃An end and the second filter capacitor C ₂The other end connect load capacitance C ₃The other end and load resistance R ₃Other end ground connection; The 11 N type metal-oxide-semiconductor N ₁₁Source electrode, the 13 P type metal-oxide-semiconductor P ₁₃Drain electrode, the 14 P type metal-oxide-semiconductor P ₁₄The coral utmost point and the 18 P type metal-oxide-semiconductor P ₁₈The coral utmost point and the first filter capacitor C ₁An end connect the first filter capacitor C ₁The other end and the 12 P type metal-oxide-semiconductor P ₁₂Source electrode connect; The 15 P type metal-oxide-semiconductor P ₁₅Drain and gate, the 14 P type metal-oxide-semiconductor P ₁₄Drain electrode, the 16 P type metal-oxide-semiconductor P ₁₆Grid, the 12 N type metal-oxide-semiconductor N ₁₂Source electrode and the 13 N type metal-oxide-semiconductor N ₁₃The coral utmost point connect; The 15 N type metal-oxide-semiconductor N ₁₅Source electrode and grid, the 14 N type metal-oxide-semiconductor N ₁₄Grid, the 16 N type metal-oxide-semiconductor N ₁₆Source electrode, the 17 P type metal-oxide-semiconductor P ₁₇The coral utmost point and the 18 P type metal-oxide-semiconductor P ₁₈Drain electrode connect the 16 N type metal-oxide-semiconductor N ₁₆The coral utmost point and the 17 N type metal-oxide-semiconductor N ₁₇The coral utmost point and the 12 N type metal-oxide-semiconductor N ₁₂The coral utmost point connect the 17 N type metal-oxide-semiconductor N ₁₇Source electrode and 19 P type metal-oxide-semiconductor P ₁₉Drain electrode connect.

The one P type metal-oxide-semiconductor P ₁Grid, the 2nd P type metal-oxide-semiconductor P ₂Grid, the tenth P type metal-oxide-semiconductor P ₁₀Grid, the 11 P type metal-oxide-semiconductor P ₁₁Grid, the 13 P type metal-oxide-semiconductor P ₁₃Grid and the 19 P type metal-oxide-semiconductor P ₁₉Grid connect; The one P type metal-oxide-semiconductor P ₁Source electrode, the 2nd P type metal-oxide-semiconductor P ₂Source electrode, the 4th P type metal-oxide-semiconductor P ₄Source electrode, the 5th P type metal-oxide-semiconductor P ₅Source electrode, the tenth P type metal-oxide-semiconductor P ₁₀Source electrode, the 11 P type metal-oxide-semiconductor P ₁₁Source electrode, the 13 P type metal-oxide-semiconductor P ₁₃Source electrode, the 14 P type metal-oxide-semiconductor P ₁₄Source electrode, the 15 P type metal-oxide-semiconductor P ₁₅Source electrode, the 16 P type metal-oxide-semiconductor P ₁₆Source electrode, the 17 P type metal-oxide-semiconductor P ₁₇Source electrode, the 18 P type metal-oxide-semiconductor P ₁₈Source electrode, the 19 P type metal-oxide-semiconductor P ₁₉Source electrode and the 12 P type metal-oxide-semiconductor P ₁₂Substrate ground connection.

The one N type metal-oxide-semiconductor N ₁Drain electrode, the 2nd N type metal-oxide-semiconductor N ₂Drain electrode, the 3rd N type metal-oxide-semiconductor N ₃Drain electrode, the 4th N type metal-oxide-semiconductor N ₄Drain electrode, the 7th N type metal-oxide-semiconductor N ₇Drain electrode, the 8th N type metal-oxide-semiconductor N ₈Drain electrode, the 9th N type metal-oxide-semiconductor N ₉Drain electrode, the tenth N type metal-oxide-semiconductor N ₁₀Drain electrode, the 11 N type metal-oxide-semiconductor N ₁₁Drain electrode, the 12 N type metal-oxide-semiconductor N ₁₂Drain electrode, the 13 N type metal-oxide-semiconductor N ₁₃Drain electrode, the 14 N type metal-oxide-semiconductor N ₁₄Drain electrode, the 15 N type metal-oxide-semiconductor N ₁₅Drain electrode, the 16 N type metal-oxide-semiconductor N ₁₆Drain electrode, the 17 N type metal-oxide-semiconductor N ₁₇Drain electrode, the 5th N type metal-oxide-semiconductor N ₅Substrate, the 6th N type metal-oxide-semiconductor N ₆Substrate, the 8th P type metal-oxide-semiconductor P ₈The coral utmost point, the 9th P type metal-oxide-semiconductor P ₉The coral utmost point, the 12 P type metal-oxide-semiconductor P ₁₂The coral utmost point and biasing resistor R ₁The other end all be connected with 1.5V power vd D.

Biasing resistor R ₁With a P type metal-oxide-semiconductor P ₁, the 2nd P type metal-oxide-semiconductor P ₂The main biasing circuit of forming circuit, main bias current are designed to 5 μ A.The one N type metal-oxide-semiconductor N ₁With the 4th N type metal-oxide-semiconductor N ₄For the input stage operate as normal provides constant current source.Input stage is a current mode trsanscondutor of being made up of two NMOS parallel to each other and PMOS differential pair and current source thereof.The 5th N type metal-oxide-semiconductor N ₅With the 6th N type metal-oxide-semiconductor N ₆Form PMOS differential pair trsanscondutor, the 4th N type metal-oxide-semiconductor N ₄It is its current source; The 6th P type metal-oxide-semiconductor P ₆With the 7th P type metal-oxide-semiconductor P ₇Form nmos differential to trsanscondutor, the 5th P type metal-oxide-semiconductor P ₅The electric current that is it is heavy.Adopt the 9th N type metal-oxide-semiconductor N of folding common source ₉, the tenth N type metal-oxide-semiconductor N ₁₀, the 11 N type metal-oxide-semiconductor N ₁₁, the 8th P type metal-oxide-semiconductor P ₈, the 9th P type metal-oxide-semiconductor P ₉, the tenth P type metal-oxide-semiconductor P ₁₀, the 11 P type metal-oxide-semiconductor P ₁₁, the 12 P type metal-oxide-semiconductor P ₁₂, the 13 P type metal-oxide-semiconductor P ₁₃Form amplifier second level amplifying circuit and be actually a kind of trans-impedance amplifier, it changes the current signal that input stage produces into voltage signal, and amplifies output.The 11 P type metal-oxide-semiconductor P wherein ₁₁With the 12 P type metal-oxide-semiconductor P ₁₂Bias current as input stage is heavy; The 8th P type metal-oxide-semiconductor P ₈, the 9th P type metal-oxide-semiconductor P ₉, the 9th N type metal-oxide-semiconductor N ₉, the tenth N type metal-oxide-semiconductor N ₁₀Constitute a kind of folded common source and common grid current mirror; The 11 N type metal-oxide-semiconductor N ₁₁With the 13 P type metal-oxide-semiconductor P ₁₃Form common source configuration amplifying circuit, the first filter capacitor C ₁Be miller compensation electric capacity, the 12 P type metal-oxide-semiconductor P ₁₂Be equivalent to a resistance, resistance dynamically changes along with the voltage at drain-source two ends, can eliminate the first filter capacitor C ₁The RHP effect at zero point that the forward direction coupling causes.The 12 P type metal-oxide-semiconductor P ₁₂Adopt MOSFET and, be in order to reduce area of chip and phase margin dynamically to be adjusted without fixed resistance.What this amplifier adopted is a kind of electric current folding electric circuit technology, it is directly linked the drain terminal of input stage PMOS differential pair on the source electrode of cascade device, make input common mode voltage increase, supply voltage required to reduce to have the intrinsic superperformance of cascode amplifier simultaneously again.The tenth P type metal-oxide-semiconductor P in the circuit ₁₀With the 11 P type metal-oxide-semiconductor P ₁₁The electric current that absorbs equals from input stage differential pair the 5th N type metal-oxide-semiconductor N ₅, the 6th N type metal-oxide-semiconductor N ₆Or the 6th P type metal-oxide-semiconductor P ₆, the 7th P type metal-oxide-semiconductor P ₇The electric current and the 8th P type metal-oxide-semiconductor P that flow into ₈, the 9th P type metal-oxide-semiconductor P ₉, the 9th N type metal-oxide-semiconductor N ₉, the tenth N type metal-oxide-semiconductor N ₁₀The electric current sum.During balance, the 9th P type metal-oxide-semiconductor P ₉Electric current equal the tenth N type metal-oxide-semiconductor N ₁₀Electric current.The nmos differential of supposing input stage is to work, if input voltage V _INRaise to the positive supply direction, so I _In ⁺Increase Δ I, I _In ^-Reduce Δ I, these variations are reflected as the 8th P type metal-oxide-semiconductor P ₈Electric current increases Δ I, the 9th P type metal-oxide-semiconductor P ₉Electric current has reduced Δ I, and the result flows to the 9th N type metal-oxide-semiconductor N ₉, the tenth N type metal-oxide-semiconductor N ₁₀The electric current of drain electrode is 2 Δ I.

The 19 P type metal-oxide-semiconductor P ₁₉, the 12 N type metal-oxide-semiconductor N ₁₂, the 16 N type metal-oxide-semiconductor N ₁₆, the 17 N type metal-oxide-semiconductor N ₁₇Form bias current sources, the 19 P type metal-oxide-semiconductor P ₁₉The grid level connect the main biasing of amplifier, the 12 N type metal-oxide-semiconductor N ₁₂, the 16 N type metal-oxide-semiconductor N ₁₆Respectively with the 17 N type metal-oxide-semiconductor N ₁₇Form current mirror.Input circuit is by the 14 P type metal-oxide-semiconductor P ₁₄, the 15 P type metal-oxide-semiconductor P ₁₅, the 18 P type metal-oxide-semiconductor P ₁₈With the 15 N type metal-oxide-semiconductor N ₁₅Form, output circuit is by two inverters the 13 N type metal-oxide-semiconductor N ₁₃, the 16 P type metal-oxide-semiconductor P ₁₆And the 14 N type metal-oxide-semiconductor N ₁₄, the 17 P type metal-oxide-semiconductor P ₁₇Constitute, their output point is connected together jointly as the output of amplifier.Because the working power of amplifier is 1.5V, the threshold voltage of MOS device is about 0.75V, so each has only a MOSFET to be operated in saturation region (the 16 P type metal-oxide-semiconductor P to inverter ₁₆, the 14 N type metal-oxide-semiconductor N ₁₄), and other one be operated in cut-off region (the 13 N type metal-oxide-semiconductor N ₁₃, the 17 P type metal-oxide-semiconductor P ₁₇).

This circuit adopts the current mode trsanscondutor that is suitable for low-voltage, and electronic circuit structures such as the AB class push-pull output circuit of folded common source and common grid amplifying circuit and low-power consumption, entire circuit are only by 36 MOSFET, and three electric capacity and three resistance are formed.

Claims (1)

1. low pressure rail-to-rail operational amplification circuit comprises three resistance, three electric capacity, 19 P type metal-oxide-semiconductors and 17 N type metal-oxide-semiconductors, it is characterized in that:

The one P type metal-oxide-semiconductor P ₁Drain electrode and biasing resistor R ₁An end connect a N type metal-oxide-semiconductor N ₁Source electrode and grid and the 4th N type metal-oxide-semiconductor N ₄Grid and the 2nd P type metal-oxide-semiconductor P ₂Drain electrode connect the 3rd P type metal-oxide-semiconductor P ₃Grid and drain electrode and divider resistance R ₂An end connect; The 4th P type metal-oxide-semiconductor P ₄Drain and gate and the 5th P type metal-oxide-semiconductor P ₅Grid and the 3rd P type metal-oxide-semiconductor P ₃Source electrode connect the 4th N type metal-oxide-semiconductor N ₄Source electrode, the 5th N type metal-oxide-semiconductor N ₅Drain electrode and the 6th N type metal-oxide-semiconductor N ₆Drain electrode and divider resistance R ₂The other end connect; The 3rd N type metal-oxide-semiconductor N ₃Grid and source electrode, the 2nd N type metal-oxide-semiconductor N ₂Grid, the 5th N type metal-oxide-semiconductor N ₅Grid and the 6th P type metal-oxide-semiconductor P ₆Source electrode connect the 5th P type metal-oxide-semiconductor P ₅Drain electrode, the 6th P type metal-oxide-semiconductor P ₆Drain electrode, the 6th N type metal-oxide-semiconductor N ₆Grid and the 7th P type metal-oxide-semiconductor P ₇Source electrode connect the 6th P type metal-oxide-semiconductor P ₆Grid be connected the 7th P type metal-oxide-semiconductor P with the negative terminal Vin-of differential signal input ₇Grid be connected with the anode Vin+ of differential signal input; The 2nd N type metal-oxide-semiconductor N ₂Source electrode, the 6th N type metal-oxide-semiconductor N ₆Source electrode, the 9th P type metal-oxide-semiconductor P ₉Source electrode and the 11 P type metal-oxide-semiconductor P ₁₁Drain electrode connect; The 8th P type metal-oxide-semiconductor P ₈Source electrode, the tenth P type metal-oxide-semiconductor P ₁₀Drain electrode, the 5th N type metal-oxide-semiconductor N ₅Source electrode and the 8th N type metal-oxide-semiconductor N ₈Source electrode connect; The 7th N type metal-oxide-semiconductor N ₇Grid and source electrode and the 8th N type metal-oxide-semiconductor N ₈Grid and the 7th P type metal-oxide-semiconductor P ₇Drain electrode connect the 9th N type metal-oxide-semiconductor N ₉Grid and source electrode and the tenth N type metal-oxide-semiconductor N ₁₀Grid and the 8th P type metal-oxide-semiconductor P ₈Drain electrode connect; The tenth N type metal-oxide-semiconductor N ₁₀Source electrode, the 11 N type metal-oxide-semiconductor N ₁₁The coral utmost point, the 9th P type metal-oxide-semiconductor P ₉Drain electrode and the 12 P type metal-oxide-semiconductor P ₁₂The drain electrode and the second filter capacitor C ₂An end connect the 13 N type metal-oxide-semiconductor N ₁₃Source electrode, the 14 N type metal-oxide-semiconductor N ₁₄Source electrode, 16 P type metal-oxide-semiconductor P ₁₆Drain electrode, 17 P type metal-oxide-semiconductor P ₁₇Drain electrode and load capacitance C ₃An end and load resistance R ₃An end and the second filter capacitor C ₂The other end connect load capacitance C ₃The other end and load resistance R ₃Other end ground connection; The 11 N type metal-oxide-semiconductor N ₁₁Source electrode, the 13 P type metal-oxide-semiconductor P ₁₃Drain electrode, the 14 P type metal-oxide-semiconductor P ₁₄The coral utmost point and the 18 P type metal-oxide-semiconductor P ₁₈The coral utmost point and the first filter capacitor C ₁An end connect the first filter capacitor C ₁The other end and the 12 P type metal-oxide-semiconductor P ₁₂Source electrode connect; The 15 P type metal-oxide-semiconductor P ₁₅Drain and gate, the 14 P type metal-oxide-semiconductor P ₁₄Drain electrode, the 16 P type metal-oxide-semiconductor P ₁₆Grid, the 12 N type metal-oxide-semiconductor N ₁₂Source electrode and the 13 N type metal-oxide-semiconductor N ₁₃The coral utmost point connect; The 15 N type metal-oxide-semiconductor N ₁₅Source electrode and grid, the 14 N type metal-oxide-semiconductor N ₁₄Grid, the 16 N type metal-oxide-semiconductor N ₁₆Source electrode, the 17 P type metal-oxide-semiconductor P ₁₇The coral utmost point and the 18 P type metal-oxide-semiconductor P ₁₈Drain electrode connect the 16 N type metal-oxide-semiconductor N ₁₆The coral utmost point and the 17 N type metal-oxide-semiconductor N ₁₇The coral utmost point and the 12 N type metal-oxide-semiconductor N ₁₂The coral utmost point connect the 17 N type metal-oxide-semiconductor N ₁₇Source electrode and 19 P type metal-oxide-semiconductor P ₁₉Drain electrode connect;

The one P type metal-oxide-semiconductor P ₁Grid, the 2nd P type metal-oxide-semiconductor P ₂Grid, the tenth P type metal-oxide-semiconductor P ₁₀Grid, the 11 P type metal-oxide-semiconductor P ₁₁Grid, the 13 P type metal-oxide-semiconductor P ₁₃Grid and the 19 P type metal-oxide-semiconductor P ₁₉Grid connect; The one P type metal-oxide-semiconductor P ₁Source electrode, the 2nd P type metal-oxide-semiconductor P ₂Source electrode, the 4th P type metal-oxide-semiconductor P ₄Source electrode, the 5th P type metal-oxide-semiconductor P ₅Source electrode, the tenth P type metal-oxide-semiconductor P ₁₀Source electrode, the 11 P type metal-oxide-semiconductor P ₁₁Source electrode, the 13 P type metal-oxide-semiconductor P ₁₃Source electrode, the 14 P type metal-oxide-semiconductor P ₁₄Source electrode, the 15 P type metal-oxide-semiconductor P ₁₅Source electrode, the 16 P type metal-oxide-semiconductor P ₁₆Source electrode, the 17 P type metal-oxide-semiconductor P ₁₇Source electrode, the 18 P type metal-oxide-semiconductor P ₁₈Source electrode, the 19 P type metal-oxide-semiconductor P ₁₉Source electrode and the 12 P type metal-oxide-semiconductor P ₁₂Substrate ground connection;

The one N type metal-oxide-semiconductor N ₁Drain electrode, the 2nd N type metal-oxide-semiconductor N ₂Drain electrode, the 3rd N type metal-oxide-semiconductor N ₃Drain electrode, the 4th N type metal-oxide-semiconductor N ₄Drain electrode, the 7th N type metal-oxide-semiconductor N ₇Drain electrode, the 8th N type metal-oxide-semiconductor N ₈Drain electrode, the 9th N type metal-oxide-semiconductor N ₉Drain electrode, the tenth N type metal-oxide-semiconductor N ₁₀Drain electrode, the 11 N type metal-oxide-semiconductor N ₁₁Drain electrode, the 12 N type metal-oxide-semiconductor N ₁₂Drain electrode, the 13 N type metal-oxide-semiconductor N ₁₃Drain electrode, the 14 N type metal-oxide-semiconductor N ₁₄Drain electrode, the 15 N type metal-oxide-semiconductor N ₁₅Drain electrode, the 16 N type metal-oxide-semiconductor N ₁₆Drain electrode, the 17 N type metal-oxide-semiconductor N ₁₇Drain electrode, the 5th N type metal-oxide-semiconductor N ₅Substrate, the 6th N type metal-oxide-semiconductor N ₆Substrate, the 8th P type metal-oxide-semiconductor P ₈The coral utmost point, the 9th P type metal-oxide-semiconductor P ₉The coral utmost point, the 12 P type metal-oxide-semiconductor P ₁₂The coral utmost point and biasing resistor R ₁The other end all be connected with 1.5V power vd D.

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