CN201698420U - Small-sized pluggable optical receiving-sending module control device based on I2C bus - Google Patents
Small-sized pluggable optical receiving-sending module control device based on I2C bus Download PDFInfo
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- CN201698420U CN201698420U CN2010202739867U CN201020273986U CN201698420U CN 201698420 U CN201698420 U CN 201698420U CN 2010202739867 U CN2010202739867 U CN 2010202739867U CN 201020273986 U CN201020273986 U CN 201020273986U CN 201698420 U CN201698420 U CN 201698420U
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Abstract
The utility model provides a small-sized pluggable optical receiving-sending module control device based on an I2C bus. A serial data signal end of the device is connected with a data signal end of a small-sized pluggable receiving-sending SFP optical module by a serial data line; the device also comprises a switch element, a serial clock signal end and a gating signal output end; the switch element is a two-way circuit breakdown switch; a first end of switch element is connected with a clock signal end of the SFP optical module; a second end of the switch element is connected with the serial clock signal end by a serial clock line; and a third end of the switch element is connected with the gating signal output end. The small-sized pluggable optical receiving-sending module control device based on the I2C bus can prevent the dead hanging of the I2C bus or the failure of reading and writing.
Description
Technical field
The utility model relates to I
2The C bus is specifically related to a kind of based on I
2C bus SFP emission and reception module control device.
Background technology
I
2The C bus is a kind of required high performance serial bus that comprises functions such as ruling and high low speed device synchronization of multi-host system that possesses.It uses two lines: serial data line (SDA) and serial time clock line (SCL), make the transmission information between the addressable device that is connected on this bus, and belong to many main controls bus.SDA and SCL are two-way input and output (I/O) mouthful lines, and each device on the bus all has unique Address Recognition, and can carry out data write as a transmitter or receiver.All receive I
2The data line of the controlled device on the C bus is all received the sda line of bus, and the clock line of each controlled device is all received on the scl line, and its structure as shown in Figure 1.
In the design of switch, I
2The C bus need be controlled a lot of SFP emission and reception modules (SFP optical module) usually, the EEPROM of SFP optical module inside does not have address bit to distinguish, thereby all SFP optical module image patterns 1 are hung over a design on the bus like that is infeasible, must realize by the mode of independent conducting in the time of the visit optical module.The access control of existing SFP optical module selects circuit how to realize with logic chip CPLD (Complex Programmable Logic Device, complex logic element/logic chip).As shown in Figure 2, inner realization of logic chip CPLD serial time clock line was designed one minute more, data line directly is connected with the SFP optical module, at this moment, selection connection by clock line is read and write control to the register of SFP optical module inside, realizes the management to the SFP optical module.
Prior art scheme shown in Figure 2 can realize the management of SFP optical module, but this design has following defective:
(1) can cause I during SFP optical module frequent operation
2Dead, read-write failure that C hangs.In logic realization commonly used, the signal of SCL can only be output or input, this design and I
2SCL is that the definition of two-way signaling is not inconsistent in the C bus protocol.In most operating process (as long as needing under the situation of feedback), SCL is that primary controller sends, and controlled device is seldom operated the SCL signal, and original design is no problem generally speaking; But in the time of controlled device SFP optical module frequent operation, I
2C hangs, and situation dead, the read-write failure can happen occasionally.
(2) the logic number of pin that takies is identical with the SFP optical module quantity that needs control, and it is more that the logic pin takies quantity.If I
2The configuration of C bus requirements connects 16 SFP optical modules, needs this moment 16 logic pins to realize the function of SCL, and this can take a large amount of I/O resources in short supply; And the problem that the driving force that the SDA signal caused in 1 minute 16 descends, signal quality weakens all is worth worry.
The utility model content
The utility model can cause I when having solved SFP optical module frequent operation
2That C hangs is dead, the technical matters of read-write failure, and a kind of on-off element control break-make of utilizing is provided, and prevents to read and write failure, based on I
2C bus SFP emission and reception module control device.
For achieving the above object, the technical scheme that the utility model provides is as follows:
A kind of based on I
2The SFP emission and reception module control device of C bus, the serial data signal end of described device links to each other by the data-signal end of serial data line with described SFP transmitting-receiving SFP optical module; Described device also comprises: on-off element, serial clock signal end and gating signal output terminal;
Described on-off element is the two-way circuit actuating switch; Wherein, first end of described on-off element links to each other with the clock signal terminal of described SFP optical module, second end of described on-off element links to each other with described serial clock signal end by serial time clock line, and the 3rd end of described on-off element links to each other with described gating signal output terminal.
In technique scheme, described SFP optical module is a plurality of and when all connecting the serial data signal end, the number of described on-off element and described gating signal output terminal is identical with the number of described SFP optical module;
First end of each described first on-off element links to each other with the clock signal terminal of each described SFP module respectively; Second end of each described first on-off element all is connected to described serial clock signal end by described serial clock signal line; The 3rd end of each described first on-off element links to each other with each gating signal output terminal respectively.
In technique scheme, described device is provided with logic chip, and wherein, the described first gating signal output terminal is the logic pin of described logic chip.
A kind of based on I
2The SFP emission and reception module control device of C bus, be used to control the described SFP transmitting-receiving SFP optical module of arranging by matrix form, described device comprises: first on-off element, second switch element, serial clock signal end, serial data signal end, the first gating signal output terminal and the second gating signal output terminal;
Described first on-off element is the two-way circuit actuating switch, first end of each described first on-off element links to each other with the clock signal terminal of each described SFP optical module on line direction, second end of each described first on-off element all is connected to described serial clock signal end by serial time clock line, and the 3rd end of each described first on-off element links to each other with each described first gating signal output terminal;
Described second switch element is the two-way circuit actuating switch, each described second switch element first end links to each other with the data-signal end of each described SFP optical module on column direction, second end of each described second switch element all is connected to described serial data signal end by serial data line and links to each other, and the 3rd end of described second switch element links to each other with each described second gating signal output terminal.
In technique scheme, first end of each described first on-off element on column direction with the clock signal terminal of each described SFP optical module link to each other;
Each described second switch element first end links to each other with the data-signal end of each described SFP optical module on line direction.
In technique scheme, described device is provided with logic chip, wherein, and the logic pin that described first gating signal output terminal and the described second gating signal output terminal are described logic chip.
Of the present utility model based on I
2The SFP emission and reception module control device of C bus has following beneficial effect:
(1) of the present utility model based on I
2The SFP emission and reception module control device of C bus can prevent to cause I
2The C bus is hung dead or the read-write failure.
When gating signal output terminal output gating signal makes the on-off element conducting, the SFP optical module is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of SFP optical module by the serial clock signal line, and the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
(for example need transport when carrying out some operation at the SFP optical module, the operation in-line interrupt service routine), the SFP optical module can be exported a low level at clock signal terminal, this low level signal can transfer to the SCL end of cpu chip by this two-way switch and scl line, thereby makes main frame enter waiting status.After the SFP optical module executes corresponding operation, the SFP optical module is prepared to continue when receiving the SCL signal that main frame (cpu chip) sends, and the SFP module discharges clock line SCL, makes the transmission of SCL signal of cpu chip continue, thereby when having avoided the frequent executable operations of SFP optical module, I
2C hangs extremely, the generation of SFP optical module read-write failure.
(2) of the present utility model based on I
2The SFP emission and reception module control device of C bus, when arbitrary gating signal output terminal output gating signal makes corresponding on-off element conducting, the clock signal of the SFP optical module that is connected with the on-off element of conducting is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of the SFP optical module that links to each other with the on-off element of conducting by the serial clock signal line, and guarantees that the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
(3) of the present utility model based on I
2The SFP emission and reception module control device of C bus can be realized the control for a large amount of SFP optical modules.
Of the present utility model based on I
2The SFP emission and reception module control device of C bus, first gating signal and second gating signal when arbitrary first gating signal output terminal and the output of the second gating signal output terminal, make certain SFP module when first on-off element on the line direction and the second switch element on column direction all are switched on, this SFP optical module is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of SFP optical module by the serial clock signal line, the serial data signal of data-signal end output transfers to the data-signal end of SFP by serial data line, and guarantees that the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
(4) and then, of the present utility model based on I
2The SFP emission and reception module control device of C bus utilizes logic chip CPLD to control first, second gating signal, and then control the break-make of first, second on-off element, in the programming Control that has realized for on-off element, also save the quantity that the logic pin takies, saved I/O resource in short supply.
Description of drawings
Fig. 1 is I
2The synoptic diagram that the C bus is formed;
Fig. 2 utilizes logic chip CPLD to realize the synoptic diagram of the management of SFP in the prior art;
Fig. 3 is of the present utility model based on I
2The synoptic diagram of a kind of embodiment of SFP emission and reception module control device of C bus;
Fig. 4 is of the present utility model based on I
2The synoptic diagram of another embodiment of SFP emission and reception module control device of C bus;
Reference numeral wherein is expressed as:
A, B, C, D-first on-off element; E, F, G, H-second switch element.
Embodiment
It is a kind of based on I that the utility model provides
2The SFP emission and reception module control device of C bus, the serial data signal end of described device links to each other by the data-signal end of serial data line with described SFP transmitting-receiving SFP optical module; Described device also comprises: on-off element, serial clock signal end and gating signal output terminal; Described on-off element is the two-way circuit actuating switch; Wherein, first end of described on-off element links to each other with the clock signal terminal of described SFP optical module, second end of described on-off element links to each other with described serial clock signal end by serial time clock line, and the 3rd end of described on-off element links to each other with described gating signal output terminal.
Of the present utility model based on I
2The SFP emission and reception module control device of C bus can prevent to cause I
2The C bus is hung dead or the read-write failure.
When gating signal output terminal output gating signal makes the on-off element conducting, the SFP optical module is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of SFP optical module by the serial clock signal line, and the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
(for example need transport when carrying out some operation at the SFP optical module, the operation in-line interrupt service routine), the SFP optical module can be exported a low level at clock signal terminal, this low level signal can transfer to the SCL end of cpu chip by this two-way switch and scl line, thereby makes main frame enter waiting status.After the SFP optical module executes corresponding operation, the SFP optical module is prepared to continue when receiving the SCL signal that main frame (cpu chip) sends, and the SFP module discharges clock line SCL, makes the transmission of SCL signal of cpu chip continue, thereby when having avoided the frequent executable operations of SFP optical module, I
2C hangs extremely, the generation of SFP optical module read-write failure.
Of the present utility model based on I
2The SFP emission and reception module control device of C bus, when arbitrary gating signal output terminal output gating signal makes corresponding on-off element conducting, the clock signal of the SFP optical module that is connected with the on-off element of conducting is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of the SFP optical module that links to each other with the on-off element of conducting by the serial clock signal line, and guarantees that the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
In addition, the utility model also provides another based on I
2The SFP emission and reception module control device of C bus, be used to control the described SFP transmitting-receiving SFP optical module of arranging by matrix form, described device comprises: first on-off element, second switch element, serial clock signal end, serial data signal end, the first gating signal output terminal and the second gating signal output terminal;
Described first on-off element is the two-way circuit actuating switch, first end of each described first on-off element links to each other with the clock signal terminal of each described SFP optical module on line direction, second end of each described first on-off element all is connected to described serial clock signal end by serial time clock line, and the 3rd end of each described first on-off element links to each other with each described first gating signal output terminal;
Described second switch element is the two-way circuit actuating switch, each described second switch element first end links to each other with the data-signal end of each described SFP optical module on column direction, second end of each described second switch element all is connected to described serial data signal end by serial data line and links to each other, and the 3rd end of described second switch element links to each other with each described second gating signal output terminal.
Of the present utility model based on I
2The SFP emission and reception module control device of C bus can be realized the control for a large amount of SFP optical modules.
Of the present utility model based on I
2The SFP emission and reception module control device of C bus, first gating signal and second gating signal when arbitrary first gating signal output terminal and the output of the second gating signal output terminal, make certain SFP module when first on-off element on the line direction and the second switch element on column direction all are switched on, this SFP optical module is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of SFP optical module by the serial clock signal line, the serial data signal of data-signal end output transfers to the data-signal end of SFP by serial data line, and guarantees that the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
For make the purpose of this utility model, technical scheme, and advantage clearer, below with reference to the accompanying drawing embodiment that develops simultaneously, the utility model is further described.
As shown in Figure 3, in the present embodiment based on I
2The SFP optical module control device of C bus comprises: (Fig. 3 does not show the serial clock data terminal, pin as cpu chip transmitting-receiving serial data signal), (Fig. 3 does not show the serial clock signal end, the pin of serial clock signal is provided as cpu chip), the first on-off element A-D and the first gating signal output terminal (in Fig. 3, logic chip CPLD provides the pin one-4 of the gating signal of gauge tap element conductive).
In control device shown in Figure 3, the first on-off element A, B, C, D be four impedances be 5 ohm can two-way admittance the on-off element of straight-through input and output; Wherein, first end of the first on-off element A-D is connected with the clock signal terminal of SFP optical module 1-4 respectively; Second end of the first on-off element A-D connects the serial time clock line line, so that the first on-off element A-D is connected to the serial clock signal end; The 3rd end of the first on-off element A-D is connected with the pin one-4 of logic chip CPLD respectively; And the serial clock signal end directly links to each other with the data-signal end of SFP optical module by serial data line (sda line).
In the course of the work, when arbitrary pin output gating signal makes the first corresponding on-off element A-D conducting in the pin one-4, the clock signal terminal of the SFP optical module that is connected with first on-off element of conducting is connected with scl line by first on-off element of conducting, the SCL signal that makes the serial clock signal end provide is transferred to this SFP optical module, make this SFP optical module, simultaneously, the feedback signal that guarantees this SFP optical module can transfer to the serial clock signal end by first on-off element that is connected to the serial clock signal line.As when visiting the SFP1 optical module, when logic chip CPLD according to the cpu chip control signal of (Fig. 3 does not show), when pin one was exported first gating signal, the first on-off element A was by conducting separately, SFP optical module 1 is by gating.Concerning SFP optical module 1, I
2C is man-to-man visit, has been equivalent to go here and there in connection line one 5 ohm resistance, to the not influence of signal quality of SCL connection line; Controlled device SFP optical module and controller two-way admittance satisfy I
2The requirement of C agreement.
When SFP optical module 1 needs fortune to carry out some operation (for example, the operation in-line interrupt service routine), SFP optical module 1 can be in low level of clock signal terminal output, this low level signal can transfer to the SCL end of cpu chip (main frame) by the first on-off element A and scl line, thereby makes main frame enter waiting status.After SFP optical module 1 executes corresponding operation, SFP optical module 1 is prepared to continue when receiving the SCL signal that main frame (cpu chip) sends, and SFP optical module 1 discharges clock line SCL, makes the transmission of SCL signal of cpu chip continue, thereby when having avoided the frequent executable operations of SFP optical module 1, I
2C hangs extremely, the generation of SFP optical module read-write failure.
As shown in Figure 4, in the present embodiment based on I
2The SFP optical module control device of C bus comprises: (Fig. 4 does not show the serial clock data terminal, pin as cpu chip transmitting-receiving serial data signal), (Fig. 4 does not show the serial clock signal end, provide the pin of serial clock signal as cpu chip), the first on-off element A-D and the first gating signal output terminal are (not shown among Fig. 4, can be the pin that logic chip CPLD provides the gating signal of gauge tap element conductive), the second switch element E-H and the second gating signal output terminal (not shown among Fig. 4, as can be the pin that logic chip CPLD provides the gating signal of gauge tap element conductive).
In this embodiment, first end of each described first on-off element on column direction with the clock signal terminal of each described SFP optical module link to each other; Each described second switch element first end links to each other with the data-signal end of each described SFP optical module on line direction.The described first on-off element A, B, C, D and described second switch element E, F, G, H are respectively an analog switch.Described first gating signal output terminal and the described second gating signal output terminal are a logic pin of described first, second logic chip, not shown first, second logic chip among Fig. 4.Specifically:
In control device shown in Figure 4, the first on-off element A, B, C, D and second switch element E, F, G, H be respectively impedance be 5 ohm can two-way admittance the on-off element of straight-through input and output.
First end of the first on-off element A is connected with the clock signal terminal of SFP optical module 1,5,9 and 13 respectively, and second end of the first on-off element A connects the serial time clock line line, so that the first on-off element A is connected to the serial clock signal end; The 3rd end of the first on-off element A is connected with the pin of logic chip CPLD (Fig. 4 is not shown).Similarly, the first on-off element B, C and D respectively with SFP optical module 2,6,10 and 14,3,7,11 and 15,4,8,12 and 16 clock signal terminal connects, the first on-off element B, and second end of C and D is connected the serial time clock line line respectively, so that the first on-off element B, C and D are connected respectively to the serial clock signal end; The first on-off element B, the 3rd end of C and D are connected separately with the pin of logic chip CPLD (Fig. 4 is not shown) respectively.
Second end of second switch element E is connected with the data-signal end of SFP optical module 1,2,3 and 4 respectively, and second end of second switch element E connects the serial data line line, so that second switch element E is connected to the serial data signal end; The 3rd end of second switch element E is connected (Fig. 4 is not shown) separately with the pin of logic chip CPLD.Similarly, second switch element F, G and H respectively with SFP optical module 5,6,7 and 8,9,10,11 and 12,13,14,15 and 16 data-signal end connects, second switch element F, and second end of G and H is connected the serial data line line respectively, so that second switch element B, C and D are connected respectively to the serial data signal end; Second switch element B, the 3rd end of C and D are connected with two pins of logic chip CPLD (Fig. 4 is not shown) respectively.
As shown in Figure 4, SFP optical module 1-16 has formed the SFP optical module matrix of " 4 * 4 ".
In the course of the work, when the pin of the CPLD that is connected to switch A and the pin that is connected to switch E are exported first gating signal and second gating signal, make SFP optical module 1 when first on-off element on the line direction and the second switch element on column direction all are switched on, this SFP optical module 1 is by gating, the serial clock signal of serial clock signal end output transfers to the clock signal terminal of SFP optical module by the serial clock signal line, the serial data signal of data-signal end output transfers to the data-signal end of SFP by serial data line, and guarantees that the feedback signal of SFP optical module can transfer to the serial clock signal end by the serial clock signal line.
Present embodiment utilizes the combination of first, second different on-off elements, realizes the reticulate texture for the break-make of any one in a plurality of SFP optical modules, thereby has realized the control for a large amount of SFP optical modules.
First, second on-off element in above-mentioned enforcement embodiment can be selected CD4066 model four bilateral switching elements in the MOS on-off element for use, and this on-off element is four groups of independent switches, can transmitted in both directions.Certainly those skilled in the art are also to select other on-off elements as first or the second switch element as required flexibly.
In other embodiment, described first, second logic chip can be selected 8051 series monolithics for use, and according to I
2The sequential of C bus is with the I/O mouth Simulation with I on the single-chip microcomputer
2The C bus timing is realized its function.Owing to be not invention emphasis of the present utility model, do not repeat them here.
In addition, the length and width of SFP optical module matrix also can in the light of actual conditions design, equipment such as 24 SFP optical modules, can use matrix of " 3 * 8 " (consuming 11 I/O) or the matrix of " 4 * 6 " (consuming 10 I/O), actual design is adjusted according to veneer cabling or signal driving force.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all within spirit of the present utility model and principle, any modification of being made, be equal to replacement, improvement etc., all should be included within the scope of the utility model protection.
Claims (6)
1. one kind based on I
2The SFP emission and reception module control device of C bus, the serial data signal end of described device links to each other by the data-signal end of serial data line with described SFP transmitting-receiving SFP optical module; It is characterized in that described device also comprises: on-off element, serial clock signal end and gating signal output terminal;
Described on-off element is the two-way circuit actuating switch; Wherein, first end of described on-off element links to each other with the clock signal terminal of described SFP optical module, second end of described on-off element links to each other with described serial clock signal end by serial time clock line, and the 3rd end of described on-off element links to each other with described gating signal output terminal.
2. device according to claim 1 is characterized in that, described SFP optical module is a plurality of and when all connecting the serial data signal end, the number of described on-off element and described gating signal output terminal is identical with the number of described SFP optical module;
First end of each described first on-off element links to each other with the clock signal terminal of each described SFP module respectively; Second end of each described first on-off element all is connected to described serial clock signal end by described serial clock signal line; The 3rd end of each described first on-off element links to each other with each gating signal output terminal respectively.
3. device according to claim 1 and 2 is characterized in that described device is provided with logic chip, and wherein, the described first gating signal output terminal is the logic pin of described logic chip.
4. one kind based on I
2The SFP emission and reception module control device of C bus, be used to control the described SFP transmitting-receiving SFP optical module of arranging by matrix form, it is characterized in that described device comprises: first on-off element, second switch element, serial clock signal end, serial data signal end, the first gating signal output terminal and the second gating signal output terminal;
Described first on-off element is the two-way circuit actuating switch, first end of each described first on-off element links to each other with the clock signal terminal of each described SFP optical module on line direction, second end of each described first on-off element all is connected to described serial clock signal end by serial time clock line, and the 3rd end of each described first on-off element links to each other with each described first gating signal output terminal;
Described second switch element is the two-way circuit actuating switch, each described second switch element first end links to each other with the data-signal end of each described SFP optical module on column direction, second end of each described second switch element all is connected to described serial data signal end by serial data line and links to each other, and the 3rd end of described second switch element links to each other with each described second gating signal output terminal.
5. device according to claim 4 is characterized in that,
First end of each described first on-off element on column direction with the clock signal terminal of each described SFP optical module link to each other;
Each described second switch element first end links to each other with the data-signal end of each described SFP optical module on line direction.
6. according to claim 4 or 5 described devices, it is characterized in that described device is provided with logic chip, wherein, the logic pin that described first gating signal output terminal and the described second gating signal output terminal are described logic chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2010202739867U CN201698420U (en) | 2010-07-26 | 2010-07-26 | Small-sized pluggable optical receiving-sending module control device based on I2C bus |
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| CN2010202739867U CN201698420U (en) | 2010-07-26 | 2010-07-26 | Small-sized pluggable optical receiving-sending module control device based on I2C bus |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103399837A (en) * | 2013-08-13 | 2013-11-20 | 杭州威力克通信系统有限公司 | Communication device applied to principal and subordinate equipment |
| CN106936496A (en) * | 2017-04-20 | 2017-07-07 | 江苏奥雷光电有限公司 | Multiple IIC communication equipments hot plug devices |
| CN110823525A (en) * | 2016-08-04 | 2020-02-21 | 彭爱勤 | Pluggable receiving and transmitting optical module automatic detection system |
-
2010
- 2010-07-26 CN CN2010202739867U patent/CN201698420U/en not_active Expired - Lifetime
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103399837A (en) * | 2013-08-13 | 2013-11-20 | 杭州威力克通信系统有限公司 | Communication device applied to principal and subordinate equipment |
| CN110823525A (en) * | 2016-08-04 | 2020-02-21 | 彭爱勤 | Pluggable receiving and transmitting optical module automatic detection system |
| CN110823524A (en) * | 2016-08-04 | 2020-02-21 | 彭爱勤 | Pluggable receiving and transmitting optical module automatic detection system |
| CN106936496A (en) * | 2017-04-20 | 2017-07-07 | 江苏奥雷光电有限公司 | Multiple IIC communication equipments hot plug devices |
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