CN201383143Y - Full-size card main board - Google Patents
Full-size card main board Download PDFInfo
- Publication number
- CN201383143Y CN201383143Y CN200920135390U CN200920135390U CN201383143Y CN 201383143 Y CN201383143 Y CN 201383143Y CN 200920135390 U CN200920135390 U CN 200920135390U CN 200920135390 U CN200920135390 U CN 200920135390U CN 201383143 Y CN201383143 Y CN 201383143Y
- Authority
- CN
- China
- Prior art keywords
- chip
- south bridge
- total length
- bios
- bridge chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000006378 damage Effects 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 description 4
- 239000012467 final product Substances 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000006855 networking Effects 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- ABKJCDILEUEJSH-MHWRWJLKSA-N 2-[(e)-(6-carboxyhexanoylhydrazinylidene)methyl]benzoic acid Chemical compound OC(=O)CCCCCC(=O)N\N=C\C1=CC=CC=C1C(O)=O ABKJCDILEUEJSH-MHWRWJLKSA-N 0.000 description 1
- 101000746134 Homo sapiens DNA endonuclease RBBP8 Proteins 0.000 description 1
- 101000969031 Homo sapiens Nuclear protein 1 Proteins 0.000 description 1
- 102100021133 Nuclear protein 1 Human genes 0.000 description 1
- 101100215340 Solanum tuberosum AC97 gene Proteins 0.000 description 1
- 241000700605 Viruses Species 0.000 description 1
- 230000002155 anti-virotic effect Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
Images
Landscapes
- Stored Programmes (AREA)
Abstract
The utility model discloses a full-size card main board, which comprises a CPU, a south bridge chip and a north bridge chip, wherein the CPU and the south bridge chip are mutually connected, the north bridge chip and the south bridge chip are mutually connected, and the full-size card main board further comprises two BIOS chips which are mutually connected with the south bridge chip. The full-size card main board can avoid the loss caused by the damage of a single BIOS chip.
Description
Technical field
This patent relates to the industrial control technology field, particularly a kind of be used for industrial automation control total length card mainboard.
Background technology
Along with the development and the network application continuous advancement in technology of industrial control technology, Industrial Control Computer constantly develops to microminiaturized, decentralized, personalized, customizations direction; And the Industrial Control Computer system also develops towards networking, synthesization, intelligentized direction.Along with the progress of using IT to propel industrialization, which will, in turn, stimulate IT application, the market of Industrial Control Computer is in continuous expansion.Simultaneously, market for the demand of industrial computer total length card mainboard product in continuous increase, also more and more higher to its stability requirement.The in store relevant most important basic input/output routine of microsystem of well-known BIOS, system information setting, startup power on self detection program and system start-up bootstrap routine etc.Yet present existing industrial total length card mainboard generally all adopts single BIOS chip, when BIOS upgrading failure, be subjected to destructions such as virus CIH and cause the mainboard BIOS parameter to lose, damage, thus phenomenons such as the generation computing machine is not started shooting, do not started, job insecurity; Except that the maintenance producer of specialty, technician, general computer user may just can't have been solved; Existing total length card mainboard product can't well satisfy requirements of different users.
The utility model content
The purpose of this utility model provides the high total length card mainboard of a kind of security performance, and it can avoid the loss that is damaged and causes owing to single BIOS chip.
For solving technical matters of the present utility model, the utility model discloses a kind of total length card mainboard, it comprises CPU, South Bridge chip, north bridge chips, described CPU and described South Bridge chip interconnect, described north bridge chips and described South Bridge chip interconnect, and it is characterized in that: further comprise two and the interconnective BIOS chip of described South Bridge chip.
Compared to prior art, total length card mainboard of the present utility model adopts two capacity BIOS chips to be connected with South Bridge chip, when bios program destroyed, perhaps when BIOS chip physical damage, the user only need select another BIOS chip enable system to get final product by the one group of wire jumper that provides on the mainboard, thereby can avoid the loss that is damaged and causes because of a BIOS chip.
Description of drawings
Fig. 1 is the theory structure block diagram of the utility model total length card mainboard.
Fig. 2 is the mechanical construction drawing of the utility model total length card mainboard.
Embodiment
Total length card mainboard of the present utility model adopts the X86 framework, comprises chipset, CPU socket, memory bank, interface and bus.
See also Fig. 1, be the theory structure block diagram of the utility model total length card mainboard.In main board system of the present utility model, cpu power chip and clock chip are connected to CPU respectively.North bridge chips and CPU interconnect, its be used for CPU get in touch and control internal memory and AGP data in the north bridge chips internal transmission, and provide the type of CPU and dominant frequency, the front-side bus frequency of system, the type (SDRAM, DDR SDRAM and RDRAM etc.) and the supports such as max cap., the error correction of AGP slot of internal memory.In addition, north bridge chips links to each other with the VGA display, integrated display unit.South Bridge chip and north bridge chips interconnect, it mainly is responsible for the data processing and the transmission of external unit (network adapter, voice adapter, power management and reset unit, BIOS (Basic Input and Output System, Basic Input or Output System (BIOS)) chip etc.) and interface (pci interface, USB interface, SATA interface, ide interface etc.).In addition, north bridge chips and I/O chip interconnect, and mainly are in charge of interruption, and it is more smooth and easy to allow the equipment work of I/O management of software ic get, and it provides the I/O interrupt control to keyboard controller, house dog, serial ports and printer interface.
Solidified the program that the most direct computer hardware control of lowermost level is provided in the BIOS chip, it is the hinge that is communicated with between software program and the hardware device, be responsible for the instant requirement of response hardware, and by the operation requirement specifically execution of software to hardware, when starting, computer system at first from the BIOS chip, calls some hardware informations, therefore, the performance of BIOS chip directly affects the compatibility of whole computer system software and hardware.
In the utility model, BIOS chip BIOS 1 and BIOS2 that to adopt two capacity be 4M are connected with north bridge chips, can conveniently upgrade, support PNP, support anti-virus functionality, therefore, when bios program destroyed, perhaps when BIOS chip physical damage, the user only need select another BIOS chip enable system to get final product by the one group of wire jumper that provides on the mainboard, thereby has avoided loss.
See also Fig. 2, be the mechanical construction drawing of total length card mainboard of the present utility model.In the utility model, the BIOS chip BIOS 1 of employing and BIOS2 are ZU4 and the ZU6 among Fig. 2.CPU socket is arranged on the pcb board of mainboard, and to be used to install CPU, realization CPU is connected with mainboard.The utility model provides two DDR, 2 memory bank DIMM1, DIMM2, supports binary channels 533M/667M internal memory, and max cap. reaches 4G.Interface on the mainboard includes mouse and the keyboard interface that is connected with mouse, keyboard respectively, connects the VGA interface of display, floppy drive interface FDD1, RJ45 network interface LAN1, a serial ports COM1/2, IDE hard-disk interface IDE1, SATA hard-disk interface SATA1/2/3/4, the general-purpose serial bus USB interface F_USB1/2/3 that is connected with the network equipment of connection floppy drive equipment.Bus on the mainboard comprises HUB bus, lpc bus, isa bus and the pci bus between South Bridge chip and the north bridge chips.In addition, the integrated AGP display card of mainboard, the high-effect figure speed-up chip of built-in GMA9502D/3D is shared video memory 16/32/64MB; Built-in sound card, plate carry the AC97 sound chip, and this sound chip is supported AC972.1, support MIC-IN, LINE-IN and SPESK-OUT; Built-in network interface card, plate carry INTEL82574L gigabit networking chip.
Compared to prior art, two capacity BIOS of employing of the present utility model chip is connected with South Bridge chip, works as BIOS Program is destroyed, and perhaps when BIOS chip physical damage, the user only need to select by the one group of wire jumper that provides on the mainboard Another BIOS chip enable system gets final product, thereby can avoid the loss that is damaged and causes because of a BIOS chip.
Claims (6)
1, a kind of total length card mainboard, it comprises CPU, South Bridge chip, north bridge chips, described CPU and described South Bridge chip interconnect, and described north bridge chips and described South Bridge chip interconnect, and it is characterized in that: further comprise two and the interconnective BIOS chip of described South Bridge chip.
2, total length card mainboard according to claim 1 is characterized in that, further comprise one with the interconnective I/O chip of described South Bridge chip.
3, total length card mainboard according to claim 1 is characterized in that, further comprises and the interconnective pci interface of described South Bridge chip, USB interface, SATA interface, ide interface.
4, total length card mainboard according to claim 1 is characterized in that, further comprises a VGA display that is connected with described north bridge chips.
5, total length card mainboard according to claim 1 is characterized in that, the capacity of described BIOS chip is 4M.
6, total length card mainboard according to claim 1 is characterized in that, is connected by HUB bus, lpc bus, isa bus and pci bus between described South Bridge chip and the described north bridge chips.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200920135390U CN201383143Y (en) | 2009-03-10 | 2009-03-10 | Full-size card main board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200920135390U CN201383143Y (en) | 2009-03-10 | 2009-03-10 | Full-size card main board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201383143Y true CN201383143Y (en) | 2010-01-13 |
Family
ID=41526614
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200920135390U Expired - Fee Related CN201383143Y (en) | 2009-03-10 | 2009-03-10 | Full-size card main board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201383143Y (en) |
-
2009
- 2009-03-10 CN CN200920135390U patent/CN201383143Y/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN210954874U (en) | Domestic computer mainboard based on Shenwei SW421 treater | |
| CN102708034B (en) | Computer remote and local monitoring system based on CPU (central processing unit) with serial port function | |
| CN211427337U (en) | Computer mainboard based on explain majestic treaters | |
| CN204009695U (en) | A kind of Loongson server mainboard that has high performance chips group | |
| CN103870429A (en) | High-speed-signal processing board based on embedded GPU | |
| CN102375787A (en) | System and method for realizing interface by using memory window | |
| CN110908475A (en) | Shenwei 1621CPU ICH-free 2 suite server mainboard | |
| CN202383569U (en) | Mainboard with multifunctional extensible peripheral component interconnect express (PCIE) interface device | |
| CN206684724U (en) | A kind of server module management control system | |
| CN209928414U (en) | Mainboard and computer equipment | |
| CN215006450U (en) | Feiteng X100 bridge piece embedding mainboard | |
| CN102707781A (en) | Shutdown and reset system and method of mainboard software | |
| TW201435600A (en) | System and method for integrating thunderbolt chipset to PCIe card | |
| CN202939603U (en) | Externally-arranged data processing device | |
| CN201383143Y (en) | Full-size card main board | |
| CN113485960A (en) | General platform and computer based on FT-2000-4 | |
| CN2932449Y (en) | A half-length card mainboard | |
| CN204066271U (en) | A kind of device customized towards POS or scale of tracing to the source | |
| CN101118511A (en) | Method for supporting vertical card by basic input output system | |
| CN203930809U (en) | The management system of the different GPU of a kind of compatibility | |
| CN207367196U (en) | A kind of Portable computer main board and portable computer based on Feiteng processor | |
| CN201383146Y (en) | Full-size card main board | |
| CN213092292U (en) | Industrial control mother board | |
| CN214151687U (en) | Many serial ports extension, many USB's special mainboard of finance based on godson platform | |
| CN101727329A (en) | Mainboard system, storage device for starting mainboard system and connector |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100113 Termination date: 20140310 |