CN201210174Y

CN201210174Y - Detection circuit used for main voltage pulse interference

Info

Publication number: CN201210174Y
Application number: CNU2008200800990U
Authority: CN
Inventors: 霍俊杰; 盛敬刚; 邰晓鹏; 黄金煌; 徐磊
Original assignee: Beijing Tongfang Microelectronics Co Ltd
Current assignee: Beijing Tongfang Microelectronics Co Ltd
Priority date: 2008-04-21
Filing date: 2008-04-21
Publication date: 2009-03-18
Anticipated expiration: 2018-04-21

Abstract

The utility model relates to a detection circuit that is used for the power-source voltage pulse interference, and relates to the technical field of the power-source voltage pulse interference, which comprises a reference voltage generation circuit, a threshold-value comparator, a flip-latch circuit and a power-source voltage. The reference voltage is outputted after being filtered by the reference voltage generation circuit. The reference voltage is outputted to one input end of the threshold-value comparator, and the other input end of the threshold-value comparator is connected with the power-source voltage. The output signal of the threshold-value comparator is locked and outputted by the flip-latch circuit. Compared with the prior art, the detection circuit has low static power consumption, and can detect the pulse interference signal with the voltage being higher or lower than the power-source voltage, and can instantly and effectively raise alarm, so as to guarantee the normal work of other circuit modules in the circuit system.

Description

The testing circuit that is used for the supply voltage impulse disturbances

Technical field

The utility model relates to supply voltage jamming techniques of pulse field, especially for the testing circuit of supply voltage impulse disturbances.

Background technology

In Circuits System, there is the circuit module of multiple function usually, relatively say clock generator circuit, memory circuitry, DLC (digital logic circuit) etc.For guarantee in the entire circuit system all circuit modules correctly need of work a normal supply voltage is arranged.But sometimes, have bigger high-frequency impulse on the supply voltage, can exert an influence or cause the mistake computing to some circuit modules in the system, even the impulse disturbances that has an artificial generation is attacked to Circuits System.This high-frequency impulse may be higher than supply voltage, also may be lower than supply voltage.The testing circuit of prior art, the alerting signal that produces during impulse disturbances, generally all existing reports to the police has delay and the alerting signal latch-up-free function can not be to the shortcoming of its efficiently sampling, and the quiescent dissipation of testing circuit is higher under the supply voltage normal condition.

The patent No. that the U.S. delivered on July 4th, 2000 is that 6085342 patent " ELECTRONIC SYSTEM HAVING A CHIP INTEGRATED POWER ON RESETCIRCUIT WITH GLITCH SENSOR " is to have comprised an impulse disturbances testing circuit in electrify restoration circuit, is used for detecting unusual on the supply voltage.But this circuit can only detect the impulse disturbances that is lower than supply voltage, and is just powerless for the impulse disturbances that is higher than supply voltage.

The patent of Chinese patent CN1427954 " be used for measuring ability disturb circuit arrangement " responds the voltage fluctuation that the supply voltage of integrated circuit surpasses upper voltage limit and lower limit by amplifier and gate circuit, detects the voltage disturbance on the positive and negative both direction.But this circuit also will consume certain power consumption under glitch-free normal condition, and alerting signal latch-up-free function, and other circuit may not efficiently sampling.

Summary of the invention

In order to solve above-mentioned problems of the prior art, the purpose of this utility model provides a kind of testing circuit that is used for the supply voltage impulse disturbances.It can be reported to the police to the impulse disturbances situation that is higher than or be lower than supply voltage, and has and report to the police in time, effectively, and the low characteristics of quiescent dissipation, to guarantee the operate as normal of other circuit module in the Circuits System.

In order to reach the foregoing invention purpose, the technical solution of the utility model realizes as follows:

The testing circuit that is used for the supply voltage impulse disturbances, its design feature are that it comprises generating circuit from reference voltage, threshold value comparer and latch circuit.Supply voltage.Output reference voltage after the generating circuit from reference voltage low-pass filtering.To an input end of threshold value comparer, another input end of threshold value comparer links to each other with supply voltage.The output signal of threshold value comparer is through latch circuit locking and output.

In above-mentioned testing circuit, described generating circuit from reference voltage comprises resistance and electric capacity.Supply voltage.Through resistance and capacity earth, the tie point of resistance and electric capacity is the reference voltage of output successively.

In above-mentioned testing circuit, described threshold value comparer comprises PMOS pipe one, PMOS pipe two and resistance.Supply voltage is connected with the source electrode of PMOS pipe one and the grid of PMOS pipe two respectively, and reference voltage is connected with the source electrode of PMOS pipe two and the grid of PMOS pipe one respectively.PMOS pipe one is connected with comparator output terminal and resistance grounded with the drain electrode of PMOS pipe two is in parallel.

The utility model has been owing to adopted said structure, and when the deviation of supply voltage and reference voltage was in threshold range necessarily, threshold value comparer and latch circuit were output as low level, do not report to the police; When the deviation of supply voltage and reference voltage was greater than or less than certain threshold range, threshold value comparer output high level was to latch cicuit locking and output alarm signal.Compare with prior art, the utility model quiescent dissipation is low, can detect the pulse interference signal that is higher than or is lower than supply voltage, and can be in time, report to the police effectively, guarantee the operate as normal of other circuit module in the Circuits System.

Below in conjunction with the drawings and specific embodiments the utility model is described further.

Description of drawings

Fig. 1 is circuit theory diagrams of the present utility model;

Fig. 2 is the circuit structure diagram of the utility model generating circuit from reference voltage;

Fig. 3 is the circuit structure diagram of the utility model threshold value comparer;

Fig. 4 is an application block diagram of the present utility model.

Embodiment

Referring to Fig. 1 to Fig. 3, the utility model comprises generating circuit from reference voltage, threshold value comparer and latch circuit.Output reference voltage VREF is to an input end of threshold value comparer after the generating circuit from reference voltage low-pass filtering for supply voltage VDD, and another input end of threshold value comparer links to each other with supply voltage VDD.The output signal of threshold value comparer is through latch circuit locking and output.Generating circuit from reference voltage comprises resistance and electric capacity, and supply voltage VDD is successively through resistance and capacity earth, and the tie point of resistance and electric capacity is the reference voltage VREF of output.The threshold value comparer comprises that PMOS manages a P1, PMOS and manages two P2 and resistance R 1.Supply voltage VDD is connected with the grid that PMOS manages two P2 with the source electrode that PMOS manages a P1 respectively, reference voltage VREF is connected with the grid that PMOS manages a P1 with the source electrode that PMOS manages two P2 respectively, and PMOS manages a P1 and PMOS and manages that the drain electrode of two P2 is in parallel to be connected with comparator output terminal OUT and through resistance R 1 ground connection.

In the utility model when work,, generating circuit from reference voltage carries out low-pass filtering to supply voltage VDD and obtains reference voltage VREF, among the reference voltage VREF undesired signal of upper frequency substantially filtering obtain a cleaner collimation and flow power supply signal.The parameter setting of generating circuit from reference voltage median filter can be configured according to actual working environment and demand.Then, supply voltage VDD and reference voltage VREF are made threshold ratio as two inputs of threshold value comparer, when supply voltage VDD is higher than the certain threshold voltage of reference voltage VREF or supply voltage VDD and is lower than the certain threshold voltage of reference voltage VREF, high level alerting signal of threshold value comparer output, otherwise output low level non-alarm signal.Resistance R 1 in the threshold value comparer promptly can electricity consumption in circuit resistance realize, also can realize with current source or the metal-oxide-semiconductor that is operated in linear zone.Latch circuit is that alerting signal is latched, and guarantees that fully other circuit can both read this alerting signal accurately in the Circuits System.

When no pulse was disturbed in supply voltage VDD, supply voltage VDD equated substantially with the magnitude of voltage of reference voltage VREF.Voltage difference is between the two managed the cut-in voltage that a P1 and PMOS manage two P2 much smaller than PMOS, and PMOS manages a P1 and PMOS and manages two P2 and be in cut-off state.Under the drop-down effect of the bigger resistance R 1 of resistance, comparator output terminal OUT is output as low level.

Supply voltage VDD go up to produce an impulse disturbances that is higher than supply voltage VDD and this and disturbs with the difference of reference voltage VREF and manage the cut-in voltage of a P1 greater than PMOS, and PMOS manages a P1 and will open.Flow through the electric current one that PMOS manages a P1 and increase fast, according to Ohm law, the voltage of comparator output terminal OUT equals the resistance that electric current one multiply by resistance R 1.When electric current one is increased to certain numerical value fast, the voltage on the comparator output terminal OUT will rise to the voltage that equates with supply voltage VDD, is output as high level.

In like manner, disturb with the absolute difference of reference voltage VREF and manage the cut-in voltage of two P2 greater than PMOS if supply voltage VDD go up to produce an impulse disturbances that is lower than supply voltage VDD and this, PMOS manages two P2 and will open.Flow through the electric current two that PMOS manages two P2 and increase fast, according to Ohm law, the voltage of comparator output terminal OUT equals the resistance that electric current two multiply by resistance R 1.When electric current two is increased to certain numerical value fast, the voltage on the comparator output terminal OUT will rise to the voltage that equates with supply voltage VDD, is output as high level.

At supply voltage VDD just often, PMOS manages a P1 and PMOS manages two not conductings of P2, so the quiescent dissipation of the utility model testing circuit is close to 0.And be higher than or be lower than the impulse disturbances of supply voltage VDD when unusual in system handles, PMOS manages the electric current that a P1 or PMOS manage on two P2 and increases rapidly, this current flowing resistance R1, make the voltage on the comparator output terminal OUT node increase to fast near the supply voltage VDD, have higher response speed.

Referring to Fig. 4, the utility model is connected with memory circuitry, DLC (digital logic circuit) and other circuit, promptly can avoid pulse interference signal among the supply voltage VDD to the damage of each circuit module.

Claims

1, the testing circuit that is used for the supply voltage impulse disturbances, it is characterized in that, it comprises generating circuit from reference voltage, threshold value comparer and latch circuit, supply voltage (VDD) output reference voltage (VREF) after the generating circuit from reference voltage low-pass filtering arrives an input end of threshold value comparer, another input end of threshold value comparer links to each other with supply voltage (VDD), and the output signal of threshold value comparer is through latch circuit locking and output.

2, the testing circuit that is used for the supply voltage impulse disturbances according to claim 1, it is characterized in that, described generating circuit from reference voltage comprises resistance and electric capacity, and supply voltage (VDD) is successively through resistance and capacity earth, and the tie point of resistance and electric capacity is the reference voltage (VREF) of output.

3, the testing circuit that is used for the supply voltage impulse disturbances according to claim 1, it is characterized in that, described threshold value comparer comprises PMOS pipe one (P1), PMOS pipe two (P2) and resistance (R1), supply voltage (VDD) is connected with the source electrode of PMOS pipe one (P1) and the grid of PMOS pipe two (P2) respectively, reference voltage (VREF) is connected with the source electrode of PMOS pipe two (P2) and the grid of PMOS pipe one (P1) respectively, and the drain electrode parallel connection that PMOS pipe one (P1) and PMOS manage two (P2) is connected with comparator output terminal (OUT) and through resistance (R1) ground connection.