CN201204028Y - Liquid crystal display apparatus - Google Patents

Abstract

The utility model discloses a LCD device. Changing connection of a thin-film transistor switch on the LCD board with a data line and a gate line, the LCD device implements Gamma regulation of one color by opening thin-film transistor of the color, and implements 3 Gamma regulation of each pixel by sequentially conducting three gate lines connected with the pixel once the gate line is opened, so that cost is not evidently increased, and display effect is not reduced.

Description

Liquid crystal indicator

Technical field

The utility model relates to a kind of liquid crystal indicator, relates in particular to a kind of liquid crystal indicator that improves gamma (Gamma) curve.

Background technology

Liquid crystal has the characteristic of double refractive inde, and under different electric fields, has different arrangement modes.LCD utilizes liquid crystal light valve that transmittance is controlled, thus display image.The available liquid crystal display device structure comprises as shown in Figure 1: LCD panel 10, and it has gate drivers 20, is used to drive the sweep trace GL of LCD panel 10; Data driver 30 is used to drive the data line DL of LCD panel 10; And timing controller 40, be used for control gate driver 20 and data driver 30.

LCD is by putting on voltage at electrode to produce electric field and display image in liquid crystal layer, this electric field has been determined the orientation of liquid crystal molecule in the liquid crystal layer and has been controlled polarization of incident light, thereby control the brightness of the light behind the Polarizer that sees through on the colored optical filtering substrates, realize different GTGs.

LCD panel 10 comprises a plurality of liquid crystal cell matrix, and each liquid crystal cell matrix contains thin film transistor (TFT) TFT, is used to drive this liquid crystal cells.Apply sweep signal on sweep trace GL, thin film transistor (TFT) TFT opens, and makes the data-signal of data line DL charge among the liquid crystal cells CLc and keeps this data-signal.

Gate drivers 20 offers sweep trace GL according to the control signal from timing controller 40 successively with sweep signal.

The grayscale voltage collection that grayscale voltage generator 50 produces corresponding to the pixel transmission rate, data driver 30 is chosen a grayscale voltage that two grayscale voltages of gray scale generator concentrate as data-signal, then digital data signal is converted to analog data signal and it is offered data line DL.

Timing controller 40 provides control signal to gate drivers 20, data driver 30, and provides numerical data to data driver 30.

In LCD, each pixel is made up of three sub-pixels of RGB, because liquid crystal panel to the transmitance difference of redgreenblue, therefore can obtain three different gamma curves.In order to improve the color representation power of TFT-LCD, the method of generally taking the Gamma of three kinds of colors of RGB to adjust respectively, this method is called as " 3 Gamma ", the implementation of 3 Gamma mainly contains two kinds at present, a kind of is to realize with the source drive IC that can receive three groups of Gamma of RGB, but this implementation method cost is higher; Another implementation is that the mode by similar FRC among the T-Con realizes, but this method is easy to generate phenomenons such as flicker, reduces display effect.

The utility model content

Technical problem to be solved in the utility model provides a kind of liquid crystal indicator of supporting that 3 Gamma adjust, neither increases cost, does not reduce display effect again.

The utility model is to solve the problems of the technologies described above the technical scheme that adopts to provide a kind of liquid crystal indicator, comprising:

Many gate lines;

Many data lines;

And a plurality of pixels that in the zone that those gate lines and those data lines intersect, are matrix distribution, each pixel comprises two groups of side by side sub-pixel R up and down, sub-pixel G and sub-pixel B, and each sub-pixel is driven by a thin film transistor (TFT);

Wherein, the capable gate line of n connects the thin film transistor (TFT) of two rows sub-pixel R, and the capable gate line of n+1 connects the thin film transistor (TFT) of two rows sub-pixel G, and the capable gate line of n+2 connects the thin film transistor (TFT) of two rows sub-pixel B; The m column data line connects m and lists row's sub-pixel R, last row sub-pixel G and m-1 row are the thin film transistor (TFT) of row's sub-pixel B down, the m+1 column data line connects m row row's sub-pixel R down, arrange the thin film transistor (TFT) that sub-pixel G and m+1 list row's sub-pixel B down, the m+2 column data line connects m+2 and lists row's sub-pixel R, last row sub-pixel G and m+1 row are the thin film transistor (TFT) of row's sub-pixel B down, and n, m are natural number.

The utility model contrast prior art has following beneficial effect: the utility model is connected by the thin film transistor switch on the change LCD panel and data line and gate line, make when each gate line is opened, only open a kind of thin film transistor (TFT) of color and realize that the Gamma of this color adjusts, each pixel realizes that by the conducting successively of three gate lines that are attached thereto 3 Gamma adjust, neither increase cost, do not reduce display effect again.

Description of drawings

Fig. 1 is the liquid crystal display device structure synoptic diagram of prior art.

Fig. 2 is a structure of liquid crystal display panel synoptic diagram of the present utility model.

Fig. 3 is the utility model data-driven precedence diagram.

Among the figure:

10 LCD panel, 20 gate drivers, 30 data drivers

40 timing controllers, 50 grayscale voltage generators

Embodiment

The utility model will be further described below in conjunction with drawings and Examples.

Fig. 2 shows structure of liquid crystal display panel synoptic diagram of the present utility model.

See also Fig. 2, the concrete connected mode of thin film transistor switch and data line and gate line is as follows in the display panels of the present utility model: up and down two pixels side by side totally 6 sub-pixels form a driver element, Fig. 2 comprises two driver elements.The capable gate lines G of n _ n connects the R thin film transistor (TFT) (TFT-RA of all pixels of two rows, TFT-RB), the capable gate lines G of n+1 _ n+1 connects the G thin film transistor (TFT) (TFT-GA of all pixels of two rows, TFT-GB), the B thin film transistor (TFT) of the capable gate lines G of n+2 _ all pixels of n+2 connection two rows (TFT-BA, TFT-BB).And m column data line Source_Line_m connects row's R thin film transistor (TFT) (TFT-RA) on front drive unit, (figure does not show the following row B thin film transistor (TFT) of last row's G thin film transistor (TFT) (TFT-GA) and previous driver element, its equivalent position is similar in appearance to TFT-BB and TFT-BB2), m+1 column data line Source_Line_m+1 connects row's R thin film transistor (TFT) (TFT-RB) under front drive unit, under arrange G thin film transistor (TFT) (TFT-GB) and last row B thin film transistor (TFT) (TFT-BA), m+2 column data line Source_Line_m+2 connects the following row B thin film transistor (TFT) (TFT-BB) of this driver element, and the m+2 column data line connects row's R thin film transistor (TFT) (TFT-RA2) and last row G thin film transistor (TFT) (TFT-GA2) on next driver element simultaneously.

The thin film transistor base plate of said structure needs to use different type of drive, in timing controller, needs special logic that data are handled, and change offers the order of data driver data.Original two data that provide of row, becoming with triplex row now provides, and when just each gate line is opened, only opens a kind of TFT transistor of color.The thin film transistor (TFT) of two rows R sub-pixel is opened simultaneously by the capable gate lines G _ n of n; The thin film transistor (TFT) of two rows G sub-pixel is opened simultaneously by the capable gate lines G _ n+1 of n+1; The thin film transistor (TFT) of two rows B sub-pixel is opened simultaneously by n+2 gate lines G _ n+2.Fig. 3 is the utility model data-driven precedence diagram, see also Fig. 3, in the present embodiment, selected basic mode, the order that timing controller offers the data driver data is: R1-R2-G1-G2-B1-B2, that is to say that the data of opening as gate lines G _ n are R1 and R2, the data that gate lines G _ n+1 opens are G1 and G2, and the data that gate lines G _ n+2 opens are B1 and B2.And owing to the data that offer timing controller by the LVDS agreement are in proper order: R1-〉 G1-B1-R2-G2-B2.In the present embodiment, finish such type of drive so, need the data of storage two row, timing controller data as required provide corresponding data to data driver in proper order then.

Specifically, in the row charging of giving different colours, provide two groups of Gamma voltages of corresponding color, realize the effect of 3 Gamma with this to data driver.That is to say when n gate lines G _ n opens, give two R sub-pixel (TFT-RA up and down simultaneously, TFT-RB) charging, and this voltage has been to use the GTG Gamma voltage at R, and the data of these two R are provided by m column data line Source_Line_m and m+1 data line Source_Line_m+1 respectively.When the capable gate lines G _ n+1 of n+1 opens, give two G sub-pixel (TFT-GA up and down simultaneously, TFT-GB) charging, and this voltage has been to use the GTG Gamma voltage at G, and the data of these two G are provided by m column data line Source_Line_m and m+1 column data line Source_Line_m+1 respectively.When the capable gate lines G _ n+2 of n+2 opens, give two B sub-pixel (TFT-BA up and down simultaneously, TFT-BB) charging, and this voltage has been to use the GTG Gamma voltage at B, and the data of these two G are provided by m+1 column data line Source_Line_m+1 and m+2 column data line Source_Line_m+2 respectively.Because the m+2 column data line provide data can be simultaneously for next driver element, so the pixel of two full lines is considered that the data line that needs is 2/3 times+1 an original data line, simultaneously gate line be traditional gate line (1+1/2) doubly.

Be that the whole resolution of 1024*768 is 1344*806 with the resolution that effectively shows in the VESA standard at last, frame frequency is that 60Hz is an example, specifies sequential control parameter.

In VESA sequential standard, every frame scan is intact to need the time, just gate driving is opened to such an extent that the cycle (STV) is: 1s/60=16.7ms, the time that every line scanning is intact, just cycle (STH) of beginning of data is 16.7ms/806=20.677usec, the clock frequency of system so, the time of promptly transmitting a pixel, just the time of pixel clock is: 20.677usec/1344=15.377nsec.

In structure of liquid crystal display panel of the present utility model, whole resolution is so: (1344*2/3)+1=897,806 (1+1/2)=1209.Guarantee the refresh rate of 60Hz.Gate driving cycle (STV) of opening is so: 1s/60=16.7ms, and the time that every line scanning is intact, just cycle (STH) of beginning of data is 16.7ms/1209=13.786usec, pixel clock frequency is: 13.8usec/897=15.369nsec.

By aforementioned calculation, the difference in the pixel clock of present embodiment and the VESA standard is in 5% accuracy rating as can be seen, and such two kinds of pixel clock frequencies are identical.By comparison, the such high-frequency signal line of pixel clock reduces a lot, can reduce the power consumption of system like this, also can effectively reduce EMI simultaneously.

The utility model drives the RGB sub-pixel respectively by different gate lines and realizes that 3Gamma adjusts, and improves the color representation power of LCD, does not increase cost again.

Though the utility model discloses as above with preferred embodiment; right its is not in order to limit the utility model; any those skilled in the art; in not breaking away from spirit and scope of the present utility model; when doing a little modification and perfect, therefore protection domain of the present utility model is worked as with being as the criterion that claims were defined.

Claims (1)

1, a kind of liquid crystal indicator comprises:

Many gate lines;

Many data lines;

And a plurality of pixels that in the zone that those gate lines and those data lines intersect, are matrix distribution, each pixel comprises two groups of side by side sub-pixel R up and down, sub-pixel G and sub-pixel B, and each sub-pixel is driven by a thin film transistor (TFT);

Wherein, the capable gate line of n connects the thin film transistor (TFT) of two rows sub-pixel R, and the capable gate line of n+1 connects the thin film transistor (TFT) of two rows sub-pixel G, and the capable gate line of n+2 connects the thin film transistor (TFT) of two rows sub-pixel B; The m column data line connects m and lists row's sub-pixel R, last row sub-pixel G and m-1 row are the thin film transistor (TFT) of row's sub-pixel B down, the m+1 column data line connects m row row's sub-pixel R down, arrange the thin film transistor (TFT) that sub-pixel G and m+1 list row's sub-pixel B down, the m+2 column data line connects m+2 and lists row's sub-pixel R, last row sub-pixel G and m+1 row are the thin film transistor (TFT) of row's sub-pixel B down, and n, m are natural number.

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