CN201203886Y - An Embedded Smart Chip with Formula Discovery Function - Google Patents

Abstract

An embedded intelligent chip with the function of formula discovery system, which includes memory, IP soft-core chip, soft-core microprocessor, keyboard interface, USB interface and LCD display controller: soft-core microprocessor and memory, IP module, The keyboard interface, USB interface, and LCD controller are connected through their respective interfaces; the IP soft-core chip is a built-in formula discovery system SOC system chip. The IP soft-core chip includes a data input port, a formula discovery control module, a formula library and a formula output port; the formula discovery control module is respectively connected to the data input port, the formula library, and the formula output port. The original data downloaded by the smart chip from the computer is firstly processed by the data preprocessing module; in the second step, the formula primary selection module optimizes the prototype function according to the error approximation; in the third step, the error analysis module calculates and compares the relative errors of the selected formulas ; The fourth step decides whether to revise the formula found by the system according to the error requirement of the user.

Description

An Embedded Smart Chip with Formula Discovery Function

technical field

The utility model relates to an intelligent chip, specifically an embedded intelligent chip with a formula discovery function, which belongs to the technical field of artificial intelligence.

Background technique

Artificial intelligence is one of the important directions of information technology development. All countries in the world are carrying out research work on formula discovery systems. Formula discovery systems mainly refer to a system that helps learners or researchers analyze experimental data, discover potential laws, and verify learners or researchers' assumptions through machine discovery and learning. According to data reports, only Texas Instruments and Hewlett-Packard have successfully developed a hand-held graphical calculator with a formula discovery function in the world. However, this calculator still adopts the traditional data fitting technology in finding formulas. When small changes in the determinant elements cause significant changes in the solution, that is, there is a "morbid problem" in the determinant of the coefficients of the linear equation system. Moreover, the formulas unearthed by graphical calculators are only one type of polynomial, which not only has a single form of knowledge, poor comprehensibility, and poor usability; more importantly, it is impossible to understand important characteristics such as periodicity and changing trends from the obtained formulas.

Sinx＝x—0.166667x ³ +0.008333x ⁵ —0.0001984x ⁷ +0.0000027557x ^9— ……(1)

Damping vibration curve formula: x＝A ₀ e ^-βt cos(ω _f t+φ) (2)

Observing the left and right sides of the equal sign in formula (1), it can be seen that the polynomial representation on the right cannot reflect important features such as periodicity and changing trends, while the left side is completely different; the situation in formula (2) is even more so.

At present, only a few instrument manufacturers at home and abroad design and produce chips with the function of the formula discovery system. Most manufacturers still use chips based on general-purpose embedded processors, and after the assembly of peripheral circuits, the formula discovery is completed by software algorithms. The main disadvantage of this method is the low efficiency of formula discovery. The second is a system based on FDD (Formula Discovery from Data, the formula is found), and its operating environment is a computer, not an embedded system. inconvenient. In conclusion, no SOC (system on chip) based formula discovery system solution has been found so far. Therefore, research on a reconfigurable formula discovery system that can improve the efficiency of the formula discovery system, reduce the signal transmission between the peripheral drive interface unit and the circuit board has become an important content of the research on improving the development of intelligent information at home and abroad.

Utility model content

The purpose of this utility model is to provide a kind of embedded intelligent chip with formula discovery function, and it is based on the formula of the FPGA (Field Programmable Gate Array, Field Programmable Gate Array) of XILINX company and finds SOC (system on chip) intelligent chip.

In order to achieve the above object, the utility model adopts the following technical solutions:

A kind of embedded intelligent chip with formula discovery system function, it comprises memory, IP soft-core chip, soft-core microprocessor, keyboard interface, USB interface and LCD display controller, is characterized in that: soft-core microprocessor and memory , IP module, keyboard interface, USB interface, and LCD controller are respectively connected through respective interfaces; the IP soft-core chip is a SOC system chip with a built-in formula discovery system.

Wherein, the IP soft-core chip includes a data input port, a formula discovery control module, a formula library and a formula output port; the formula discovery control module is connected to the data input port, the formula library, and the formula output port respectively.

Wherein, the formula discovery control module is built with a data preprocessing module, a formula preliminary selection module, an error analysis module and a formula correction module.

Wherein, the formula library pre-solidifies the knowledge in the knowledge base in the module, and the pre-cure program analyzes, judges, and determines the final formula for the formula discovery system; the formula library includes a prototype function formula library and a prototype algorithm library, Among them, the prototype function formula library is the basic unit that constitutes the mathematical formula, and the prototype included in the prototype algorithm library determines the discovery ability of the system.

Wherein, the formula output port outputs the determined final formula to LCD display.

Among them, the original data input by the smart chip through the keyboard or the original data downloaded from the computer through the USB interface is firstly processed by the data preprocessing module in the IP core module through the formula; the second step is the preliminary selection module of the formula according to the error approximation to optimize the prototype function; the third step is to calculate the relative error of the selected formula by the error analysis module and compare the errors; the fourth step is to decide whether to correct the formula found by the system according to the error requirements provided by the user; the soft-core microprocessor completes The entire formula discovers the scheduling work of the system, such as realizing data input or downloading, responding to interface commands, controlling LCD display refresh and other functions; the LCD controller realizes the driving function of the external LCD.

Among them, the preliminary processing of the data preprocessing module in the IP core module is found through the formula, including two aspects, one is to perform preliminary processing on the data provided by the user according to the specific situation; the other is to select two single variable and the transition to multivariate treatment.

The utility model adopts the above technical scheme, and its beneficial effects are as follows: one, the smart chip described in the utility model is a formula discovery chip based on XILINX FPGA, and this chip discovers IP core module, XILINX FPGA soft core microprocessing with memory, formula The device, keyboard interface, USB interface and LCD controller are integrated into one, solidified into a tiny chip. Compared with the existing technology, it can not only greatly shorten the time for the system to find the formula, but also reduce the area occupied by the entire system and reduce the peripheral The signal transmission between the drive interface unit and the circuit board speeds up the data processing speed of the microprocessor, and the embedded circuit can also avoid the system interference caused by the signal transmission on the external circuit board. The chip itself can act as an independent formula discovery chip in the simplest low-end applications, and the chip has high integration and high reliability. Two, the technical scheme of the present utility model is based on the comprehensive technology of SOC (system on chip) modern computer-aided technology of large-scale FPGA solution, EDA (electronic design automation) technology and large-scale integrated circuit technology development, the utility model has changed In the past, the IP hard core was pre-implanted into the system microprocessor, and the IP soft core of the embedded system microprocessor was used. The IP soft core can be flexibly configured according to the user's needs for its hardware structure, functional characteristics, resource occupation, etc. Construction; changed the defect that the IP hard core cannot reduce the hardware resources of the microprocessor, and the IP soft core can be cut at will, which effectively reduces the cost of the FPGA, so that the target product can be developed at a very low cost in a relatively short period of time . Three, the smart chip of the present utility model is loaded in different instruments, meters or equipment, so that these instruments, meters or equipment have the ability of formula discovery, which will play a very important role in improving the intelligence of instruments, meters or equipment effect.

Description of drawings

Fig. 1 is the structural block diagram of the embedded smart chip with formula discovery system function of the utility model

Fig. 2 finds the structural block diagram of IP soft-core chip for formula in the utility model

Detailed ways

Below in conjunction with accompanying drawing, the technical solution of the utility model is described further.

As shown in Fig. 1 and Fig. 2, the embedded smart chip with the function of formula discovery system disclosed by the utility model proposes a complete design scheme of formula discovery SOC chip, and based on actual specific applications, provides a formula based on The FPGA realization scheme of the 32-bit MicroBlaze soft-core processor of XILINX Company. This system solution can also be applied to other data discovery SOC chip designs, just need to modify the corresponding discovery algorithm and adjust the corresponding modules in the system software.

The utility model has the embedded intelligent chip of formula finding system function, is made up of memory, XILINX FPGA soft core microprocessor, formula finds IP soft core chip, keyboard interface, USB interface and LCD controller, wherein, XILINX FPGA soft core The microprocessor is respectively connected with the memory, the formula discovery IP soft-core chip, the keyboard interface, the USB interface and the LCD controller.

Among them, the memory is used to save the original data and various intermediate operation results that need to be discovered, so that the subsequent calculations can be used. It is directly controlled by the XILINX FPGA soft-core microprocessor; at the same time, it can also enable the formula to discover the IP soft-core chip. Realize the pipeline structure to speed up the calculation speed;

XILINX FPGA soft-core microprocessor is the command and control center of the utility model, adopts MicroBlaze soft-core microprocessor in the embodiment of the utility model, and this MicroBlaze soft-core microprocessor completes the scheduling work of the whole formula discovery system, such as realizing data input Or download, respond to keyboard and USB interface commands, control LCD display refresh and other functions. The MicroBlaze soft-core microprocessor is a 32-bit microprocessor optimized for Xilinx FPGA devices and is suitable for all FPGA devices. Combining the MicroBlaze soft-core microprocessor with other peripheral IP cores can complete the design of a programmable system chip. The MicroBlaze soft core adopts the RISC (reduced instruction system computer) architecture and the 32-bit instruction and data bus of the Harvard (Harvard) architecture. There are 32 general-purpose registers R0~R31 and 2 special registers, the program pointer and the processor status register. MicroBlaze also has instruction and data caches. All instructions are 32-bit in length, with 3 operands and two addressing modes. Instruction functions are divided into logical operations, arithmetic operations, branches, memory read/write and special instructions, etc. The pipeline for instruction execution is a parallel pipeline, which is divided into three pipelines: instruction fetching, decoding and execution. What adopted in the utility model is the upgraded version of MicroBlaze soft-core processor—MicroBlaz V4.0. Can work at 200MHz clock frequency, compared with the previous version, the core performance has increased by 25%. In addition, the 32-bit processor of MicroBlaze V4.0 also includes an optional floating-point unit.

The formula discovery IP soft-core chip is the core part of the entire smart chip. It mainly uses FPGA to realize formula search, error calculation and data fitting; optimization of function prototypes, control of continuous discovery and correction of formulas, etc. The IP soft-core chip has a built-in data input port, a formula discovery control module, a formula library and a formula output port; the formula discovery control module is respectively connected to the data input port, the formula library and the formula output port. Among them: the formula library module is to pre-solidify the knowledge in the knowledge base in this module, and this pre-cure program is used to analyze, judge and determine the final formula for the formula discovery system; there are 4 sub-modules built in the formula discovery control module, respectively These are: data preprocessing module, formula preliminary selection module, error analysis module and formula correction module. The formula discovery IP soft-core chip mainly uses the XILINX FPGA soft-core microprocessor to complete the scheduling work of the entire formula discovery chip, thus forming a formula discovery system;

The keyboard interface provides an external keyboard function to facilitate data input; the keyboard interface manually inputs commands to the MicroBlaze soft-core microprocessor through the keyboard, including technical content such as inputting original data and error requirements.

The USB interface provides the connection function with the computer, so that batch data can be downloaded to the system through the computer; the USB interface provides the connection function between the MicroBlaze soft-core microprocessor and the computer or other instruments, meters or equipment, so that the batch data can be downloaded through the computer. Or other instruments, meters or equipment downloaded to the system.

The LCD controller implements the driving function of the LCD. The LCD display controller is the human-computer interaction interface of the entire system. The LCD display controller displays the current MicroBlaze soft-core microprocessor data preprocessing results, initial selection of formulas, error analysis results, formula corrections, and finally excavated formulas, etc. At the same time, it can also facilitate system debugging.

Among them, the above-mentioned formula discovery control module built into the IP soft-core chip is the core part of the formula discovery IP soft-core chip, and its working principle is as follows:

(1) Data preprocessing module: the data input through the data input port enters the module to complete two tasks, one is to perform preliminary processing on the data provided by the user according to the specific situation; the other is to select two single variable and the transition to multivariate treatment.

(2) Formula primary selection module: perform primary selection according to the received data preprocessed data and the formulas provided in the formula library, and select all satisfying conditions according to the approximation of its error (the error given when the user discovers the formula) prototype function.

(3) Error analysis module: compare the formulas provided by the formula primary selection module according to the principle of minimum relative error and mean square error.

(4) Formula correction module: The analysis results obtained by the error analysis module and the error requirements input by the keyboard interface determine whether to correct the formulas found by the system.

Among them, the built-in formula library module of the above-mentioned IP soft-core chip: includes a prototype function formula library and a prototype algorithm library. ability;

Among them, the formula output port module built in the IP soft-core chip: input the final output formula determined by the formula discovery control module to the MicroBlaze soft-core microprocessor, and input the result to the LCD display controller through the MicroBlaze soft-core microprocessor , the visual display is realized by LCD.

The user can read the formula intuitively through the LCD display controller, and understand how the found formula approximates the experimental data.

Formula discovery IP soft-core chip workflow: manually input test data through the data input port, including the selected function prototype or the inference engine automatically selects the function prototype to combine into a mathematical relational expression, and uses the principle of the least square method to find the coefficients of the combined relational expression. Display the change trend, through the data preprocessing module; then send the preprocessed data to the formula primary selection module, and according to the approximation effect of the mathematical relationship, the user decides to reconstruct the relationship or perform automatic reasoning to further construct the mathematical relationship. And enter the error analysis module for error analysis. During the search process, whenever a more feasible formula or function prototype is found, it will be sent to the formula library and wait for the next selection. After each round of selection, the unselected formulas will be eliminated. Exit the formula library until a satisfactory formula is found, and finally output the satisfied formula through the formula output port.

Claims (4)

1, a kind of embedded intelligence chip with formula discovery systemic-function, it comprises storer, the soft nuclear chip of IP, soft nuclear microprocessor, keyboard interface, USB interface and LCD display controller, it is characterized in that: soft nuclear microprocessor is connected respectively by interface separately with storer, IP module, keyboard interface, USB interface, lcd controller; The soft nuclear chip of described IP is to be built-in with the SOC System on Chip/SoC that formula is found system.

2, a kind of embedded intelligence chip that formula is found systemic-function that has according to claim 1 is characterized in that: the soft nuclear chip of described IP comprises data-in port, formula discovery control module, formula storehouse and formula output port; Described formula finds that control module is connected with data-in port, formula storehouse, formula output port respectively.

3, a kind of embedded intelligence chip that formula is found systemic-function that has according to claim 2, it is characterized in that: described formula finds that control module is built-in with data preprocessing module, formula primary election module, error analysis module and formula correcting module.

4, a kind of embedded intelligence chip that formula is found systemic-function that has according to claim 2, it is characterized in that: described formula storehouse comprises prototype function formula storehouse and Prototype Algorithm storehouse.

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