CN201063970Y - Terminal product mainboard - Google Patents
Terminal product mainboard Download PDFInfo
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- CN201063970Y CN201063970Y CNU2007201531592U CN200720153159U CN201063970Y CN 201063970 Y CN201063970 Y CN 201063970Y CN U2007201531592 U CNU2007201531592 U CN U2007201531592U CN 200720153159 U CN200720153159 U CN 200720153159U CN 201063970 Y CN201063970 Y CN 201063970Y
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Abstract
The utility model provides a terminal product mainboard, and a baseband or a core chip of a radio frequency module is arranged on the terminal product mainboard. The utility model is a four-layer printed circuit board and comprises surface layers and two inner layers arranged between the surface layers, wherein, the surface layers comprise a top layer and a bottom layer which are respectively a main reference bed layer which formed by a large area copper sheet, and large area copper sheets of the top layer and the bottom layer are communicated with each other through a through hole; each inner layer is a main wiring layer and wiring is divided into subareas according to functions; the space between the inner layers is larger than or equal to the space between the surface layers and the adjacent inner layers; a wiring area of each inner layer corresponds to a large area copper sheet zone of an adjacent layer or a vertically arranged routing of the adjacent layer. Through the technical proposal provided by the utility model, terminal products can be further miniaturized through layer reducing design, and production cost is reduced under the condition of maintaining fundamental performances of the prior multilayered printed circuit board; moreover, and reliability is improved.
Description
Technical field
The utility model relates to the printed wiring plate technique, is specifically related to final product of mainboard.
Background technology
Printed wiring board PCB (printed circuit board) is aided with the formed structural member of conductor wirings with insulating material, be applied in the middle of various communications and the electronic equipment, its technology is constantly development also, develop into double sided board from original single sided board, develop into multi-layer sheet again, main at present comparatively extensive with the application of four, six laminates.High density interconnect HDI (high density interconnection) technology is the trend of printed wiring board PCB development, mainly adopts micropore (Microvia) technology, utilizes micropore collocation fine rule reaching high density interconnect, thereby improves space availability ratio.The micropore technology generally can adopt laser punching, plasma pore-forming or sensitization pore-forming.
The general HDI plate structure that adopts six layers of terminal class mainboard PCB comprises six layers of single order 1+4+1 structure HDI plate or six layers of second order 1+1+2+1+1 structure HDI plate at present.Along with the lasting raising of device integrated level, the hardware cost of PCB continues to descend.The cost of mainboard PCB proportion in the complete machine hardware cost is more and more higher, and the quality of the last signal quality of PCB also directly influences the complete machine performance.We can say that mainboard PCB is the principal element that influences the end product performance and price.
But existing six layers HDI plate, because the manufacturing process link is many, the process-cycle is long, the used sheet material number of plies is many, so production cost is higher.In addition, six layers HDI plate thickness is not allowed to be easy to do thin, because the number of plies is many, will guarantee certain dielectric strength between every layer, the dielectric layer between each signals layer can not be too thin, and the too thin meeting of internal layer medium directly causes processing yield and descends, present most of PCB producer is limited by technological level, common non-laser hole dielectric layer is greater than 4mil, thus present six layers of common thickness of single order HDI plate more than or equal to 0.8mm, production cost will increase in proportion when being lower than 0.8mm.
And the terminal class mainboard of present employing six layer laminate structures makes end product be difficult to further miniaturization.
The utility model content
Technical problem to be solved in the utility model is to provide a kind of final product of mainboard, can simplified structure, thus can be so that the further miniaturization of end product.
For solving the problems of the technologies described above, the utility model is achieved through the following technical solutions:
The utility model provides a kind of final product of mainboard, comprises the acp chip of base band or radio-frequency module on it, and described final product of mainboard is four layers of printed circuit board, comprises top layer and two internal layers between described top layer.
The utility model can reduce the physical dimension of final product of mainboard itself effectively, thereby help making the further miniaturization of end product by subtracting layer design.
Description of drawings
Fig. 1 is the utility model embodiment method for designing schematic diagram;
Fig. 2 is the utility model embodiment one microstrip line one schematic diagram;
Fig. 3 is the utility model embodiment one microstrip line two schematic diagrames;
Fig. 4 is the utility model embodiment one microstrip line three schematic diagrames;
Fig. 5 is a kind of four layers of laser blind hole HDI printed wiring board schematic diagram that produce plate according to the conduct of first embodiment end product of the present utility model.
Fig. 5-Figure 11 is the schematic diagram according to the various execution modes of the laminated construction of four layers of laser blind hole HDI printed wiring board of the conduct of first embodiment end product product of the present utility model plate.
Figure 12 is a kind of four layers of mechanical blind hole HDI printed wiring board schematic diagram structural representation according to the conduct final product of mainboard of the present utility model of second embodiment.
Figure 12-15 shows the schematic diagram according to the various execution modes of the laminated construction of the employing machinery blind hole HDI printed circuit board of second embodiment.
Figure 16 is the principle schematic of the microstrip line construction of four layers of mechanical blind hole HDI plate.
Figure 17 is the principle schematic of the strip lines configuration of four layers of mechanical blind hole HDI plate.
Embodiment
Below the detailed description of some embodiment has been provided various explanations to the utility model specific embodiment.But the multitude of different ways that the utility model can be defined by the claims and cover is implemented.This description taken in conjunction accompanying drawing carries out, and identical in the accompanying drawings parts are represented with identical label.
In addition, provide the parameter of main key parameter herein, and this parameter can continue variation with the progressive of technological level for the process checking.Therefore, promote with technological level and carry out parameter optimization and to adjust all belonging to this patent coverage by the optimization thinking that this paper proposes.
Use following notion among the application: " in large area complete " and " copper sheet in large area " etc., these notions all are relative concepts, all be meant a certain zone in the reference layer, this zone is the view field of wiring region in this reference layer in the relevant layers, and be copper sheet intactly in this regional extent in the reference layer, do not connect up or a small amount of wiring is only arranged.For the situation of this a small amount of wiring, its influence to the pcb board performance parameter should be limited and be as can be known to those skilled in the art, and can be controlled in allowed limits as the case may be by those skilled in the art.
Prior art personnel think by the number of plies that reduces final product of mainboard so that the end product miniaturization, and reducing cost is to be difficult to realize, and the utility model has just overcome this technology prejudice, has solved the problem of product miniaturization with four laminates.
The laminated construction of HDI printed circuit board is described as follows:
1) six layers of single order 1+4+1 structure HDI plate, wherein 1+4+1 refers to the laminated construction of this kind HDI plate.The whole veneer number of plies is 6 layers.
One 4 laminate is done in being characterized as of this structure earlier, and this 4 laminate is with general through hole 4 laminates.Because this 4 laminate is positioned at the centre position of 6 laminates, be 2,3,4,5 layers of 6 laminates so we define this 4 laminate.Laminate prepreg and Copper Foil with increasing layer way again in the upper and lower surface of 4 laminates then, form 1 layer and 6 layers of 6 laminates, promptly two skins can be done the single order blind hole before forming 1 floor and 6 layer line roads, were communicated with 1 layer and 2 layers respectively, 5 layers and 6 layers.
2) six layers of second order 1+1+2+1+1 structure HDI plate, wherein 1+1+2+1+1 refers to the laminated construction of this kind HDI plate.
The whole veneer number of plies is 6 layers.One 2 laminate is done in being characterized as of this structure earlier, and this 2 laminate is with general through hole 2 laminates.Because this 2 laminate is positioned at the centre position of 6 laminates, be 3 layers and 4 layers of 6 laminates so we define this 2 laminate.Laminate prepreg and Copper Foil with increasing layer way again in the upper and lower surface of 2 laminates then, form 2 layers and 5 layers of 6 laminates, before forming 2 floor and 5 layer line roads, can do the single order blind hole, be communicated with 2 layers and 3 layers respectively, 4 layers and 5 layers.
Finish 2 layers and 5 layers, laminate prepreg and Copper Foil with Layer increasing method at 2 layers and 5 laminar surfaces again, form 1 layer and 6 layers of 6 laminates, promptly two skins can be done the single order blind hole before forming 1 floor and 6 layer line roads, were communicated with 1 layer and 2 layers respectively, 5 layers and 6 layers.
3) four layers of 1+2+1 laser blind hole structure, wherein 1+2+1 refers to the laminated construction of this kind HDI plate.The whole veneer number of plies is 4 layers.
One 2 laminate (double sided board) is done in being characterized as of this structure earlier, and this 2 laminate is with general through hole 2 laminates.Because this 2 laminate is positioned at the centre position of 4 laminates, be 2 layers and 3 layers of 4 laminates so we define this 2 laminate.Laminate prepreg and Copper Foil with increasing layer way again in the upper and lower surface of 2 laminates then, form 1 layer and 4 layers of 4 laminates, before forming 1 floor and 4 layer line roads, can do the single order blind hole, be communicated with 1 layer and 2 layers respectively, 3 layers and 4 layers.
4) 2+2 machinery blind hole structure, wherein 2+2 refers to the laminated construction of this kind pcb board.The whole veneer number of plies is 4 layers.
Two 2 laminates are done in being characterized as of this structure earlier, and each 2 laminate is with general through hole 2 laminates.By one of them 2 laminate of lamination sequential definition is 1 layer and 2 layers of 4 laminates, and another 2 laminate is 3 layers and 4 layers of 4 laminates.Then these two 2 laminates are got up to form 4 laminates by the laminated layer sequence pressing.Can do the through hole that is communicated with 1 layer and 4 layers on this 4 laminate.
Existing six layers of HDI plate, owing to reasons such as the manufacturing process link is many cause production cost higher, the utility model embodiment provides a kind of and utilizes four layers of laser blind hole HDI plate structure to see that Fig. 5-Figure 11 or a kind of four layers of mechanical blind hole printed wiring board structure (see that Figure 12-Figure 15) replaces the method for designing of existing six layers of HDI plate, is keeping reducing production costs, improve reliability under the former multilayer printed wiring board key property situation by subtracting layer design.
Execution mode one
Four layers of laser blind hole HDI plate of the utility model embodiment design, see also Fig. 5, be two extexines and two internal layers, two extexines are ground floor (Layer1) 10 and the 4th layer of (Layer4) 40, two internal layers are the second layer (Layer2) 20 and the 3rd layer of (Layer3) 30, also comprise laser blind hole 50, buried via hole 60 and via hole 70 in the wiring board.Structure shown in this figure is wherein a kind of version of the utility model embodiment, just illustrates here, and Fig. 6-11 schematically shows more versions of four layers of printed circuit board of laser blind hole.Explain concrete ins and outs with the preferred embodiment below.
The concrete parameter of four layers of laser blind hole HDI plate stack-design sees the following form 1.
Table 1
The thickness range of top layer and adjacent inner layer (promptly in the table 1 between the top layer and the second layer thickness between the thickness of prepreg and the 3rd layer and the bottom) is 60 μ m-80 μ m.
The thickness of having lifted top layer and adjacent inner layer below is 60 μ m, 70 μ m, three examples of 80 μ m.
Example 1, the material of prepreg is exactly a prepreg, and the prepreg thickness between top layer and adjacent inner layer is 60 μ m, the core between the second layer and the 3rd layer, its material also is a prepreg, but thickness is variable.The material of top layer, the second layer, the 3rd layer and bottom all is a copper, and its thickness all is 25 μ m.Material, parameter and the layer of structure of example 1 described four layers of laser blind hole HDI plate both satisfied the requirement of miniaturization, can guarantee normal serviceability again.
Example 2, the material of prepreg is exactly a prepreg, and the prepreg thickness between top layer and adjacent inner layer is 70 μ m, the core between the second layer and the 3rd layer, its material also is a prepreg, but thickness is variable.The material of top layer, the second layer, the 3rd layer and bottom all is a copper, and its thickness all is 25 μ m.Material, parameter and the layer of structure of example 2 described four layers of laser blind hole HDI plate both satisfied the requirement of miniaturization, can guarantee normal serviceability again.
Example 3, the material of prepreg is exactly a prepreg, and the prepreg thickness between top layer and adjacent inner layer is 80 μ m, the core between the second layer and the 3rd layer, its material also is a prepreg, but thickness is variable.The material of top layer, the second layer, the 3rd layer and bottom all is a copper, and its thickness all is 25 μ m.Material, parameter and the layer of structure of example 3 described four layers of laser blind hole HDI plate both satisfied the requirement of miniaturization, can guarantee normal serviceability again.
Can process design DFM requirement according to volume production, recommend according to present producer technological ability, core LAMINATE thickness＞=4mil wherein, preferred＞=8mil, it can get following series of values:
0.1mm/0.2mm/0.3mm/0.4mm/0.5mm/0.6mm/0.7mm/0.8mm/0.9mm more than reaching.This series of values of organizing data based sheet material changes and continues to change.At present the minimum thickness of slab recommendation of producer is 0.5mm, LAMINATE thickness=8mil wherein, and along with LAMINATE thickness increases, thickness of slab also increases successively.Thickness of slab increases to the optimization direction.But on technological level progress basis, thickness of slab also can decrease, to meet the requirement of ultrathin design.Prepreg Prepreg selects 1080 for use at present as the most frequently used sheet material, and cost is low, constitutes veneer intensity simultaneously and is better than selecting for use gum Copper Foil RCC.
Below introduce in detail the utility model embodiment with six layers of HDI plate subtract the layer be four layers of laser blind hole HDI plate method for designing.
Seeing also Fig. 1, is the method for designing schematic diagram that final product of mainboard adopted of the utility model embodiment, and comprising:
A1, with holding wire subregion wiring, and be arranged in and the extexine internal layer adjacent;
When holding wire was connected up, according to sectorization, and total principle was that two internal layers are main wiring layer.
A2, extexine do not connected up or few wiring, and be communicated with as main ground by via hole;
Two extexines are line not, or few as far as possible wiring, and is communicated with jointly as main reference ground by via hole is good, is respectively two internal layer cablings main backflows ground is provided, thereby can provide complete return flow path, the minimizing signal cross-talk.
A3, live width and floor height parameter control group desired value are set.
Live width/floor height/thick parameter of medium DK value/copper is set, controls final impedance desired value indirectly by the thick consistency of control live width/floor height/medium DK value/copper.As long as live width/floor height/thick design parameter that reaches of medium DK value/copper then can guarantee final impedance Control desired value.Because the thick variation of medium DK value/copper is very little to the resistance value influence, about about 1 ohm, therefore can ignore the influence of these two factors.
Need to prove there is not inevitable order contact between above-mentioned A1, A2 and A3 step, just it is divided into A1, A2 and A3 step for the convenience on describing.
Below in conjunction with method for designing shown in Figure 1 the utility model embodiment further is elaborated, mainly comprises following aspect:
One, via parameters and live width/line-spacing are set
The utility model embodiment adopts with existing identical via parameters setting and the live width/line-spacing setting of six laminates.Here provide the parameter of main key parameter, but this parameter can continue variation with the progressive of technological level for the process checking.
1) laser blind hole: bore diameter N is 5mil, and connection gasket PAD diameter is 12mil.Along with the lifting of producer's technological ability, laser drill diameter N can continue to descend, the also corresponding decline of PAD diameter M of boring, and certain relation is arranged between the two, and be recommended as M＞=N+D, wherein D is increment, D＞=6mil.
2) mechanical buried via hole and through hole: bore diameter is N, N＞=8mil, and PAD diameter M＞=N+D, D＞=10mil wherein, PAD is big more, and processing cost is low more, is that N increases so optimize direction, and M also increases, but will guarantee the preferred requirement of live width line-spacing.
3) live width/line-spacing of volume production: by present producer technological level live width/line-spacing is more than or equal to 3mil/3mil, and live width/line-spacing increases to optimizing direction, and processing cost decreases.
4) spacing＞=6mil of bulk copper sheet and PAD linear apart from other.Spacing is big more, and processing cost is low more, but effectively the copper sheet area reduces, and then the isolation of signal of interest and protection effect descend.So need take into account consideration.
Two, signals layer wiring
Illustrate with four layers of mobile phone board, in two extexines of general four layers of mobile phone board, an extexine is the placement-face of keyboard face and/or liquid crystal display LCD screen, and another extexine is the placement-face of main devices.
In the utility model embodiment method for designing, the total principle of signals layer layout is divided into radiofrequency signal zone and digital signal zone for pressing the strict subregion of function, comprising, and radiofrequency signal is regional and the digital signal zone adds shielding box/chamber respectively.During layout, each functional module in the zone is inner moves towards arranging devices by circuit signal as far as possible, so that be communicated with cabling with nearby top layer short-term as far as possible, even also will consider with short-term will be with interior layer line connection cabling the time and do not intersect as far as possible.Functional module is divided and is wanted clear and rational during layout, also will take into account device simultaneously and put neat appearance.
The total principle of signals layer wiring is that two internal layers are main wiring layer, and two extexines do not connect up as far as possible.When the wiring of two internal layers, the design principle of disposal wires of each layer is copper sheet in large area or the cabling that has small amount of vertical to arrange for the pairing adjacent layer of wiring zone as far as possible.When extexine was bottom BOTTOM face, if cloth top layer line will be walked short-term so, and the top layer line was as far as possible in shielding cavity/box, to reduce the complete machine radiated interference.
Below specifically introduce the wires design of each holding wire.
2.1 the radio frequency rf signal line is handled
The RF holding wire is walked internal layer, and two adjacent layer all is in large area complete.The RF holding wire can be arranged in and keyboard face internal layer adjacent, also can be arranged in and the device side internal layer adjacent.The RF holding wire also can be walked the top layer, and its adjacent layer is in large area complete.
2.2 power line is handled
1) main power line is walked internal layer, walk along edges of boards, with keyboard face internal layer adjacent be the preferred layer of power line cabling.For example main power line can be arranged in the edges of boards with keyboard face internal layer adjacent, two adjacent layers are copper sheet in large area, and between the different layers copper sheet connective good.There are wide ground wire or copper sheet to isolate between main power line and the edges of boards, perhaps can go up the ground that whenever keeps at a certain distance away with regard to increasing hole, ground and other layer isolator along its length and well be communicated with at this.
2) other power line is walked internal layer, and preferential wiring layer is and keyboard face internal layer adjacent.Avoid with keyboard PAD vertically superposedly during cabling as far as possible, intersects, also will try one's best vertically if intersect with the cabling of another internal layer is few as far as possible.
2.3 important audio signal wire is handled
Important audio signal wire is preferably connecting up with keyboard face internal layer adjacent.Its corresponding keyboard face is a large-area ground copper sheet during audio signal wire wiring, and avoid keyboard PAD, and the part of its another adjacent internal layer is complete ground copper sheet as far as possible, as the necessary cabling of this part, cabling also should lack as far as possible, and be to be arranged vertically, this cabling is not a clock cable as far as possible.If audio signal wire is arranged in and main devices face internal layer adjacent, then require two adjacent layer as far as possible for complete ground copper sheet, especially to avoid the high speed signal of main devices face and the device pin PAD of power supply signal.Audio signal wire is wanting property-line to isolate with layer and ambient signals line, and this ground wire and other layer or well being communicated with in large area with layer.
General audio signal wire is not arranged in the top layer, the very short outlet of holding wire only or walk finite length in shielding box or chamber.The pin PAD of audio signal wire and the adjacent layer under the audio signal wire of top layer all require then can guarantee audio signal quality into complete ground copper sheet.
2.4 data/address bus is handled
The preferred wiring layer of data/address bus is and main devices face internal layer adjacent.Data/address bus is logical at one deck cloth as far as possible, changes layer with short top layer line when needing to intersect.In general, existing data/address bus be regardless of kind and bunch, and in the utility model embodiment method for designing, with data/address bus by the kind sub-clustering, by bunch wiring, bunch and bunch between property-line isolate, can reduce like this and crosstalk.The ground wire that is used to isolate with well be communicated with other layer ground in large area.The data/address bus that should divide bunch has liquid crystal display LCD data wire, interface line, JTAG (Joint Test Action Group, combined testing action group) line, Serial Port Line, UIM (User Identity Model, subscriber identification module) card line, keyboard chord, multi-medium data line and address wire etc.
2.5 clock cable is handled
Clock cable is preferably connecting up with keyboard face internal layer adjacent.Its corresponding keyboard face is a large-area ground copper sheet during clock cable wiring, and avoid keyboard PAD, and the part of its another adjacent internal layer is complete ground copper sheet as far as possible, as the necessary cabling of this part, cabling also should lack as far as possible, and be to be arranged vertically, this cabling is not an audio signal wire as far as possible.
2.6 the multi-media signal line is handled
The preferred wiring layer of multi-media signal line is and main devices face internal layer adjacent.The multi-media signal line is logical at one deck cloth as far as possible, changes layer with short top layer line when needing to intersect.In general, existing multi-media signal line be regardless of kind and bunch, and in the utility model embodiment method for designing, with the multi-media signal line by the kind sub-clustering, by bunch wiring, bunch and bunch between property-line isolate, can reduce like this and crosstalk.The ground wire that is used to isolate with well be communicated with other layer ground in large area.
2.7 the design on main ground
In six layers of HDI plate, can be with one of them internal layer as main ground, the effect on main ground is for signal provides return flow path, can reduce crosstalking between signal.Six layers of HDI plate are because can be with an internal layer as main ground, thereby can provide complete large tracts of land backflow ground, and with mainly smaller as crosstalking between the signal of signal return flow path, and four layers of HDI plate have only two internal layers, can not also just have complete one deck master ground with one of them internal layer as main ground, so the subject matter that four laminates face is that main ground copper sheet is imperfect, cause the return flow path of high speed signal discontinuous complete, be easy to generate and crosstalk.The utility model embodiment is by following design, do not connect up or as far as possible few wiring at two extexines, and be communicated with jointly as main reference ground, be respectively two internal layer cablings main backflows is provided by via hole is good, thereby complete return flow path can be provided, reduce signal cross-talk.After wiring was finished, all vacant zones will be done floor file and be handled, and the patch copper sheet well is communicated with copper sheet in large area by enough holes, ground.
2.8 effectively improve whole plate EMC performance BGA (Ball Grid Array Package, BGA Package) district routing strategy, this strategy be suitable for laser blind hole all HDI plates, and be not limited to four laminates.
1) the laser micropore strictness is placed on below the device bonding pad (PAD), and accomplishing not increases the area occupied of signal on the veneer top layer because of the pad of laser via hole.
2) do not connect up in the surface.Spread network copper sheet in large area, under present PCB processing technology permission situation, guarantee the continuity of this large tracts of land copper sheet, uniformity.This outwardly the network copper sheet can effectively absorb device noise as the reference planes layer of device.Because any ground plane layer of high-speed figure plate was all nearer apart from device for this zone network ratio, thereby best ground level effect is arranged in the past.Can significantly reduce the external radiation EMI noise of device body.
3) if surface wiring to lack as far as possible, thereby do not destroy the top layer connectedness of copper sheet in large area.
4: main wiring layer is time top layer (promptly with the top layer internal layer adjacent).Equally with the top layer in large area the network copper sheet provide main reference to reflux ground for a large amount of cablings on inferior top layer.Since the structures shape of HDI plate top layer and inferior top layer than in the past between more any layer spacing all nearer, thereby, nearest between each signal and its backflow ground in this case, most of signal energy is coupling between signal and its backflow ground, thereby significantly reduces external radiation.
5) holding wire that is arranged in time top layer compares with spacing is generally much closer recently between the layer signal apart from its signal reference planes (adjacent top layer), be generally less than 2.8: 4, so crosstalking between the signal is far smaller than the coupling unit between this signal and its backflow signal, crosstalks between the signal and effectively suppressed.
6) zone network copper sheet in top layer is owing to exist the top layer device that pad is installed, and is not complete connection.Mainly connected region is not the BGA device region.Because general BGA device bonding pad diameter is 10,12,14,16mil does not wait, if but follow the principles 1, then under PCB production technology ability condition at present, still there is copper sheet to be communicated with at present between the BGA pad of PITCH＞=0.5mm.
7) comprise following rule in the PCB design tool in the Spacing Rule Set design rule:
P＝2S+W P＞＝0.5mm W＞＝3mm
P:BGA pad pin centre-to-centre spacing
S: copper sheet or cable run distance solder pad space length
W: the narrowest copper sheet or trace width.
Above-mentioned said signals layer wiring content is summarized:
In present six laminates,,, then need to consider the signal cross-talk problem so wiring will be connected up the line of as much now than being easier in four laminates because four internal layers can be arranged.Preferred two internal layers of four laminates are main wiring layer.Because unique laminated construction of four laminates, make two main wiring layers that an adjacent extexine that interfloor distance is very near all be arranged respectively, this extexine is cabling seldom, therefore can well be communicated with by via hole, for adjacent inner layer provides good backflow ground, and the interfloor distance between two internal layers is far longer than and (＞=2 times of distances between the extexine recently, preferably＞=3 times), press the theoretical reasoning of electromagnetic field spatial distribution so, crosstalking between two internal layer cablings of this pitch arrangement can accomplish to be far smaller than respectively and nearest top layer cabling between crosstalk, probably have only and the top layer cabling between crosstalk about 10%.If so press the wiring rule of above-mentioned said signals layer wiring, crosstalking and effectively to control between the then whole partitioned signal.If top layer and complete overlapping this crosstalking of adjacent layer cabling are defined as maximum of crosstalk, then by the cabling between four layers of HDI plate of wiring rule processing of above-mentioned said signals layer wiring, and do not calculate the accumulative total effect, then crosstalking between the sort signal only is about 10% of maximum of crosstalk.
Three, impedance Control design
At present in the production process of PCB, propose final impedance Control desired value when generally being design, specifically adjust by production technology level separately and reach this final impedance Control desired value by producer.And such as terminal class mainboards such as mobile phones, because cabling is short, the consistency of the impedance Control of rf signal line cabling (or claiming continuity) has precedence over final impedance Control desired value.Based on this principle, in the utility model embodiment method for designing, control final impedance desired value indirectly by the thick consistency of control live width/floor height/medium DK value/copper.As long as live width/floor height/thick design parameter that reaches of medium DK value/copper then can guarantee final impedance Control desired value.This method has also guaranteed the consistency of the whole plate electric property of different PCB producer's manufacturing veneers when guaranteeing impedance Control, this point helps the circuit parameter adjustment, is convenient to the assurance of various electric index allowances, also makes the veneer operation more reliable and more stable.
Because four laminate impedance Control design conditions are single, control live width/floor height mode is more direct impedance Control mode.The mode of control live width/interlamellar spacing has also reduced the workload of producer's test impedance, cuts down finished cost.Can on the auxiliary limit of cell board layout, do the impedance Control figure, standby resolution chart during as debugging.
3.1 impedance Control tolerance analysis
In the utility model embodiment method for designing, define general live width tolerance for+/-20%, and the general sheet metal thickness margin of tolerance sees the following form 2:
| Thickness H (mil) | H＜＝4mil | 4mil＜H＜＝8mil | 8mil＜H |
| Tolerance D (μ m) | +/-15 | +/-25 | +/-50 |
Table 2
The main correlative factor of impedance Control is that live width/floor height/medium dielectric constant/copper is thick, because the thick variation of medium DK value/copper is very little to the resistance value influence, about about 1 ohm, therefore can ignore the influence of these two factors.From the technical process characteristics, because the PCB lamination process has the base material will mobile filling perforation and fill no copper zone, floor height reduces basically.When sheet metal thickness exceeded design thickness, exceeding part should be less than the design tolerance scope.After the lamination filling perforation and filling no copper zone, the reduced thickness of super thick sheet material.So on the whole, the thickness of sheet material can not reach plus tolerance, can only consider the negative common difference scope.In addition, because lateral erosion, finish live width and always be lower than the design live width, thus can only consider that live width is got negative common difference the time to the influence of target impedance value.
In general, line widths shrink, floor height also diminishes.Because live width is more little, impedance is high more, and floor height diminishes, and impedance is low more, so the error of both direction is to the complementation that influences of impedance.Therefore single factor maximum allowance scope is the situation to the impedance influences maximum.
Below make a concrete analysis of several line structures and impedance computation.
3.2 microstrip line construction and impedance computation condition:
See also the utility model embodiment microstrip line one schematic diagram shown in Figure 2, W1 is a live width among the figure, and W is the live width after the lateral erosion, and T is that copper is thick, and H is a prepreg PREPREG floor height.
50 ohm microstrip impedance design and controlling value can be with reference to following tables 3, and computational tool is CITS25VERSION 2004.
| Design load | Controlling value | |
| Story height H (mil) | 2.8 | 2.8 |
| Live width W1 (mil) | 5 | 5 |
| The live width tolerance | +/-20％ | +20/-15％ |
| Floor height tolerance (μ m) | +/-15 | +/-10 |
| Target impedance and tolerance (ohm) | 50+/-7 | 50+/-5 |
Table 3
3.3 microstrip line construction that inferior top layer hollows out and impedance computation condition:
See also the utility model embodiment microstrip line two schematic diagrames shown in Figure 3, W1 is a live width among the figure, and W is the live width after the lateral erosion, and T is that copper is thick, and H is the floor height of prepreg PREPREG and core Laminate, and H1 is a core Laminate floor height.
The microstrip line impedance design value that 50 ohm of time top layers hollow out can be with reference to following table 4, and computational tool is CITS25 VERSION 2004.
| Story height H (mil) | 2.8+Laminate |
| Core Laminate H1 (mm) | 0.2+D1 |
| Live width W1 (mil) | 23+D2 |
| The live width tolerance | +/-20％ |
| Floor height tolerance H+Laminate (μ m) | +/-50 |
| Target impedance and tolerance (ohm) | 50+/-5 |
Table 4
In the table 4, increment D2 is according to the different optional suitable values of the thickness of Laminate, and purpose is to reach 50 ohm to calculate target impedance.Wherein Laminate thickness is more than or equal to 0.2mm, and increment D1 can be the multiple of 0.05mm.
3.4 buried strip lines configuration and impedance computation condition:
Because the special construction (1+2+1) of four laminates, strip line is accomplished minimum feature 4mil, and high impedance also has only about 36 ohm, if will accomplish 50 ohm, has only the top layer is hollowed out, and becomes buried microstrip line construction.
See also the utility model embodiment microstrip line three schematic diagrames shown in Figure 4, W1 is a live width among the figure, and W is the live width after the lateral erosion, and T is that copper is thick, and H is the floor height of prepreg PREPREG and core Laminate, and H1 is a core Laminate floor height.
50 ohm of buried microstrip line impedance design values can be with reference to following table 5, and computational tool is CITS25VERSION 2004.
| Story height H (mil) | 2.8+Laminate |
| Core Laminate H1 (mm) | 0.2+D1 |
| Live width W1 (mil) | 12.5+D2 |
| The live width tolerance | +/-20％ |
| Floor height tolerance H (μ m) | +/-50 |
| Target impedance and tolerance (ohm) | 50+/-5 |
Table 5
In the table 5, increment D2 is according to the different optional suitable values of the thickness of Laminate, and purpose is to reach 50 ohm to calculate target impedance.Wherein Laminate thickness is more than or equal to 0.2mm, and increment D1 can be the multiple of 0.05mm.
In the impedance Control design, should be noted that following item:
1) because under the 4mil live width situation, normal live width changes to lower limit, resistance value reduces very many.For fear of because of the change in impedance value situation causes reducing the product fine rate, to control to more than or equal to 5mil as the minimum feature of the microstrip line of impedance Control;
2) preferentially select for use+/-7 ohm impedance Control error range, as long as the computing impedance value is 50 ohm, the veneer that volume production is qualified satisfies the impedance Control requirement naturally like this, so do not need especially nominal impedance controlling unit, also not being required to be impedance Control increases cost;
3) if to dwindle the impedance Control error smaller or equal to+/-5 ohm, then preferentially select wide lines for use, and do not increase live width and dielectric thickness control tolerance, in order to avoid increase Material Cost;
4) control via hole density is too not high, does the floor file copper sheet at white space and handles and can control floor height and do not descend too much, thereby can guarantee the minimizing of impedance Control tolerance indirectly.
Press four layers of HDI plate of the method for designing production of the utility model embodiment, can reach the equal performance of six layers of HDI plate through test, and because the middle core of four laminates is thicker, high temperature resistance high voltage intensity than thin core is good, so used four laminates of thicker core better than the evenness of six laminates, resistance to elevated temperatures also will be got well, for the test of other failtests, projects such as for example static discharge ESD/ electromagnetic compatibility EMC/ temperature rise experiment/high low temperature test/shock resistance/fall also are to pass through smoothly.The PCB of the utility model embodiment subtracts a layer method for designing, subtracts layer to four layers of HDI plate by six layers of original HDI plate, and performance remains unchanged substantially, and material therefor is few, and manufacturing process is short, and processing cost and Material Cost have all reduced.
Need to prove, the utility model embodiment is that to be designed to four layers of HDI plate be that example describes but is not limited to this six layers of original HDI plate are subtracted layer, thisly reach the mentality of designing that reduces the PCB production cost and ins and outs and can be generalized in the design process that the M laminate is reduced to the N laminate, wherein M＞N by falling layer design.
Execution mode two
Four layers of mechanical blind hole pcb board of the utility model embodiment design, see also Figure 12, be two top layers and two internal layers, two top layers are ground floor (Layer1) 10 and the 4th layer of (Layer4) 40, two internal layers are the second layer (Layer2) 20 and the 3rd layer of (Layer3) 30, also comprise blind hole 50 and through hole 70 in the wiring board.Structure shown in this figure is a kind of version in four layers of mechanical blind hole pcb board among the utility model embodiment, just illustrates here, and Figure 13-15 shows more versions of four layers of mechanical blind hole pcb board.
Below with four layers of distinctive concrete ins and outs of mechanical blind hole pcb board of the preferred embodiment explanation.Other ins and outs can be with reference to the embodiment of four layers of laser blind hole HDI plate.
One, with the via parameters of above respective outer side edges, the live width line-spacing.
Adopt with existing six layers of HDI pcb board identical mechanical via parameters setting and live width line-spacing and be provided with.Here replenish and provide the parameter of main key parameter, but this parameter can continue variation with the progressive of technological level for the process checking.The concrete data of following technical parameter all have similar characteristics.So such parameter is only done the recommendation reference, promote with technological level and to carry out parameter optimization and to adjust all belonging to this patent coverage by the optimization thinking that this paper proposes.
The machinery blind hole: bore diameter is N, N＞=8mil, and PAD diameter M=N+10mil, PAD is big more, and processing cost is low more.So optimize direction is that N increases, and M also increases.But guarantee the preferably requirement of live width line-spacing.
Two, stack-design:
Here only provide the 2+2 four laminate stack-design with mechanical blind hole, four layers of ventilating hole plate with mechanical blind hole are not conventional four-sheet structure, and the designing technique maturation is discussed here no longer in detail.
The concrete parameter of four layers of HDI machinery blind hole HDI plate stack-design sees the following form 6.
Table 6
According to volume production DFM requirement, recommend by present producer technological ability, wherein LAMINATE thickness＞=4mil can get series of values: 0.1mm/0.2mm/0.3mm/ ...
The minimum in theory thickness of slab of producer's technological level is 0.7mm at present, wherein LAMINATE thickness=8mil.Middle Prepreg be one 1080/2116/3313/7628 optional.Preferentially select thicker prepreg for use.Increase with LAMINATE thickness, thickness of slab also increases successively.Thickness of slab increases to the optimization direction.But on technological level progress basis, thickness of slab also can decrease, to meet the requirement of ultrathin design.Do not get rid of the employing that other similar low-cost dielectric materials are arranged.
Three, the control principle of crosstalking
Four layers of preferred two internal layer of mechanical blind hole plate are main wiring layer.Because unique laminated construction of four layers of mechanical blind hole plate, make two main wiring layers might distance very near, and respectively with two top layer apart from each others.For effectively controlling crosstalking between two internal layer cablings, need reduce the thickness of two cores as far as possible, increase the thickness of the middle prepreg of two cores simultaneously, two internal layer cablings are avoided mutually as far as possible, if intersect, must be vertical.The number of times that adjacent layer line with other of signal of interest line is intersected is wanted strict control.
Four, impedance Control principle
For mobile phone board, because cabling is short, the consistency of the impedance Control of radio frequency cabling or title continuity have precedence over final impedance Control desired value.Based on this principle.Can be continuous by the control indirect control group of consistency that live width/interlamellar spacing/medium DK value/copper is thick.This method has also guaranteed the consistency of the whole plate electric property of different PCB producer's manufacturing veneers when guaranteeing impedance Control, this point helps the circuit parameter adjustment, is convenient to the assurance of various electric index allowances.Also make the veneer operation more reliable and more stable.
Here only provide impedance adjustment, or not do not discuss no longer in detail here with the impedance Control technology maturation of four layers of ventilating hole plate of mechanical blind hole with four laminates of mechanical blind hole.
Four laminate stack-design with mechanical blind hole are seen Figure 12-15, are equivalent to gather into folds after two double sided boards machine separately lamination, boring, plating again.
Owing to be with mechanical blind hole four laminate impedance Control design conditions single, control live width/interlamellar spacing mode is more direct impedance Control mode.Also reduce the workload of producer's test impedance simultaneously, reduced processing cost.This mode advises doing the impedance Control figure on the auxiliary limit of cell board layout, standby resolution chart during as debugging.
4.1 impedance Control tolerance analysis
General live width tolerance is+/-20%.
The general sheet metal thickness margin of tolerance of four layers of HDI machinery blind hole HDI plate sees the following form 7:
| Thickness H (mil) | ＜＝4mil | 4mil＜H＜＝8mil | 8＜H |
| Tolerance D (μ m) | +/-15 | +/-25 | +/-50 |
Table 7
1) the main correlative factor of impedance Control is that live width/floor height/medium dielectric constant/copper is thick, because the thick variation of medium DK value/copper is very little to the resistance value influence, about about 1 ohm, the influence of these two factors is ignored in the analysis here.
2) from the technical process characteristics, because lamination process has the base material will mobile filling perforation and fill out no copper zone, floor height reduces basically.When material thickness exceeded design thickness, exceeding part should be less than the design tolerance scope.After filling out no copper zone through the lamination filling perforation, the reduced thickness of super thick material.So on the whole, the thickness of sheet material can not reach plus tolerance, can only consider the negative common difference scope.
3) from technical process, because lateral erosion is finished live width and always is lower than the design live width.So can only consider when live width is got negative common difference influence to target impedance.
4) from above analysis, generally be line widths shrink, floor height also diminishes.Because live width is more little, impedance is high more, and floor height diminishes, and impedance is low more, so the error of both direction is to the complementation that influences of impedance.Therefore single factor maximum allowance scope is the situation to the impedance influences maximum.
4.2 microstrip line construction and impedance computation condition:
Referring to Figure 18, be depicted as the principle schematic of the microstrip line construction of four layers of mechanical blind hole HDI plate.Computational tool is CITS25 VERSION 2,0,0,4.
50 ohm microstrip impedance design of four layers of mechanical blind hole HDI plate and controlling value can be with reference to following tables 8:
| The high H of Laminate (mil) | 8 | 8 | 12 | 12 |
| Live width W1 (mil) | 15.5 | 15.5 | 23.5 | 23.5 |
| The live width tolerance | +/-20％ | +20/-15％ | +/-20％ | +20/-15％ |
| Floor height tolerance (μ m) | +/-25 | +/-25 | +/-25 | +/-25 |
| Target impedance and tolerance (ohm) | 50+/-7 | 50+/-5 | 50+/-7 | 50+/-5 |
Table 8
Wherein: H, microstrip line is with respect to the interfloor height of reference layer;
H0, microstrip line is to the total height of reference layer;
W, the top width of microstrip line;
W1, the bottom width of microstrip line;
T, the thickness of microstrip line.
4.3 strip lines configuration and impedance computation condition:
See Figure 19, be depicted as the principle schematic of the strip lines configuration of four layers of mechanical blind hole HDI plate, computational tool is CITS25 VERSION 2,0,0,4.
50 ohm of strip line impedance design and controlling value can be with reference to following tables 9:
| H in the floor height (mil) | 17.2 | 15.5 |
| Core floor height (mil) | 8 | 8 |
| Prepreg thickness H1 (mil) | 8 | 6.3 |
| Live width W1 (mil) | 7 | 5 |
| The live width tolerance | +/-20％ | +/-20％ |
| Story height H tolerance (μ m) | +/-50 | +/-50 |
| Target impedance and tolerance (ohm) | 50+/-5 | 50+/-5 |
Table 9
Wherein: H, the interfloor height of reference layer;
H0, the total height of the supreme reference layer of strip line;
H1, strip line is with respect to the interfloor height of following reference layer;
W, the top width of strip line;
W1, the bottom width of strip line;
T, the thickness of strip line.
Five, fail-safe analysis and checking
Two cores of four laminates of machinery blind hole, because two outer surfaces of core have the good copper sheet of pressing, under high-temperature and high-pressure conditions, the evenness of core will be better than prepreg far away.Be core equally, thick core is better than the high temperature resistance high voltage intensity of thin core.So four laminates with mechanical blind hole will be got well than the evenness of general HDI structure (six laminates of 1+4+1 or 1+1+2+1+1 band laser hole can only be used one deck core usually), resistance to elevated temperatures will be got well.
Foregoing describes the printed wiring board method for designing of the utility model embodiment in detail, and corresponding, the utility model embodiment provides two kinds of printed wiring board structures.
One, four layers of laser blind hole HDI plate
Seeing also Fig. 5, is four layers of laser blind hole HDI printed wiring board schematic diagram of the utility model embodiment.
The printed wiring board that the utility model embodiment provides comprises four layers, be two extexines and two internal layers, pressing dielectric material between each layer, two extexines are ground floor (Layer1) 10 and the 4th layer of (Layer4) 40, two internal layers are the second layer (Layer2) 20 and the 3rd layer of (Layer3) 30, also comprise blind hole 50, buried via hole 60 and via hole 70 in the wiring board.Need to prove and just illustrate a kind of version in four layers of laser blind hole HDI printed wiring board here but be not limited thereto.Ground floor (Layer1) 10 also can be called top layer TOP, and the 4th layer of (Layer4) 40 also can be called bottom BOTTOM.Dielectric material comprises prepreg PREPREG and core LAMINATE etc., and prepreg is generally used FR4.
Two, four layers of mechanical blind hole HDI plate
Seeing also Figure 12, is four layers of mechanical blind hole pcb board schematic diagram of the utility model embodiment.
The printed wiring board that the utility model embodiment provides comprises four layers, be two extexines and two internal layers, pressing dielectric material between each layer, two extexines are ground floor (Layer1) 10 and the 4th layer of (Layer4) 40, two internal layers are the second layer (Layer2) 20 and the 3rd layer of (Layer3) 30, also comprise mechanical blind hole 55, through hole 70 in the wiring board.Need to prove a kind of version that just illustrates four layers of mechanical blind hole pcb board here but be not limited thereto.Ground floor (Layer1) 10 also can be called top layer TOP, and the 4th layer of (Layer4) 40 also can be called bottom BOTTOM.Dielectric material comprises prepreg PREPREG and core LAMINATE etc., and prepreg is generally used FR4.
Complex chart 5 and Figure 12, two internal layers are the second layer (Layer2) 20 and the 3rd layer of (Layer3) 30, are used to arrange holding wire, and holding wire is pressed the subregion wiring at this internal layer.In the wiring of these two internal layers, be by the strict subregion of function, comprise radiofrequency signal zone and digital signal zone, and radiofrequency signal is regional and the digital signal zone adds shielding box/chamber respectively.The pairing adjacent layer zone of connecting up is copper sheet in large area or the cabling that has small amount of vertical to arrange.
Two top layers are that ground floor (Layer1) 10 and the 4th layer of (Layer4) 40 generally do not connect up or few as far as possible wiring.When one of them extexine during as the keyboard face, another extexine is as device side.
When if ground floor (Layer1) 10 is the keyboard face, when the 4th layer (Layer1) 40 was device side, ground floor (Layer1) the 10 adjacent second layers (Layer2) 20 were used to arrange rf signal line, power supply signal line, clock cable and audio signal wire so.
Main power line is arranged in the edges of boards with keyboard face internal layer adjacent, and two adjacent layers are copper sheet in large area, and between the different layers copper sheet connective good.Other power line is avoided with keyboard PAD vertically superposed.The corresponding keyboard face of audio signal wire wiring is a large-area ground copper sheet, and avoids keyboard PAD, and the part of its another adjacent internal layer is complete ground copper sheet.The clock cable pairing keyboard face that connects up is a large-area ground copper sheet, and avoids keyboard PAD, and the part of its another adjacent internal layer is complete ground copper sheet.
The 4th layer (Layer1) 40 the 3rd layer of adjacent (Layer3) 30 are used for layout data bus and multi-media signal line.Rf signal line also can be arranged in this layer.
Data/address bus is logical at one deck cloth, changes layer with short top layer line during intersection.In general, existing data/address bus be regardless of kind and bunch, and in the printed wiring board that the utility model embodiment provides, with data/address bus by the kind sub-clustering, by bunch wiring, bunch and bunch between property-line isolate, can reduce like this and crosstalk.The ground wire that is used to isolate with well be communicated with other layer ground in large area.The multi-media signal line is also logical at one deck cloth, by the kind sub-clustering, by bunch wiring, bunch and bunch between property-line isolate.
In six layers of present HDI plate, because can be with an internal layer as main ground, thereby can provide complete large tracts of land backflow ground, signal cross-talk is smaller, and four layers of HDI plate have only two internal layers, can not be with one of them internal layer as main ground, just there is not complete one deck master ground yet, therefore the subject matter that faces of four laminates is that main ground copper sheet is imperfect, causes the return flow path of high speed signal discontinuous complete, is easy to generate signal cross-talk.The printed wiring board that the utility model embodiment provides, at two extexines is the few as far as possible wiring of ground floor (Layer1) 10 and the 4th layer (Layer4) 40, and pass through the good connection of via hole jointly as main reference ground, being respectively two internal layers is that the second layer (Layer2) 20 and the 3rd layer of (Layer3) 30 cabling provide main backflow ground, thereby complete return flow path can be provided, reduce signal cross-talk.Wiring all vacant zones after finishing are done floor file and are handled, and the patch copper sheet well is communicated with copper sheet in large area by enough holes, ground.
From above the utility model embodiment technical scheme as can be seen, existing six layers of printed wiring board plate are because the manufacturing process link is many, reasons such as the used sheet material number of plies is many cause production cost higher, and the subtracting in layer design of the printed wiring board that the utility model embodiment provides, with the wiring of holding wire subregion, and be arranged in and the extexine internal layer adjacent; Extexine is not connected up or few wiring, and be communicated with as main ground by via hole; Live width and floor height parameter control group desired value are set.Because the internal layer of two main wirings all has an adjacent extexine that interfloor distance is very near respectively, this extexine does not connect up or seldom wiring, can well be communicated with by via hole so, for adjacent inner layer provides good backflow ground, reduce signal cross-talk, and the interfloor distance between two internal layers is far longer than and (＞=2 times of distances between the extexine recently, preferably＞=3 times), crosstalking between two internal layer cablings of so this pitch arrangement can accomplish to be far smaller than respectively and nearest top layer cabling between crosstalk.Consistency according to the impedance Control of rf signal line cabling has precedence over final impedance Control desired value, then can control final impedance desired value indirectly by control live width and floor height consistency.As long as live width/floor height reaches design parameter, then can guarantee final impedance Control desired value.Therefore, the printed wiring board that the utility model embodiment provides subtract layer design rationally control signal crosstalk and carry out impedance Control, keeping greatly reducing production cost under the former multilayer printed wiring board key property situation.
Four layers of printed wiring board of the present utility model, its theory that subtracts layer method for designing can directly be promoted and be used for the layer that subtracts that M layer veneer be reduced to N layer veneer and fall the cost design process.M＞N wherein.
The described top layer and the adjacent inner layer of four layers of printed board of 2+2 machinery blind hole structure of the present invention realize with double sided board, and can replace the laser blind hole of general HDI plate with mechanical blind hole on this double sided boards; This multi-layer sheet requires the device layout on two top layers to stagger at projecting direction as far as possible; This multi-layer sheet replaces buried via hole in the general HDI plate with through hole.So just cancelled general HDI plate laser drill operation, the present invention proposes the technological requirement with white oil coating through-hole surf zone in addition.
The utility model subtracts layer design by printed circuit board, six layers of band laser hole HDI plate that replace single order 1+4+1 structure and second order 1+1+2+1+1 structure with the printed circuit board of four layers of 1+2+1 laser blind hole structure HDI plate or 2+2 machinery blind hole structure, so that when keeping equal wiring board performance, reduce the printed circuit board cost, improve the printed circuit board reliability.
The technical scheme that the utility model provides is crosstalked by reasonable control signal, the signal that improves under the no independent complete strata condition refluxes, adopt the complete interconnection technique of ground copper sheet, and means such as signal packets processing, rationally controlled whole plate noise, and effectively guaranteed the key signal quality, guarantee that smoothly the whole plate performance of four layers of mechanical blind hole plate is not less than the design effect of six layers of band laser hole HDI plate.The application of this innovation PCB designing technique can effectively reduce the PCB cost and reach more than 20%, has greatly improved product competitiveness and profit margin, has improved reliability of products simultaneously, is terminal series products design key core technology.
The utility model subtracts layer design by PCB, such as accomplishing four layers of 1+2+1 laser blind hole structure HDI plate or 2+2 machinery blind hole plate by six layers of original band laser hole buried blind via plate, material therefor is few, technology is simple, process-cycle is short, optional processing producer is many, and processing cost and Material Cost all reduce.This by what fall layer and reduce that mentality of designing that technical process reaches reduction PCB purchase cost and ins and outs can be generalized to that M layer veneer be reduced to N layer veneer the design, wherein M＞N fall into.
The utility model has solved the signal routing rule, the control of crosstalking, impedance Control, complete backflow ground design, lamination and via hole setting.Therefore four layers of 1+2+1 laser blind hole structure HDI plate or 2+2 can reach the same performance index requirement of six layers of band laser hole buried blind via PCB with mechanical blind hole PCB.And the data that provide only are recommended values, need adjust according to concrete production capacity.Producer's adjustment parameter and the parameters optimization direction that provides herein all are this patent coverages.
The reliability of four layers of printed circuit board of the present utility model is better than former six laminates.
Four layers of printed circuit board of the present utility model can conveniently be realized whole plate thickness adjustment by the thickness that changes core.Wherein core all is the conventional sheet material of large-scale application, no material supply of material risk.Because mechanical blind hole plate is used two cores, require to press state-of-the art under the prerequisite at the bonding plate flatness, selecting technology can process the thinnest core thickness is 0.2mm/0.3mm, the may command thickness of slab is 0.7mm/0.9mm, and conventional thickness of slab 0.8mm/1.0mm is thinner a little than 6 layers of single order HDI plate.Be suitable for veneer intensity is had the slim machine design of specific (special) requirements.Promote with producer's technological ability, whole plate thickness of slab also can develop the price advantage that keeps simultaneously with respect to six laminates to thinner direction.
The alleged end product of the utility model includes but not limited to: mobile phone, PDA, fixed station, data card, MP3/4, GPS navigation navigation system, and the module product that is derived from by this series products; Final product of mainboard in the utility model can be four layers of printed wiring board, comprises an acp chip of a base band or radio-frequency module; Comprise at least one BGA packaged device on these four layers of printed wiring boards.The pin-pitch of this BGA packaged device (Pin pitch) includes but not limited among 1mm, 0.8mm, 0.65mm, 0.5mm, the 0.4mm any one or a few combination.These four layers of printed wiring board thicknesss of slab change between 0.4mm-2mm, comprise 0.4mm and 2mm.
In sum, subtracting in layer design of the printed wiring board that the utility model embodiment provides with the wiring of holding wire subregion, and is arranged in and the extexine internal layer adjacent; Extexine is not connected up or few wiring, and be communicated with as main ground by via hole; Live width and floor height parameter control group desired value are set.Because the internal layer of two main wirings all has an adjacent extexine that interfloor distance is very near respectively, this extexine does not connect up or seldom wiring, can provide good backflow ground for adjacent inner layer by the good connection of via hole so, reduce signal cross-talk, and the interfloor distance between two internal layers is far longer than and (＞=2 times of distances between the extexine recently, preferably＞=3 times), press the theoretical reasoning of electromagnetic field spatial distribution so, crosstalking between two internal layer cablings of this pitch arrangement can accomplish to be far smaller than respectively and nearest top layer cabling between crosstalk.Consistency (or claiming continuity) according to the impedance Control of rf signal line cabling has precedence over final impedance Control desired value, controls final impedance desired value indirectly by control live width and floor height consistency.As long as live width/floor height reaches design parameter, then can guarantee final impedance Control desired value.Therefore, the printed wiring board that the utility model embodiment provides subtract layer design rationally control signal crosstalk and carry out impedance Control, keeping greatly reducing production cost under the former multilayer printed wiring board key property situation.
Further, when signal routing, with data/address bus and multi-media signal line by the kind sub-clustering, by bunch wiring, bunch and bunch between property-line isolate, thereby reach the purpose of further minimizing signal cross-talk.
More than printed wiring board and method for designing thereof that the utility model embodiment is provided be described in detail, used two specific cases herein principle and the execution mode of the utility model embodiment are set forth, the explanation of above embodiment just is used to help to understand method and the core concept thereof of the utility model embodiment; Simultaneously, for one of ordinary skill in the art, according to the thought of the utility model embodiment, the part that all can change in specific embodiments and applications, in sum, this description should not be construed as restriction of the present utility model.
Claims (17)
1. final product of mainboard comprises on it acp chip of base band or radio-frequency module it is characterized in that described final product of mainboard is four layers of printed circuit board, comprises top layer and two internal layers between described top layer.
2. final product of mainboard according to claim 1 is characterized in that described top layer comprises top layer and bottom, be respectively the master that constitutes with copper sheet in large area with reference to the stratum, and the copper sheet in large area of described top layer and bottom is interconnected by via hole; Described internal layer is the main wiring layer, and wiring according to sectorization;
Spacing between the described internal layer is more than or equal to the spacing between described top layer and the adjacent inner layer;
The wiring zone of each described internal layer is corresponding to the zone of copper sheet in large area of adjacent layer or the vertically arranged cabling of adjacent layer.
3. final product of mainboard according to claim 2 is characterized in that, the device of each functional module inside is pressed circuit signal and moved towards to arrange that radio frequency and numeric area add shielding construction respectively.
4. final product of mainboard according to claim 2 is characterized in that main power line is arranged in internal layer, along the edges of boards cabling, and and edges of boards between be separated with ground wire.
5. final product of mainboard according to claim 2 is characterized in that, described top layer is arranged as the keyboard layout face of terminal equipment, and described bottom is the main devices placement-face of terminal equipment.
6. final product of mainboard according to claim 5 is characterized in that, tone frequency channel wire is arranged in and described top layer internal layer adjacent, and it is corresponding to the keyboard face and avoid the keyboard pad.
7. final product of mainboard according to claim 5 is characterized in that, clock line is arranged in and described bottom internal layer adjacent, and it avoids the high speed signal of main devices face and the device pin pad of power supply signal.
8. final product of mainboard according to claim 5, it is characterized in that, data wire is arranged in and main devices face internal layer adjacent, and include LCD data wire, interface line, JTAG line, Serial Port Line, UIM card line, keyboard chord by kind, described data wire is respectively by the kind sub-clustering, by bunch wiring, bunch and bunch between property-line isolate.
9. final product of mainboard according to claim 1 and 2, it is characterized in that, described mainboard is the 1+2+1 laminated construction, comprise a double sided board that is positioned at the centre position, on described double sided board, laminate prepreg and Copper Foil respectively, blind hole in the described mainboard is a laser blind hole, and buried via hole and via hole are mechanical hole.
10. final product of mainboard according to claim 9 is characterized in that described final product of mainboard has at least one bga device.
11. final product of mainboard according to claim 10 is characterized in that, the pin-pitch of described bga device is selected from any one or its combination among 1mm, 0.8mm, 0.65mm, 0.5mm, the 0.4mm.
12. end product according to claim 9 is characterized in that the thickness range of described top layer and adjacent inner layer is 60 μ m-80 μ m.
13. final product of mainboard according to claim 9 is characterized in that, dielectric thickness is more than or equal to 0.1mm between the described internal layer, and the whole plate thickness of described mainboard is smaller or equal to 1.6mm.
14. final product of mainboard according to claim 10 is characterized in that, the described laser blind hole in BGA district is arranged on below the pad of BGA device, and the copper sheet in large area in BGA district is the network copper sheet.
15. final product of mainboard according to claim 1 and 2 is characterized in that, described mainboard is the 2+2 laminated construction, comprises two double sided boards that laminate mutually by prepreg, and the blind hole in the described mainboard is mechanical blind hole, and buried via hole and via hole are mechanical hole.
16. final product of mainboard according to claim 15 is characterized in that, described final product of mainboard has at least one bga device.
17. final product of mainboard according to claim 1 is characterized in that, the spacing between described top layer and the adjacent inner layer is more than or equal to 0.1mm.
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| CN102054154A (en) * | 2009-11-04 | 2011-05-11 | 昆山万正电路板有限公司 | Radio frequency identification circuit board type passive responder |
| CN102159040A (en) * | 2011-03-28 | 2011-08-17 | 冠锋电子科技(梅州)有限公司 | Method for drilling hole on four-layered circuit board |
| CN102300398A (en) * | 2011-07-08 | 2011-12-28 | 中兴通讯股份有限公司 | Two-layer printed circuit board, printing method and mobile communication terminal thereof |
| CN103491708A (en) * | 2013-10-08 | 2014-01-01 | 上海斐讯数据通信技术有限公司 | High-density inter connector printed circuit board and manufacturing method thereof |
| US8723047B2 (en) | 2007-03-23 | 2014-05-13 | Huawei Technologies Co., Ltd. | Printed circuit board, design method thereof and mainboard of terminal product |
| CN105188266A (en) * | 2015-08-27 | 2015-12-23 | 浪潮电子信息产业股份有限公司 | Dual-mode high-speed signal line three-dimensional wiring method |
| CN102300398B (en) * | 2011-07-08 | 2016-12-14 | 南京中兴软件有限责任公司 | Two-layer printed circuit board and printing process, mobile communication terminal |
| CN107369932A (en) * | 2017-08-08 | 2017-11-21 | 四川华丰企业集团有限公司 | High speed rear panel connector with multilayer wiring printed board |
| CN109511214A (en) * | 2018-09-20 | 2019-03-22 | 通元科技(惠州)有限公司 | A kind of LED circuit board and preparation method thereof of black FR4 substrate |
| CN111123065A (en) * | 2018-10-30 | 2020-05-08 | 浙江宇视科技有限公司 | Method and device for inspecting printed circuit board wiring |
| CN111447735A (en) * | 2020-03-31 | 2020-07-24 | 南京元络芯科技有限公司 | a printed circuit board |
| CN112349668A (en) * | 2020-09-28 | 2021-02-09 | 中国电子科技集团公司第二十九研究所 | Broadband radio frequency module structure adopting radio frequency motherboard and design method thereof |
| CN112510333A (en) * | 2020-11-25 | 2021-03-16 | 安徽四创电子股份有限公司 | Multilayer board cross wiring network |
| CN113097808A (en) * | 2021-04-20 | 2021-07-09 | 沈阳兴华航空电器有限责任公司 | High-speed backplane connector with crosstalk suppression printed board |
| CN113316330A (en) * | 2021-05-25 | 2021-08-27 | 中国电子科技集团公司第二十九研究所 | Embedded synthetic network substrate lamination based on multiple times of lamination and design method |
| CN118510172A (en) * | 2024-07-17 | 2024-08-16 | 深圳易天光通信有限公司 | Method for improving reflection of optical module |
-
2007
- 2007-06-28 CN CNU2007201531592U patent/CN201063970Y/en not_active Expired - Lifetime
Cited By (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8723047B2 (en) | 2007-03-23 | 2014-05-13 | Huawei Technologies Co., Ltd. | Printed circuit board, design method thereof and mainboard of terminal product |
| US9519308B2 (en) | 2007-03-23 | 2016-12-13 | Huawei Technologies Co., Ltd. | Printed circuit board, design method thereof and mainboard of terminal product |
| CN102054154A (en) * | 2009-11-04 | 2011-05-11 | 昆山万正电路板有限公司 | Radio frequency identification circuit board type passive responder |
| CN102159040A (en) * | 2011-03-28 | 2011-08-17 | 冠锋电子科技(梅州)有限公司 | Method for drilling hole on four-layered circuit board |
| CN102300398A (en) * | 2011-07-08 | 2011-12-28 | 中兴通讯股份有限公司 | Two-layer printed circuit board, printing method and mobile communication terminal thereof |
| CN102300398B (en) * | 2011-07-08 | 2016-12-14 | 南京中兴软件有限责任公司 | Two-layer printed circuit board and printing process, mobile communication terminal |
| CN103491708A (en) * | 2013-10-08 | 2014-01-01 | 上海斐讯数据通信技术有限公司 | High-density inter connector printed circuit board and manufacturing method thereof |
| CN105188266A (en) * | 2015-08-27 | 2015-12-23 | 浪潮电子信息产业股份有限公司 | Dual-mode high-speed signal line three-dimensional wiring method |
| CN107369932A (en) * | 2017-08-08 | 2017-11-21 | 四川华丰企业集团有限公司 | High speed rear panel connector with multilayer wiring printed board |
| CN109511214A (en) * | 2018-09-20 | 2019-03-22 | 通元科技(惠州)有限公司 | A kind of LED circuit board and preparation method thereof of black FR4 substrate |
| CN111123065A (en) * | 2018-10-30 | 2020-05-08 | 浙江宇视科技有限公司 | Method and device for inspecting printed circuit board wiring |
| CN111447735A (en) * | 2020-03-31 | 2020-07-24 | 南京元络芯科技有限公司 | a printed circuit board |
| CN112349668A (en) * | 2020-09-28 | 2021-02-09 | 中国电子科技集团公司第二十九研究所 | Broadband radio frequency module structure adopting radio frequency motherboard and design method thereof |
| CN112510333A (en) * | 2020-11-25 | 2021-03-16 | 安徽四创电子股份有限公司 | Multilayer board cross wiring network |
| CN113097808A (en) * | 2021-04-20 | 2021-07-09 | 沈阳兴华航空电器有限责任公司 | High-speed backplane connector with crosstalk suppression printed board |
| CN113316330A (en) * | 2021-05-25 | 2021-08-27 | 中国电子科技集团公司第二十九研究所 | Embedded synthetic network substrate lamination based on multiple times of lamination and design method |
| CN113316330B (en) * | 2021-05-25 | 2022-07-22 | 中国电子科技集团公司第二十九研究所 | Multiple lamination-based built-in synthetic network substrate lamination and design method |
| CN118510172A (en) * | 2024-07-17 | 2024-08-16 | 深圳易天光通信有限公司 | Method for improving reflection of optical module |
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