CN201048049Y - Electronic hard disk of PCIe interface - Google Patents

Abstract

The utility model discloses an electronic hard disc with a PCIe interface. An interface device 2 in accord with a PCIe standard is connected with controller 3 which adopts an FPGA to realize a Fibre Channel agreement and an NAND-typed Flash array management, the controller 3 is connected with an NAND-typed Flash array 4, the Flash array is used as a memorizing medium, a PMU 6 is connected with the PCIe interface 2, the controller 3 and the Flash array 4 to realize the low power consumption controlling, an SDRAM and NOR-typed Flash memorizer 5 is connected with the controller 3. Combined with the high speed characteristic of a PCIe bus as well as the advantages of high speed, compact structure, low power consumption and quake-resistance of the Flash array, the utility model satisfies the application area with higher request in transmission characteristic.

Description

Electronic hard disk with PCIe interface

technical field

The utility model patent relates to a high-speed and large-capacity storage device, specifically an ultra-high-speed large-capacity non-volatile electronic hard disk based on a PCIe bus and using a Flash array as a storage medium.

Background technique

At present, the main storage device is a mechanical hard disk, and some high-end products use electronic hard disks with IDE interfaces. In consumer fields, such as personal computers, databases, low-end servers, etc., it can basically meet the performance requirements. However, for industrial fields and high-end storage fields, the data transmission performance of ordinary mechanical hard disks and electronic hard disks is low, generally not higher than 60MB/s, which cannot meet applications with higher performance requirements. Disk arrays based on mechanical hard disks that can meet the speed requirements are large in size, heavy in weight, high in power consumption, and low in cost performance. Moreover, mechanical hard disks use mechanical motors and magnetic disks as storage bodies, which are not suitable for application environments with high requirements on temperature and humidity.

Contents of the invention

Aiming at the deficiencies of existing hard disk data transmission speed and low storage speed and weak environmental adaptability, the utility model provides an ultra-high-speed large-capacity non-volatile electronic hard disk based on PCIe bus and using Flash array as storage medium . Combining the high-speed characteristics of the PCIe bus with the advantages of high-speed, compact structure, low power consumption, and high shock resistance of the Flash array, it meets the application fields that have high requirements for transmission performance.

The technical solution of the present utility model is: shell 1 is the housing that conforms to mechanical hard disk specification, and the interface device 2 that conforms to PCIe specification is connected with the controller 3 that adopts FPGA to realize Fiber Channel (FibreChannel) protocol and NAND Flash array management, and the controller 3 is connected with NAND type Flash array 4, and Flash array is used as the storage medium of data, and power management unit 6 is connected with PCIe interface 2, controller 3 and Flash array 4, realizes low power consumption control, SDRAM and NOR type Flash memory 5 and control Device 3 is connected as program memory and data cache.

The PCIe protocol and the Flash array management controller 3 realize the data management and storage of the electronic hard disk and the bus timing, which can realize the data transmission rate of 1GBytes/s and the capacity management of 1TBytes. The control is realized by FPGA programmable logic device, adopts SOC chip design method, integrates embedded soft core processor 7, PCIe protocol IP8, NAND type Flash array controller 9, SDRAM and NOR type Flash controller 10, PCIe physical layer IP11.

Flash array 4 adopts multi-chip NAND Flash to realize the expansion of speed and capacity, realizing the storage speed of 100MBytes/s-1GBytes/s and the capacity of 16GBytes-1TBytes. NAND-type Flash is a non-volatile memory with a lifespan of 1 million times of erasing and writing, which can save data for a long time; and has the advantage of low power consumption.

The power management unit 6 has the feature of low power consumption and can automatically monitor the state of the system. When the PCIe protocol and the Flash array management controller are idle, the power management unit automatically enters the standby power-saving mode.

SDRAM and NOR type FLASH memory 5 are used as the program memory of the controller and the data cache of the electronic hard disk.

The electronic hard disk can be conveniently inserted into computers and industrial computers with PCIe slots. At the same time, the main body of the electronic hard disk is all made of semiconductor media, without mechanical power components, with high adaptability to the environment, and can work normally within the range of industrial temperature and humidity.

As can be seen from the above, the utility model has the following advantages compared with the prior art:

1. The PCIe bus is used as the transmission interface, which has high-speed characteristics and meets the data transmission rate requirements in the high-end field.

2. The management of NAND Flash array is designed, which greatly expands the storage capacity and speed.

3. NAND flash memory is used as the storage medium, which has the advantages of non-volatility and long data storage time.

3. It adopts programmable logic devices, adopts SOC chip design method, adopts embedded soft-core processor, and realizes PCIe bus protocol and Flash array management.

4. The intelligent power management unit further optimizes the power consumption of the device.

5. The above advantages make the device have the characteristics of high reliability, high performance, low power consumption and small size.

Description of drawings

FIG. 1 is a block diagram of an electronic hard disk with a PCIe interface.

Fig. 2 is the schematic diagram of the controller design realized by the programmable logic device.

Detailed ways

The structure of the hard disk will be described in detail in conjunction with the accompanying drawings.

The programmable logic device in Fig. 1 is the core of controlling data sending and receiving and storing. The data of the PCIe interface is sent and received through the high-speed port of the FPGA. SDRAM is used to buffer the data to improve the reading and writing speed. The Flash array stores the data, and the NOR-type FLASH memory is used to store the program of the FPGA. The power management part supplies power to the entire hard disk.

The block diagram in Figure 2 is a detailed description of the programmable logic device FPGA workflow. Including the PCIe physical layer through which data is sent and received, the PCIe protocol layer, and the embedded soft-core processor as the center of data and control logic processing, responsible for data processing after conversion from the PCIe protocol layer and communication with peripheral SDRAM, NOR-type FLASH memory and FLASH Control logic for the array interface circuit.

The embodiment adopts the following model configuration:

Programmable logic device: Virtex5LXT50-FF665

Memory: 32M SDRAM and 64M Flash

NAND Flash: K9NBG08U4A-PIB0

Embedded soft core processor: Xilinx MicroBlaze 4.0

PCIe protocol IP: Xilinx PCI Express Endpoint Cores v3.3

PCIe physical layer IP: Xilinx RocketIO GTP

Embodiment: short message service center

The short message service center of a mobile operator is composed of a UNIX server and a low-end disk array. In the case of a large number of user short messages, the SMSC software needs the I/O capacity of the disk array, which cannot provide more than 3000 IOPS. As a result, the server The CPU utilization rate is close to 100%, and the SMS cannot be processed and forwarded in time, causing dissatisfaction among users. At this time, even if the CPU and memory are expanded, there is no obvious effect.

Through the analysis of the short message service application, it can meet the requirements to load the frequently updated and read-write Oracle Redo log files, Oracle rollback content, Oracle temporary files and index files into the high-speed electronic hard disk with PCIe interface. In the case of reducing the number of SMSC servers, the short message processing capacity can be greatly increased from 5 short messages per second to 450 short messages per second, and the cost of each short message is greatly reduced, increasing the profit of operators.

Claims (2)

1.PCIe the electronic hard disc of interface, include interface, controller, power supply etc., it is characterized in that shell (1) is for meeting the housing of mechanical hard disk standard, the interface device of accord with PCI e standard (2) connects the controller (3) that adopts FPGA to realize FibreChannel fiber channel protocol and NAND type Flash array management, controller (3) is connected with NAND type Flash array (4), Power Management Unit (6) is connected with PCIe interface (2), controller (3) and Flash array (4), and SDRAM is connected with controller (3) with NOR type Flash storer (5).

2. the electronic hard disc of PCIe interface according to claim 1, it is characterized in that described PCIe and NAND type Flash array management controller adopt SOC chip design mode, integrated embedded soft-core processor (7), PCIe protocol IP (8), NAND type Flash array control unit (9), SDRAM and NOR type Flash controller (10), PCIe Physical layer IP (11).

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