CN1988426B - Reference clock sending circuit and method for light repeat plate - Google Patents

Abstract

This invention discloses a transmission circuit of a reference clock used on a light transfer plate and a method, which adds three cheap devices of a D/A, a selector and a comparator, utilizes a VCO control voltage in a standard phase-locking ring to control and transmit a reference clock to be compared by a comparator and a D/A output voltage approaching to this time of error voltage when the input light service is normal, when the clock can't be used, the selector is used to select the stored D/A output voltage as the control voltage of VCO, when the clock is normal, the selector is used again to select a normal error voltage as the control voltage of the VCO so as to keep valid of reference clocks whether or not the input service optical clock is usable.

Description

A reference clock sending circuit and method for optical repeater board

technical field

The invention relates to the field of optical communication equipment, in particular to a reference clock sending circuit and method used on an optical repeater board.

Background technique

In the WDM transmission system, the main function of the optical transponder board is to convert the service optical signal of any manufacturer that meets the requirements of the G.691 recommendation into an optical signal that meets the requirements of the G. Complete error correction coding, overhead detection processing.

Inserting an alarm indication signal (AIS, Alarm Indication Signal) into the output optical service signal is one of its overhead processing tasks: when the quality of the input optical signal of the system deteriorates and the service cannot be transmitted normally, the optical forwarding board needs to An AIS alarm is inserted into the service signal to notify the downstream node that the input service signal of the upstream node is faulty.

When the optical signal input by the system has a quality problem, the optical transponder board loses a stable and reliable frequency source. At this time, the output service signal clock fails because there is no usable synchronization source, and the optical transponder board sends it to the downstream node. There will be obvious frequency deviation or frequency instability in the service signal, so the downstream node may not be able to recognize the AIS alarm inserted in the service optical signal.

Therefore, it is necessary to provide a circuit and a method to ensure that the output service clock is stable and reliable even when the input optical signal has quality problems.

Contents of the invention

The technical problem to be solved by the present invention is to provide a reference clock transmission circuit and method for an optical transponder board, which can keep the reference clock transmitted by the optical transponder board valid at a low cost, so that the optical transponder board can provide frequency offset-free Alarm indication signal.

The present invention provides a reference clock transmission circuit used on an optical repeater board, including a phase-locked loop, in which a low-pass filter and a voltage-controlled oscillator are provided, and the clock signal recovered by service light passes through the low-pass filter , generating an error voltage, the output terminal of the voltage-controlled oscillator sends a reference clock under voltage control, and the reference clock sending circuit also includes: an analog voltage generating circuit, a comparator, and a two-choice switch circuit, wherein:

The input signal of the comparator is the error voltage generated by the low-pass filter and the voltage generated by the analog voltage generating circuit, and the analog voltage generating circuit adjusts the generated voltage according to the comparison result of the comparator, When the comparator output signal jumps, determine the current generated voltage as the normal control voltage, and stabilize the output;

The input signal of the one-of-two switch circuit is the error voltage generated by the low-pass filter and the normal control voltage determined by the analog voltage generation circuit, and the selection signal is the monitoring and judgment of whether the "business optical recovery clock" is available signal, when the judgment signal is “yes”, the one-two switch circuit selects the error voltage as the output voltage to control the voltage-controlled oscillator, when the judgment signal is “no”, the one-two switch circuit A circuit selects the normal control voltage as an output voltage to control the voltage controlled oscillator.

The reference clock sending circuit further includes:

The comparison result monitor is used for monitoring the output signal of the comparator, and stops the voltage adjustment of the analog voltage generating circuit when the output signal jumps, and records the current generated voltage. The comparison result monitor is a programmable logic device.

The reference clock sending circuit further includes:

The memory is used for storing the voltage currently generated by the analog voltage generation circuit recorded by the comparison result monitor.

The analog voltage generating circuit is a digital-to-analog converter linearly regulated by a programmable logic device or a CPU.

The reference clock sending circuit further includes: a monitoring and judging signal generating circuit, which is used to send out a monitoring and judging signal whether the "service optical recovered clock" is available or not according to the monitoring of the input service optical signal.

The present invention also provides a method for transmitting a reference clock on an optical transponder board. The optical transponder board includes a phase-locked loop, and the phase-locked loop has a low-pass filter and a voltage-controlled oscillator. Through the low-pass filter, an error voltage is generated, and the output terminal of the voltage-controlled oscillator sends a reference clock under voltage control, and the reference clock sending method includes the following steps:

Use an analog voltage generating circuit to generate an analog voltage and send the voltage to a comparator;

sending the error voltage generated by the low-pass filter into the comparator, and comparing it with the voltage generated by the analog voltage generating circuit;

According to the comparison result of the comparator, adjust the voltage generated by the analog voltage generating circuit, when the output signal of the comparator jumps, determine the current generated voltage as a normal control voltage, and stabilize the output;

Sending the error voltage and the normal control voltage output by the analog voltage generating circuit into an alternative switch;

The monitoring of the input service optical signal generates a monitoring and judging signal of whether the "service optical recovery clock" is available, and uses this signal as the selection signal of the two-choice switch circuit;

When the judgment signal is "Yes", the one-two switch selects the error voltage as the output voltage to control the voltage-controlled oscillator; when the judgment signal is "No", the one-two switch selects the The normal control voltage is used as the output voltage to control the VCO.

The analog voltage generating circuit is a digital-to-analog converter linearly regulated by a programmable logic device or a CPU.

The step of determining the currently generated voltage as a normal control voltage when the output signal of the comparator jumps includes:

The output signal of the comparator is monitored, and when the output signal jumps, the voltage adjustment of the analog voltage generating circuit is stopped, and the currently generated voltage is recorded as a normal control voltage.

The reference clock sending method further includes: storing the normal control voltage value determined by the analog voltage generation circuit in a memory after being compared by a comparator.

The monitoring and judging signal of whether the "service optical recovered clock" is available is a signal generated by a monitoring and judging signal generation circuit based on the monitoring of the input service optical signal.

The reference clock transmission circuit and method used on the optical repeater board of the present invention only adds three cheap devices, an analog-to-digital converter, a selector, and a comparator, and then directly uses the original phase-locked loop circuit. VCO (Voltage Controlled Oscillator) achieves the effective effect of ensuring the reference clock on the optical transponder board, and meets the frequency deviation requirements of the output AIS optical signal at low cost, without directly using a high-frequency, high-precision, high-stability clock source To generate a reference clock, reducing the cost overhead. Secondly, when the system switches to D/A to drive the VCO, the PLL is open. This state is convenient for diagnosing faults and improving system maintainability.

Description of drawings

FIG. 1 is a functional block diagram of an optical forwarding board system according to an embodiment of the present invention;

Fig. 2 is a structural block diagram of a reference clock sending circuit used on an optical repeater board according to an embodiment of the present invention.

Detailed ways

The technical solution and beneficial effects of the method of the present invention will be apparent through the detailed description of the preferred embodiments of the present invention in conjunction with the accompanying drawings.

The reference clock sending circuit and method for the optical transponder of the present invention have been successfully applied to the DWDM optical transponder supporting SDH (Synchronous Digital Hierarchy, Synchronous Digital Hierarchy) services, as shown in Figure 1 It is a system block diagram of the optical transponder board according to the present invention, the system mainly includes an optical receiver, a phase-locked loop part, a service processing part and an optical transponder, wherein: the service light on the line side enters the optical receiver, and the optical receiving The optical transceiver extracts the service clock and data; the system service processing part will perform some overhead processing, and then the optical transponder will send the service data.

During normal operation, the service processing part of the system needs two clock support: one is the "service optical recovery clock" from the optical receiver; the other is the "send reference clock" provided by the phase-locked loop part. The latter is locked to the former through a phase-locked loop, and their frequencies are the same or an accurate proportional relationship is fixed (this is guaranteed by the principle of the phase-locked loop).

When there is a problem with the service quality of the line, the optical receiver cannot extract a stable service clock, so the phase-locked loop part cannot provide a qualified "send reference clock". Since the quality of the "sending reference clock" cannot be guaranteed at this time, the AIS alarm issued by the optical transponder indicates that the service signal cannot be reliably received and detected by the downstream node device.

The circuit used for the reference clock transmission on the optical repeater board of the present invention, as shown in Figure 2, mainly consists of a standard phase-locked loop circuit, an analog switch, an analog-to-digital converter (D/A), a comparator composition. The circuit shown in FIG. 2 is the phase-locked loop part of the optical transponder board system shown in FIG. 1 . Among them, the standard phase-locked loop has a low-pass filter and a voltage-controlled oscillator, and the clock signal recovered by the service light passes through the low-pass filter to generate an error voltage, and the output terminal of the voltage-controlled oscillator is sent under voltage control. reference clock.

The feature of the present invention is that the input signal of the comparator is the voltage generated by the error voltage generated by the low-pass filter and the digital-to-analog converter, and the FPGA/CPU linearly adjusts the digital-to-analog converter, and according to the comparison result of the comparator, the Adjust the generated voltage, when the comparison result is close, determine the current generated voltage as the normal control voltage, and stabilize the output;

The input signal of the one-of-two analog switch is the error voltage generated by the low-pass filter and the normal control voltage determined by the digital-to-analog converter, and the selection signal is a monitoring and judging signal whether the "clock of service light recovery" is available, That is, the "selection switch" signal, when the judgment signal is "Yes", the one-of-two switching circuit selects the error voltage as the output voltage to control the voltage-controlled oscillator, when the judgment signal is "No", The one-of-two switch circuit selects the normal control voltage as an output voltage to control the voltage-controlled oscillator.

After the system is powered on, all the clocks in Figure 1 are normal, and the service forwarding is normal. At this time, the analog switch in Figure 2 always selects the error voltage output by the phase-locked loop as the control voltage of the VCO in the phase-locked loop. Figure 2 The control voltage of the voltage-controlled oscillator (VCO) in the phase-locked loop system, record the correct control voltage value into the non-volatile memory; and then continuously monitor the service optical signal input by the system, when there is a problem in its quality that leads to Figure 1 When the "clock for business optical recovery" is not available, switch the one-two analog switch in Figure 2, use the voltage output by D/A to drive the control voltage terminal of the phase-locked loop voltage-controlled oscillator (VCO), and use the previously recorded D The /A control value drives D/A to generate a control voltage equal to the VCO control voltage at normal business hours. At this time, the frequency of the VCO output clock is the same as that during normal operation, that is, the sending reference clock is valid, which ensures that the alarm signal sent to the downstream device does not exceed the required frequency offset. Then, continue to monitor, and when the quality of the input service optical signal returns to normal and usable, switch the selection of the analog switch to the normal working mode.

Working with the circuit structure shown in Figure 2, the phase-locked loop part of the system can provide a transmission reference clock with sufficient quality and reliability when the "service optical recovery clock" is unstable or even disappears, so that downstream nodes can detect the system transmission AIS warning indication signal. Here, 'sufficiently reliable' means: the frequency deviation of the service light sent out by using this transmission reference clock is less than 20ppm, which meets the standard requirements. The specific implementation process is as follows:

(1) When the optical path business of the system in Figure 1 is normal, use the FPGA in Figure 2 to control the "selection switch" signal of the two-choice analog switch to be at a high level, so that the "error voltage" output by the phase-locked loop is used as the control voltage of the VCO , the voltage-controlled oscillator VCO generates a transmission reference clock of a specific frequency; note that the control voltage of the VCO is equal to the "error voltage" output by the phase-locked loop at this time, and this voltage can make the VCO accurately output the frequency required by the system.

(2) In order that the phase-locked loop can still provide a qualified "send reference clock" when there is a problem with the optical quality of the service on the line and the optical receiver cannot extract a stable "recovered clock from service light", the current service of the system must be preserved Normal VCO control voltage value. The specific storage method is:

A. When the business is normal, first use the FPGA to adjust the digital interface of the D/A device, and adjust the digital control value from 1 to the maximum value of 255. At this time, the output voltage of the D/A changes from 0V to 3.3V. Put the output voltage value of D/A and the "error voltage" value output by the phase-locked loop into the comparator for comparison during the change process;

B. For the comparator, the positive pin is connected to the "error voltage" output by the phase-locked loop, and the negative pin is connected to the D/A output voltage. If the positive pin voltage is higher than the negative pin voltage, the comparator outputs "1"; otherwise, the comparator outputs "0". And because the comparator does not have any feedback, the very small deviation of the voltage of its two input pins will be amplified many times, causing its output to be either 0 or 1, and there is no intermediate state. Therefore, when the D/A increases little by little from small to large, and the comparator output jumps from 1 to 0, the corresponding D/A output voltage value is the VCO control voltage value we want to record when the business is normal. The FPGA monitors the jump of the output of the comparator and records the digital control value of D/A at this time.

(3) The CPU records the D/A digital control value into a non-volatile memory for backup.

(4) Afterwards, the system monitors the current input service optical signal, and when the quality of the service optical signal is unavailable, the "selection switch" signal of the two-choice analog switch in Figure 2 is switched to a low level when the "service optical recovery clock" is unavailable , so that the analog switch selects the output voltage of the D/A as the control voltage of the VCO to control the VCO to generate a "send reference clock"; this reference clock is almost the same quality as the reference clock when the system is working normally, and the frequency deviation is less than 20ppm (here "Almost" is because the fixed voltage control VCO will be affected by the environment and device aging, and it is impossible to be absolutely accurate, but its deviation can meet the system requirements). At this time, although the "clock recovered by service light" is unstable or even disappears, the system still has a reliable "transmission reference clock" to ensure that downstream nodes can detect the AIS alarm indication signal sent by the system.

(5) After that, continue to detect the system input service light, as long as there is a quality problem with the input service light, use the FPGA to control the "selection switch" of the two-choice analog switch in Figure 2 to a low level, and the voltage output by the D/A As the control voltage of the VCO in the phase-locked loop.

(6) Use the D/A control value recorded by the previous CPU to drive D/A to generate the VCO control voltage. This voltage is equal to the VCO control voltage value during normal business hours, so the frequency of the VCO output clock is the same as that during normal operation, that is, the sending reference clock is valid, ensuring that the sent AIS signal does not exceed the required frequency offset.

(7) When it is continuously monitored that the quality of the current input service optical signal is back to normal, use the FPGA in Figure 2 again to control the "selection switch" of the two-choice analog switch to a high level, so that the analog switch selects the "error" output of the phase-locked loop. Voltage" is used as the control voltage of the VCO, and the system returns to the normal working state.

(8) After the device is powered on next time, use the same method to measure the VCO control voltage under the current normal working state again. If the error between the measured voltage value and the recorded voltage value is within 0.1v, the recorded voltage value will not be modified. If Modify the record value beyond this range. The 0.1v used here is determined according to the index of the VCO device. For a VCO of 200ppm/V, the voltage error of 0.1v corresponds to a frequency deviation of 20ppm (this step is optional and used).

It should be understood that the above description of the present invention for specific embodiments is relatively specific, and should not be considered as limiting the scope of the patent protection of the present invention. For those skilled in the art, various possible changes can be made according to the technical concept of the present invention Or deformation, and all these changes or deformations should belong to the scope of protection of the appended claims of the present invention.

Claims (11)

1. reference clock transtation mission circuit that is used on the light repeat plate, comprise phase-locked loop, have low pass filter and voltage controlled oscillator in the phase-locked loop, professional light recovered clock signal is through described low pass filter, produce error voltage, the output of described voltage controlled oscillator sends reference clock under voltage control, it is characterized in that, described reference clock transtation mission circuit also comprises: aanalogvoltage generation circuit, comparator, either-or switch circuit, wherein:

The input signal of described comparator is the voltage that produces via the error voltage of described low pass filter generation and described aanalogvoltage generation circuit, described aanalogvoltage generation circuit is adjusted the voltage of generation according to the comparative result of described comparator, when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling voltage, and stable output;

The input signal of described either-or switch circuit is error voltage and the definite normal control voltage of described aanalogvoltage generation circuit that produces via described low pass filter, select signal is that " professional light clock recovered " whether signal is judged in available monitoring, when this judgement signal is "Yes", this either-or switch circuit selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch circuit selected described normal control voltage to control described voltage controlled oscillator as output voltage.

2. circuit as claimed in claim 1 is characterized in that, further comprises:

The comparative result monitor is used to monitor the output signal of described comparator, when the output signal saltus step, stops the voltage adjustment of described aanalogvoltage generation circuit, and writes down the voltage of this current generation.

3. circuit as claimed in claim 2 is characterized in that, described comparative result monitor is programmable logic device.

4. circuit as claimed in claim 2 is characterized in that, further comprises:

Memory is used to store the voltage of the current generation of described aanalogvoltage generation circuit of described comparative result monitor record.

5. circuit as claimed in claim 1 is characterized in that, described aanalogvoltage generation circuit is the digital to analog converter by programmable logic device or CPU linear regulation.

6. circuit as claimed in claim 1 is characterized in that, further comprises: signal generating circuit is judged in monitoring, is used for basis to the monitoring that the professional light signal of importing carries out, and whether signal is judged in available monitoring to send " professional light clock recovered ".

7. reference clock sending method that is used on the light repeat plate, comprise phase-locked loop on the described light repeat plate, have low pass filter and voltage controlled oscillator in the phase-locked loop, professional light recovered clock signal is through described low pass filter, produce error voltage, the output of described voltage controlled oscillator sends reference clock under voltage control, it is characterized in that, comprises the steps:

Use an aanalogvoltage generation circuit to produce aanalogvoltage, and this voltage is sent into a comparator;

To send into described comparator via the error voltage that described low pass filter produces, the voltage that produces with described aanalogvoltage generation circuit compares;

According to the comparative result of described comparator, adjust the voltage that described aanalogvoltage generation circuit produces, when the comparator output signal saltus step, the voltage of current generation is defined as normally controlling voltage, and stable output;

The normal control voltage of described error voltage and the output of described aanalogvoltage generation circuit is sent into an either-or switch;

To the monitoring that the professional light signal of importing carries out, whether signal is judged in available monitoring to produce " professional light clock recovered ", and with the selection signal of this signal as described either-or switch circuit;

When this judgement signal is "Yes", this either-or switch selects described error voltage to control described voltage controlled oscillator as output voltage, when this judgement signal was "No", this either-or switch selected described normal control voltage to control described voltage controlled oscillator as output voltage.

8. method as claimed in claim 7 is characterized in that, described aanalogvoltage generation circuit is the digital to analog converter by programmable logic device or CPU linear regulation.

9. method as claimed in claim 7 is characterized in that, and is described when the comparator output signal saltus step, and the voltage of current generation is defined as normally controlling the step of voltage, comprising:

Monitor the output signal of described comparator, when this output signal saltus step, stop the voltage adjustment of described aanalogvoltage generation circuit, and the voltage that writes down this current generation is normal control voltage.

10. method as claimed in claim 7 is characterized in that, further comprises: through comparator relatively after, the normal control magnitude of voltage that described aanalogvoltage generation circuit is determined is stored in the memory.

11. method as claimed in claim 7 is characterized in that, described " professional light clock recovered " whether signal is judged in available monitoring, is that the signal that monitoring produced that signal generating circuit carries out according to the professional light signal to input is judged in a monitoring.

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