CN1808701A - A method of manufacturing a packaging substrate - Google Patents

Abstract

The invention discloses a manufacturing method of a packaging substrate, which utilizes two electroplating processes to respectively finish nickel-gold electroplating of gold-plated areas on the upper surface and the lower surface of the substrate, and before electroplating, an area to be plated on a copper layer lead is defined by a solder resist agent firstly, and then nickel-gold electroplating is carried out, so that an electroplated nickel layer cannot be overlapped with the solder resist agent, the problems of poor adhesion between the nickel layer and the solder resist agent and the like can be avoided, and the reliability of a packaging substrate product is improved.

Description

A method of manufacturing a packaging substrate

technical field

The invention relates to a method for manufacturing a packaging substrate, in particular to a method for manufacturing a packaging substrate that uses through holes and two nickel-gold electroplating processes to respectively complete the nickel-gold electroplating on the gold-plated areas of the upper and lower surfaces of the substrate.

Background technique

With the continuous development of light, thin, short and small electronic products, the market pays more and more attention to flip-chip packaging technology. Due to the multiple advantages of flip-chip technology compared with traditional packaging methods, it has become the focus of the development of the packaging and testing industry in recent years under the growing mobile communication environment. At present, with the use of high-end packaging such as ball grid array (BGA) and flip-chip packaging (Flip Chip) has gradually become the mainstream packaging technology, the packaging substrate (Packaging Substrate) required by the market for packaging also increasing. Based on cost considerations, upstream IDM factories and IC design companies usually hand over the substrate procurement rights to the packaging factory, and the substrate circuit design is also handed over to the packaging factory. Therefore, the IC packaging substrate, which still accounts for more than 30% of the packaging cost, is convenient It becomes the most important key material that packaging factories must master when entering the high-end packaging market. As the wiring on the packaging substrate becomes more and more dense, how to increase the wiring density of the packaging substrate while taking into account the stability and reliability of the process, the low cost and the yield of the product is an important issue for the production of the packaging substrate.

As the industry knows, in the manufacturing process of the packaging substrate, in addition to forming fine wire patterns (usually copper wires) on it, and the I/O contacts on each wire line need to be plated with a layer The so-called "soft gold", that is, the nickel-gold layer, is used to enhance the stable electrical connection between the package substrate and the chip during the process of gold wire bonding, and at the same time, it also has the function of preventing the oxidation of the copper wire pattern. Subsequently, a surface finish process such as printing a solder mask is carried out to protect the wire lines formed on the surface of the substrate.

The known method of electroplating nickel-gold surface treatment generally needs to have an electroplating extension wire (plating bus) extending from the copper circuit on the substrate surface to the periphery of the substrate in the area not covered by the solder resist, as a conductive path during electroplating, In this way, it is possible to plate a nickel-gold layer with a specific thickness on each gold-plated area exposed outside the solder resist on the substrate. However, the main disadvantage of the above-mentioned known method is that the electroplating extension wires will inevitably occupy the available substrate wiring space, so that the substrate wiring density cannot be increased. In addition, plated wires are susceptible to noise problems caused by signal interference from adjacent wire lines. In the prior art, the nickel-gold layer is often partially overlapped with the solder resist, but the poor adhesion between the nickel-gold layer and the solder resist will lead to a decrease in the reliability of the packaging substrate product.

In related known technologies, reference can be made to the technology disclosed in U.S. Patent No. 6,576,540 "Method For Fabricating Substrate Within A Ni/AuStructure Electroplated On Electrical Contact Pads (Method For Fabricating Substrate Within A Ni/AuStructure Electroplated On Electrical Contact Pads)", The disadvantage is that one more metallization operation needs to be done on the substrate after the circuit is formed, resulting in a waste of cost. In addition, it is more likely to be scratched or damaged due to careless handling during the manufacturing process, which will affect the fine lines on the substrate. Another disadvantage is that when the above-mentioned technology intends to make an image transfer process after the circuit is formed, because the metal layer on the substrate surface is formed later, it is easy to peel off the metal layer and the substrate surface after covering the photoresist, resulting in a high yield rate. decrease.

Contents of the invention

The technical problem to be solved by the present invention is to provide a method that uses the characteristics of the packaging substrate, the gold-plated area will be exposed on both sides of the substrate, and communicated through the through hole, so one side of the substrate is covered with a metal layer first, so that it is fully conductive. Through, and then use the through hole to conduct to the other side, so that part of the circuit can be electroplated with nickel and gold to make the packaging substrate.

To this end, the present invention proposes a manufacturing method of a packaging substrate, which includes the following steps: providing a substrate and forming a through hole thereon; forming a first metal on the upper and lower surfaces of the substrate and the inner wall of the through hole layer; perform a lithography and etching process, define the first metal layer on the upper surface of the substrate as a first conductor pattern, and define a second conductor pattern on the lower surface of the substrate, and the first conductor pattern and the first conductor pattern The second wire pattern is electrically connected through the through hole; a solder resist is covered on the upper and lower surfaces of the substrate, and the solder resist fills the through hole; a first solder resist is formed in the solder resist an opening and a second opening, wherein the first opening exposes part of the first conductor pattern, and the second opening exposes part of the second conductor pattern; a first conductive layer is formed on the upper surface of the substrate, and the The first conductive layer covers the solder resist and the first opening, and is in contact with the first wire pattern; a first insulating layer is covered on the first conductive layer; the first insulating layer is exposed on the second opening Electroplating a second metal layer on the two wire patterns; peeling off the first insulating layer; and performing an etching process to etch the first conductive layer to expose the first wire pattern in the first opening.

The characteristics and advantages of the present invention are: the manufacturing method of the packaging substrate proposed by the present invention uses two electroplating processes to respectively complete the nickel-gold electroplating of the gold-plated areas on the upper and lower surfaces of the substrate, and before electroplating, the copper layer wires to be The gold-plated area is first defined by the solder resist, and then the nickel-gold plating is performed, so the electroplated nickel-gold layer does not overlap with the solder resist, so that poor adhesion between the nickel-gold layer and the solder resist can be avoided and other problems occur, thereby improving the reliability of packaging substrate products.

Description of drawings

1 to 12 are schematic cross-sectional views of specific embodiments of the manufacturing method of the packaging substrate of the present invention.

Explanation of reference numbers:

10 substrate 12 through hole

18 Copper layer 22 Copper layer pad

24 Copper layer pad 26 Through-hole copper metal

30 solder resist

32 opening 34 opening

38 Conductive layer 40 Insulation layer

48 Conductive layer 50 Insulation layer

52 nickel-gold layer 62 nickel-gold layer

101 upper surface 102 lower surface

105 area to be gilded 106 area to be gilded

Specific implementation

In order to further understand the features and technical content of the present invention, please refer to the following detailed description and accompanying drawings of the present invention. However, the drawings are only for reference and auxiliary description, and are not intended to limit the present invention.

The present invention is mainly aimed at the purpose of electroplating a nickel-gold layer on some circuits when the packaging substrate product has no wires and requires a special process. The main feature of the present invention is to use two electroplating processes to complete the nickel-gold electroplating of the gold-plated areas on the upper and lower surfaces of the substrate respectively, and before electroplating, the areas to be plated on the copper layer wires are first defined by the solder resist, and then Nickel-gold electroplating is carried out, so the electroplated nickel-gold layer will not overlap with the solder resist, so that problems such as poor adhesion between the nickel-gold layer and the solder resist can be avoided, thereby improving the reliability of packaging substrate products .

Please refer to FIG. 1 to FIG. 12 , which are schematic cross-sectional views of a specific embodiment of the manufacturing method of the packaging substrate of the present invention. First, as shown in FIG. 1 , a substrate 10 is provided, which has an upper surface 101 and a lower surface 102 , and the substrate 10 has been processed by a through hole drilling process to form a through hole 12 thereon.

As shown in FIG. 2 , a metallization process is performed to form a copper layer 18 on the surface of the substrate 10 and the through hole 12 . The copper layer 18 may be an electroless deposited copper layer with a thickness of about 10 microns or less. Next, as shown in FIG. 3 , lithography and etching processes are performed to define the copper layer 18 as a copper layer pad 22 on the upper surface 101 of the substrate 10, and simultaneously define the copper layer 18 as a copper layer pad on the lower surface 102 of the substrate 10. 24 , wherein both the copper layer pad 22 and the copper layer pad 24 form an electrical connection through the through hole copper metal 26 on the side wall of the through hole 12 .

As shown in FIG. 4 , the solder resist 30 is covered on the upper surface 101 and the lower surface 102 of the substrate 10 , and the through hole 12 is filled. As known to those skilled in the art, the solder resist 30 is a photoresist component that can absorb light. The opening 32 and the opening 34 can be formed in the solder resist 30 by exposure and development processes, which respectively define the copper layer pads. 22 to be gold-plated area 105 and on the copper layer pad 24 to be gold-plated area 106.

As shown in FIG. 5 , a conductive layer 38 is then completely covered on the upper surface 101 of the substrate 10 , and the covered area includes the solder resist 30 and the exposed copper layer pad 22 and the substrate 10 . The conductive layer 38 may be a metal layer, such as a copper layer, or any other conductive material. As shown in FIG. 6 , an insulating layer 40 such as solder resist is covered on the conductive layer 38 .

As shown in Figure 7, then carry out electroplating nickel-gold process, make copper layer pad 24 conduction to copper layer pad 22 and conductive layer 38 through through hole 12, and make conductive layer 38 externally connected to a predetermined voltage, so that the region to be gold-plated A nickel-gold layer 52 is electroplated on the copper layer pad 24 in 106 . Because the present invention defines the region 106 to be gold-plated with the solder resist 30 earlier, and then electroplates, therefore, the nickel-gold layer 52 will not overlap with the solder resist 30, so that the gap between the nickel-gold layer and the solder resist can be avoided. Problems such as poor inter-adhesion, thereby improving the reliability of packaging substrate products. However, since the upper surface 101 of the substrate 10 is covered with the insulating layer 40 , nickel and gold will not be electroplated.

After the nickel-gold electroplating process of the region 106 to be gold-plated is completed, as shown in FIG. 8 , the insulating layer 40 covering the upper surface 101 of the substrate 10 is stripped off. As shown in FIG. 9 , a micro-etching process is then performed to etch away the exposed conductive layer 38 after stripping the insulating layer 40 , exposing the copper layer pad 22 in the region 105 to be gold-plated.

The steps of electroplating nickel and gold in the region 105 to be plated with gold on the upper surface 101 of the substrate 10 will be described below with reference to FIGS. 10 to 12 . Basically, the step of electroplating Ni-Au in the area 105 to be gold-plated on the upper surface 101 of the substrate 10 is the same as the step of electroplating Ni-Au in the area 106 to be gold-plated on the lower surface 102 of the substrate 10 .

First, as shown in FIG. 10 , the lower surface 102 of the substrate 10 is completely covered with a conductive layer 48 , and the covered area includes the solder resist 30 and the exposed nickel-gold layer 52 . Likewise, the conductive layer 48 may be a metal layer, such as a copper layer, or any other conductive material. Then, an insulating layer 50 such as solder resist or photoresist (photoresist) material is covered on the conductive layer 48 .

As shown in FIG. 11 , the nickel-gold electroplating process is carried out, so that the copper layer pad 22 is conducted to the copper layer pad 24, the nickel-gold layer 52 and the conductive layer 48 through the through hole 12, and the conductive layer 48 is externally connected to a predetermined voltage, so as to A nickel-gold layer 62 is electroplated on the copper layer pad 22 in the area to be gold-plated 105 . Since the lower surface 102 of the substrate 10 is covered with the insulating layer 50 , nickel and gold will not be electroplated.

Finally, as shown in FIG. 1 , the insulating layer 50 covering the lower surface 102 of the substrate 10 is stripped off, and then a micro-etching process is performed to etch away the exposed conductive layer 48 after the insulating layer 50 is stripped off. The Ni-Au layer 52 is exposed.

The above descriptions are only specific embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

Claims (8)

1. the manufacture method of a base plate for packaging includes the following step:

One substrate is provided, and forms through hole thereon;

On the inwall of the upper and lower surface of this substrate and this through hole, form one first conductive layer;

Carry out a little shadow and an etch process, this first conductive layer is defined as first wire pattern in the upper surface of this substrate, lower surface in this substrate is defined as second wire pattern, and this first wire pattern is electrically connected via this through hole formation with this second wire pattern;

In the upper and lower surface coverage one anti-welding resistance agent of this substrate, and this through hole is filled up in this anti-welding resistance agent;

Form one first opening and one second opening in this anti-welding resistance agent, wherein this first opening exposes this first wire pattern of part, and this second opening exposes this second wire pattern of part;

Upper surface in this substrate forms one second conductive layer, and this this anti-welding resistance agent of covering of second conductive layer and this first opening, and contacts with this first wire pattern;

On this second conductive layer, cover one first insulating barrier; And

On this second wire pattern of part that this second opening exposes, electroplate one the 3rd conductive layer.

2. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, electroplates after the 3rd conductive layer on this second wire pattern of part that this second opening exposes, and this manufacture method includes the following step in addition:

Divest this first insulating barrier; And

Carry out an etch process, etch away this second conductive layer, to expose this first wire pattern in this first opening.

3. the manufacture method of base plate for packaging as claimed in claim 2 is characterized in that, after carrying out this etch process, this manufacture method includes the following step in addition:

Lower surface in this substrate forms one the 4th conductive layer, and this anti-welding resistance agent of covering of the 4th conductive layer and this second opening, and contacts with this second wire pattern;

On the 4th conductive layer, cover one second insulating barrier; And

On this first wire pattern of part that this first opening exposes, electroplate one the 5th conductive layer.

4. the manufacture method of base plate for packaging as claimed in claim 3 is characterized in that, the 4th conductive layer is the copper layer.

5. the manufacture method of base plate for packaging as claimed in claim 3 is characterized in that, the 5th conductive layer includes gold and nickel.

6. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, this first conductive layer is the copper layer.

7. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, the 3rd conductive layer includes gold and nickel.

8. the manufacture method of base plate for packaging as claimed in claim 1 is characterized in that, this second conductive layer is the copper layer.

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