CN1755502A - Method and device for protecting interferometric modulators from electrostatic discharge - Google Patents
Method and device for protecting interferometric modulators from electrostatic discharge Download PDFInfo
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- CN1755502A CN1755502A CN 200510105831 CN200510105831A CN1755502A CN 1755502 A CN1755502 A CN 1755502A CN 200510105831 CN200510105831 CN 200510105831 CN 200510105831 A CN200510105831 A CN 200510105831A CN 1755502 A CN1755502 A CN 1755502A
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Abstract
A MEMS device such as an interferometric modulator includes an integrated ESD protection element capable of shunting to ground an excess current carried by an electrical conductor in the MEMS device. The protection element may be a diode and may be formed by depositing a plurality of doped semiconductor layers over the substrate on which the MEMS device is formed.
Description
Technical field
Technical field of the present invention relates to MEMS (micro electro mechanical system) (MEMS).
Background technology
MEMS (micro electro mechanical system) (MEMS) comprises micromechanical component, driver and electronic component.Micromechanical component can adopt deposition, etching or other several portions that can etch away substrate and/or institute's deposited material layer maybe can add several layers and make with the micromachined technology that forms electricity and electromechanical assembly.One type MEMS device is called as interferometric modulator.Interferometric modulator can comprise the pair of conductive plate, one of them or the two all can be transparent whole or in part and/or be reflectivity, and can relative motion when applying a suitable electric signal.One of them plate can comprise a quiescent layer that is deposited on the substrate, and another plate can comprise a metal partion (metp) that separates by an air gap and this quiescent layer.Said apparatus is with a wide range of applications, and in this technology, utilizes and/or revises the characteristic of these types of devices so that its performance can be used for improving existing product and makes still undeveloped at present new product will be rather useful.
Summary of the invention
System as herein described, method and device all have many aspects, and arbitrary single aspect all can not determine its desired characteristic separately.Now, its main characteristic is carried out brief discussion, this not delimit the scope of the invention.Checking this argumentation, especially reading title for after the part of " embodiment ", how people provides the advantage that is better than additive method and display device if can understanding each embodiment described herein.
One embodiment provides a kind of MEMS device, and it comprises: a displaceable element; One electric conductor, its through structure to carry an exciting current that can encourage described displaceable element effectively; And but one be attached to the protecting component of described electric conductor with mode of operation.Described protecting component is through constructing will shunt ground connection by the excess current that described electric conductor carries at least in part.Described displaceable element, electric conductor and protecting component are integrated on the substrate.
Another embodiment provides a kind of MEMS device, and it comprises that one is used to encourage the member and of a displaceable element to be used to prevent that the member of excess current from appearring in described excitation member.Described excitation member is integrated on the substrate with the protection member.
Another embodiment provides a kind of interferometric modulator, and it comprises: an electrode, its mutually integrated with a substrate and through the structure to carry an exciting current; And a protecting component, it is connected to described electrode and through the excess current shunting ground connection of structure will be carried by described electrode at least in part.Described protecting component is mutually integrated with described substrate.
Another embodiment provides a kind of display device, it comprise a substrate, a plurality of be formed at interferometric modulator on the described substrate, and a plurality of on described substrate with the mutually integrated protecting component of described a plurality of interferometric modulators.Described a plurality of protecting component is electrically connected to prevent that at least in part static discharge from appearring in described a plurality of interferometric modulator.
Another embodiment provides a kind of method of making one interferometric devices, and it is included in deposition one first electrode layer on the substrate, deposits a sacrifice layer on described first electrode layer, deposits a second electrode lay on described sacrifice layer.Described method also is included in a plurality of ground planes that form through the semiconductor layers of doping and on described substrate of deposition on the described substrate.Described ground plane and described a plurality of semiconductor layer through mixing through structure with at least one was carried in will be by described first electrode layer and described the second electrode lay excess current shunting ground connection.
Hereinafter will illustrate in greater detail these and other embodiment.
Description of drawings
Now, graphic (the illustrating not in scale) of non-limiting preferred embodiment of the present invention illustrates these and other feature of the present invention with reference to being intended to illustration.
Fig. 1 is first-class axle figure, it shows the part of an embodiment of an interferometric modulator display, wherein one of one first interferometric modulator removable reflection horizon is in a relaxation position, and a removable reflection horizon of one second interferometric modulator is in an excited target position.
Fig. 2 is a system block diagram, and it shows that one comprises an embodiment of the electronic installation of one 3 * 3 interferometric modulator displays.
Fig. 3 is the removable mirror position of an exemplary embodiment of interferometric modulator shown in Figure 1 and the graph of a relation of the voltage that applies.
Fig. 4 is one group of synoptic diagram that can be used for driving the row and column voltage of interferometric modulator display.
Fig. 5 A is presented at an exemplary frame of display data in 3 * 3 interferometric modulator displays shown in Figure 2.
Fig. 5 B demonstration can be used for writing the capable signal of frame shown in Fig. 5 A and an exemplary sequential chart of column signal.
Fig. 6 A is the sectional view of a device shown in Figure 1.
Fig. 6 B is a sectional view of an alternate embodiment of an interferometric modulator.
Fig. 6 C is a sectional view of another alternate embodiment of an interferometric modulator.
Fig. 7 is the line lead of an interferometric devices array, correspondence and the schematic plan view of row lead-in wire and exemplary electrostatic protection element.
Fig. 8 is the side cutaway view of an embodiment of a protecting component.
Fig. 9 is the side cutaway view of an alternate embodiment of a protecting component.
Figure 10 one has the side cutaway view of an embodiment of single interference formula modem devices in the interferometric devices array of integrated protection element.
Figure 11 one has the side cutaway view of a complementary embodiment of single interference formula modem devices in the interferometric devices array of integrated protection element.
Figure 12 A is the circuit diagram of a standard Zener diode, and Figure 12 B is the side cutaway view of an embodiment of the standard Zener diode esd protection element of a correspondence.
Figure 13 A is the circuit diagram of a low electric capacity Zener diode, and Figure 13 B is the side cutaway view of an embodiment of the low electric capacity Zener diode esd protection element of a correspondence.
Figure 14 A is the circuit diagram of a symmetrical Zener diode, and Figure 14 B is the side cutaway view of an embodiment of the symmetrical Zener diode esd protection element of a correspondence.
Figure 15 A is the circuit diagram of a back-to-back Zener diode, and Figure 15 B is the side cutaway view of an embodiment of the back-to-back Zener diode esd protection element of a correspondence.
Figure 16 A is the circuit diagram of a low electric capacity symmetry diode, and Figure 16 B is the side cutaway view of an embodiment of the low electric capacity symmetry diode esd protection element of a correspondence.
Figure 17 A-17G shows that one is used to make the various aspects of an embodiment of the technology of integrated imods shown in Figure 10.
Figure 18 A and 18B are system block diagrams, and it shows that one comprises an embodiment of the visual display unit of a plurality of interferometric modulators.
Embodiment
One preferred embodiment is a kind of interferometric modulator with integrated electrostatic discharge (ESD) protecting component.Described protecting component can be diode, for example back-to-back Zener (Zener) diode, standard Zener diode, low electric capacity Zener diode, symmetrical Zener diode, and low electric capacity symmetry diode.Described integrated protection element can form through the doping semiconductor layer of appropriate structuring by deposition on the interferometric modulator substrate.
Hereinafter explanation is at some embodiments of the invention.But, the present invention can implement by being permitted different ways.In this explanation, can be with reference to accompanying drawing, in the accompanying drawings, identical parts use identical number-mark from start to finish.Find out easily that according to following explanation the present invention can be at arbitrary display image-no matter be dynamic image (for example video) or still image (for example rest image) of being configured to, no matter be character image or picture-device in implement.More specifically, the present invention can implement in inferior numerous kinds of electronic installations or is associated with these electronic installations for example (but being not limited to): mobile phone, wireless device, personal digital assistant (PDA), handheld computer or portable computer, gps receiver/omniselector, camera, the MP3 player, video camera, game machine, wrist-watch, clock, counter, TV monitor, flat-panel monitor, computer monitor, automotive displays (for example mileometer display etc.), driving cabin control device and/or display, camera scenery display (for example rear view cameras display of vehicle), electronic photo, electronics billboard or label, projector, building structure, packing and aesthetic structures (for example image display on jewelry).The MEMS device that has similar structures with MEMS device described herein also can be used for non-display application, for example is used for electronic switching device.
Show an interferometric modulator display embodiment who contains an interfere type MEMS display element among Fig. 1.In these devices, pixel is in bright state or dark state.Under bright (open (on) or open (open)) state, display element reflexes to the user with most of incident visible light.Be in dark (close (off) or close (closed)) state following time, display element reflects the incident visible light to the user hardly.Decide on different embodiment, can put upside down the light reflectance properties of "on" and "off" state.The MEMS pixel can be configured to mainly reflect under selected color, also can realize colored the demonstration except that black and white.
Fig. 1 is first-class axle figure, and it shows two adjacent pixels in a series of pixels of a visual displays, and wherein each pixel comprises a MEMS interferometric modulator.In certain embodiments, an interferometric modulator display comprises a row/column array that is made of these interferometric modulators.Each interferometric modulator comprises a pair of reflection horizon, and this is positioned to each other to have a variable-sized optical resonance cavity at a distance of a variable and controlled distance at least to form one to the reflection horizon.In one embodiment, one of them reflection horizon can be moved between the two positions.Be referred to herein as on the primary importance of relaxed state, the local reflex layer that the position of this displaceable layers distance one is fixed is far away relatively.On the second place, the position of this displaceable layers is more closely near this local reflex layer.Decide position according to removable reflection horizon, from the incident light of this two layers reflection can with mutually long or mutually the mode of disappearing interfere, thereby form the mass reflex or the non-reflective state of each pixel.
The pixel array portion that shows in Fig. 1 comprises two adjacent interferometric modulator 12a and 12b.In the interferometric modulator 12a in left side, demonstration one movably high reflection layer 14a is in a relaxation position, and this relaxation position is apart from fixing local reflex layer 16a one preset distance.In the interferometric modulator 12b on right side, demonstration one movably high reflection layer 14b is in an excited target position, and this excited target position is near fixing local reflex layer 16b.
Fixed bed 16a, 16b conduction, local transparent and local be reflectivity, and can on a transparent substrates 20, deposit layer making of one or more respectively do for oneself chromium and tin indium oxides by (for example).Described each layer is patterned into parallel band, and can form the column electrode in the display device, as further specifying hereinafter.Displaceable layers 14a, 14b can form by one or more depositing metal layers that is deposited on pillar 18 tops (and column electrode 16a, 16b quadrature) and and be deposited on the series of parallel band that the middle expendable material between the pillar 18 constitutes.After expendable material was etched, these deformable metal level 14a, 14b and the metal level of fixing separated by an air gap 19 of stipulating.These deformable layer can use one to have high conductivity and reflexive material (for example aluminium), and those bands can form the row electrode in the display device.
When not applying voltage, cavity 19 remains between a layer 14a, the 16a, and deformable layer is in the mechanical relaxed state shown in pixel 12a among Fig. 1.Yet after a selected row and column applies potential difference (PD), the capacitor that forms at the respective pixel place of described row and column electrode intersection is recharged, and electrostatic force pulls to these electrodes together.If voltage is enough high, then displaceable layers generation deformation, and be forced on the fixed bed (can on fixed bed, deposit a dielectric material (not shown in this Figure), preventing short circuit, and the control separation distance), shown in the pixel 12b on right side among Fig. 1.Regardless of the potential difference (PD) polarity that is applied, the behavior is all identical.This shows, may command reflection and row/row of non-reflective pixel state encourage to traditional LCD and other display techniques in used row/row encourage similar in many aspects.
Fig. 2 to Fig. 5 B shows the example process and the system that use an interferometric modulator array in a display application.Fig. 2 is a system block diagram, and this figure shows that one can embody an embodiment of the electronic installation of each side of the present invention.In this exemplary embodiment, described electronic installation comprises a processor 21, and it can be any general purpose single-chip or multicore sheet microprocessor, for example ARM, Pentium
, Pentium II
, PentiumIII
, Pentium IV
, Pentium
Pro, 8051, MIPS
, Power PC
, ALPHA
, or any special microprocessor, for example digital signal processor, microcontroller or programmable gate array.According to convention in the industry, processor 21 can be configured to carry out one or more software modules.Except that carrying out an operating system, also this processor can be configured to carry out one or more software applications, comprise web browser, telephony application, e-mail program or any other software application.
In one embodiment, processor 21 also is configured to communicate with an array controller 22.In one embodiment, this array control unit 22 comprises a horizontal drive circuit 24 and the column drive circuit 26 that signal is provided to a pel array 30.Array sectional view shown in Fig. 1 illustrates with line 1-1 in Fig. 2.For the MEMS interferometric modulator, described row/row excitation protocol can utilize the hysteresis property of these devices shown in Figure 3.It for example may need, and one 10 volts potential difference (PD) makes a displaceable layers be deformed into actuated state from relaxed state.Yet, when described voltage when this value reduces, reduce when being back to below 10 volts at described voltage, described displaceable layers will keep its state.In the exemplary embodiment of Fig. 3, before voltage drop was low to moderate below 2 volts, displaceable layers is relaxation fully not.Therefore, in example shown in Figure 3, exist one to be approximately the voltage range that 3-7 lies prostrate, exist one to apply voltage window in this voltage range, described device is stabilized in relaxation or actuated state in this window.Be referred to as " lag windwo " or " stability window " in this article.For an array of display with hysteresis characteristic shown in Figure 3, OK/the row excitation protocol can be designed to be expert at during the gating, the pixel that is energized is applied about 10 a volts voltage difference to selected in current, and to being applied one near 0 volt voltage difference by the pixel of relaxation.Behind this gating, described pixel is exposed to about 5 volts steady state voltage difference makes its residing state so that it remains in capable strobe pulse.After writing, each pixel all can have one and be in the potential difference (PD) in the 3-7 volt " stability window " in this example.This characteristic makes pixel design shown in Figure 1 be stabilized in an existing foment or a relaxed state under identical the voltage conditions that applies.Because each pixel of interferometric modulator, no matter be in foment or relaxed state, in fact all be one by described fixed reflector and capacitor that mobile reflection horizon constituted, therefore, this steady state (SS) can be kept under the voltage in the lag windwo and consumed power hardly.If the current potential that is applied is constant, then there is not electric current to flow into pixel basically.
In the typical case uses, can be by determining that according to one group of desired actuated pixels in first row one group of row electrode forms a display frame.After this, a horizontal pulse is put on the electrode of the 1st row, thereby encourage the pixel corresponding with determined alignment.After this, determined one group of row electrode is become corresponding with desired one group of actuated pixels in second row.After this, with a pulse put on the 2nd the row electrode, thereby according to determined row electrode encourage the 2nd the row in respective pixel.The pixel of the 1st row is not subjected to the influence of the pulse of the 2nd row, thereby the state that keeps it to set at the impulse duration of the 1st row.The property mode repeats above-mentioned steps to the row of whole series in order, to form described frame.Usually, repeating this process continuously by the speed with a certain desired frame number/second to refresh and/or upgrade these frames with new video data.Also have a variety of row and the row electrodes that are used to drive pel array also to be known, and can be used for the present invention by people with the agreement that forms display frame.
Fig. 4,5A and Fig. 5 B show a kind of possible excitation protocol that is used for forming a display frame on 33 arrays shown in Figure 2.Fig. 4 shows one group of possible row and column voltage level of can be used for having the pixel of hysteresis curve shown in Figure 3.In the embodiment of Fig. 4, encourage a pixel to comprise suitable row are set to-V
Bias, and suitable row is set to+Δ V, it can correspond respectively to-5 volts and+5 volts.The relaxation pixel then is by suitable row are set to+V
BiasAnd suitable row is set to identical+Δ V, forms one 0 volts potential difference (PD) at described pixel two ends thus and realize.In the row of 0 volt of those wherein capable voltages maintenance, pixel is stable at its initial residing state, and is in+V with these row
BiasStill-V
BiasIrrelevant.
Fig. 5 B is the sequential chart of a series of row of demonstration and column signal, and those signals put on 3 * 3 arrays shown in Figure 2, and it will form the demonstration shown in Fig. 5 A and arrange that wherein actuated pixels is non-reflectivity.Before writing the frame shown in Fig. 5 A, pixel can be in any state, and in this example, all row all are in 0 volt, and all row all be in+5 volts.Under these institute's voltages that apply, all pixels are stable at its existing actuated state or relaxed state.
In the frame shown in Fig. 5 A, pixel (1,1), (1,2), (2,2), (3,2) and (3,3) are encouraged.For realizing this effect, during one " line time " of the 1st row, the 1st row and the 2nd row are set at-5 volts, the 3rd row are set at+5 volts.This can not change the state of any pixel, because all pixels all remain in the stability window of 3-7 volt.After this, rise to 5 volts of pulses that are back to 0 volt that descend again then by one from 0 volt and come gating the 1st row.Actuate pixel (1,1) and (1,2) and make pixel (1,3) relaxation thus.Other pixel in the array is all unaffected.For the 2nd row is set at desired state, the 2nd row are set at-5 volts, the 1st row and the 3rd row are set at+5 volts.After this, apply identical strobe pulse with actuate pixel (2,2) and make pixel (2,1) and (2,3) relaxation to the 2nd row.Equally, other pixel in the array is all unaffected.Similarly, by the 2nd row and the 3rd row are set at-5 volts, and be listed as the 1st be set at+5 volts to the 3rd capable the setting.The strobe pulse of the 3rd row is set at the state shown in Fig. 5 A with the 3rd row pixel.After writing incoming frame, the row current potential is 0, and the row current potential can remain on+5 or-5 volts, and after this demonstration will be stable at the layout shown in Fig. 5 A.Should be appreciated that, can use identical programs the array that constitutes by tens of or hundreds of row and columns.The sequential, order and the level that should also be clear that the voltage that is used to implement the row and column excitation can alter a great deal in above-described General Principle, and above-mentioned example only is exemplary, and any actuation voltage method all can be used for the present invention.
Detailed structure according to the interferometric modulator of above-mentioned principle operation can be ever-changing.For example, Fig. 6 A-6C shows three kinds of different embodiment of moving lens structure.Fig. 6 A is a sectional view embodiment illustrated in fig. 1, wherein deposition one strip of metal material 14 on the support member 18 that quadrature extends.In Fig. 6 B, movably reflecting material 14 only is on the tethers 32 at corner and is attached to support member.In Fig. 6 C, movably reflecting material 14 is suspended on the deformable layer 34.Because the structural design and the material therefor of reflecting material 14 can be optimized aspect optical characteristics, and the structural design of deformable layer 34 and material therefor can be optimized aspect the desired mechanical property, so this embodiment has some advantages.In many open files, comprise that for example No. 2004/0051929 U.S. discloses in the application case, the production of various dissimilar interference devices has been described.Can use the known technology of a variety of people to make said structure, this comprises a series of material depositions, patterning and etching step.
MEMS device (for example interferometric modulator) is easy to be damaged because of the Electrostatic Discharge incident.The transfer that ESD is an electric charge between two kinds of materials that are in different potentials.Material can have static by variety of way.For example, can contact and separation similar because of two kinds or dissimilar material form electrostatic charge, for example, when the people walks on the floor, can separate with floor surface then and produce electrostatic charge along with sole contact floor surface.Also can pass through other modes, for example induction, ion bombard or contact another charged object, and form electrostatic charge on material.Electrostatic potential on the material of static electrification electric charge can be reached thousand volts up to ten thousand.
The MEMS device can for example make, encapsulate, test or have electrostatic charge when device and/or metal lead wire become with the contact of various surfaces and when separating between the operating period.Electrostatic charge is transferred to the MEMS device or migrates out the example that electrostatic charge is exactly an esd event from the MEMS device.Can damage the MEMS device because of the electric current that esd event flows through occurring, this is that voltage that may relate to is higher relatively because the size of MEMS device assembly is less relatively.For example, the electric conductor in the MEMS device can be designed to work to about 25 volts voltage range about 0.1.The electrostatic potential of going up kilovolt that causes because of esd event can cause excessive electric current, and these excessive electric currents for example can cause metal molten, junction breakdown and/or oxide to lose efficacy, thereby causes device to damage and/or inefficacy.Used herein term " excessive electric current " is meant that the current value in the electric conductor of MEMS device surpasses the current value that conductor is designed to carry or is one can cause damaging and maybe might cause damaging the value that contains or be attached to the MEMS device of this electric conductor.Term " MEMS device " comprises the MEMS device that is in manufacturing, encapsulation, the test process and/or is attached to other devices, thus comprise " discharge " MEMS device (promptly have an expendable material in occupation of will at the cavity that after this holds motion) and through MEMS device that part discharges and incorporated other products into or device in the MEMS device.For example, term " interferometric modulator " had both comprised that the interferometric modulator of working also comprised the interferometric modulator that does not discharge.
One embodiment provides a kind of MEMS device, and this MEMS device prevents excessive electric current (for example by the electric current due to the esd event) by a protecting component at least in part.This MEMS device can comprise a displaceable element and an electric conductor, described electric conductor through structure to carry an exciting current that can encourage described displaceable element effectively.This MEMS device also can comprise a protecting component, but this protecting component is attached to described electric conductor with mode of operation and through the excess current shunting ground connection of structure will be carried by described electric conductor at least in part.Described displaceable element, electric conductor and protecting component are preferable to be integrated on the substrate.Hereinafter put up with an interferometric modulator and show the various aspects of a MEMS device embodiment.Yet, should be appreciated that these aspects also are applicable to other interferometric modulator structure (structure for example shown in Figure 6) and other MEMS devices.
Fig. 7 one comprises the schematic plan view of the interferometric modulator array 100 of a plurality of interferometric devices 102, and in the present embodiment, described a plurality of interferometric devices 102 are arranged in a rectangular substantially array.Described a plurality of interferometric devices 102 is by corresponding line 104 and alignment 106 interconnection.These lines 104 and alignment 106 are electric conductor, it extends on whole array 100 substantially with an orientation that overlaps, so that can come each interferometric devices 102 in the array 100 is carried out addressing by the intersection line 104 of correspondence and alignment 106 are carried out addressing.
Each protecting component 110 is interconnected between the corresponding line 104 and alignment 106; its interconnection mode makes the excess current that comes across on line 104 or the alignment 106 shunt ground connection by the protecting component 110 of a correspondence, and corresponding interferometric devices 102 is damaged or the possibility of fault to reduce.Fig. 7 shows the protecting component 110 with the character of circuit that is used for back-to-back zener diode structure.Yet; should be appreciated that; this is a specific embodiment of protecting component 110, and in other embodiments, also can use comprise diode (for example according to the work of avalanche breakdown mechanism), fuse, effectively other circuit components of the amplitude limiter circuit of switch or like are as protecting component 110.Protecting component 110 can be symmetrical protecting component, for example comprises shown in Figure 14-16 and described hereinafter protecting component.
Fig. 8 shows an embodiment of a protecting component 110 in greater detail with the side cutaway view form.In this embodiment, a general electric conductor corresponding to line 104 or alignment 106 is connected to a heavily doped n+ type semiconductor layer 112.Implant, deposit or press the well construction that various other known ways formation one are formed by heavily doped p+ N-type semiconductor N 114.Form a heavily doped n+ type semiconductor layer 115 and it further is connected to a circuit ground point 111.Heavily doped n+ type semiconductor layer 115 can comprise with same material used in heavy doping n+ type semiconductor layer 112 or comprise a different materials.N+ N-type semiconductor N 112, p+ N-type semiconductor N 114 and n+ N-type semiconductor N 115 together define n-p-n knot, thereby form a circuit corresponding to back-to-back Zener diode 110 embodiment shown in Figure 7.Semiconductor layer 112, the 114 and 115 preferable amorphous silicons that form by plasma enhanced chemical steam deposition (" PECVD ") deposition that comprise.
Fig. 9 show a protecting component 110 ' an alternate embodiment; protecting component 110 ' operation be similar to protecting component shown in Figure 8 110; but difference is that the p+ N-type semiconductor N is not to form a well construction as shown in Figure 8 in n+ type semiconductor layer 112; but protecting component 110 shown in Figure 9 ' embodiment in, p+ N-type semiconductor N 114 ' n+ type semiconductor layer 112 ' on form an overlayer.One heavily doped n+ type semiconductor layer 115 ' be formed at layer 114 ' go up and be connected to circuit ground point 111.
Therefore, in one embodiment,, will cause the p-n junction reverse breakdown if the unexpected excess current on line 104 or the alignment 106 will cause that to the n-p-n knot of protecting component 110 reverse bias and its value are enough big.Value when reverse breakdown takes place can be selected by the amount of adulterant and the thickness of these layers in the control semiconductor 112,114,115.Usually, the concentration of p+ and n+ adulterant is about 10 in the amorphous silicon semiconductor layer 112,114,115
18Cm
-3Or higher (dopant atom/cubic centimetre), and the thickness of each layer 112,114,115 all between about 500 to about 5000 scopes.Reverse breakdown is normally followed Zener excitation, snowslide mechanism and/or one combination.Protecting component 110 can conduct big relatively reverse breakdown current in a kind of mode that can not damage protecting component 110 in many situations by protecting component 110.Therefore, in these embodiments, the value of the unexpected excess current that is stood on interferometric modulator array 100 is decided, and protecting component 110 can be multiple esd event protection is provided.
Figure 10 shows that with the side cutaway view form one is provided with an alternate embodiment of an independent interferometric devices 102 in the interferometric modulator array 100 of an integrated or built-in protecting component 110.In this embodiment, interferometric devices 102 comprises a substrate 116, and substrate 116 is optical clear and provide support structure for interferometric modulator array 100 basically.One optical layers 120 is formed on the substrate 116.In this embodiment, optical layers 120 comprises a tin indium oxide (ITO) layer and a chromium layer.Reflection horizon 16 among Fig. 1 that the mode of action of optical layers 120 is similar to above to be discussed.Optical layers 120 is an electric conductor and optical clear at least in part, and can be called electrode in this article.
One dielectric layer 122 is formed on the optical layers 120.At run duration, dielectric layer 122 can prevent that circuit from movably appearring in optical layers 120 and between mechanical layer/mirror layer 126.Mechanical layer/mirror layer 126 is supported on the substrate 116 by the pillar 124 of a plurality of vertical extensions.Mechanical layer/mirror layer 126 is an electric conductor and has optical reflectance, and can be called electrode in this article.The mode of action of mechanical layer/mirror layer 126 is similar in shown in Fig. 1 and the removable reflection horizon of being discussed hereinbefore 14.Mechanical layer/mirror layer 126 and pillar 124 1 coexist and define a gap 130 in the intermediate space between mechanical layer/mirror layer 126 and the dielectric layer 122.At run duration, optical layers 120 all carries an exciting current with mechanical layer/mirror layer 126, and this exciting current can be by encouraging mechanical layer/mirror layer 126 effectively above with reference to the described general manner of Fig. 1.
Figure 10 shows that also interferometric modulator array 100 further comprises an integrated protection element 110 that is arranged on the substrate 116.Protecting component 110 comprises the n+ type semiconductor layer 112 that is deposited on the optical layers 120, be deposited on the p+ type semiconductor layer 114 on the n+ type semiconductor layer 112 and be deposited on n+ N-type semiconductor N 115 on the p+ type semiconductor layer 114.Layer 112,114,115 forms one thus and is the back-to-back Zener diode of cardinal principle type shown in Figure 9.Protecting component 110 is arranged on the substrate 116, an outward flange of interferometric modulator array 100 or periphery place or near.Protecting component 110 is attached to a ground plane 132, and this ground plane 132 is formed on the n+ N-type semiconductor N 115 and is connected to circuit ground point (not shown).Ground plane 132 is an electric conductor and comprises metal (being aluminium in the embodiment shown).Protecting component 110 is connected to optical layers 120 (electric conductor); and be configured to make the unexpected excess current (for example esd event) that comes across on the optical layers 120 that the n-p-n knot that is defined by n+ N-type semiconductor N 115, p+ N-type semiconductor N 114 and n+ N-type semiconductor N 112 is imposed bias voltage, thereby make this n-p-n structure reverse breakdown and will shunt ground connection by the excess current that optical layers 120 carries at least in part.It is theoretical that the present invention is not limited to operation, thereby also can use other to be used for the mechanism that excess current is shunted ground connection is replaced or is additional to the reverse breakdown of n-p-n structure.
Figure 11 is the side cutaway view of another embodiment, and wherein an interferometric modulator array 100 comprises an interferometric modulator 102 and an integrated protection element 110 that is arranged on the substrate 116.The operation of the embodiment of protecting component 110 shown in Figure 11 is similar to the embodiment with reference to protecting component 110 shown in Figure 10 and described substantially, but difference is that protecting component 110 among Figure 11 is structurally complementary and is configured to be connected to the mechanical layer/mirror layer 126 of interferometric modulator 102.Should be appreciated that mechanical layer/mirror layer 126 or optical layers 120 can form line 104 or alignment 106, this on the concrete structure of array 100 and the stipulations that are used for corresponding electric conductor is appointed as line 104 or alignment 106 decide.
In the embodiment shown in fig. 11, protecting component 110 is connected to the mechanical layer/mirror layer 126 of interferometric modulator 102.Protecting component 110 shown in Figure 11 is substantially similar to protecting component 110 shown in Figure 10, and just n+ N-type semiconductor N 112, p+ N-type semiconductor N 114, n+ N-type semiconductor N 115 and ground plane 132 are inverted with respect to layout shown in Figure 10.Therefore, to be similar to foregoing mode, the excess current that comes across on mechanical layer/mirror layer 126 can impose reverse bias to the n-p-n knot that is defined by n+ N-type semiconductor N 115, p+ N-type semiconductor N 114 and n+ N-type semiconductor N 112, thereby at least a portion of this excess current is branched to ground plane 132.Thereby protecting component 110 can provide protection to prevent unexpected excess current to interferometric devices 102, for example the excess current that causes because of one or more esd events.
Reach mentioned abovely as shown in Figure 7, protecting component and interferometric modulator can arrange by various structures, to form a display device that comprises a plurality of interferometric modulators and a plurality of protecting components.For example, arbitrary particular interferometric modulator can have two electrodes, and wherein first electrode is attached to one first protecting component, second electrode is attached to one second protecting component.Preferably, described a plurality of interferometric modulator and described a plurality of protecting component are integrated on the substrate.Used herein term " integrated " is meant by semiconductor fabrication techniques (for example deposition and patterning) and is formed at the assembly on the same substrate.Can on a substrate, realize integrated by variety of way.For example, in Figure 10 and 11 illustrated embodiments, interferometric modulator 102 (comprising travelling electrode 126 and electrode 120) is integrated on the substrate 116 at essentially identical surface level with protecting component 110.Should be appreciated that Fig. 1-17 may not draw in proportion, thereby for example, relative size between each structure and distance can be different from shown in the embodiment shown.
Fig. 7-8 shows the protecting component 110 with the character of circuit that is used for back-to-back zener diode structure, and Figure 10-11 shows the integrated of this protecting component 110 and substrate 116.Yet, in structure shown in for example Figure 10-11 or in other structures, except that protecting component 110, also can use other protecting components, perhaps can use other protecting components to replace protecting component 110.For example, Figure 12-16 demonstration is suitable for being used as the various diode circuit figure of integrated protection element and corresponding diode layer structure in the MEMS device.Among each figure in Figure 12-16; can deposit each n, p, n+ and p+ layer by the PECVD technology known to the person of ordinary skill in the field, the thickness of layer and doping level should be chosen to make the protecting component that obtains thus can provide under the excess current level of required degree of protection one by routine test reverse breakdown to occur.Usually, n, p, n+ and p+ layer comprise amorphous silicon, and wherein the concentration of dopant of p+ and n+ layer is 10
18Cm
-3Or the concentration of dopant of higher (dopant atom/cubic centimetre), p and n layer is then less than 10
18Cm
-3(dopant atom/cubic centimetre).Each n shown in Figure 12-16, p, the thickness of n+ and p+ layer all are in about 500 usually to about 5000 scopes, but can be greater or lesser in particular condition.Among each figure in Figure 12-16, should be appreciated that, each n, p, n+ and p+ layer can be by opposite order depositions, but this decides on interferometric modulator and with the structure that mode of operation is connected with the electric conductor of protecting component.For example, as indicated above, the structure of protecting component 110 shown in Figure 11 and protecting component shown in Figure 10 110 complementations.
Figure 12 shows the side cutaway view (Figure 12 B) of the integrated standard Zener diode protecting component 110-12 of a standard Zener diode circuit figure (Figure 12 A) and a correspondence.Figure 12 B shows that one is deposited into heavily doped p+ type semiconductor layer 114 on the ground plane 132 (being connected to a not shown circuit ground point), an and heavily doped n+ type semiconductor layer 115 that is deposited on the layer 114.One electric conductor (generally corresponding to line 104 or alignment 106) is formed on the n+ N-type semiconductor N 115.
Figure 13 shows the side cutaway view (Figure 13 B) of the integrated low electric capacity Zener diode protecting component 110-13 of a low electric capacity Zener diode circuit figure (Figure 13 A) and a correspondence.Figure 13 B shows that one is deposited into heavy doping p+ type semiconductor layer 114 on the ground plane 132 (being connected to a not shown circuit ground point), an and heavy doping n+ type semiconductor layer 115 that is deposited on the layer 114.One n type semiconductor layer 117 is deposited on the layer 115, and a p type semiconductor layer 118 is deposited on the layer 117.One electric conductor (generally corresponding to line 104 or alignment 106) is formed on the p N-type semiconductor N 118.
Figure 14 shows the side cutaway view (Figure 14 B) of the integrated symmetrical Zener diode protecting component 110-14 of a symmetrical Zener diode circuit figure (Figure 14 A) and a correspondence.Figure 14 B shows that one is deposited into heavy doping p+ type semiconductor layer 114 on the ground plane 132 (being connected to a not shown circuit ground point), an and heavy doping n+ type semiconductor layer 115 that is deposited on the layer 114.One heavily doped p+ type semiconductor layer 119 is deposited on the layer 115.Heavily doped p+ N-type semiconductor N 119 can comprise same material used in the heavily doped p+ N-type semiconductor N 114 or comprise a different materials.One electric conductor (generally corresponding to line 104 or alignment 106) is formed on the heavily doped p+ N-type semiconductor N 119.
Figure 15 shows the side cutaway view (Figure 15 B) of the integrated back-to-back Zener diode protecting component 110-15 of a back-to-back Zener diode circuit figure (Figure 15 A) and a correspondence.One similar back-to-back Zener diode protecting component 110 ' be shown among Fig. 9.Figure 15 B show one be deposited into heavy doping n+ type semiconductor layer 112 on the ground plane 132 (being connected to a not shown circuit ground point) ', and one be deposited into layer 112 ' on heavy doping p+ type semiconductor layer 114 '.One heavily doped n+ type semiconductor layer 115 ' be deposited into layer 114 ' on.Heavily doped n+ N-type semiconductor N 112 ' can comprise with in heavily doped n+ N-type semiconductor N 115 ' middle material therefor identical materials or comprise a different materials.One electric conductor (generally corresponding to line 104 or alignment 106) be formed at heavily doped n+ N-type semiconductor N 115 ' on.
Figure 16 shows the side cutaway view (Figure 16 B) of the integrated low electric capacity symmetry diode protection element 110-16 of a low electric capacity symmetry diode circuit figure (Figure 16 A) and a correspondence.Figure 16 B shows that the left side of protecting component 110-16 is similar to the low electric capacity Zener diode protecting component 110-13 shown in Figure 13, and it comprises one and is deposited into heavy doping p+ type semiconductor layer 114a, on the ground plane 132 (being connected to a not shown circuit ground point) and is deposited into heavy doping n+ type semiconductor layer 115a, on layer 114a and is deposited into n type semiconductor layer 117a on layer 115a, an and p type semiconductor layer 118a who is deposited on layer 117a.Show further that as institute in Figure 16 B the right side of protecting component 110-16 separates with the left side by an insulator 121, and comprise layer identical with the left side but that order is opposite.Therefore, the right side of protecting component 110-16 comprises one and is deposited into p type semiconductor layer 118b, on the ground plane 132 and is deposited into n type semiconductor layer 117b, on the p type semiconductor layer 118b and is deposited into heavy doping n+ type semiconductor layer 115b on layer 117b, an and heavy doping p+ type semiconductor layer 114b who is deposited on layer 115b.One electric conductor (generally corresponding to line 104 or alignment 106) is formed on p N-type semiconductor N 118a, insulator 121 and the heavily doped p+ N-type semiconductor N 114b.
The interferometric modulator array 100 that comprises described integrated protection element 110 has the simple relatively advantage of structure, and this simple relatively structure can a kind ofly can obviously not increase the overall range of array 100 or the mode of area occupied provides effective esd protection.In addition, protecting component 110 can easily use the material that has been used when making the embodiment of interferometric devices 102 to make.For example, can make ground plane 132 by aluminum or aluminum alloy easily and effectively, and aluminum or aluminum alloy also can easily be used to make some part of interferometric modulator, comprises for example mechanical layer and/or mirror layer.In certain embodiments, n+ type semiconductor layer 112,115 and p+ type semiconductor layer 114 comprise the silicon through mixing, and silicon can easily be used to make interferometric modulator array 100.For example, in the intermediate steps that forms gap 130, can advantageously use silicon as sacrifice layer.
One embodiment provides a kind of MEMS device, and this MEMS device comprises that one is used to encourage the member and of a displaceable element to be used to prevent that the member of excess current from appearring in described excitation member.Described excitation member is integrated on the substrate with the protection member, for example is integrated on the substrate mentioned above 116.Displaceable element can comprise a mechanical layer and/or mirror layer, for example mechanical layer/mirror layer 126.The excitation member can comprise an electric conductor, thereby can comprise optical layers 120 and/or mechanical layer/mirror layer 126.The excitation member can be configured to carry an exciting current that can encourage displaceable element effectively, and the two all carries one and can encourage the embodiment of exciting current of mechanical layer/mirror layer 126 described effectively at optical layers 120 wherein and mechanical layer/mirror layer 126 as mentioned.But described protecting component can comprise one with mode of operation be attached to described excitation member and through the structure excessive circuit is shunted at least in part the protecting component of ground connection.For example; described protecting component can comprise a protecting component 110 as indicated above, and thereby can comprise in for example back-to-back Zener diode, standard Zener diode, low electric capacity Zener diode, symmetrical Zener diode or the low electric capacity symmetry diode at least one.
One embodiment provides a kind of method that is used to make the interferometric devices that comprises an integrated protection element.The various aspects of this method are shown in a series of sectional views shown in Figure 17, and Figure 17 is presented at a kind of each step that is used for making the technology of interferometric modulator array 100 shown in Figure 10.Can use known deposition processs such as hot chemical vapour deposition (" hot CVD "), physical vapor deposition (" PVD ") and PECVD for example to deposit hereinafter described various layers.
Figure 17 A is presented at deposition first optical layers 120 on the substrate 116.In this embodiment, optical layers 120 comprises a tin indium oxide (ITO) layer and a chromium layer, thereby is an electric conductor, and can be called first electrode layer 120 in this article, because in this embodiment, it both also was used as a mirror as an electrode in resulting interferometric modulator.One dielectric layer 122 is formed on the optical layers 120.Dielectric layer 122 can comprise monox (SiO for example
2).In the embodiment shown, substrate 116 is a glass, but also can use for example other transparent materials such as plastics.In a step that does not show, dielectric layer 122 is covered and etching, to form a window that exposes first electrode layer 120 of below.
Figure 17 B shows that passing this window deposits n+ type semiconductor layer 112 on first electrode layer 120.Can use doped in situ that this n+ type semiconductor layer is doped into required degree.Figure 17 C is presented at and deposits an amorphous silicon sacrifice layer 123 on the dielectric layer 122 and deposition one p+ doped amorphous silicon layer 114 on n+ type semiconductor layer 112.Can be in independent step cover and the deposition of amorphous silicon layer 123,114 is finished in etching by suitable.In an alternate embodiment, at dielectric layer 122 and n+ type semiconductor layer 112 deposited monolayers amorphous silicon on the two, and come doped amorphous silicon layer 114 in the following way: cover this single layer exposing described part 114, and for example be doped into required degree by diffusing, doping or ion bombardment.Figure 17 D shows sacrifice layer 123 covered and be etched with and forms the hole, uses monox (SiO for example then
2) or polymkeric substance fill described hole to form pillar 124.
Figure 17 E shows an interferometric modulator 101 and a protecting component 110 that does not discharge that forms in the following way: cover dielectric layer 122 and sacrifice layer 123; on p+ type semiconductor layer 114, deposit n+ N-type semiconductor N 115 by on-the-spot PECVD; deposition one aluminium lamination 126 on sacrifice layer 123 and pillar 124 deposits an aluminium lamination 132 simultaneously on p+ type semiconductor layer 114 then.Electrode layer 126 is an electric conductor, and has optical reflectance, it can be called mechanical layer/mirror layer in this article.
Figure 17 F is presented on the protecting component 110 and forms a passivation layer 127 (for example polymkeric substance or SiO
2).Figure 17 G shows and to form the interferometric modulator 102 that discharges in the following way: by using suitable etchant (XeF for example
2And/or F
2Gas) remove sacrifice layer 123, to form gap 130 in the intermediate space between electrode layer 126 and dielectric layer 122.Passivation layer 127 is present in during the etching preventing etching protecting component 110, and is after this removing, shown in Figure 17 G.The aluminium lamination 132 that remains on the p+ type semiconductor layer 114 is attached to circuit ground point (not shown), thereby is a ground plane.Be deposited on n+ type semiconductor layer 112 on first electrode layer 120, be deposited on p+ type semiconductor layer 114 on the n+ type semiconductor layer 112, be deposited on n+ N-type semiconductor N 115 on the p+ type semiconductor layer 114, and aluminium ground plane 132 through the excess current shunting ground connection of structure carrying by first electrode layer 120 of interferometric modulator 102.
Can deposit other integrated ground planes and through doping semiconductor layer structure and will be with it by first electrode layer and the second electrode lay in excess current that at least one layer carried shunt ground connection.For example, technology shown in Figure 17 relates at deposition ground plane 132 on doping semiconductor layer 112,114,115.Can use one of technology shown in Figure 17 to relate on ground plane the described a plurality of versions of deposition and make interferometric modulator shown in Figure 11 through doping semiconductor layer.Although in Figure 17 protecting component 110 is shown as near interferometric modulator 102, yet should be appreciated that, protecting component 110 also can be arranged on the substrate 116, near an outward flange of interferometric modulator array 100 or periphery place or its.
Figure 18 A and 18B are the system block diagram of an embodiment of demonstration one display device 2040.Display device 2040 can be (for example) cellular phone or mobile phone.Yet the form that the same components of display device 2040 or its do to change slightly also can be used as for example illustration of all kinds such as TV and portable electronic device display device.
The display 2030 of exemplary display device 2040 can be any in the numerous kinds of displays, comprises bi-stable display as herein described.In other embodiments, display 2030 comprises flat-panel monitors such as plasma scope for example mentioned above, EL, OLED, STN LCD or TFT LCD or non-tablet display such as CRT or other tubular devices for example, and these displays are known by the person of ordinary skill in the field.Yet for ease of the explanation present embodiment, display 2030 comprises just like interferometric modulator display as herein described.
The assembly that in Figure 18 B, schematically shows an embodiment of exemplary display device 2040.Example illustrated display device 2040 comprises a shell 2041, and can comprise that other are closed in assembly wherein at least in part.For example, in one embodiment, exemplary display device 2040 comprises a network interface 2027, and this network interface 2027 comprises that one is coupled to the antenna 2043 of a transceiver 2047.Transceiver 2047 is connected to processor 2021, and processor 2021 is connected to again regulates hardware 2052.Regulating hardware 2052 can be configured to a signal is regulated (for example a signal being carried out filtering).Regulate hardware 2052 and be connected to a loudspeaker 2045 and a microphone 2046.Processor 2021 also is connected to an input media 2048 and a driving governor 2029.Driving governor 2029 is coupled to one frame buffer 2028 and is coupled to array driver 2022, and array driver 2022 is coupled to an array of display 2030 again.One power supply 2050 is all component power supply according to the designing requirement of particular exemplary display device 2040.
In an alternate embodiment, can replace transceiver 2047 by a receiver.In another alternate embodiment, can replace network interface 2027 by an image source, this image source can store or produce and send out the view data of delivering to processor 2021.For example, this image source can be one and contains the software module that the digital video disk (DVD) of view data or hard disk drive or produce view data.
The overall operation of processor 2021 common control examples display device 2040.Processor 2021 automatic network interfaces 2027 or an image source receive data (for example Ya Suo view data), and this data processing is become raw image data or is processed into a kind of form that is easy to be processed into raw image data.Then, the data after processor 2021 will be handled are sent to driving governor 2029 or are sent to frame buffer 2028 and store.Raw data typically refers to the information that can discern the picture characteristics of each position in the image.For example, described picture characteristics can comprise color, saturation degree and gray level.
In one embodiment, processor 2021 comprises a microcontroller, CPU or is used for the logical block of the operation of control examples display device 2040.Regulating hardware 2052 generally includes and is used for sending signals and being used for amplifier and wave filter from microphone 2046 received signals to loudspeaker 2045.Adjusting hardware 2052 can be the discrete component in the exemplary display device 2040, perhaps can incorporate in processor 2021 or other assemblies.
Driving governor 2029 direct self processors 2021 or receive the raw image data that produces by processor 2021 from frame buffer 2028, and suitably with the raw image data reformatting so as high-speed transfer to array driver 2022.Particularly, driving governor 2029 is reformated into a data stream with raster-like format with raw image data, so that it has a chronological order that is suitable for scanning array of display 2030.Then, the information after driving governor 2029 will format is sent to array driver 2022.Although driving governor 2029 (for example lcd controller) normally as one independently integrated circuit (IC) be associated with system processor 2021, yet these controllers also can make up by many kinds of modes.It can be used as hardware and is embedded in the processor 2021, is embedded in the processor 2021 or together fully-integrated with example, in hardware and array driver 2022 as software.
Usually, the self-driven controllers 2029 of array driver 2022 receive the information after the format and video data are reformated into one group of parallel waveform, and the parallel waveform per second of this group many times is applied to from hundreds of of the x-y picture element matrix of display, thousands of lead-in wires sometimes.
In one embodiment, driving governor 2029, array driver 2022, and array of display 2030 be applicable to the display of arbitrary type as herein described.For example, in one embodiment, driving governor 2029 is a traditional display controller or bistable display controllers (for example 1,000 relating to formula modulator control device).In another embodiment, array driver 2022 is a legacy drive or a bistable display driver (a for example interferometric modulator display).In one embodiment, a driving governor 2029 integrates with array driver 2022.This embodiment is very common in the integrated system of for example cellular phone, wrist-watch and other small-area display equal altitudes.In another embodiment, array of display 2030 is a typical array of display or a bistable array of display (a for example display that comprises an interferometric modulator array).
Well-known various energy storing devices in the technical field under power supply 2050 can comprise.For example, in one embodiment, power supply 2050 is rechargeable accumulator, for example nickel-cadmium accumulator or lithium-ions battery.In another embodiment, power supply 2050 is a regenerative resource, capacitor or solar cell, comprises plastic solar cell and solar cell lacquer.In another embodiment, power supply 2050 is configured to the socket reception electric power on wall.
In certain embodiments, programmability is as indicated above is present in the driving governor in control, and this driving governor can be arranged on several positions of electronic display system.In some cases, the control programmability is present in the array driver 2022.The person of ordinary skill in the field will know, can reach the above-mentioned optimization of enforcement in different structures in number of hardware and/or the component software arbitrarily.
Also can use other technological processes to make the interferometric devices that comprises the integrated protection element.For example, can on a substrate, make an interferometric devices array, then it be covered.Then, can be on substrate, for example do not make one or more protecting components on the periphery of crested at one of substrate, be connected to interferometric modulator array then.Also can implement this technology, for example can on substrate, make described one or more protecting component, then it be covered, on substrate, make interferometric modulator subsequently and be connected to protecting component by reversed sequence.
As indicated above, integrated imods described herein and protecting component can be incorporated into arbitrary in the device of structure with display image.This kind comprises generally can relate to described integrated imods and protecting component is attached to various other assemblies, for example power supply, controller IC, storer etc.Preferably, realize being electrically connected of this and integrated imods by integrated protection element as herein described.Described integrated imods and protecting component also in the mill electricity be attached to various types of testing apparatuss.This attached also preferablely realize by integrated protection element as herein described.
These integrated protection elements are particularly conducive to be made and test period protection integrated imods.Although can indicate the workman in this manufacturing environment to take suitable preventive measure to avoid making the MEMS device esd event to occur, yet some workman can take these preventive measure in all scenario in actual job.Integrated protection element as herein described can be used for providing esd protection, and this esd protection is made or begun when making at the MEMS device, thereby is reduced in the possibility of damaging during the subsequent processing steps and improves fabrication yield.
The person of ordinary skill in the field should be appreciated that, can make various modification, and this does not deviate from spirit of the present invention.Therefore, should be well understood to, form of the present invention only is exemplary, is not to be intended to limit the scope of the invention.
Claims (37)
1, a kind of MEMS device, it comprises:
One displaceable element;
One electric conductor, its through structure to carry an exciting current that can encourage described displaceable element effectively; And
One protecting component, but it is attached to described electric conductor with mode of operation, and through the excess current shunting ground connection of structure will carry by described electric conductor at least in part,
Described displaceable element, electric conductor and protecting component are integrated on the substrate.
2, MEMS device as claimed in claim 1, wherein said protecting component comprises a diode.
3, MEMS device as claimed in claim 2, wherein said diode are a back-to-back Zener diode, standard Zener diode, low electric capacity Zener diode, symmetrical Zener diode or low electric capacity symmetry diode.
4, MEMS device as claimed in claim 2, wherein said diode comprise a plurality of semiconductor layers through mixing.
5, MEMS device as claimed in claim 1, wherein said displaceable element, electric conductor and protecting component are being on the described substrate on the essentially identical surface level.
6, MEMS device as claimed in claim 1, it further comprises:
One with described electric conductor and described displaceable element in the processor of electric connection one of at least, described processor is configured to image data processing; And
One with the memory storage of described processor electric connection.
7, MEMS device as claimed in claim 6, it further comprises one drive circuit, described driving circuit one of is configured in described electric conductor and described displaceable element at least to send at least one signal.
8, MEMS device as claimed in claim 7, it further comprises a controller, described controller is configured to send to described driving circuit at least a portion of described view data.
9, MEMS device as claimed in claim 6, it further comprises an image source module, described image source module is configured to send described view data to described processor.
10, MEMS device as claimed in claim 9, wherein said image source module comprise a receiver, transceiver, reach at least one in the transmitter.
11, MEMS device as claimed in claim 6, it further comprises an input media, described input media is configured to receive the input data and described input data is sent to described processor.
12, a kind of MEMS device, it comprises:
Be used to encourage the member of a displaceable element; And
Be used to protect described excitation member to avoid the member of an excess current;
Described excitation member is integrated on the substrate with the protection member.
13, MEMS device as claimed in claim 12, wherein said excitation member comprises an electric conductor.
14, MEMS device as claimed in claim 13, wherein said excitation member through structure to carry an exciting current that can encourage described displaceable element effectively.
15, MEMS device as claimed in claim 12, wherein said protection member comprises a protecting component, but described protecting component is attached to described excitation member with mode of operation, and through constructing at least in part described excess current is shunted ground connection.
16, MEMS device as claimed in claim 12, wherein said protecting component comprise following one of at least: a back-to-back Zener diode, standard Zener diode, low electric capacity Zener diode, symmetrical Zener diode or low electric capacity symmetry diode.
17, a kind of interferometric modulator, it comprises:
One electrode, its mutually integrated with a substrate and through the structure to carry an exciting current; And
One protecting component, it is connected to described electrode, and through constructing will shunt ground connection by the excess current that described electrode carries at least in part, described protecting component is mutually integrated with described substrate.
18, interferometric modulator as claimed in claim 17, wherein said protecting component comprise a diode.
19, interferometric modulator as claimed in claim 18, wherein said diode are a back-to-back Zener diode, standard Zener diode, low electric capacity Zener diode, symmetrical Zener diode or low electric capacity symmetry diode.
20, interferometric modulator as claimed in claim 18, wherein said diode comprise a plurality of semiconductor layers through mixing.
21, interferometric modulator as claimed in claim 17, wherein said electrode and described protecting component are being on the described substrate on the essentially identical surface level.
22, interferometric modulator as claimed in claim 17, but it comprises that further one is attached to the mirror of described electrode with mode of operation.
23, interferometric modulator as claimed in claim 22, its further comprise one with described first mirror separately and second mirror in parallel substantially.
24, interferometric modulator as claimed in claim 23, but it comprises that further one is attached to second electrode of described second mirror with mode of operation.
25, interferometric modulator as claimed in claim 24; it further comprises one second protecting component; but described second protecting component is attached to described second electrode with mode of operation, and through constructing will shunt ground connection by one second excess current that described second electrode carries at least in part.
26, interferometric modulator as claimed in claim 25, wherein said second protecting component comprises a diode.
27, interferometric modulator as claimed in claim 26, wherein said diode are a back-to-back Zener diode, standard Zener diode, low electric capacity Zener diode, symmetrical Zener diode or low electric capacity symmetry diode.
28, a kind of display device, it comprises:
One substrate;
A plurality of interferometric modulators that are formed on the described substrate; And
A plurality of on described substrate with the mutually integrated protecting component of described a plurality of interferometric modulators;
Described a plurality of protecting component is electrically connected to prevent described a plurality of interferometric modulator static discharge at least in part.
29, display device as claimed in claim 28, wherein said a plurality of protecting components comprise a plurality of semiconductor layers through mixing.
30, display device as claimed in claim 28, wherein said a plurality of interferometric modulators connect by line and alignment.
31, display device as claimed in claim 30, wherein said line and alignment are attached to described a plurality of protecting component.
32, a kind of method of making one interferometric devices, it comprises:
Deposition one first electrode layer on a substrate;
Deposition one sacrifice layer on described first electrode layer;
Deposition one the second electrode lay on described sacrifice layer;
The a plurality of semiconductor layers of deposition on described substrate through mixing; And
On described substrate, form a ground plane, described ground plane and described a plurality of semiconductor layer through mixing through structure with at least one layer carried in will be by described first electrode layer and described the second electrode lay excess current shunting ground connection.
33, method as claimed in claim 32, it further comprises and removes described sacrifice layer.
34, method as claimed in claim 32, it further is included in the described ground plane of deposition on described a plurality of semiconductor layer through mixing.
35, method as claimed in claim 32, it further is included in the described a plurality of semiconductor layers through mixing of deposition on the described ground plane.
36, method as claimed in claim 32, it further comprises the described ground plane of a periphery deposition near described substrate.
37, a kind of interferometric modulator of making by method as claimed in claim 32.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US61349204P | 2004-09-27 | 2004-09-27 | |
| US60/613,492 | 2004-09-27 | ||
| US11/119,651 | 2005-05-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1755502A true CN1755502A (en) | 2006-04-05 |
Family
ID=36688857
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200510105831 Pending CN1755502A (en) | 2004-09-27 | 2005-09-23 | Method and device for protecting interferometric modulators from electrostatic discharge |
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| Country | Link |
|---|---|
| CN (1) | CN1755502A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105492879A (en) * | 2013-08-19 | 2016-04-13 | 浜松光子学株式会社 | Method for manufacturing optical interferometer |
| CN105632390A (en) * | 2014-11-24 | 2016-06-01 | 三星显示有限公司 | Display apparatus |
| CN107840303A (en) * | 2016-09-19 | 2018-03-27 | 亚德诺半导体集团 | Protection scheme for mems switch device |
-
2005
- 2005-09-23 CN CN 200510105831 patent/CN1755502A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105492879A (en) * | 2013-08-19 | 2016-04-13 | 浜松光子学株式会社 | Method for manufacturing optical interferometer |
| US9618323B2 (en) | 2013-08-19 | 2017-04-11 | Hamamatsu Photonics K.K. | Method for manufacturing optical interferometer |
| CN105632390A (en) * | 2014-11-24 | 2016-06-01 | 三星显示有限公司 | Display apparatus |
| CN107840303A (en) * | 2016-09-19 | 2018-03-27 | 亚德诺半导体集团 | Protection scheme for mems switch device |
| CN107840303B (en) * | 2016-09-19 | 2020-07-14 | 亚德诺半导体集团 | Protection schemes for MEMS switching devices |
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