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CN1723557A - 高密度封装的互连电源和地线条及其方法 - Google Patents

高密度封装的互连电源和地线条及其方法 Download PDF

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Publication number
CN1723557A
CN1723557A CNA2003801055270A CN200380105527A CN1723557A CN 1723557 A CN1723557 A CN 1723557A CN A2003801055270 A CNA2003801055270 A CN A2003801055270A CN 200380105527 A CN200380105527 A CN 200380105527A CN 1723557 A CN1723557 A CN 1723557A
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Prior art keywords
integrated circuit
ground
conductor
components
pad
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C·怀兰德
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Koninklijke Philips NV
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Koninklijke Philips Electronics NV
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Abstract

本发明的一个方面涉及降低连接器件的电源或地线与BGA封装的路径的阻抗。在特定的示例性实施例中，通过在距信号键合线(115)预定距离处设置地线条(130)来控制信号键合线的阻抗。在相关的示例性实施例中，紧邻引线键合(115)在器件管芯(140)和封装之间制作低阻抗的电源或地线连接。集成电路(140)包括多个接地焊盘、信号焊盘、电源焊盘和用于安装该集成电路的封装。封装(100)包括多个焊盘平台(110)、围绕集成电路(140)的接地环(105)，和将接地环(105)连接到集成电路接地焊盘(120)的接地条(130)。

Description

高密度封装的互连电源和地线条及其方法
本申请与同时提出的代理标签号(Attorney Docket)US020512P、名称为“High Density Package Interconnect Wire BondStrip Line and Method Therefor”的申请相关，并在此引入其全部内容作为参考。
本发明涉及集成电路封装领域，具体地涉及将器件的电源或地线焊盘连接到封装。
由于集成电路技术提高，可以在衬底的给定区域内提供的器件的密度和复杂性增加，因此对这些器件的封装提出了重大的挑战。例如，在计算机应用中，数据总线的宽度已经从16、32、64提高到128位及以上。数据在系统中传送期间，对总线来说具有同时开关输出(simultaneously switching output，SSO)是正常的。由于SSO期间存在大的瞬时电流，SSO经常导致芯片的电源和地线干线(ground rail)受到噪声影响。如果噪声严重，地线和电源干线就从它们的规定电压偏移而在芯片中引起不可预知的状态。
在BGA(球栅阵列)封装中，键合线通常用于将器件管芯连接到封装上的地线。在高引脚数的BGA中，通常使用地线环(ground ring)。有时将这些键合线放置在信号键合线附近以便通过建立共面的波导结构控制信号键合线的阻抗。
US专利5,872,403和6,083,772提出了一种在衬底上安装功率半导体管芯的结构和方法。它们大体上针对功率电子器件，更具体地针对一种用于功率器件的低阻抗强电流导体以及其制造方法。
US专利6,319,775B1涉及一种制造集成电路封装的方法，且特别涉及一种用于将导电条贴附到集成电路管芯和引线框的工艺。以参考方式引入该专利和前面引用的两个专利的全部内容。
本发明的优点在于降低连接器件的电源或地线和BGA封装的路径的阻抗。此外，本发明通过在距信号键合线预定距离处放置地线条可以控制信号键合线的阻抗。
在示例实施例中，集成电路器件包括具有多个接地焊盘、信号焊盘和电源焊盘的集成电路，以及用于安装该集成电路的封装。该封装包括多个焊盘平台(landing)、围绕该集成电路的接地环和将接地环连接到集成电路接地焊盘的接地条。
将在以下的描述中阐明其它优点和新颖的特征，并且其中部分对本领域技术人员来说根据对下文的检验变得明显，或者通过实施本发明可以学习到。
通过示例并参考附图更详细地阐明本发明，其中：图1是地线条之上键合线高度与阻抗的关系的曲线图；图2是根据本发明的实施例的顶视图；图2A是图2所述的实施例的侧视图；图3是由材料的复合体构成的图2 A所述的电源/地线条的侧视图；图4是根据本发明的电源/地线条以及如何将其贴附到IC器件管芯的电源/地线焊盘的详细顶视图；图5描述了根据本发明的电源/地线条的另一实施例以及如何将其贴附到IC管芯的键合焊盘；以及图6是根据本发明示例性实施例封装器件管芯的流程图。
本发明的优点在于降低连接器件的电源或地线和BGA封装的路径的阻抗。此外，本发明通过在距信号键合线预定距离处放置地线条可以控制信号键合线的阻抗。如图1所示，地线条之上键合线高度对阻抗的曲线图描述了该关系。该曲线假设引线直径为25μm和键合间距为50μm。对于键合线没有地线条的情况，阻抗值等于500μm高度处的值，为138欧姆。
设计要求将规定需要的电学参数。通常使用50、75和100欧姆的阻抗。例如，为了获得约50欧姆的阻抗，使用25μm的高度。对于75欧姆的阻抗，键合线相对地线条的高度约为50μm。为了获得约100欧姆的阻抗，使用125μm的高度。
现在参考图2和2A，在根据本发明的示例性实施例中，在器件管芯和封装之间在引线键合附近制作低阻抗的电源或地线连接。这减小了引线键合的阻抗。一种示例性封装100具有贴附在封装腔135内的平台(未示出)上的管芯140。该示例性封装可以是BGA型构造。对于高引脚数BGA封装(大于200个焊球)来说，本发明提供了一种控制阻抗的方法，特别在高速阻抗敏感应用中控制阻抗的方法。该技术可以应用于任何给定的器件管芯和高焊球数BGA封装以提高性能。在示例性的具体设计中，其对于设计散布在信号焊盘之间的地线焊盘以便更好地容纳地线条可能是有用的。
在高速阻抗敏感应用中，具有地线条能够使使用者在整个封装中保持不变的特征阻抗，例如100欧姆。通常，将管芯的器件输出连接到具有约138欧姆阻抗和长度约4mm的键合线，然后将该键合线连接到具有约90欧姆阻抗和长度约10mm的封装迹线(package trace)。通过使用根据本发明的地线条并注意路线安排可对于从器件管芯到封装球的整个14mm的长度保持恒定的100欧姆阻抗。
通过减少由于I/O开关电流在电源或地线上引起的感应噪声，地线条的电感降低提高了信号的完整性。
接地环105围绕管芯140。键合焊盘125是与到封装焊盘平台110的引线键合115连接的器件信号焊盘。引线键合115紧紧靠近地线条130，而将该地线条130贴附于器件上的专用接地焊盘120。该专用的接地焊盘可以是单个焊盘或多个焊盘，这取决于电路设计和布局。接地条130的坚固性提高了器件处理SSO的瞬时电流的能力。与2mm的键合线具有2nH的电感相比，对2mm的条来说地线条的电感约为1.3nH。地线条减小了电感，主要是由于其相对于键合线的尺寸。
现在参考图3，接地条130可以由任何合适的导电材料制成。在示例性实施例中接地条130由铜组成。接地条130是材料的复合体。对于接地条130的一种实现方式，在上表面，有厚度足以用于给定用途的铜层205。为了便于键合，铜层205具有贴附于各端的金210以便便于将该条贴附于器件的接地键合焊盘125和接地环105。可以增加诸如非导电金属氧化物的绝缘材料以形成层220。可以增加层220以减小在引线键合工艺期间形成意外短路的可能性。其它电介质可以包括聚酰亚胺、聚酰亚胺/聚酰胺、防焊层(solder mask)、PTFE、TEFLONTM，或适用于印刷电路板(PCB)的任何其它柔性电介质。
现在参考图4，可以以许多方式配置器件上的接地焊盘。在给定配置中使用的标准取决于设计和布图规则以及所需的接地搭接(grounding strapping)程度。装置300描述了键合于专用地线焊盘310(以虚线表示)的地线条305。键合焊盘315紧邻设置。由于通过地线条305所起的作用，贴附其上的键合线的阻抗减小。
参考图5，在根据本发明的另一实施例中，地线条可以包括延伸的突起，以使信号焊盘位于键合于封装的接地环的接地焊盘之间。装置400包括位于接地焊盘410(以虚线表示)之间的信号焊盘415。接地条405具有用于将该条键合于地线焊盘410的指状物。
图6示出了将以上实施例应用于给定器件管芯的流程图，该器件管芯具有高引脚数并被封装于相应的高焊球/引脚数的封装中。在示例性实施例中，按照一系列步骤600在器件管芯和封装上实施本发明。在605设计者在器件上限定信号和电源/地线焊盘的位置。预先的设计工作集中在最小化在器件上引起的噪声，同时提高器件的性能。在610选择用于该器件和应用的合适的封装。步骤605和610通常在硅中实施任何实际设计之前进行。然而，本发明可以应用于任何器件和封装的组合。已经限定了器件管芯焊盘布局和封装后，在615将键合地线条连接到器件地线焊盘和封装地线。根据封装类型，这些可以是键合焊盘或围绕器件管芯的地线环，如图2中的情况。此外，可以在器件/封装构造中使用多个地线条。在键合地线条之后，在620将地线条附近的器件信号焊盘引线键合到相应的封装平台。在625键合其余的信号、电源和地线焊盘。完成键合之后，在630密封该封装。
虽然已经结合几个具体的示例性实施例描述了本发明，但是本领域技术人员应认识到在不脱离本发明精神和范围的情况下可以对其进行许多改变，这在下面的权利要求中阐明。

Claims (18)

1、一种集成电路器件，包括：具有多个接地焊盘、信号焊盘和电源焊盘(125)的集成电路(140)；和用于安装该集成电路(140)的封装(100)；其中该封装包括：围绕该集成电路(140)的接地环(105)；和将接地环(105)连接到集成电路(140)的接地焊盘(120)的接地条(130)。
2、权利要求1的集成电路器件，其中该封装还包括多个焊盘平台(110)。
3、权利要求2的集成电路器件，其中用键合线(115)将该集成电路的信号焊盘(125)连接到该焊盘平台。
4、权利要求3的集成电路器件，其中该键合线(115)紧邻但不接触该接地条(130)。
5、权利要求1的集成电路器件，其中接地条包括铜导体。
6、权利要求1的集成电路器件，其中接地条包括金导体。
7、权利要求1的集成电路器件，其中接地条包括银导体。
8、权利要求1的集成电路器件，其中接地条包括铝导体。
9、权利要求1的集成电路器件，其中接地条包括从铜、金、银、铝及其合金中选择的良好导电材料的导体。
10、权利要求1的集成电路器件，其中接地条(130)还包括：提供第一导体并具有第一长度和第一横截面的第一导电材料(205)，该第一导体具有上表面和底表面。
11、权利要求10的集成电路器件，其中接地条还包括：具有第二横截面和第二长度的介电材料(220)，该第二横截面大约等于该第一导体的第一横截面，该第二长度比第一长度短，在第一长度的约中点处将该介电材料贴附在该第一导体，留下第一导体的第一间隙和第二间隙露出。
12、权利要求11的集成电路器件，其中接地条还包括：在第一间隙和第二间隙处涂敷于第一导体的第二导电材料(210)，涂敷第二导电材料以使该第二导电材料与介电材料基本齐平；并且其中以使得第一间隙连接于接地环(135)且第二间隙连接于该集成电路的接地焊盘(120)形成接地条。
13、权利要求2的集成电路器件，其中接地条还包括：提供第一导体并具有第一长度和第一横截面的第一导电材料，该第一导体具有上表面和底表面。
14、权利要求13的集成电路器件，其中接地条还包括：具有第二横截面和第二长度的介电材料，该第二横截面大约等于该第一导体的第一横截面，该第二长度比第一长度短，在第一长度的约中点处将该介电材料贴附在该第一导体，留下第一导体的第一间隙和第二间隙露出。
15、权利要求14的集成电路器件，其中接地条还包括：在第一间隙和第二间隙处涂敷于第一导体的第二导电材料，涂敷第二导电材料以使该第二导电材料与介电材料基本齐平；并且其中以使得第一间隙连接于接地环且第二间隙连接于该集成电路的接地焊盘的方式形成接地条。
16、权利要求4的集成电路器件，其中该介电材料至少选自以下之一：聚酰亚胺、聚酰胺、防焊层、PTFE和TEFLONTM。
17、权利要求1的集成电路器件，其中在该集成电路中，排列多个信号焊盘和多个接地焊盘，使得信号焊盘(415)与接地焊盘(410)相邻。
18、一种在球栅阵列封装中封装半导体器件管芯的用于控制键合线阻抗的方法(600)，该方法包括：在器件管芯上限定信号和电源/地线焊盘的位置(605)；选择用于该器件管芯的具有地线的合适的封装(610)；将地线条(615)键合到器件管芯的地线焊盘和封装地线，将器件管芯的地线(620)连接到封装地线；在地线条附近，将器件管芯的信号焊盘键合到封装平台；将器件管芯其余的信号、电源和地线焊盘(625)键合到封装平台；并密封(630)该封装。
CNA2003801055270A 2002-12-10 2003-12-04 高密度封装的互连电源和地线条及其方法 Pending CN1723557A (zh)

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