CN1685653A - Apparatus for controlling hybrid automatic repeat request in mobile communication system - Google Patents

Abstract

An apparatus for controlling a hybrid automatic repeat request (HARQ) is provided. In the apparatus, the physical layer includes a decoder for decoding a control message received via a packet data control channel, a demodulator for demodulating packet data received via a packet data channel, and a turbo decoder for decoding the demodulated packet data. The HARQ controller of the physical layer determines whether to demodulate and decode the received packet data depending on a decoding result of the control message; outputting the decoded control message to a demodulator and a turbo decoder to demodulate and decode the received packet data; controlling an output of the response signal according to a decoding result of the packet data; and transmitting the turbo-decoded packet data to an upper layer.

Description

Apparatus for controlling hybrid automatic repeat request in mobile communication system

technical field

The present invention generally relates to an apparatus and method for controlling automatic repeat request (ARQ) in a high-speed data transmission system, and in particular, the present invention relates to an apparatus and method for controlling hybrid automatic repeat request (HARQ) in a high-speed data transmission system method.

Background technique

Mobile communication systems have been developed for providing high-quality call services to mobile users. With the development of mobile communication systems, methods for transmitting larger amounts of data to users are being studied. In addition, mobile communication systems have been converted from analog systems to digital systems. Using this digital system, mobile communication systems are now able to transmit larger amounts of data to users at high speeds.

Generally, in a digital mobile communication system where the channel state changes considerably and different types of service traffic channels coexist with each other, a hybrid automatic repeat request (hereinafter referred to as "HARQ") scheme is used to meet the needs of high-speed data transmission, that is, to increase transmission throughput. In particular, with the realization of commercialization of high-speed data transmission services, for the technology of effectively applying a HARQ scheme using an error correction code with a variable coding rate rather than a HARQ scheme using an existing error correction code with a fixed coding rate Conduct active analysis and research. For the channel structure used for high-speed transmission, it is also considered to use such as 8-ary phase-shift keying (8-PSK) and 16 -ary quadrature amplitude modulation (16-QAM) high-level modulation method as a modulation scheme.

Currently, the Extended Rate 1 Code Division Multiple Access 2000 (CDMA2000 1x) Evolution Data and Voice (EV-DV) system has adopted a coding scheme using a quasi-complementary turbo code (QCTC, quasi-complementary turbo code) as its standard, the Spread Rate 1 Code Division Multiple Access 2000 Evolved Data and Voice System is a new transmission standard for the synchronous 3rd Generation Partnership Project (3GPP2) CDMA system. The quasi-complementary turbo codes provide variable coding rates to coding schemes for HARQ schemes via high-speed data, and provide improvements in soft combining performance using HARQ. In the EV-DV system, transmission/reception of packet data is performed by HARQ or fast HARQ operation of the physical layer. This will be described in detail below with reference to FIGS. 1 and 2 .

FIG. 1 is a block diagram illustrating the relationship between upper layers and physical layers for bulk ARQ processing. Referring to FIG. 1, the physical layer 110 decodes data received via a radio channel and generates decoded frame data. The physical layer 110 transfers the decoded frame data to the MAC layer 120 called an upper layer. The MAC layer 120 determines whether the decoded frame data received from the physical layer 110 has protocol data unit (MuxPDU) errors. When an error occurs, the MAC layer 120 retransmits defective data. However, when no errors occur, the MAC layer 120 sends a new frame. When processing is performed in the MAC layer 120, since data decoded in the physical layer has to be transferred to an upper layer for processing, the ARQ processing speed is undesirably lowered. In addition, since high-speed data processing must be performed, the load on the MAC layer 120 increases. Therefore, a method of performing operations performed in an upper layer in a physical layer has been proposed. Such a method provides a structure in which operations in the physical layer, ie, hardware, are performed in the same way as in software. In this context, if part of the operation shown in FIG. 1 is applied to the physical layer, a structure for performing part of the ARQ operation in the physical layer as shown in FIG. 2 is provided.

Figure 2 is a block diagram illustrating the relationship between upper layers and physical layers for improved fast (physical) HARQ processing. Referring to FIG. 2, the relationship between the upper layer and the physical layer for the improved fast HARQ process will be described below. When the structure shown in FIG. 1 is implemented in the physical layer, the structure shown in FIG. 2 is realized. It should be noted that, so far, no such structure has been proposed. In other words, it should be noted that the concept shown in Fig. 2 is expected by applying the currently proposed approach, which has not been actually implemented and the operation which will be described in the detailed description section below has not been discussed.

In FIG. 2, for fast ARQ response and processing, part of the ARQ operation performed in the MAC layer 230 is performed in the physical layer or its intermediate layer. That is, in this scheme, the physical layer 200 has a basic physical layer 210 and a HARQ controller 220 that perform the same operations as those shown in FIG. 1 . The HARQ controller 220 performs part of the operations performed in the conventional MAC layer. Accordingly, the HARQ controller 220 is structurally included in the physical layer, but performs a part of the operation of the MAC layer 230 . Since the physical layer determines the retransmission of data, the processing time of the same data is shortened.

In addition, since the physical layer can hold a soft combining value for each symbol, NAK transmission in an upper layer cannot perform soft combining of the same data. However, since the data symbols transmitted from the physical layer to the MAC layer are represented by binary values (0 or 1), although a symbol is repeated through retransmission, soft combining cannot be performed on the repeated symbols. The only method is the majority voting method, which counts the number of 0s and 1s for a symbol with a binary value, and then compares the number of 0s with the number of 1s to decide the majority symbol. However, due to its heavy computation, this method cannot be used in upper layers as well. In contrast, NAK transmission in the physical layer enables soft combining of code symbols grouped by the same encoder, which facilitates efficient utilization of channel resources. Therefore, it is better to place the HARQ controller 220 under the multiplexing sublayer 230 of the MAC layer. That is, the MAC layer preferably performs one operation of the physical layer.

This structure has a fast processing time compared to conventional ARQ control methods operating on the basis of Radio Link Protocol (RLP). A comparison will now be made with existing methods. In the conventional method shown in FIG. 1, a NAK signal is received from one packet transmission, and a maximum round-trip delay of about 200 milliseconds occurs until when a retransmission packet is sent due to the NAK signal. In contrast, in the approach shown in Figure 2, HARQ generates very short round-trip delays on the order of a few milliseconds minimum. Therefore, it has a very good structure for implementing Adaptive Modulation and Coding (AMC).

In order to actually operate HARQ having the upper layer and physical layer structures shown in FIGS. 1 and 2, a retransmission protocol of a transmitter for a retransmission request (ie, NAK transmitted from a receiver) is required. To this end, the 3GPP2CDMA2000 x1 EV-DV system uses Asynchronous and Adaptive Incremental Redundancy (AAIR), which will be described below.

The base station asynchronously performs packet transmission to the corresponding mobile station according to the quality of the forward channel. At this point, the coding rate and modulation scheme of the transport packets are adaptively applied according to the channel state. In addition, packet transmission failures during the initial transmission are retransmitted, and during the retransmission, a different code symbol pattern may be sent than in the initial transmission. Such an AAIR retransmission scheme increases a signal-to-noise ratio (SNR) of packet data due to an increase in the number of retransmissions, and increases a coding gain due to a reduction in a coding rate, thereby improving transmission/reception performance of packet data.

The channels used to transmit forward packet data in the 1x EV-DV system include the forward packet data channel (F-PDCH) for payload traffic and the forward packet data control channel (F-PDCCH) that controls the F-PDCH. ). F-PDCH is a channel used to transmit an encoder packet (EP), which is a block of transport data, and a maximum of two channels are time-division multiplexed (TDM)/code-division multiplexed ( CDM) send their encoder packets to the two mobile stations synchronously. Encoder packets are encoded by a turbo encoder, and certain encoded symbols are selected by OCTC symbol selection as subpackets with specified incremental redundancy (IR) patterns. The subpacket is a transmission unit for initial transmission and retransmission, and in each transmission, the IR mode of the subpacket is identified by a subpacket identifier (SPID). The modulation scheme (QPSK, 8PSK or 16QAM) and transmission slot length (1 , 2 or 4 time slots).

Information related to the demodulation and decoding of the F-PDCH is multiplexed with the F-PDCH through the same slot period as the other orthogonal channels, and then transmitted via the F-PDCCH channel as a control channel. The information included in the F-PDCCH is very important for the HARQ operation of the physical layer performed by the mobile station, which requires:

1) The segmented Walsh code information available for F-PDCH every tens to hundreds of milliseconds;

2) MAC_ID: MAC_ID of the mobile station assigned F-PDCH:

3) ACID: ID for identifying 4 ARQ channels (ARQ channel ID);

4) SPID: ID for identifying the IR pattern of the subpacket;

5) EP_NEW: Information used to distinguish two consecutive encoder groups in the same ARQ channel;

6) EP_SIZE: the bit size of the encoder packet;

7) LWCI (Last Walsh Code Index): Information related to Walsh codes used for F-PDCH.

Meanwhile, packet data reception in the mobile station is performed according to decoding of the F-PDCCH. The mobile station first decodes the F-PDCCH to determine whether its own packet is being transmitted, and if it is determined that the transmitted packet is its own packet, the mobile station performs demodulation and decoding on the F-PDCH. If the currently received subpacket is a retransmitted subpacket for a previously received encoder packet, the mobile station compares the currently received subpacket with the code symbols of the previously received and stored encoder packet Decoding is performed after code combination. If the decoding is successful, the mobile station sends an ACK signal via the reverse ACK/NAK transport channel (R-ACKCH), allowing the base station to send subpackets for the next encoder packet. If the decoding is unsuccessful, the mobile station sends a NAK signal, requesting the base station to send a subpacket of the same encoder packet.

A unit in which the HARQ operation of the physical layer is performed on one encoder packet is called an 'ARQ channel'. In the CDMA2000 1x EV-DV system, up to 4 ARQ channels can be operated simultaneously, which is called "N = 4 fast HARD channels".

In the 1x EV-DV standard, it is assumed that the mobile station will provide the base station with the ACK/NAK delay required to perform the packet reception operation and transmit the ACK/NAK by the mobile station, and the number of simultaneously available ARQ channels, and this becomes the mobile Implementation points of the platform. Therefore, the possible ACK/NAK delays supported by the mobile station are 1 slot (=1.25 ms) or 2 slots (2.5 ms), and the possible number of ARQ channels is 2, 3 or 4. Referring to FIGS. 3 and 4, a description will be given below of operations in terms of ACK/NAK delay and the number of ARQ channels.

Fig. 3 is a timing diagram between the base station and the mobile station for ACK/NAK delay in HARQ=1 time slot in the mobile communication system, and Fig. 4 is for ACK/NAK delay in HARQ in the mobile communication system=2 hours Sequence diagram between the base station and the mobile station of the slot.

In FIGS. 3 and 4 it is assumed that a forward packet data channel (F-PDCH) is assigned to the mobile station. In addition, for convenience of explanation, slots of both the base station (BS) and the mobile station (MS) are sequentially assigned indices starting from the 0th slot starting at a certain time. In addition, in FIG. 3 and FIG. 4 , A(x, y) has the following meanings. The hatched portion represents data to be transmitted to mobile station A. FIG. In addition, "x" indicates an ARQ channel, and "y" indicates an index for distinguishing IR modes of the same encoder group. Based on this, a description will be given below of FIG. 3 in which the ACK/NAK delay is 1 slot.

Referring to FIG. 3, at time slot 0, data from the base station is sent to mobile station A. Then, mobile station A receives the packet data in the same time slot. In FIGS. 3 and 4, since a transmission delay occurs between the mobile station and the base station based on absolute time, the base station and the mobile station have different slot start points. At this point, the base station transmits packet data and packet data control signals via a forward packet data channel (F-PDCH) and a forward packet data control channel (F-PDCCH), respectively. Then, the mobile station A determines whether there is an error in the data for the 1-slot processing time, and thereafter transmits ACK or NAK to the base station. "Processing time" refers to the time required to perform demodulation and decoding on received packet data for one slot and transmit the result via a reverse channel (R-ACKCH) in the next slot. For example, in Figure 3, a NAK is sent. The base station then receives the NAK at the third slot and schedules retransmission of the defective data at the fourth slot. Thereafter, the base station transmits data of different modes for the same encoder group according to the scheduling result.

Figure 4 in which the ACK/NAK delay is 2 slots is described below. It is assumed in FIG. 4 that an error has occurred in the first data packet among the data packets transmitted from the base station to the mobile station A, and the description will focus on the first data packet. Since the delay time is 2 slots, the base station continuously transmits packet data to the mobile station at the 0th slot, the 1st slot, and the 2nd slot. Then, the mobile station checks the error of the data sent in the 0th time slot in the cycle of the 1st to the 2nd time slot, and checks the error of the data sent in the 1st time slot in the cycle of the 2nd to the 3rd time slot, The data transmitted in the 2nd slot is checked for errors in the period from the 3rd to the 4th slot. Send the ACK/NAK for the data received in the 0th slot in the 3rd slot, send the ACK/NAK for the data received in the 1st slot in the 4th slot, and send it in the 5th slot ACK/NAK for data received in slot 2. If the base station receives a NAK for the packet data transmitted at the 0th slot at the 4th slot, at the next slot, the base station performs retransmission of the encoder packet transmitted at the 0th slot. The retransmitted packet data is the same packet data as the previously transmitted packet data, but with a different IR pattern.

As can be understood from FIGS. 3 and 4, the mobile station performs synchronous ACK/NAK transmission in which the mobile station must transmit ACK/NAK for a received packet after 1 slot or 2 slots have elapsed. The base station performs asynchronous ACK/NAK transmission, where the base station can transmit a packet at any time slot after receiving the ACK/NAK of a packet previously transmitted by the mobile station for the same ARQ channel.

Additionally, Figures 3 and 4 illustrate 1-channel ARQ operation and 4-channel ARQ operation, respectively. In the 1-channel ARQ operation shown in FIG. 3, sending data to a mobile station only uses part of base station resources, reducing the packet data rate of the corresponding mobile station. On the contrary, in the 4-channel ARQ operation shown in FIG. 4, one mobile station can use all the resources of the base station, so that the corresponding mobile station can obtain the maximum packet data rate.

As mentioned above, fast ARQ response and processing can be enabled under the multiplexing layer by moving the ARQ control implemented in the conventional upper layer. However, this is only a standard logical solution, and the following problems may arise in actual implementation.

First, most current systems implement the upper layers including the multiplexing layer by software loaded in a central processing unit (CPU). However, in the case of a mobile station, its CPU does not have high processing speed and capability. Therefore, when implementing the HARQ protocol that requires a fast response in the CPU, an overload occurs in the clock of the CPU. As a result, the mobile station cannot perform its normal operation. Especially when the power consumption of the mobile station is the implementation limiting factor of the system, this problem is a big obstacle to the implementation.

Second, it is necessary to reduce transmission interruption of encoded data that forces the CPU to be overloaded and processing delay due to the interruption in order to process high-speed transmission data. Therefore, a method should be considered to reduce the interruption of data processing that may occur every 1.25 milliseconds.

Third, in order to support N-channel HARQ, N independent HARQ controllers are required. Therefore, if N increases, the number of HARQ controllers also increases, resulting in increased power consumption and complexity. Thus, in implementation, the number of HARQ controllers must be minimized.

Fourth, in order to support N-channel HARQ, N independent turbo decoders are required. Therefore, if N increases, the number of turbo decoders also increases, resulting in increased power consumption and complexity. Thus, in implementation, the number of turbo decoders must be minimized.

Fifth, the ACK_DELAY=1 slot and ACK_DELAY=2 slot described in connection with Figures 3 and 4 are exclusive options in the standard. However, when implementing a mobile station, a structure in which the operation clock of the mobile station is changed by selectively demultiplexing/multiplexing the operation clock for low power consumption is considered, so it is necessary to design a The mobile station structure in which all ACK_DELAYs are applied in the mobile station.

Sixth, unlike conventional data traffic, an encoder packet, which is a data block transmitted via a forward packet data channel (F-PDCH), can change its transmission scheme every 1.25 milliseconds. Therefore, there is a need for a new structure for sending channel structure information every 1.25 milliseconds, which is sent once during data channel setup.

Finally, other control information required by the mobile station is sent by the base station via the Forward Packet Data Control Channel (F-PDCCH) as a traffic control channel. Therefore, the mobile station must efficiently perform an operation of detecting control information and transmitting the detected control information to an upper layer in a short time.

Contents of the invention

Accordingly, an object of the present invention is to provide an apparatus and method for solving the problems of the conventional technology.

Another object of the present invention is to provide an apparatus and method for reducing CPU load.

Still another object of the present invention is to provide an apparatus and method for reducing power consumption of a mobile station in a HARQ control apparatus.

Still another object of the present invention is to provide an apparatus and method for reducing the CPU load caused by the maximum driving clock in the HARQ control apparatus.

Still another object of the present invention is to provide an apparatus and method for reducing data processing time in a HARQ control apparatus.

Still another object of the present invention is to provide a simple control device and method independent of the number of channels when N-channel HARQ is supported in the HARQ control device.

Still another object of the present invention is to provide a control device and method for preventing complexity increase in a HARQ control device according to the number of channels.

Still another object of the present invention is to provide an apparatus and method for processing all received packets regardless of the number of channels, using a small number of turbo decoders.

Another object of the present invention is to provide an apparatus and method capable of supporting ACK_DELAY=1 time slot and ACK_DELAY=2 time slots.

Still another object of the present invention is to provide an apparatus and method for controlling calculation and setting of control channel parameters generated per time slot after initial setting of a Packet Data Channel (PDCH).

Still another object of the present invention is to provide an apparatus and method for calculating and modifying parameters for demodulating and decoding traffic channels in a communication system.

Yet another object of the present invention is to provide an apparatus and method for quickly transmitting control information of a traffic control channel to an upper layer.

In order to basically achieve the above and other objects, there is provided a method for decoding a control message received via a packet data control channel in a mobile communication system, demodulating and decoding packet data according to an encoding result of the packet data control channel, generating the decoding result as A response signal, and a device for transmitting the response signal, the mobile communication system simultaneously transmits a control message via a packet data control channel and transmits packet data via a packet data channel, and supports hybrid automatic repeat request (HARQ). The apparatus comprises: a physical layer comprising a decoder for decoding control messages received via a packet data control channel, a demodulator for demodulating packet data received via a packet data channel, and a demodulator for decoding demodulated a turbo decoder of the packet data; and a HARQ controller of the physical layer for determining whether to demodulate and decode the received packet data depending on the decoding result of the control message, which will be decoded during the demodulation and decoding of the received packet data The control message is output to the demodulator and the turbo decoder, the output of the response signal is controlled according to the decoding result of the packet data, and the turbo-decoded packet data is transferred to the upper layer.

The physical layer HARQ controller includes a HARQ state machine for controlling transitions of states including an initial state for initializing parameters while waiting for a control message to be received via a packet data control channel received from the physical layer, with A decoding state for decoding said control message, a control state for calculating a decoding result, a demodulation state for demodulating packet data on a packet data channel, a decoding state for turbo decoding demodulated packet data , and a response state for sending turbo decoding results; and a state functional unit for controlling the state transition of the HARQ state machine depending on the processing result of the physical layer

Additionally, the apparatus includes a data path processor for controlling the processing path of data received via the packet data channel.

Also, the apparatus includes an output buffer controller for controlling an output buffer of a physical layer storing data obtained by demodulating and decoding data received via a packet data channel .

Preferably, the HARQ state machines are paired.

If the response delay time includes 2 slots, each of the paired HARQ state machines alternately controls a state transition for 2 slots for data received via the packet data channel.

If the response delay time includes 2 time slots, the HARQ state machine control transitions to a waiting state for waiting for the completion of turbo decoding performed by the turbo decoder at the physical layer when the turbo decoder is working.

The state function part includes: a first state processor, used to perform the control operation of the associated paired HARQ state machine in the initial state; a second state processor, used to perform the control operation of the HARQ state machine in the control state; The third state processor is used to execute the control operation of the HARQ state machine in the demodulation state; the fourth state processor is used to execute the control operation of the HARQ state machine in the waiting state; the fifth state processor is used to execute The control operation of the HARQ state machine in the decoding state; the sixth state processor is used to perform the control operation of the associated HARQ state machine in the response state.

The physical layer includes a data channel turbo decoder.

In order to substantially achieve the above and other objects, there is provided an operation for controlling packet data and control messages received in a physical layer in a mobile communication system to decode a control message received via a packet data channel, according to a packet data control channel A method of demodulating and decoding packet data by a decoding result, generating a decoding result as a response signal, and transmitting the response signal, and a hybrid automatic repeat request (HARQ) controller included in a physical layer, the mobile communication system simultaneously via packet The data control channel transmits control messages and packet data via the packet data channel and supports hybrid automatic repeat requests. The method comprises the steps of: (a) initializing the parameters of the HARQ controller in the physical layer during the initial drive, and controlling the decoding of the received control message when the control message is received; (b) controlling the channel according to the packet data The decoding result calculates the parameters of the control message, and executes the fast HARQ protocol; (c) controls the demodulation of the packet data received via the packet data channel according to the calculated parameters; (d) controls the demodulation of the demodulated data according to the calculated parameters turbo decoding; and (e) transmitting the error check result of the turbo decoded data.

Furthermore, if the calculated parameters include non-creatable parameters, the method includes the step of refraining from executing the subsequent state and returning to step (a).

Furthermore, if the calculated parameter is a non-creatable parameter, the method includes the steps of determining whether said parameter is a message for controlling hold mode/unit switching; and if said parameter is a message for controlling hold mode/unit switching message, the method includes the step of transmitting the message to an upper layer.

Furthermore, if said parameter is not a message for controlling the hold mode/unit transition, the method comprises the step of transitioning to the initial state.

Furthermore, if the data channel turbo decoder of the physical layer is in use, the method includes the step of waiting until the data channel turbo decoder is out of use and then proceeding to step (d).

Description of drawings

The above and other objects, features and advantages of the present invention will become more apparent through the following detailed description in conjunction with the accompanying drawings, wherein:

1 is a block diagram illustrating the relationship between an upper layer and a physical layer for automatic repeat request (ARQ) according to the prior art;

Figure 2 is a block diagram illustrating the relationship between upper layers and physical layers for improved fast (physical) Hybrid Automatic Repeat Request (HARQ) processing;

3 is a sequence diagram illustrating a relationship between a base station and a mobile station for ACK/NAK delay=1 slot in HARQ in a mobile communication system;

4 is a sequence diagram illustrating a relationship between a base station and a mobile station for ACK/NAK delay=2 slots in HARQ in a mobile communication system;

5 is a block diagram illustrating interfaces between peripheral blocks centered on a HARQ controller according to one embodiment of the present invention;

FIG. 6 is a block diagram illustrating the relationship between a HARQ state machine and state functional components in a HARQ controller according to one embodiment of the present invention;

FIG. 7 is a state transition diagram illustrating a HARQ controller according to one embodiment of the present invention;

8 is a timing diagram illustrating the operation of the first and second HARQ state machines for ACK/NAK delay = 1 slot;

9 is a timing diagram illustrating the operation of the first and second HARQ state machines for ACK/NAK delay=2 slots;

FIG. 10 is a timing diagram illustrating activation control of the first and second HARQ state machines for ACK/NAK delay=1 time slot according to one embodiment of the present invention;

FIG. 11 is a timing diagram illustrating activation control of the first and second HARQ state machines for ACK/NAK delay=2 time slots according to one embodiment of the present invention;

FIG. 12 is a timing diagram illustrating a state transition of the first HARQ state machine for ACK/NAK delay=1 time slot according to one embodiment of the present invention;

FIG. 13 is a timing diagram illustrating state transitions of the first HARQ state machine and the second HARQ state machine for ACK/NAK delay=2 time slots according to one embodiment of the present invention;

FIG. 14 is a block diagram illustrating a control flow between a HARQ controller and its peripherals according to one embodiment of the invention; and

FIG. 15 is a flowchart illustrating a process of controlling various states by a HARQ controller during data reception according to one embodiment of the present invention.

Detailed ways

Embodiments of the present invention will be described in detail below with reference to the accompanying drawings. In the drawings, the same or similar elements are denoted by the same reference numerals even if they appear in different drawings. In the following description, detailed descriptions of well-known functions and structures incorporated herein will be omitted for conciseness.

The apparatus and method of the present invention for solving the aforementioned problems are now described.

First, most systems implement the upper layers, including the multiplexing layer, by software loaded into a central processing unit (CPU). Therefore, the present invention proposes a method of implementing a hybrid automatic repeat request (HARQ) controller of the physical layer by hardware in order to solve the power consumption problem and the maximum driving clock problem of the mobile station and reduce the overload of the CPU. The basic structure of the proposed HARQ controller in the embodiments of the present invention can be implemented by software if it can be implemented by software due to the good performance of the CPU or DSP without affecting its performance. Here, the present invention will be described assuming that the HARQ controller is implemented by hardware.

Second, the present invention enables high-speed data processing by reducing transmission interruptions of encoded data that force CPU overload and processing delays due to such interruptions. For this purpose, an output buffer controller (OBUFC) is separately installed in the HARQ controller. The output buffer controller is fully responsible for sending data from the channel decoder to the CPU (or host). In particular, the output buffer controller is capable of controlling a storage time of decoded data preset at the request of the CPU and adjusting a transmission time of transmission data so as to satisfy a minimum transmission interruption interval desired by the CPU.

Third, to support N-channel HARQ, N independent fast HARQ controllers are required. However, an embodiment of the present invention proposes a structure capable of always processing all received packets irrespective of the number of channels, using 2 HARQ controllers. Therefore, an increase in power consumption and complexity can be avoided regardless of an increase in the number of channels. To this end, the structure includes two state machines: an odd state machine and an even state machine, in addition to a controller for controlling said state machines.

Fourth, in order to support N-channel HARQ, N independent turbo decoders are required. However, an embodiment of the present invention proposes a structure capable of processing all received packets irrespective of the number of channels by using one turbo decoder. Therefore, power consumption and circuit complexity can be reduced regardless of an increase in the number of channels. To this end, an embodiment of the present invention proposes a method in which a HARQ controller adaptively determines/controls a start signal and a stop signal for decoding of one turbo decoder. Also, in this structure, a "wait state" is added for each state machine.

Fifth, the embodiments of the present invention implement a HARQ controller supporting both ACK_DELAY delay=1 slot and ACK_DELAY delay=2 slots. Since when implementing the mobile station, a structure of changing the operating clock of the mobile station by selectively demultiplexing/multiplexing the operating clock for low power consumption is considered, so the state function of the HARQ controller is provided and state machine to support two modes in which all ACK_DELAYs can be applied in one mobile station.

Sixth, unlike conventional data traffic, an encoder packet, which is a data block transmitted via a forward packet data channel (F-PDCH), can change its transmission scheme every 1.25 milliseconds. Therefore, typically the CPU is only involved in the initial setup to deliver the channel structure information sent during data channel setup every 1.25 milliseconds. In addition, calculation and setting of control channel parameters generated at each slot, and calculation and modification of parameters for demodulation and decoding of traffic channels are performed in the HARQ controller.

Seventh, control information necessary for the application mobile station, which is transmitted by the base station via the Forward Packet Data Control Channel (F-PDCCH) as a traffic control channel, is detected and then transmitted to the upper layer of the CPU in a short time. In addition, the message detection result is reflected in the state machine, and the state function of the detection result according to the provided information is defined.

Functions of the HARQ controller

Upon receiving evolution data and voice (EV-DV) (forward link RC-10) packet data, the HARQ controller controls the operation of each block related to the received packet data. Each block related to the reception of packet data operates under the control of the HARQ controller, and after the corresponding operation is completed, the HARQ controller is notified that the corresponding operation has been completed. The HARQ controller uses the operation completion information from each block to execute the next operation. In addition, the HARQ controller stores the input and internal information from each block in its registers. Thereby, the HARQ controller can monitor the progress of the HARQ operation. The control of each block performed by the HARQ controller is mainly timing control of performing HARQ operations within a given time, and does not include control of unique operations of each block. In addition, the HARQ controller uses received information on a forward packet data control channel (F-PDCCH) and internal information to determine whether it will perform normal mode operation or abnormal mode operation. The HARQ controller performs an operation based on the determination result. The abnormal mode of operation is caused by errors existing in the wireless channel state and is used to improve data reception performance.

Typical functions of the HARQ controller according to the present invention are as follows:

(1) The HARQ controller determines whether it will operate in a normal mode or an abnormal mode based on a received message on the F-PDCCH and internal information of the HARQ controller.

(2) The HARQ controller controls the demodulation and turbo decoding operations on the F-PDCH according to the operation mode.

(3) The HARQ controller determines the information (ACK/NAK or inhibit) to be transmitted via the uplink response channel (R-ACKCH).

(4) The HARQ controller generates an interrupt to the upper layer in order to transfer the received data to the output buffer of the turbo decoder.

(5) The HARQ controller continuously stores and updates the relevant information of each Automatic Repeat Request (ARQ) channel.

(6) The HARQ controller supports up to 4 ARQ channels.

(7) The HARQ controller supports all control operations in cases where the ACK/NAK delay is 1 slot and 2 slots.

FIG. 5 is a block diagram illustrating a HARQ controller for processing an operation of an upper layer through a physical layer, and interfaces between a plurality of peripheral blocks centered on the HARQ controller. Referring to FIG. 5, various blocks connected to the HARQ controller according to an embodiment of the present invention, as well as the internal structure and operation of the HARQ controller will be described below.

The HARQ controller 300 includes two HARQ state machines (OHSM/EHSM) 310 , a HARQ register (HARQC_REG) 320 , a state function and data path controller 330 and an output buffer controller 340 . HARQ operation is controlled by HARQ state machine 310 and state function and datapath controller 330 among components of HARQ controller 300 . An output buffer connected to a data channel turbo decoder 430 which will be described below is controlled by an output buffer controller 340 . Connections of signals input/output to/from the HARQ controller 300 are schematically illustrated in FIG. 5 . That is, signals output from specific internal blocks are not shown. Now, referring to the accompanying drawings, various internal structures of the HARQ controller 300 shown in FIG. 5 and their connections will be described.

The HARQ controller 300 is connected to a processor (CPU or host) 400 and can exchange data via a data bus 450 and an address bus 460 . In addition, the HARQ controller 300 can send an interrupt signal to the processor 400 via an interrupt line. The HARQ controller 300 is connected to a control channel decoder (PDCCH_DEC) 410 for decoding data transmitted on the packet data control channel, controls the on/off operation of the control channel decoder 410, and provides The decoding parameters of the data. A control channel decoder 410 for decoding data on a packet data control channel (PDCCH) decodes data on a packet data control channel according to parameters received from the HARQ controller 300, and then transmits the decoded data to the HARQ Controller 300.

The HARQ controller 300 is connected to a data channel demodulator (PDCH_DEMOD) 420 for demodulating data transmitted on a packet data channel, controls the on/off operation of the data channel demodulator 420, and sets the demodulation parameter and control signals are provided to the data channel demodulator 420. Then, the data channel demodulator 420 demodulates the data transmitted on the packet data channel, transmits the demodulated data to the HARQ controller 300 , and provides system time data to the HARQ controller 300 .

Embodiments of the present invention provide a controller operating in an EV-DV system. Therefore, data transmitted from the EV-DV system is basically turbo encoded by a turbo encoder before transmission. Accordingly, the HARQ controller 300 is connected to a data channel turbo decoder (PDCH_TURBO) 430 for decoding data transmitted on the packet data channel, and performs an on/off operation of the data channel turbo decoder 430 . In addition, the HARQ controller 300 provides the data channel turbo decoder 430 with an intentional stop signal, turbo decoding parameters and control signals, and buffer control parameters and control signals. Then, the data channel turbo decoder 430 turbo-decodes data on the packet data channel based on various parameters and control signals received from the HARQ controller 300, and provides the HARQ controller 300 with a turbo decoding completion signal, a CRC result signal, and a decoding status signal. In addition, the data channel turbo decoder 430 is connected to the data bus and the address bus to store/read data to/from a memory (not shown). The HARQ controller 300 performs a control operation on an operation of transferring data stored in a buffer connected to the turbo decoder 430 to the processor 400 .

The HARQ controller 300 is connected to the response signal transmitter (RACK_TX) 440, and performs ACK/NAK and inhibit control on the received data on the packet data channel according to its decoding result. In addition, the response signal transmitter 440 outputs transmission timing information to the HARQ controller 300 .

Operations and states of the HARQ controller 300 will be described below with reference to Table 1.

Table 1 state describe ACK_DELAY (time slot) S1 WAITING_FOR_PDCCH_DEC_DONE A state where the HARQ controller waits to receive PDCCH_DEC_DONED from PDCCH_DEC. 1&2 S2 DEMOD_SIG_GEN where the HARQ controller calculates the status of parameters for new/continue decision of subpacket, extraction of signaling message and PDCH demodulation. 1&2 S3 PDCH_DEMOD A state where the HARQ controller performs PDCH demodulation. 1&2 S4 WAITING_FOR_TURBO_DECODER_TO_USE where the HARQ controller is waiting to use the state of the TURBO decoder. 2 S5 TURBO_DECODING A state in which the HARQ controller transmits a decoding start signal and necessary parameters to the PDCH Turbo decoder and waits for the completion of decoding. 1&2 S6 ACK_NAK_TRANSMISSION The state where the HARQ controller transmits ACK/NAK via the reverse channel after PDCH Turbo decoding is completed. 1&2

In Table 1, each state S1, S2, S3, S4, S5, and S6 represents a plurality of states defined in the order of an operation performed in the HARQ controller 300 at a certain time and a next operation performed thereafter. Each state S1, S2, S3, S4, S5, and S6 has a correlation between the previous operation and the next operation. In addition, Table 1 illustrates the states required when the ACK/NAK delay is 1 slot and the states required when the ACK/NAK delay is 2 slots. For example, the fourth state S4 represents the state required only when the ACK/NAK delay is 2 slots. Each state shown in Table 1 will be described below.

The first state S1 is the initial state when a packet data control channel message matching the MACID in the control data transmitted on the packet data control channel (PDCCH) is received, or a predetermined control message to be sent from the base station to the mobile station is received. message, execute the initial state. When the HARQ controller 300 enters the first state S1, it waits for the completion of the decoding of the control data transmitted on the packet data control channel. This is because the data channel demodulator 420 is capable of demodulating data on the packet data channel using control data on the packet data control channel. In addition, the HARQ controller 300 performs a register initialization operation in the first state S1, and then transitions to the second state S2 when decoding of the packet data control channel is completed.

In the second state S2, the HARQ controller 300 calculates parameters for demodulating the packet data channel using various messages received as a decoding result of the first state S1. The second state S2 becomes 'HARQ control state'. Furthermore, in the second state S2, the HARQ controller 300 handles the HARQ protocol in the physical layer. That is, in the second state S2, the HARQ controller 300 calculates the demodulation level and the number of Walsh code channels required for demodulation, and transmits the result to the data channel demodulator 420 . In addition, in the second state S2, the HARQ controller 300 determines that the subpacket received via the packet data channel is new data (initially transmitted data ) or retransmitted data. Also, when an upper layer control message (or signal message) is detected from the decoding result of the packet data control channel, the HARQ controller 300 directly determines ACK/NAK transmission without considering other processes. Furthermore, in the second state S2, the HARQ controller 300 performs an invalid test, and if it is determined that a message that the base station cannot transmit is received, the HARQ controller 300 returns to the initial state, the first state S1.

In the third state S3, the HARQ controller 300 controls the data channel demodulator 420 to demodulate the data transmitted on the packet data control channel. The third state S3 is the 'demodulation state'. In this demodulation state, the parameters for the demodulation of the initial transmission data or the detection result of the retransmission data detected in the second state S2 are provided to the data channel demodulator 420, so as to upload data on the packet data channel The sent subpackets are demodulated. Therefore, the HARQ controller 300 provides parameters required for demodulation to the data channel demodulator 420, and then waits until the demodulation is completed. If the demodulation is completed, the HARQ controller 300 will transition to the fourth state S4 or the fifth state S5 according to the number of slots for ACK/NAK delay.

In one particular case, the HARQ controller 300 transitions to a fourth state S4. The fourth state S4 is a 'waiting state' in which the HARQ controller 300 performs wait. This control state needs to be maintained only when the ACK/NAK delay is 2 slots, because only when the ACK/NAK delay is 1 slot, the data channel turbo decoder 430 has to decode new data every slot . However, when the ACK/NAK delay is 2 slots, the data channel turbo decoder 430 may be in the process of decoding data received in the previous slot. In this case, the HARQ controller 300 has to wait until the operation of the data channel turbo decoder 430 is completed. Furthermore, since only one data channel turbo decoder 430 is used in the embodiment of the present invention, this state is necessary to avoid data collision when the ACK/NAK delay is 2 slots. That is, by using the fourth state S4, even when the ACK/NAK delay is 2 slots, multiple packet data channels can be processed using one turbo decoder. While the HARQ controller 300 is waiting in the fourth state S4, if the data channel turbo decoder 430 becomes available, the HARQ controller 300 will transition to the fifth state S5.

In the fifth state S5, the HARQ controller 300 controls turbo decoding. The fifth state S5 becomes the 'decoding state'. That is, in the fifth state S5, the HARQ controller 300 provides various information required for turbo decoding to the data channel turbo decoder 430 . The information needed for Turbo decoding can be made into ACID or the size of the Encoder Packet (EP). The HARQ controller 300 provides the above information to the data channel turbo decoder 430, and then waits until the decoding operation is completed. However, there is also a case in which turbo decoding takes a very long time to be performed or turbo decoding must be performed early using other information. In this case, the HARQ controller 300 can forcibly stop turbo decoding by outputting an intentional stop signal. When the turbo decoding is completed or intentionally ended, the HARQ controller 300 transitions to the sixth state S6.

In the sixth state S6, the HARQ controller 300 transmits a response signal (ACK/NAK) to the subpacket received via the reverse channel according to the decoding result of the data channel turbo decoder 430 . That is, the sixth state S6 is a "response signal (ACK/NAK) transmission state". Therefore, the HARQ controller 300 controls the response signal transmitter 440, and as a decoding result, if there is no error, the HARQ controller 300 transmits ACK via a reverse channel. On the contrary, if an error occurs, the HARQ controller 300 transmits a NAK via a reverse channel. Since the sixth state S6 is the last state of the HARQ controller 300, the HARQ controller 300 transitions to the first state S1 after transmitting the decoding result, and waits for processing of the next state again in the initial state. When the ACK/NAK delay is 2 slots, the HARQ controller 300 includes two HARQ state machines 310 . In this case, the two HARQ state machines 310 may execute the first state S1 or the sixth state S6 at the same time. However, the other states S2, S3, S4 and S5 must not be used at the same time.

The internal structure of the HARQ controller 300 will be described below. FIG. 6 is a block diagram illustrating connections between a HARQ state machine and state functional components in a HARQ controller according to an embodiment of the present invention. The connection between the HARQ state machine and the state function components according to the embodiment of the present invention will be described below with reference to FIG. 6 .

In FIG. 6 , state function 335 represents a state function separate from state function and datapath controller 330 shown in FIG. 5 . The HARQ state machine 310 controls the state transition from the first state S1 to the sixth state S6 according to the HARQ control flow. That is, the HARQ state machine 310 outputs a state transition signal. The state function section 335 controls other blocks (local function blocks) 401, . . . , 403 so as to control control operations performed in the respective states. In addition to the HARQ controller 300, other blocks 401, ..., 403 shown in Figure 6 may include the processor 400 shown in Figure 5 and the control channel decoder 410 to the response signal transmitter 440, and may also be included in Figure 5 other blocks not shown. That is, the status function part 335 receives a status signal output from the HARQ state machine 310, and controls operations depending on the status signal.

The HARQ state machine 310 receives information about the current state and whether the ACK/NAK delay is 1 slot or 2 slots, and also receives the operation completion signal Fi_DONE from the status function 335 . Since two HARQ state machines 310 are provided when the ACK/NAK delay is 2 slots, an operation complete signal is applied to each HARQ state machine 310 . When an operation complete signal is received, the HARQ state machine 310 outputs a next state signal. At this point, since two HARQ state machines 310 are provided when the ACK/NAK delay is 2 slots, each HARQ state machine 310 outputs corresponding state information. In addition, the HARQ state machine 310 outputs a state enable signal Si_EN to the state function part 335 to perform a control operation according to the state information and the corresponding state.

That is, the HARQ state machines 310 differ in their number and operation depending on whether the ACK/NAK delay is 1 slot or 2 slots. Here, an embodiment of the present invention will be described in detail with reference to the case when the number of HARQ state machines is 1 or 2.

When the ACK/NAK delay is 1 slot, a HARQ state machine 310 is provided whereby only the state function 335 outputs a state enable signal. Additionally, only one operation complete signal is provided from state function 335 to HARQ state machine 310 . However, when the ACK/NAK delay is 2 slots, two HARQ state machines 310 are provided. In this case, the HARQ state machine 310 is divided into a first HARQ state machine (or odd HARQ state machine (OHSM)) and a second HARQ state machine (or even HARQ state machine (EHSM)). The first and second HARQ state machines have the same structure. Compared with the case where only one HARQ state machine is provided, a fourth state S4 as shown in Table 1 is further provided. That is, the first and second HARQ state machines perform the same operation in that they generate the same output in response to the same input. However, this does not mean that the two HARQ state machines are identical in state progression. That is, the OHSM and EHSM used vary according to ACK/NAK delay, as shown in Table 2 below.

Table 2 ACK_DELAY # of the state machine that will be used 1 1 (OHSM) 2 2 (OHSM, EHSM)

When this is implemented in the mobile station, 2 HARQ state machines are provided for both receiving ACK/NAK delay = 1 slot and ACK/NAK delay = 2 slots, and for ACK/NAK delay = 1 For time slots, only one HARQ state machine is enabled and the fourth state S4 is preferably excluded.

Now, state transition of each state will be described with reference to FIG. 7 . Fig. 7 is a state transition diagram of a HARQ controller according to an embodiment of the present invention.

As described in connection with Table 1, the first state S1 represents a state in which, after initializing the registers, the HARQ controller 300 is waiting for completion of packet data control channel decoding. In FIG. 7, step 500 represents a state in which the HARQ controller 300 is waiting while maintaining the first state S1. If a decoding completion signal of the packet data control channel is received from the state function part 335 while the waiting state is maintained, it transitions to the second state S2 in step 502 . When a transition to the second state S2 occurs, the HARQ state machine 310 uses the decoding result of the packet data control channel in the first state S1 in step 506 to calculate parameters such as modulation levels and Walsb codes required for demodulation. Furthermore, in the second state S2, the calculated parameters are checked for errors. As a result of this error check, if a parameter error is detected, the HARQ state machine 310 proceeds to step 504 in which the occurrence of the parameter error is notified, and then transitions back to the first state S1 (step 500). On the contrary, when no error occurs in the calculated parameters, the HARQ state machine 310 proceeds to step 508, wherein it detects the correct parameters of the packet data channel, and transmits the detected parameters to the state function part 335, and then changes to the third state S3. As a result of the parameter calculation in step 506, if the received message is the Control Hold Mode/Cell Switching (CHM/CS) associated with the signal message, then the HARQ state machine 310 does not change to the third State S3 instead transitions to a sixth state S6.

If a transition to the third state S3 has occurred, the HARQ state machine 310 demodulates the packet data channel at step 512 . The demodulation is controlled by the state function 335, and the HARQ state machine 310 waits for the demodulation to complete. Thereafter, if demodulation is completed, the HARQ state machine 310 performs state transition according to whether ACK/NAK delay=1 slot or 2 slots. If the ACK/NAK delay is 1 slot, the HARQ state machine 310 proceeds to step 516 where it transitions to the fifth state S5. If the ACK/NAK delay is 2 slots, the HARQ state machine 310 proceeds to step 514 where it transitions to a fourth state S4. Firstly, the ACK/NAK delay is 2 time slots, that is, the HARQ state machine 310 proceeds to step 514 and changes to the fourth state S4.

When the transition to the fourth state S4 occurs, the first or second HARQ state machine remains in a waiting state since the data channel turbo decoder 430 is not being used by the HARQ state machine itself but by another HARQ state machine. When the other HARQ state machine terminates using the data channel turbo decoder 430, the first or second HARQ state machine transitions to the fifth state S5 at step 520.

If a transition from the third state S3 or the fourth state S4 to the fifth state S5 has occurred, the HARQ state machine 310 waits at step 522 for the completion of turbo decoding. At this point, turbo decoding is controlled by state function 335. If a turbo decoding complete signal is received from the state function part 335, the HARQ state machine 310 proceeds to step 524 and transitions therein to the sixth state S6. As described in connection with Table 1, the sixth state S6 represents the step in which ACK/NAK is sent. If a transition to the sixth state S6 occurs, the state function part 335 controls the response signal transmitter 440 to transmit ACK or NAK via the reverse channel according to the turbo decoding result. If the transmission of ACK or NAK is completed, the state function part 335 outputs an ACK/NAK transmission complete signal to the HARQ state machine 310 . As a result, the HARQ state machine 310 proceeds to step 528 where it maintains the first state S1.

Now, the operation timing of the ACK/NAK delay based HARQ state machine 310 will be described with reference to the accompanying drawings. Fig. 8 is the operation sequence diagram of the first or the second HARQ state machine for ACK/NAK delay=1 time slot, and Fig. 9 is the first or the second HARQ state machine for ACK/NAK delay=2 time slots Operation sequence diagram.

Referring to FIG. 8, the case when the ACK/NAK delay is 1 slot will be described. In FIG. 8, if the decoding operation of the Kth data packet control channel (PDCCH) is completed, a decoding completion signal is sent to the first HARQ state machine OHSM. Then, the first HARQ state machine OHSM controls the state transition in response to the Kth signal. If the decoding completion signal of the (K+1)th packet data control channel is received again in the next time slot, the first HARQ state machine OHSM responds to the signal to control the next state transition. That is, when the ACK/NAK delay is 1 slot, the second HARQ state machine EHSM does not perform an operation.

Referring to FIG. 9, the case when the ACK/NAK delay is 2 slots will be described. In FIG. 9, if the decoding operation of the Kth packet data control channel (PDCCH) has been completed, a decoding completion signal is sent to the first HARQ state machine OHSM. Then, the first HARQ state machine OHSM controls the transition from the first state S1 to the sixth state S6 for 2 slot periods, ie for the Kth and (K+1)th slots. In addition, the operation in each state is controlled by the state function part 335 according to the state transition signal from the first HARQ state machine OHSM. If the decoding operation of the (K+1)th packet data control channel (PDCCH) is completed, a decoding completion signal is sent to the second HARQ state machine EHSM. Therefore, the second HARQ state machine EHSM controls the transition from the first state S1 to the sixth state S6 for 2 slot periods, ie (K+1)th and (K+2)th slots. As shown in FIG. 9, if no packet data control channel signal is received in the (K+2)th time slot, the first HARQ state machine OHSM remains in an idle state. Thereafter, if the packet data control channel signal is received in the (K+3)th time slot, the second HARQ state machine EHSM works. The first HARQ state machine OHSM and the second HARQ state machine EHSM work in this order.

In order for the first HARQ state machine OHSM and the second HARQ state machine EHSM to operate with 1 slot offset as shown in FIG. 9 , a signal for controlling the operation is required. Such control signals cannot be generated by the HARQ state machine 310 or the state function 335 . Therefore, a separate device is required. In this regard, the necessary input signals include information about ACK/NAK delay, synchronization signal SYNC_125 and system clock SYS_TIME_125[0]. If it is determined that the ACK/NAK delay is 2 slots according to the input signal, then generate signals ODD_125 and EVEN_125 which are synchronized with the synchronization signal and the system clock and can select the first HARQ state machine OHSM or the second HARQ state machine EHSM.

Figure 10 is an activation control sequence diagram of the first and second HARQ state machines for ACK/NAK delay = 1 time slot according to an embodiment of the present invention, and Figure 11 is an activation control sequence diagram for ACK/NAK according to an embodiment of the present invention Activation control timing diagram of the first and second HARQ state machines with NAK delay = 2 time slots. 10 and 11, the activation control timing of the first and second HARQ state machines according to the embodiment of the present invention will be described in detail.

In FIGS. 10 and 11, the output is determined by the ACK/NAK delay value, the synchronization signal SYNC_125 indicating the time slot boundary of the receiving stage, and SYSM_TIME_125[0] which is the least significant bit (LSB) indicating the system time in units of 1.25 milliseconds type. First, Fig. 10 will be described. As shown in the figure, when ACK_DELAY is 1 time slot, the first state machine selection signal ODD_125 applied to the first HARQ state machine OHSM and the second state machine selection signal ODD_125 applied to the second HARQ state machine EHSM are output in a high state and a low state, respectively. State machine selection signal EVEN_125. This enables only the first HARQ state machine OHSM to perform state transition operations, preventing the second HARQ state machine EHSM from performing state transitions. Thus, the system time SYS_TIME_125 alternately remains low and high for 1.25 milliseconds, while the synchronization signal SYNC_125 only momentarily remains high at the beginning of the 1.25 millisecond time slot.

Referring now to FIG. 11, the case when the ACK/NAK delay is 2 slots will be described. As shown in FIG. 11 , the first state machine select signal ODD_125 applied to the first HARQ state machine OHSM toggles between a low state and a high state every 1.25 milliseconds. Likewise, the second state machine selection signal EVEN_125 applied to the second HARQ state machine EHSM toggles between a low state and a high state every 1.25 milliseconds. In addition, the first state machine selection signal ODD_125 and the second state machine selection signal EVEN_125 always output an exclusive state. For example, when the first state machine selection signal ODD_125 is in a high state, the second state machine selection signal EVEN_125 is in a low state; when the first state machine selection signal ODD_125 is in a low state, the second state machine selection signal EVEN_125 is in a high state. The system time signal and synchronization signal have the same waveforms as the corresponding signals shown in FIG. 10 .

In a mobile communication system, ACK/NAK delay becomes a delay time of the entire system. Therefore, ACK_DELAY can be 0 in the mobile station when the ACK/NAK delay is 1 slot, and ACK_DELAY can be 1 in the mobile station when the ACK/NAK delay is 2 slots. As a result, according to the current state of the HARQ state machine 310 and the signal output from the state function part 335, the transition to the next state can be as shown in Table 3.

table 3 current status enter next state ACK_DELAY F1_DONE F2_DONE F3_DONE F4_DONE F5_DONE F6_DONE S1 x 0 x x x x x S1 x 1 x x x x x S2 S2 x x 000 x x x x S2 x x 001 x x x x S2 x x 010 x x x x S2 x x 011 x x x x S2 x x 100 x x x x S3 x x 101 x x x x S1 x x 110 x x x x S6 x x 111 x x x x S6 S3 0 x x 0 x x x S3 0 x x 1 x x x S5 1 x x 0 x x x S3 1 x x 1 x x x S4 S4 0 x x x 0 x x NA 0 x x x 1 x x NA 1 x x x 0 x x S4 1 x x x 1 x x S5 S5 x x x x x 0 x S5 x x x x x 1 x S6 S6 x x x x x x 0 S6 x x x x x x 1 S1

In Table 3, Fi (where i=1 to 6) represents the output signal of the state function part 335 in the i-th state. For example, F1_DONE means an operation completion signal output from the state function part 335 in the first state S1, and F2_DONE means an operation completion signal output from the state function part 335 in the second state S2. In addition, ACK_DELAY indicates a delay time in the mobile station, and a part indicated by X indicates "don't care".

Fig. 12 is a state transition sequence diagram of the first HARQ state machine for ACK/NAK delay = 1 time slot according to an embodiment of the present invention. Referring to FIG. 12, the state transition operation of the first HARQ state machine for ACK/NAK delay=1 slot will be described in detail below. In FIG. 12, the state is represented by OSi. That is, OS1 indicates the first state, and OS2 indicates the second state. In order to indicate a state in the first HARQ state machine OHSM, a plurality of states are represented by OS1, OS2, . . . in the figure.

When maintaining the first state S1, the first HARQ state machine OHSM receives the packet data control channel signal and decodes the received packet data control channel signal. Therefore, the status function part 335 outputs the F1_DONE signal at a certain time t1. Then, the first HARQ state machine OHSM detects this signal at time t2 and transitions to the second state S2. If the F2_DONE signal is output from the state function part 335 while maintaining the second state S2, the first HARQ state machine OHSM maintains the second state S2, returns to the first state S1, or transitions to the third state S3 or the sixth state S6. As shown in Table 3, 4 kinds of state transitions are performed based on the value output from the state function part 335 . Figure 12 shows a transition to the third state S3, which is the most general state transition and will be described below.

When a transition to the third state S3 occurs, the first HARQ state machine OHSM ignores other signals received from the state function 335, such as FI_DONE or F2_DONE, if any, and determines whether an F3_DONE signal is output from the state function 335. When the F3_DONE signal is output from the state function part 335 at time t4, since the ACK/NAK delay is 1 slot, the first HARQ state machine OHSM transitions to the fifth state S5. Thereafter, the first HARQ state machine OHSM waits for the F5_DONE signal to be received from the state function 335 . When the control operation in the fifth state S5 is completed, the state function part 335 outputs the F5_DONE signal. In FIG. 12, the F5_DONE signal is output at time t5. When the F5_DONE signal is output, the first HARQ state machine OHSM transitions to the sixth state S6.

The first HARQ state machine OHSM maintains the sixth state S6 and waits for the F6_DONE signal to be output from the state function part 335 . As shown in FIG. 12, the F6_DONE signal may be output after the 1.25 millisecond period elapses. Since the first HARQ state machine OHSM can transition to the first state S1, its operation will not be affected in the next time slot. That is, since the first HARQ state machine OHSM is able to receive the F6_DONE signal at time t6 and then immediately transition to the first state S1 at time t7, data processing is not affected in the next time slot.

The operations in times t7 to t9 will be described below. At time t7, the first HARQ state machine OHSM remains in the first state S1. If the F1_DONE signal is received from the state function part 335 at time t8, the first HARQ state machine OHSM transitions to the second state S2 and then waits for the F2_DONE signal to be output from the state function part 335 . The state function part 335 performs the control operation in the second state S2, and outputs the F2_DONE signal when the control operation is completed. Here, if the F2_DONE signal is "101" as shown in Table 3, since F2_DONE=101 is a signal requesting to transition back to the first state S1, the first HARQ state machine OHSM transitions to the first state S1. If F2_DONE is "110" or "111" requesting a transition to the sixth state S6, the first HARQ state machine OHSM transitions to the sixth state S6.

Fig. 13 is a state transition sequence diagram of the first HARQ state machine and the second HARQ state machine for ACK/NAK delay = 2 time slots according to an embodiment of the present invention. Referring to FIG. 13, state transition operations of the first and second HARQ state machines for ACK/NAK delay=2 slots will be described below. In FIG. 13, the states of the first HARQ state machine OHSM are indicated by OSi. That is, OS1 indicates the first state S1 of the first HARQ state machine, and OS2 indicates the second state S2 of the first HARQ state machine. In order to indicate a state in the first HARQ state machine OHSM, several states are represented by OS1, OS2... in the figure. The state of the second HARQ state machine is represented by ESi. That is, ES1 indicates the first state S1 of the second HARQ state machine, and ES2 indicates the second state S2 of the second HARQ state machine. In order to indicate a state in the second HARQ state machine EHSM, states are indicated by ES1, ES2, . . . in the figure. In addition, OFi_DONE and EFi_DONE represent the output to the first HARQ state machine OHSM and the output to the second HARQ state machine EHSM, respectively.

When the first HARQ state machine OHSM remains in the first state S1, it receives the packet data control channel signal and decodes the received packet data control channel signal. Therefore, if the state function part 355 outputs the F1_DONE signal at a certain time t1, the first HARQ state machine OHSM detects the signal, and then transitions to the second state S2. If the F2_DONE signal is output from the state function part 335 while maintaining the second state S2, the first HARQ state machine OHSM maintains the second state S2 according to the type of the output signal, returns to the first state S1, or changes to the third state State S3 or sixth state S6. As shown in Table 3, 4 kinds of state transitions are performed based on the value output from the state function part 335 . Figure 13 shows a transition to the third state S3, which is the most general state transition and will be described below.

When a state transition to the third state S3 occurs, the first HARQ state machine OHSM ignores other signals received from the state function 335, such as F1_DONE or F2_DONE (if any), and determines whether F3_DONE is output from the state function 335 Signal. When the F3_DONE signal is output from the state function part 335 at time t4, since the ACK/NAK delay is 2 slots, the first HARQ state machine OHSM transitions to the fourth state S4. Thereafter, when an F4_DONE signal is received from the state function part 335, the first HARQ state machine OHSM transitions to the fifth state S5. The fifth state S5 lasts past the boundary of the 1.25 millisecond time slot. That is, the first HARQ state machine OHSM continues in the fifth state S5 through the boundary of the 1.25 ms time slot, which is time t6. While maintaining the fifth state S5 in this way, the first HARQ state machine OHSM waits for the F5_DONE signal to be received.

In case the next packet data is received after time t6, if the first state complete signal F1_DONE is output from the state function part 335 at time t7, the second HARQ state machine EHSM transitions to the second state S2. If the second state S2 is completed, ie if the F2_DONE signal is output from the state function part 335 at time t8, the second HARQ state machine EHSM transitions to the third state S3. There are 4 possible transitions from the second state S2. Figure 13 shows the transition to the third state S3.

The state function part 335 performs the control operation of the third state S3, and the second HARQ state machine EHSM maintains the third state S3. If the control operation of the third state S3 is completed, the state function part 335 outputs the F3_DONE signal at time t9. Then, the second HARQ state machine EHSM transitions to the fourth state S4. The second HARQ state machine EHSM maintains the fourth state S4 until the first HARQ state machine OHSM ends the fifth state S5. That is, the state function unit 335 outputs the F4_DONE signal to the second HARQ state machine EHSM at the next clock of time t10 at which the fifth state S5 of the first HARQ state machine OHSM is completed. Thus, the second HARQ state machine EHSM may transition to the fifth state S5 at time t11.

In FIG. 13 , since the ACK/NAK delay is 2 time slots, the sixth state completion signal F6_DONE is output at time t13 at the last moment of the second 1.25 millisecond time slot. Therefore, the first HARQ state machine OHSM can transition to the first state S1.

According to the timing chart of FIG. 13, the state function part 335 must be formed as follows.

First of all, since the first HARQ state machine OHSM and the second HARQ state machine EHSM can maintain the first state S1 at the same time, it is necessary to provide the first HARQ state machine OHSM and the second HARQ state machine EHSM with two functions for controlling the first state S1 the first state processor.

Second, since the second to fifth state processors controlling the second state S2 to fifth state S5 are not simultaneously maintained in any case, they are formed separately, and they can be designed to be in the first HARQ state machine The output signal is processed in the OHSM and the second HARQ state machine EHSM.

Third, as mentioned above, the sixth state S6 is a state that can be executed simultaneously by the first HARQ state machine OHSM and the second HARQ state machine EHSM. Therefore, two sixth state processors for handling the sixth state S6 must be provided in order to work in relation to the first HARQ state machine OHSM and the second HARQ state machine EHSM.

That is, the state function part 335 has state handlers for respective states in order to process internal functions, and the state handlers perform operations that must be performed in each state. As for the number of state processors, two state processors are provided for each of the first and sixth processors processing the first and sixth states, and one state processor is provided for each of the second to fifth state processors device. Thus, state function 335 may include a total of 8 internal blocks.

It can be understood from FIGS. 12 and 13 that the fifth state S5 cannot be maintained at the same time. Therefore, both ACK/NAK delay = 1 slot and ACK/NAK delay = 2 slots are satisfied with one data channel turbo decoder 430 .

The output buffer controller 340 will be described below with reference to FIG. 5 . Typically, in a high-speed data modem timing such as an EV-DV modem and a hardware structure for data exchange with the output buffer of a turbo decoder, the HARQ controller and processor (CPU or host) must have the following listed Several features are used for efficient data transfer. That is, unlike the signal output buffer structure used in the existing CDMA2000 1x forward supplementary channel (F-SCH), the structure of the output buffer of the turbo decoder has the following structural features in order to increase the turbo decoding time and data rate .

(1) Basically, a double output buffer structure is used.

(2) In order to reduce the interrupt processing load of the processor (CPU or host), store up to 4 output frames (decoded information blocks or encoder packets) sequentially in the output buffer. Thereafter, all the data in the output buffer are simultaneously sent to the processor after a certain time (at least 5 milliseconds) has elapsed.

(3) Provides a variable control method in which the system selects two output buffer working methods based on the change in ACK_DELAY of a specific reverse channel during unit setup (1 slot or 2 slots) one.

(4) Since the forward packet data channel (F-ODCH) is packet data, it is different from the existing forward supplementary channel (F-SCH), and it can send data in non-real time. However, since near real-time services must be supported, the F-PDCH should be able to support fast data transmission if possible.

For this, a variable output buffer read/write controller is required, unlike the existing F-PCH output buffer. The controller that performs this control operation is the output buffer controller (OBUFC). In the present invention, the output buffer controller 340 satisfying this condition is included in the HARQ controller 300 . That is, in the embodiment of the present invention as described above, an output buffer controller 340 having different transmission schemes according to ACK_DELAY is provided and operated in association with the HARQ state machine 310 of the HARQ controller 300 .

Figure 14 is a block diagram illustrating the control flow between a HARQ controller and its peripherals according to one embodiment of the present invention. The control flow between the HARQ controller and its peripheral devices according to an embodiment of the present invention will be described in detail below with reference to FIGS. 5 and 14 . FIG. 14 is described in order of reference numerals 1, 2, . . . 14 representing steps.

Step 1: If the upper layer signaling is used to set the mobile station to the EV-DV physical channel setting mode of the radio structure 10 (RC-10), the EV-DV physical channel setting mode of the radio structure 10 (RC-10) is multiple One of the CDMA2000 1x physical channel setting modes, the upper layer will send a HARQ activation signal HARQ_ACTIVE indicating the operation initialization of the HARQ controller 300.

Step 2: The HARQ controller 300 enables the control channel decoder 410 by outputting the control channel decoder enable signal PDCCH_DEC_EN to the control channel decoder 410 .

Step 3: If enabled, the control channel decoder 410 receives a decoded signal for the forward packet data control channel (F-PDCCH) and performs a decoding operation based on the decoded signal. If decoding is completed, the control channel decoder 410 transmits a control channel decoding completion signal PDCCH_DEC_DONE and information related to decoding to the HARQ controller 300 .

Step 4: The HARQ controller 300 uses the information received from the control channel decoder 410 at step 3 to determine its next operation. If the MACID in the signal received from the control channel decoder 410 indicates the HARQ controller itself, i.e. if the MAC_ID_OK signal is received, the forward packet data received via the forward packet data channel (F-PDCH) is generated for performing Information about receive operations for . However, when the MAC ID is not indicative of the HARQ controller 300, the HARQ controller 300 repeatedly performs step 3 and waits until the MAC ID indicative of the HARQ controller 300 is received.

Step 5: If there is a forward packet data channel (F-PDCH) assigned to the mobile station, the HARQ controller 300 outputs the data channel demodulation enable signal PDCH_DEMOD_EN to the data channel demodulator 420 to enable the data channel demodulation Tuner 420.

Step 6: Upon receiving the data channel demodulation enable signal, the data channel demodulator 420 performs a demodulation operation, a demapping operation and a QCTC clearing/combining operation.

Step 7: If the operation of step 6 is completed, the data channel demodulator 420 sends a data channel demodulation completion signal to the HARQ controller 300 .

Step 8: If the data channel demodulation operation is completed, the HARQ controller 300 outputs the data channel turbo decoder enable signal PDCH_TURBO_EN to the data channel turbo decoder 430 in order to read the code symbols stored in the QCTC buffer. Thereafter, the data channel turbo decoder 430 performs turbo decoding on the read code symbols.

Step 9: If the decoding operation is completed, the data channel turbo decoder 430 outputs a turbo decoding completion signal PDCH_TURBO_DONE to the HARQ controller 300 .

Step 10: The HARQ controller 300 performs a CRC check using the data decoded by the data channel turbo decoder 430 . If the CRC result of the decoded data is 'BAD', the HARQ controller 300 performs an operation for improving the decoding performance of the data channel turbo decoder 430, and controls an external buffer.

Step 11: The HARQ controller 300 controls the response signal transmitter 440 to transmit ACK or NAK via the reverse response channel (R-ACKCH) according to the decoding result or its own decision.

Step 12: The HARQ controller 300 generates an interrupt for sending the data stored in the output buffer and finally decoded by the data channel turbo decoder 430 after being received via the forward packet data channel to upper layers.

Step 13: The upper layer transmits the forward packet data stored in the output buffer of the data channel turbo decoder 430 to its upper layer in response to the interrupt signal received from the HARQ controller 300 .

Step 14: If the transmission of the received data on the forward packet data channel stored in the output buffer of the data channel turbo decoder 430 is completed, the upper layer notifies the HARQ controller 300 that the reception of the forward packet data channel has been completed .

Now, the operations of steps 1 to 14 will be described separately for ACK/NAK delay = 1 slot and ACK/NAK = 2 slots.

For the case of ACK/NAK=1 slot, the operation of the data channel turbo decoder 430 is completed before each slot. Therefore, the data channel turbo decoder 430 generates the enable signal PDCH_TURBO_EN of the data channel turbo decoder 430 immediately after the demodulation completion signal PDCHZ_DEMOD_DONE of the data channel demodulator 420 . The decoding operation of the data channel turbo decoder 430 is completed within one time slot. That is, if the CRC check result on the decoded data from the data channel turbo decoder 430 is "BAD" or "GOOD", or if early stopping is performed before the maximum number of decoding iterations, the maximum time range is limited to 1 hour within the gap. Therefore, if it is determined that the decoding operation of the data channel turbo decoder 430 continues for 1 or more slots, the HARQ controller 300 stops the decoding operation by forcing before the 1 slot boundary. In this way, the turbo operation is completed within one time slot. Since all HARQ operations are performed within 1 slot in this way, HARQ operations in which ARQ channels are received in consecutive slots are performed independently of each other.

The operations of Step 1 to Step 14 will be described below for ACK/NAK delay = 2 slots.

For ACK/NAK delay = 2 slots, the data channel turbo decoder 430 can perform a decoding operation through the first slot boundary until the second slot boundary after receiving the subpacket. Here, the ARQ channel may be received through consecutive slots. In this case, there is a time period in which the HARQ operations overlap. This period of overlapping time is only relevant to the operation of the data channel turbo decoder 430 and not to the operation of the data channel demodulator 420 because the demodulation operation is only performed during the 1.25 millisecond time slot in which packet data is received. The data channel demodulator 420 does not operate through the next time slot. However, the data channel turbo decoder 430 starts its decoding operation at the time slot in which the packet data is received, and ends the decoding operation in the next 1.25 millisecond time slot. Therefore, while turbo decoding data received at the first slot continues at the second slot, the data received at the second slot waits until the data received at the first slot is decoded. If the turbo decoding of the data received in the first slot is completed, turbo decoding is performed on the data received in the second slot. Similar to the packet data received in the first time slot, the packet data received in the second time slot can also be continuously turbo decoded until the third time slot.

FIG. 15 is a flowchart illustrating a process for controlling states by a HARQ controller during data reception according to one embodiment of the present invention. A process for controlling states by the HARQ controller during data reception according to this embodiment of the present invention will be described in detail below with reference to FIG. 15 .

In step 600, the HARQ controller 300 maintains an initial state which is a first state S1. In an initial state of the first state S1, the HARQ controller 300 performs parameter initialization by controlling the control channel decoder 410, and waits for a decoding result of a packet data control channel (PDCCH). While waiting for the decoding result of the packet data control channel, the HARQ controller 300 determines whether a decoding completion signal of the packet data control channel is received from the control channel decoder 410 at step 602 . If it is determined in step 602 that a decoding completion signal of the packet data control channel has been received, the HARQ controller 300 proceeds to step 604; In step 604, the HARQ controller 300 maintains the control state of the second state S2. In the second state S2, the HARQ controller 300 calculates parameters for demodulating the forward packet data channel and executes the fast HARQ protocol.

Thereafter, the HARQ controller 300 determines whether the control message received via the packet data control channel (PDCCH) is a control message for the packet data channel (PDCH) at step 606 . If it is determined in step 606 that a control message for the packet data channel has been received, the HARQ controller 300 proceeds to step 612 . Otherwise, the HARQ controller 300 proceeds to step 608 in which it is determined whether the received message is a message for controlling hold mode/cell switching. The HARQ controller 300 performs this operation for the following reasons. Generally, in an upper layer, commands related to Control Hold Mode (CHM) or Cell Switching (CS) operation controlled through message exchange between a base station and a mobile station are transmitted via a separate control channel. However, when an operation should be performed quickly, this command can be transmitted from the base station to the mobile station via the PDCCH instead of the existing control channel. Therefore, since it is not known when the base station will transmit such a message to the mobile station, the mobile station determines whether such an upper layer control message is received in each PDCCH decoding process, and if such a message is detected, it must be transmitted quickly to that upper layer. If it is determined in step 608 that a message for controlling hold mode/unit switching is received, the HARQ controller 300 proceeds to step 610 in which the received message is transmitted to the MAC layer as its upper layer.

In step 612, the HARQ controller 300 determines whether the parameter calculated in step 604 is an uncreatable parameter. If an uncreatable parameter is detected, the HARQ controller 300 returns to step 600, where it transitions to the first state S1. Otherwise, the HARQ controller 300 will proceed to step 614, where it will transition to the third state S3. In step 614 , the HARQ controller 300 performs demodulation by controlling the data channel demodulator 420 . Thereafter, if the demodulation is completed, the HARQ controller 300 determines whether the data channel turbo decoder 430 is in use at step 616 . If it is determined in step 616 that the data channel turbo decoder 430 is in use, the HARQ controller 300 proceeds to step 618 and maintains the waiting state of the fourth state S4 here. However, if it is determined at step 616 that the data channel turbo decoder 430 is not used, the HARQ controller 300 proceeds to step 620, where it maintains the decoding state of the fifth state S5. The HARQ controller 300 proceeds from step 616 to step 618 when the ACK/NAK delay is 2 slots and the turbo decoding of the packet data received in the previous slot is not completed.

In step 620 , the data channel turbo decoder 430 is made to perform turbo decoding by controlling the data channel turbo decoder 430 . If the decoding operation of the data channel turbo decoder 430 is completed, the HARQ controller 300 proceeds to step 622, and executes the sixth state S6 here. The sixth state S6 represents an ACK/NAK transmission step, and in the sixth state S6, the HARQ controller 300 controls ACK/NAK transmission via the reverse channel according to the turbo decoding result output from the data channel turbo decoder 430 . Thereafter, the HARQ controller 300 transitions to the first state S1.

As described above, the mobile communication system can reduce the load on the upper layer by arranging the HARQ controller on the physical structure between the MAC layer and the physical layer, reduce the CPU load caused by the maximum driving clock, and also reduce the data processing time. In addition, when supporting N channels, the mobile communication system can support both ACK/NAK delay = 1 time slot and ACK/NAK delay = 2 time slots, regardless of the number of channels, which avoids increasing the complexity of the mobile station. degree. Furthermore, in this way control information on the traffic control channel can be quickly transferred to the upper layers.

Although the present invention has been illustrated and described in detail with reference to some embodiments of the present invention, those skilled in the art should understand that, without departing from the scope and spirit of the present invention defined by the appended claims, Various changes are made in form and detail.

Claims (21)

1. An apparatus for controlling the operation of a data channel in a mobile communication system that simultaneously transmits control messages via a data control channel and transmits data via a data channel and is capable of supporting Hybrid Automatic Repeat Request (HARQ), said Devices include: The physical layer is used to separately receive service data and control messages from the data control channel and the data channel, and decode the received service data and control data; The HARQ controller of the physical layer is used to calculate the decoding result received from the physical layer, and control the physical layer according to the calculation result. 2. The apparatus according to claim 1, wherein the HARQ controller of the physical layer comprises: A HARQ state machine for controlling state transitions including an initial state for initializing parameters while waiting for a control message to be received via a packet data control channel received from the physical layer, an initial state for decoding said control message Decoding state, control state for computing decoding results, demodulation state for demodulating packet data on a packet data channel, decoding state for turbo decoding demodulated packet data, and turbo decoding for sending the response status of the result; and The state function unit is used to control the state transition of the HARQ state machine depending on the processing result of the physical layer. 3. The apparatus of claim 1, further comprising a data path processor for controlling the processing path of data received via the packet data channel. 4. The apparatus according to claim 1, further comprising an output buffer controller for storing data obtained by demodulating and decoding data received via the packet data channel, and outputting the stored data to the HARQ control device. 5. The apparatus of claim 2, wherein the HARQ state machines are in pairs. 6. The apparatus according to claim 5, wherein, if the response delay time comprises 2 time slots, each of the paired HARQ state machines alternately controls a state transition for 2 time slots for data received via the packet data channel . 7. The apparatus of claim 6, wherein when the physical layer is signaled to decode packet data, the HARQ state machine controls transition to a wait state until operation of the decoder is terminated. 8. The apparatus of claim 7, wherein the state function comprises: a first state processor configured to perform control operations of the associated paired HARQ state machine in the initial state; a second state processor, configured to perform a control operation of the HARQ state machine in a control state; a third state processor, configured to perform a control operation of the HARQ state machine in the demodulation state; a fourth state processor, configured to perform a control operation of the HARQ state machine in a waiting state; a fifth state processor, configured to perform control operations of the HARQ state machine in the decoding state; A sixth state processor for performing control operations of the associated HARQ state machine in the response state. 9. The apparatus of claim 1, wherein said physical layer comprises a data channel turbo decoder. 10. The apparatus of claim 1, wherein the decoder is a turbo decoder. 11. The apparatus according to claim 1, wherein when the result of decoding the data is incorrect, the HARQ controller of the physical layer requests retransmission of the service data to the physical layer of the mobile communication system. 12. The apparatus of claim 1, wherein when a result of decoding the data is correct, the HARQ controller of the physical layer transmits the decoded data to an upper layer. 13. The apparatus of claim 1, wherein the physical layer comprises a decoder for decoding received control data, a demodulator for demodulating data, and a decoder for decoding demodulated data. 14. The apparatus according to claim 13, wherein the HARQ controller of the physical layer determines whether to demodulate the data depending on the decoded control data, and outputs to the demodulator and the decoder when the HARQ controller determines to demodulate the data Decoded control data. 15. The apparatus according to claim 1, wherein the HARQ controller of the physical layer determines whether to demodulate data depending on a calculation result, and outputs decoded control data to the physical layer when the HARQ controller determines to demodulate data the result of. 16. The apparatus according to claim 1, wherein the HARQ controller of the physical layer determines whether to demodulate and decode the received data depending on the decoding result of the control message, and contributes to the decoding during the demodulation and decoding of the received data. The tuner and the decoder output the decoded control message, and control the output of the response signal according to the decoding result of the data. 17. The apparatus of claim 1, wherein the HARQ controller of the physical layer transmits the decoded data to an upper layer. 18. A HARQ (Hybrid Automatic Repeat Request) controller device for retransmitting data in a mobile station of a mobile communication system, the HARQ controller comprising: The HARQ state machine is used to receive state information from the physical layer and determine the transition result to the next state of the state functional part; A state function part for instructing the operation of the physical layer according to the determination result from the HARQ state machine. 19. The apparatus of claim 18, wherein the mobile station receives a data channel and a control channel for transmitting control information to decode the data channel. 20. The apparatus of claim 19, wherein the mobile station comprises a control channel decoder for decoding a data channel, a data channel demodulator for demodulating data, and a data channel for decoding demodulated data decoder. 21. The apparatus of claim 19, wherein the status function commands the operation of any one of a control channel decoder, a data channel demodulator, and a data channel decoder, all of which are concerned with transition decisions.

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