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CN1681268A - Phase correction device and method thereof - Google Patents

Phase correction device and method thereof Download PDF

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Publication number
CN1681268A
CN1681268A CN 200410033408 CN200410033408A CN1681268A CN 1681268 A CN1681268 A CN 1681268A CN 200410033408 CN200410033408 CN 200410033408 CN 200410033408 A CN200410033408 A CN 200410033408A CN 1681268 A CN1681268 A CN 1681268A
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value
signal
phase
order
multiplier
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杨展升
卢文仕
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Airoha Technology Corp
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Airoha Technology Corp
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Abstract

The phase correction device is used in a mixer. The mixer includes a signal generator for outputting a first signal and a second signal. The first signal is out of phase with the second signal by a phase value. The phase correction device is used for adjusting the phase value to a preset value. The phase correction device comprises a multiplication unit and a comparison control unit. The multiplication unit is used for carrying out multiplication operation on the first signal and the second signal so as to obtain a direct current value corresponding to the phase value. The comparison control unit is used for outputting a signal after comparing the DC value with the reference value. The signal generator adjusts the phase value according to the signal, so that the phase value approaches to a predetermined value. The correction step is used for multiplying the first signal and the second signal to obtain a direct current value corresponding to the phase value; comparing the DC value with a reference value to obtain a comparison result value; obtaining a signal for adjusting the phase value according to the comparison result value; and repeating the steps until the phase value approaches to the preset value.

Description

Phase correction unit and method thereof
Technical field
The present invention relates to a kind of phase correction unit and method thereof, particularly relate to a kind of phase correction unit and method thereof that is applied to frequency mixer.
Background technology
Be to use radio-frequency (RF) transceiver in the wireless telecommunication system, with reception and transmission wireless signal, and general radio-frequency (RF) transceiver can be to the modulation of signal do and the demodulation process of required transmission, so that signal can carry out the transmission of maximum fault information under particular environment.
Orthogonal phase shift is keyed in (Quadrature Phase Shift Keying, QPSK) modulation promptly is a kind of common phase modulation technique, it utilizes the carrier wave orthogonal signalling modulating data of out of phase, therefore can once transmit two positions, improve the message transmission rate (Data Rate) of wireless system.This kind qpsk modulation signal comprises homophase (In Phase) signal and quadrature (Quadrature) signal two partly, and in-phase signal and orthogonal signalling are orthogonal and independent after modulation, does not interfere with each other.Be that example explains below with the radio frequency receiver.
Please refer to Figure 1A, it shows the simplification line block diagram of conventional radio frequency receiver.Radio frequency receiver 100 comprises demodulator 110 and Digital Signal Processing, and (Digital Signal Processing, DSP) unit 120.As mentioned above, radio frequency receiver 100 received input signal Si (t) comprise in-phase modulation signal S I(t) and orthogonal demodulation signal S Q(t) two partly.Input signal Si produces signal Si ' after involving earlier processing and amplifying after filtration, is divided into two paths (I and Q) again and inputs to frequency mixer 130.Frequency mixer 130 comprises the multiplier 132 that is positioned at the I path, the multiplier 134 that is positioned at the Q path, local oscillator (LocalOscillator) 136 and phase-shifts device (Phase Shifter) 138.Local oscillator 136 utilizes phase-shifts device 138 to export the homophase local oscillated signal Ф of phase difference 90 degree each other respectively IAnd quadrature local oscillated signal Ф Q
By the signal Si ' of I path input via multiplier 132 and homophase local oscillated signal Ф ICarry out mixing, pass through low pass filter 140 again after, output in-phase signal S I(t).In addition, by the signal Si ' of Q path input via multiplier 134 and quadrature local oscillated signal Ф QCarry out mixing, pass through low pass filter 150 again after, output orthogonal signal S Q(t).In-phase signal S I(t) and orthogonal signalling S Q(t) respectively via after the analog/digital conversion, input DSP unit 120 is to carry out follow-up Digital Signal Processing.
In addition, if with regard to modulator, shown in Figure 1B, analog signal Si and Sq by 160 outputs of DSP unit, respectively by in I path and the Q path input modulator 170, again through forming analog signal Si ' and Sq ' after the filtering, and the multiplier 132 and 134 that inputs to frequency mixer 130 respectively carries out mixing.Analog signal Si ' and above-mentioned homophase local oscillated signal Ф IProduce in-phase signal S after the mixing IAnd analog signal Sq ' and above-mentioned quadrature local oscillated signal Ф IProduce orthogonal signalling S after the mixing QHomophase and orthogonal signalling S IAnd S QAfter addition, through amplifying and Filtering Processing, just export modulation signal S again O
Yet, because the homophase local oscillated signal Ф that local oscillator 136 and phase-shifts device 138 are exported IAnd quadrature local oscillated signal Ф Q, may be because the difference of manufacture process, its phase difference value has error when the design of the frequency mixer of reality, is not 90 degree accurately.Thereby the in-phase signal S that causes I path and Q path to produce I(t) and orthogonal signalling S Q(t) unmatched phenomenon.This kind phenomenon that do not match corresponds to QPSK modulation star-plot shown in Fig. 1 C, can produce distortion phenomenon, wherein circle points is to judge the benchmark that receives the position under the perfect condition during restituted signal, and beat * for because of phase error, even without consider disturbing and noise, its judgment standard is deviation just, thereby causes bit error rate (Bit Error Rate, BER) improve, and reduce the usefulness of signal transmission.
Known phase calibration deviation mode, be that the above-mentioned DSP unit 120 of collocation adds that some test signals assess the extent of deviation of demodulator 110, carry out proofreading and correct before the product export at 120 places, DSP unit afterwards, or connect an indicating device (Indicator) at the output of modulator 170, in order to detect the modulation signal S of output O, be back to DSP unit 160 again and do phase compensation.
Yet, utilize the DSP unit to make phase deviation and proofread and correct the complexity that will improve on the DSP cell design.Owing to must increase extra indicating device and redesign DSP unit, therefore, will increase the package count of DSP unit and increase its area and power consumption, and need expend quite long correction time.
Summary of the invention
In view of this, the purpose of this invention is to provide a kind of phase correction unit and method thereof, can be established in the frequency mixer, make comparisons with D. C. value and reference value that homophase and quadrature local oscillated signal are multiplied each other.Carry out the continuous approximation calculation according to comparative result, adjust the phase deviation of frequency mixer to obtain a controlling signal.Need in the DSP unit, not design extra circuit, effectively simplify phase corrector, and improve the efficient of phasing.
According to purpose of the present invention, a kind of phase correction unit is proposed, be used in the frequency mixer.Frequency mixer comprises signal generator, in order to export first signal and secondary signal.The phase difference of first signal and secondary signal is a phase value.Phase correction unit is in order to be adjusted to predetermined value with this phase value.Phase correction unit comprises multiplication unit and comparison control unit.Multiplication unit is in order to carry out multiplying to first signal and secondary signal, to obtain corresponding to the D. C. value of phase value.Relatively control unit is then in order to relatively to export a signal in the back according to D. C. value and reference value.Signal generator is adjusted phase value according to this signal, makes phase value level off to predetermined value.
Multiplication unit comprises multiplier and sampling/holding unit.Multiplier is in order to carry out multiplying to first signal and secondary signal.The operation of sampling/holding unit in order to the output of multiplier is done sampling and kept is with the output D. C. value.
Relatively control unit comprise comparator, continuous approximation buffer (Successive ApproximationRegister, SAR) unit and digital/analog converter (Digital/Analog Converter, DAC).Comparator is in order to the size of comparison D. C. value and reference value, and the output comparison result value.When phase value was predetermined value, D. C. value equaled reference value in fact.The SAR unit is in order to carry out the continuous approximation calculation according to comparison result value, with the output digital signal.When comparison result value was updated, the numerical value of digital signal was readjusted in the SAR unit according to the comparison result value after upgrading.DAC is converted to above-mentioned signal with digital signal, in order to the control signal generator.The SAR unit comprises control circuit and SAR.SAR is in order to the store digital signal, and control circuit is in order to adjust digital signal according to comparison result value.Direct construction phase correction unit can be simplified phase corrector in frequency mixer.
According to purpose of the present invention, a kind of frequency mixer is proposed, in order to handle in-phase signal and orthogonal signalling.Frequency mixer comprises signal generator, first multiplier, second multiplier and phase correction unit.Signal generator is in order to export first signal and secondary signal.The phase difference of first signal and secondary signal is a phase value.First multiplier receives first signal, and handles the mixing program of in-phase signal; And second multiplier receives secondary signal, and handles the mixing program of orthogonal signalling.Phase correction unit is in order to adjust phase value to predetermined value.Phase correction unit comprises multiplication unit and comparison control unit.Multiplication unit is in order to carry out multiplying to first signal and secondary signal, to obtain the D. C. value of corresponding phase value.Relatively control unit is then in order to relatively to export a signal in the back according to D. C. value and reference value.Signal generator signal is according to this adjusted phase value, makes phase value level off to predetermined value.
Signal generator comprises local oscillator and phase-shifts device, and local oscillator utilizes the phase-shifts device to export first signal and secondary signal.Multiplication unit comprises multiplier and sampling/holding unit.Multiplier is in order to carrying out multiplying to first signal and secondary signal, and the operation of sampling/holding unit in order to the output of multiplier is done sampling and kept, with the output D. C. value.
Frequency mixer is used for demodulator, and demodulator receives modulation signal.First multiplier is imported first signal and the modulation signal back output in-phase signal that multiplies each other.Output orthogonal signal after second multiplier input secondary signal and modulation signal multiply each other.Frequency mixer also can be used for modulator.The modulation signal of modulator output is the output addition of first multiplier and second multiplier.First multiplier is imported first signal and in-phase signal, and second multiplier input secondary signal and orthogonal signalling.Phase correction unit directly is set in frequency mixer, can avoids the required complicated measurement circuit in known DSP unit.
According to another object of the present invention, a kind of method for correcting phase is proposed, it is summarized as follows: at first, first signal and secondary signal are carried out multiplying, to obtain the D. C. value of corresponding phase value.Then, D. C. value and reference value are made comparisons, to obtain comparison result value.At last, according to comparison result value, to obtain a signal, in order to adjust phase value.Repeat above-mentioned steps until phase value convergence predetermined value.
Wherein also comprise with the step that obtains signal: carry out the continuous approximation calculation according to comparison result value,, when comparison result value is updated, readjust the numerical value of digital signal to obtain a digital signal according to comparison result value; And digital signal is converted to analog signal, with the control signal generator, adjust phase value.
When D. C. value during greater than reference value, adjust digital signal along first direction, the corresponding simulating signal is changed, and signal generator adjust phase value according to analog signal, make D. C. value reduce.When D. C. value during less than reference value, adjust digital signal along second direction, the corresponding simulating signal is changed, and signal generator adjust phase value according to analog signal, make D. C. value increase.Directly signal generator is made phase deviation and proofread and correct, can improve the efficient of phasing in frequency mixer inside.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Figure 1A shows the simplification line block diagram of conventional radio frequency receiver;
Figure 1B shows the line block diagram that frequency mixer among Figure 1A is used in modulator;
Fig. 1 C shows QPSK modulation star-plot among Figure 1A and Figure 1B;
Fig. 2 A shows the mixer line calcspar that is used in demodulator according to a preferred embodiment of the present invention;
Fig. 2 B shows the line block diagram of phase correction unit among Fig. 2 A;
Fig. 3 shows according to preferred embodiment method for correcting phase flow chart of the present invention; And
Output D. C. value D and reference value Vref that Fig. 4 shows multiplication unit among Fig. 2 B compare to adjust the schematic diagram of digital signal Sd and Δ φ value.
The drawing reference numeral explanation
100: radio frequency receiver
110: demodulator
120,160:DSP unit
130,200: frequency mixer
132,134,252: multiplier
136,212: local oscillator
138,214: the phase-shifts device
140,150: low pass filter
170: modulator
210: signal generator
220: the first multipliers
230: the second multipliers
240: phase correction unit
250: multiplication unit
254: sampling/holding unit
260: compare control unit
262: comparator
The 264:SAR unit
265: control circuit
266:DAC
267:SAR
270: switch element
Embodiment
The main feature of phase correction unit of the present invention is directly at demodulator or self-compensating circuit of modulator interior construction, to adjust the phase deviation of local oscillated signal that local oscillator is exported, do not control and need not make extra circuit by the DSP unit, can effectively simplify whole correcting process, and improve the efficient of phasing.
Please refer to Fig. 2 A, it shows the mixer line calcspar that is used in demodulator according to a preferred embodiment of the present invention.Frequency mixer 200 is in order to carry out the mixing demodulation to modulation signal Si, with output in-phase signal S IAnd orthogonal signalling S QFrequency mixer 200 comprises signal generator 210, first multiplier 220, second multiplier 230 and phase correction unit 240.Signal generator 210 comprises local oscillator 212 and phase-shifts device 214, and local oscillator 212 utilizes the phase-shifts device 214 outputs first local oscillated signal Ф IAnd the second local oscillated signal Ф Q, local oscillated signal Ф wherein IAnd Ф QPhase difference be Δ φ, and Δ φ value be predefined for 90 the degree.First multiplier 220 is arranged on the I path, in order to receive the first local oscillated signal Ф I, and modulation signal Si carried out mixing, with the in-phase signal S of output fundamental frequency IAnd second multiplier 230 is arranged on the Q path, in order to receive the second local oscillated signal Ф Q, and modulation signal Si carried out mixing, with the orthogonal signalling S of output fundamental frequency Q Phase correction unit 240 is in order to adjust phase difference φ value to predetermined value 90 degree.
Please refer to Fig. 2 B, it shows the line block diagram of phase correction unit among Fig. 2 A.Phase correction unit 240 comprises multiplication unit 250 and compares control unit 260.Multiplication unit 250 comprises multiplier 252 and sampling/maintenance (Sample/Hold) unit 254.Multiplier 252 is in order to the first local oscillated signal Ф IAnd the second local oscillated signal Ф QCarry out multiplying, take a sample/then operation of holding unit 254, to export the D. C. value D of corresponding Δ φ value in order to the output of multiplier 252 is done sampling and kept.When Δ φ value is 90 when spending, D. C. value D equals 0 in fact.Relatively control unit 260 in order to according to D. C. value D and reference value Vref relatively after, output signal Sa is to signal generator 210, wherein reference value Vref is 0.Signal generator 210 is just adjusted phase difference φ value according to signal Sa, makes Δ φ value level off to predetermined value 90 and spends.
In addition, relatively control unit 260 also comprises comparator 262, SAR unit 264 and DAC 266.Comparator 262 is in order to the size of comparison D. C. value D and reference value Vref, and output comparison result value Rc.As D. C. value D during greater than reference value Vref, comparison result value Rc is 1; As D. C. value D during less than reference value Vref, comparison result value Rc is 0.SAR unit 264 is in order to carry out the continuous approximation calculation, with output digital signal Sd according to comparison result value Rc (1/0).SAR unit 264 also comprises control circuit 265 and SAR 267.SAR 267 is in order to store digital signal Sd, and control circuit 265 is in order to adjust digital signal Sd according to comparison result value Rc.266 of DAC are in order to be converted to analog signal Sa with digital signal Sd, with control signal generator 210.
In addition, phase correction unit 240 also comprises switch element 270, accepts the control of control circuit 265, in order to control the first local oscillated signal Ф IAnd the second local oscillated signal Ф QInput to multiplication unit 250.When phase correction unit 240 desires signal generator 210 is carried out the phase deviation timing, switch element 270 conductings make the local oscillated signal Ф that wins IAnd the second local oscillated signal Ф QInput multiplication unit 250; When phase correction unit 240 was finished correct operation, switch element 270 not conductings made the local oscillated signal Ф that wins IAnd the second local oscillated signal Ф QCan't import multiplication unit 250, influence the follow-up operation of frequency mixer 200 to avoid phase correction unit 240.
Please refer to Fig. 3, it shows according to preferred embodiment method for correcting phase flow chart of the present invention.At first, in step 300, to the first local oscillated signal Ф IAnd the second local oscillated signal Ф QCarry out multiplying, to obtain the D. C. value D of corresponding Δ φ value.Ф for example I(t)=A 1Sinwt; Ф Q(t)=A 2Sin (wt+ Δ φ), wherein w=2 π f, and f is the local oscillated signal frequency.If with two local oscillated signal Ф IAnd Ф QDo multiplying, its result is cos Δ φ/2-cos2 (wt+ Δ φ)/2.After one of latter was high-frequency signals, its D. C. value was zero, and remaining preceding paragraph cos Δ φ/2 are D. C. value D.Therefore, when Δ φ value be 90 the degree, D. C. value D is 0; When Δ φ value was spent greater than 90, D. C. value D was less than 0; And when Δ φ value was spent less than 90, D. C. value D was greater than 0.
Then, in step 302, D. C. value D and reference value Vref (=0) are made comparisons, to obtain comparison result value Rc.When D. C. value D greater than 0 the time, Rc is a logical value 1, and when D. C. value D less than 0 the time, Rc is a logical value 0.Then, in step 304, carry out the continuous approximation calculation according to comparison result value Rc (1/0), to obtain digital signal Sd.At last,, digital signal Sd is converted to analog signal Sa,, adjusts phase difference φ value, repeat above-mentioned step 300, until Δ φ value convergence predetermined value 90 degree with control signal generator 210 in step 306.
Please refer to Fig. 4, its output D. C. value D and reference value Vref (=0) that shows multiplication unit 250 among Fig. 2 B compares to adjust the schematic diagram of digital signal Sd and Δ φ value.The digital signal control of above-mentioned SAR unit 264 is example with 5.According to the continuous approximation algorithm, (Most Significant Bit MSB) is made as 1 to the initial value highest significant position of digital signal Sd, and all the other positions are made as 0, also is about to signal Sd and is set at 10000 (=16).The D. C. value D1 that supposes multiplication unit 250 outputs at the beginning is greater than reference value Vref, and expression Δ φ value (=φ 1) is less than 90 degree.SAR unit 262 is according to comparison result value Rc=1, and keeping MSB is 1, and ensuing second significance bit is set at 1, and the digital signal Sd that also is about to output is adjusted into 11000 (=24), and promptly digital signal Sd increases.So corresponding simulating signal Sa also adjusts and control signal generator 210 increase Δ φ values are φ 2.
Then, again to the first local oscillated signal Ф IAnd the second local oscillated signal Ф QDo multiplying, to obtain the D. C. value D2 of corresponding φ 2 values.Suppose D. C. value D2 still greater than reference value Vref, expression φ 2 values are still less than 90 degree (but more spending near 90 than φ 1 value).SAR unit 262 is according to comparison result value Rc=1, and keeping second significance bit is 1, and ensuing the 3rd significance bit is made as 1, and the digital signal Sd that also is about to output is adjusted into 11100 (=28).So corresponding simulating signal Sa also adjusts and control signal generator 210 increase Δ φ values are φ 3.The D. C. value D3 that supposes corresponding φ 3 values is still greater than reference value Vref, and expression φ 3 values are still less than 90 degree (but more spending near 90 than φ 2 values).It is 1 that SAR unit 262 keeps the 3rd significance bit, and ensuing the 4th significance bit is made as 1, that is to continue to adjust digital signal Sd be 11110 (=30), and and then control signal generator 210 increase Δ φ values be φ 4.
The D. C. value D4 that supposes corresponding φ 4 values is less than reference value Vref, and expression φ 4 values surpass 90 degree (but being worth more near 90 degree than φ 3).So SAR unit 264 is made as 0 with the 4th significance bit, and with least significant bit (Least Significant Bit LSB) is made as 1, and the digital signal Sd that promptly adjusts output is 11101 (=29), and control signal generator 210 to reduce Δ φ values be φ 5, be worth more than φ 4 and spend near 90.Therefore, according to above-mentioned continuous approximation calculation, D. C. value D is by D1 to D5 convergence reference value Vref gradually.And relatively, phase difference φ value reaches the purpose of proofreading and correct frequency mixer 200 local oscillated signal phase deviations also by φ 1 to φ 5 convergence predetermined value 90 degree gradually.
As mentioned above, though method for correcting phase of the present invention is that example explains with the continuous approximation algorithm, so should not limit the present invention with this.Any other can be adjusted phase difference φ value according to the comparative result of D. C. value D and reference value Vref makes the method for convergence 90 degree all be suitable for the present invention.
According to above-mentioned preferred embodiment, the advantage of phase correction unit of the present invention is to utilize the phase correction unit that is established in frequency mixer as the self-compensating circuit, revise the phase deviation of local oscillator, only need when frequency mixer starts, connect phase correction unit and carry out correct operation, wait to proofread and correct and promptly close phase correction unit after finishing.Detect and control owing to need not add extra circuit in the DSP unit, therefore, simplify phase corrector and effective operating efficiency that improves phasing.
In sum; though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; those skilled in the art under the premise without departing from the spirit and scope of the present invention; can be used for a variety of modifications and variations, so protection scope of the present invention is as the criterion with claim of the present invention.

Claims (23)

1. phase correction unit, be used in the frequency mixer, this frequency mixer comprises a signal generator, in order to export one first signal and a secondary signal, the phase difference of this first signal and this secondary signal is a phase value, this phase correction unit is in order to be adjusted to a predetermined value with this phase value, and this phase correction unit comprises:
One multiplication unit is in order to carry out a multiplying to this first signal and this secondary signal, to obtain corresponding to a D. C. value of this phase value; And
One control unit relatively, in order to according to this D. C. value and reference value back output one signal relatively, this signal generator is complied with this signal and is adjusted this phase value, makes this phase value level off to this predetermined value.
2. phase correction unit as claimed in claim 1, wherein when this D. C. value during greater than this reference value, this comparison control unit is adjusted this signal along first direction, and this signal generator is adjusted this phase value according to this signal, makes this D. C. value reduce; When this D. C. value during less than this reference value, this comparison control unit is adjusted this signal along second direction, and this signal generator is adjusted this phase value according to this signal, makes this D. C. value increase.
3. phase correction unit as claimed in claim 1, wherein when this D. C. value equaled this reference value in fact, this phase correction unit was finished correct operation.
4. phase correction unit as claimed in claim 1, wherein this comparison control unit comprises:
One comparator in order to the size of this D. C. value and this reference value relatively, and is exported a comparison result value, and wherein when this phase value was this predetermined value, this D. C. value equaled this reference value in fact;
One continuous approximation buffer memory unit, in order to carry out the continuous approximation calculation according to this comparison result value, to export a digital signal, when this comparison result value was updated, the numerical value of this digital signal was readjusted in this SAR unit according to this comparison result value after upgrading; And
One digital/analog converter is converted to this signal with this digital signal, in order to control this signal generator.
5. phase correction unit as claimed in claim 4, wherein this SAR unit comprises a control circuit and a SAR, and this SAR is in order to store this digital signal, and this control circuit is in order to adjust this digital signal according to this comparison result value.
6. phase correction unit as claimed in claim 4, wherein when this D. C. value during greater than this reference value, this comparison result value is 1, and when this D. C. value during less than this reference value, this comparison result value is 0.
7. phase correction unit as claimed in claim 1, wherein this multiplication unit comprises a multiplier and a sampling/holding unit, this multiplier is in order to carry out multiplying to this first signal and this secondary signal, the operation of this sampling/holding unit in order to the output of this multiplier is done sampling and kept is to export this D. C. value.
8. phase correction unit as claimed in claim 1, wherein this predetermined value is 90 degree, and this reference value is 0.
9. phase correction unit as claimed in claim 1, wherein this frequency mixer is used in a wireless transceiver.
10. frequency mixer, in order to handle an in-phase signal and orthogonal signalling, this frequency mixer comprises:
One signal generator, in order to export one first signal and a secondary signal, wherein the phase difference of this first signal and this secondary signal is a phase value;
One first multiplier receives this first signal, and handles the mixing program of this in-phase signal;
One second multiplier receives this secondary signal, and handles the mixing program of these orthogonal signalling; And
One phase correction unit, in order to adjust this phase value to one predetermined value, this phase correction unit comprises:
One multiplication unit is in order to carrying out a multiplying to this first signal and this secondary signal, to obtain a D. C. value that should phase value;
One control unit relatively, in order to according to this D. C. value and reference value back output one signal relatively, this signal generator is complied with this signal and is adjusted this phase value, makes this phase value level off to this predetermined value.
11. frequency mixer as claimed in claim 10, when this D. C. value during greater than this reference value, this comparison control unit makes this signal generator adjust this phase value, makes this D. C. value reduce; When this D. C. value during less than this reference value, this comparison control unit makes this signal generator adjust this phase value, makes this D. C. value increase; When this D. C. value equaled this reference value in fact, this frequency mixer was finished correct operation.
12. frequency mixer as claimed in claim 10, wherein this signal generator comprises a local oscillator and a phase-shifts device, and this local oscillator utilizes this phase-shifts device to export this first signal and this secondary signal.
13. frequency mixer as claimed in claim 10, wherein this multiplication unit comprises a multiplier and a sampling/holding unit, this multiplier is in order to carry out multiplying to this first signal and this secondary signal, the operation of this sampling/holding unit in order to the output of this multiplier is done sampling and kept is to export this D. C. value.
14. frequency mixer as claimed in claim 10, wherein this frequency mixer is used for a demodulator, this demodulator receives a modulation signal, wherein, this first multiplier is imported this first signal and this modulation signal this in-phase signal of back output that multiplies each other, and this second multiplier is imported this secondary signal and this modulation signal back of multiplying each other and exported these orthogonal signalling.
15. frequency mixer as claimed in claim 10, wherein this frequency mixer is used for a modulator, one modulation signal of this modulator output is the output addition of this first multiplier and this second multiplier, wherein, this first multiplier is imported this first signal and this in-phase signal, and this second multiplier is imported this secondary signal and this orthogonal signalling.
16. method for correcting phase, be used in a frequency mixer, this frequency mixer comprises a signal generator, in order to export one first signal and a secondary signal, the phase difference of this first signal and this secondary signal is a phase value, this method for correcting phase is in order to be adjusted to a predetermined value with this phase value, and this method for correcting phase comprises:
This first signal and this secondary signal are carried out a multiplying, to obtain to a D. C. value that should phase value;
This D. C. value and a reference value are made comparisons, to obtain a comparison result value; And
According to this comparison result value, to obtain a signal, this signal repeats above-mentioned steps until this this predetermined value of phase value convergence in order to adjust this phase value.
17. method for correcting phase as claimed in claim 16 wherein when this D. C. value during greater than this reference value, is adjusted this signal along first direction, and this signal generator adjusts this phase value according to this signal, makes this D. C. value reduce; When this D. C. value during less than this reference value, adjust this signal along second direction, and this signal generator adjusts this phase value according to this signal, make this D. C. value increase; When this D. C. value equals this reference value in fact, finish the phasing operation.
18. method for correcting phase as claimed in claim 17, wherein when this phase value was this predetermined value, this D. C. value equaled this reference value in fact.
19. method for correcting phase as claimed in claim 16 wherein also comprises with this step that obtains this signal according to this comparison result value:
Carry out the continuous approximation calculation according to this comparison result value,, when this comparison result value is updated, readjust the numerical value of this digital signal to obtain a digital signal; And
This digital signal is converted to an analog signal,, adjusts this phase value to control this signal generator.
20. method for correcting phase as claimed in claim 19, wherein when this D. C. value during greater than this reference value, adjust this digital signal along first direction, this corresponding analog signal is changed, this signal generator is adjusted this phase value according to this analog signal, make this D. C. value reduce, and when this D. C. value during, adjust this digital signal, this corresponding analog signal is changed along second direction less than this reference value, this signal generator is adjusted this phase value according to this analog signal, makes this D. C. value increase.
21. method for correcting phase as claimed in claim 20, wherein adjusting this digital signal along first direction is to increase this digital signal, and to adjust this digital signal along second direction be to reduce this digital signal.
22. method for correcting phase as claimed in claim 16, wherein when this D. C. value during greater than this reference value, this comparison result value is 1, and when D. C. value during less than this reference value, this comparison result value is 0.
23. method for correcting phase as claimed in claim 16, wherein this predetermined value is 90 degree, and this reference value is 0.
CN 200410033408 2004-04-07 2004-04-07 Phase correction device and method thereof Pending CN1681268A (en)

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CN105675987A (en) * 2014-11-17 2016-06-15 德律科技股份有限公司 Test system and phase detection device and method thereof
CN107430186A (en) * 2015-03-16 2017-12-01 阿瑞利斯控股有限公司 Amplitude comparison monopulse radar system
CN111161772A (en) * 2018-11-07 2020-05-15 瑞昱半导体股份有限公司 Memory signal phase difference correction circuit and method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105675987A (en) * 2014-11-17 2016-06-15 德律科技股份有限公司 Test system and phase detection device and method thereof
CN105675987B (en) * 2014-11-17 2018-04-24 德律科技股份有限公司 Test system and phase detection device and method thereof
CN107430186A (en) * 2015-03-16 2017-12-01 阿瑞利斯控股有限公司 Amplitude comparison monopulse radar system
CN107430186B (en) * 2015-03-16 2021-07-20 阿瑞利斯控股有限公司 Amplitude Comparison Monopulse Radar System
CN111161772A (en) * 2018-11-07 2020-05-15 瑞昱半导体股份有限公司 Memory signal phase difference correction circuit and method

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