[go: up one dir, main page]

CN1571503A - A video playback system that can generate progressive scan and interlaced video signals together - Google Patents

A video playback system that can generate progressive scan and interlaced video signals together Download PDF

Info

Publication number
CN1571503A
CN1571503A CN 03143609 CN03143609A CN1571503A CN 1571503 A CN1571503 A CN 1571503A CN 03143609 CN03143609 CN 03143609 CN 03143609 A CN03143609 A CN 03143609A CN 1571503 A CN1571503 A CN 1571503A
Authority
CN
China
Prior art keywords
signal
video
progressive
interlaced
image
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 03143609
Other languages
Chinese (zh)
Other versions
CN1307837C (en
Inventor
林子平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MediaTek Inc
Original Assignee
MediaTek Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MediaTek Inc filed Critical MediaTek Inc
Priority to CNB031436099A priority Critical patent/CN1307837C/en
Publication of CN1571503A publication Critical patent/CN1571503A/en
Application granted granted Critical
Publication of CN1307837C publication Critical patent/CN1307837C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Landscapes

  • Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)

Abstract

An image playing system comprises a main picture processor, an interlaced signal reconstruction module and a video coding module. The main picture processor generates a corresponding line-by-line main picture signal according to the image signal transmitted from the image memory. The progressive main picture signal can be processed by a predetermined image processing program to generate a progressive format signal. The interlaced signal reconstruction module can receive the progressive format signal and selectively store the progressive format signal by using a temporary storage mode of odd-even interleaving so as to obtain the interlaced format signal. The video coding module can code the progressive format signal and the interlaced format signal into the progressive video signal and the interlaced video signal according to the video specification of the image display device. Therefore, the image playing system can provide the progressive video signal and the interlaced video signal to the corresponding image display device together for image display.

Description

Can produce the image playing system of lining by line scan together with the interlacing scan video signal
Technical field
The present invention relates to a kind ofly can produce the image playing system of lining by line scan together with the interlacing scan video signal.
Background technology
Known dynamic image is to play, utilize the persistence of vision of human eye continuously by picture one by one and produce the effect of dynamic image.The broadcast of each picture is a starting point by the upper left side of picture then, laterally depicts a horizontal line to the right, begins next bar horizontal line again, and this is " scan line ".For example known NTSC specification promptly constitutes a picture with 525 scan lines, and wherein the effective scanning number of picture is 483.
During image display playing videos such as television set, projector or computer screen, can be divided into two kinds of scan modes usually, a kind ofly be the technology of interlacing scan (interlace scan), another kind then is the technology of line by line scan (progressive scan).Horizontal-interlace technique development for a long time, also the most normal being used, mostly most on the market at present television set is to come playing video in interleaved mode.Yet the also increase day by day of demand to line by line scan playing video, so some display unit in recent years also designs and can utilize the mode playing video of lining by line scan.
Interlacing scan is after having scanned the 1st line, is right after and what come is not the 2nd line of scanning, but scans with the order of the 3rd, 5,7 line, until the 525th line, to finish first picture, is called (field).And then get back to the second line, scan with the order of the 4th, 6,8 line, to finish second field.Therefore obtained to seem the picture of smoothness with interlacing scan, the scan mode that is actually with oem character set is constituted.
Lining by line scan is doubling interleaved sweep speed, with the 1st, 2,3,,, the order of 524,525 lines, scan line by line.The picture of lining by line scan is called frame (frame), also so more interleaved picture more careful, but line by line scan the data volume of video signal also normally more than the twice of interlacing scan video signal data volume.
See also Fig. 1, Fig. 1 is the calcspar of known image playing system 10.Known image playing system 10 designs in an one chip usually.Known image playing system 10 is to carry out image processing for the signal of video signal of being imported by the shadow memory 20 of an outside 22, can be for the interlacing scan video signal 11 of display unit broadcast to export one.Image playing system 10 comprises an interlaced format picture processor 12 and a video information coder 14.Interlaced format picture processor 12 is from shadow memory 20, in the mode that meets alternate-line scanning signal of video signal 22 is read, and be sent among the video information coder 14, carry out the processing that low-pass filtering, brightness adjustment, colourity adjustment and contrast adjustment etc. are adjusted with convenient image, and this interlaced format signal encoding is become to meet the interlacing video signal 11 of the video signal specification of this image display.
See also Fig. 2, Fig. 2 is for being converted to the schematic diagram of video signal 31 line by line by the interlacing video signal 11 of Fig. 1.Desire to make the display unit that can line by line scan to present image with progressive scan mode, then Shu Ru video signal need be corresponding video signal line by line 31.In the known image playing system 10, converting interlacing video signal 11 to the method for video signal 31 line by line is to utilize an interlacing that is arranged on image playing system 10 outsides converter ic 13 line by line, to mend into a scanning linear signal in the mode of interpolation or emulation between two adjacent in the interlacing video signal 11 scanning linear signals, promptly utilizing interpolation or simulated mode is frame (frame) signal with field (field) conversion of signals, interlacing video signal 11 can be converted to video signal 31 line by line in this way.Because interlacing change-over circuit 13 line by line need design on another chip outside the image playing system 10, manufacturing cost is quite high, thereby this kind method is subjected to the restriction of cost in practical application.
See also Fig. 3, Fig. 3 for another known image playing system 30 in order to produce the calcspar of video signal 31 line by line.Known image playing system 30 is in order to produce video signal 31 line by line.Known image playing system 30 also can design on an one chip.
The known image playing system 30 of this kind further can meet the image processing that scans line by line according to signal of video signal 22 except having the identical functions with corresponding image Play System 10.This is owing to the function that has interpolation or emulation in the picture processor 32, can produce to meet the frame signal of lining by line scan when reading signal of video signal 22.In addition, video information coder 34 further can will become to meet the video signal line by line 31 of the video signal specification of this image display from the signal encoding of picture processor 32.
See also Fig. 4, Fig. 4 is the calcspar of the image playing system 30 of Fig. 3 in order to generation interlacing video signal 11.What deserves to be mentioned is that image playing system 30 has and image playing system 10 identical functions, also can export alternate-line scanning video signal 11 separately.When image playing system 30 when producing interlacing scan video signal 11, picture processor 32 does not use the function of interpolation or emulation, reads signal of video signal 22 in the mode identical with the picture processor 12 of Fig. 1.In other words, the picture processor 12 of this image playing system 30 has two kinds of patterns: pattern and interlaced mode line by line, so image playing system 30 visual demands are exported video signal 31 or alternate-line scanning video signal 11 line by line respectively.
The image playing system 30 of comparison diagram 3 and Fig. 4 can be learnt with the embodiment of the image playing system 10 of Fig. 2, need to form when lining by line scan video signal 31, image playing system 30 does not need to use outside interlacing change-over circuit 13 line by line, thereby can reduce manufacturing cost, but image playing system 30 optionally to play line by line scan video signal 31 or interlacing scan video signal 11, but can't make both play together only.
Summary of the invention
The purpose of this invention is to provide the image playing system of one chip design, simple and cost less expensive, and can export together and line by line scan and two kinds of video signals of interlacing scan, use for various image displays such as television set, projectors.
The present invention is a kind of image playing system (video playback system), and video signal and an interlacing video signal give at least one image display line by line to be used for producing simultaneously one.This image playing system includes a key frame processor, an interlace signal generation module and a video coding module, and wherein this interlace signal generation module comprises a brightness (luminance) row buffer, at least one colourity (chroma) row buffer and a control circuit.The signal of video signal (video signals) that this key frame processor (main picture processor) is transmitted according to shadow memory (memory), and produce corresponding main screen signal line by line.Main screen signal can be in follow-up via a predetermined image processing program line by line for this, generation progressive signal stream.This interlace signal generation module can receive this progressive signal stream, and use the temporary mode of an oem character set optionally this progressive signal stream to be stored in the row buffer, to rebuild interlace signal stream.This video coding module can be according to the video signal specification of this image display, and this that this progressive signal stream and this interlace signal flow point is not encoded into the video signal specification that meets this image display be video signal and this interlacing video signal line by line.By this this image playing system can with this line by line video signal export with this interlacing video signal show so that corresponding image display carries out image.
The present invention is under the image playing system framework of known one chip design, the design that adds an interlace signal generation module, make image playing system of the present invention need not using under the situation of an external circuit, still reach and export the purpose of lining by line scan together with the interlacing scan video signal.Because of having avoided the use of external circuit, the present invention can make manufacturing cost decline to a great extent.Adopt the image player of image playing system of the present invention, for example: digital laser video disk machine (DVD Player), can export the video signal of lining by line scan simultaneously in the most cost-effective mode, and interlacing scan video signal, therefore (for example: television set) need simultaneously external first image display of only accepting the interlacing scan video signal when this digital laser video disk machine, and second image display of the video signal of can accepting to line by line scan (for example: projector, or during the high-order television set), two image displays can bring into play simultaneously all that it is the most high-effect.
Can be about the advantages and spirit of the present invention by following detailed Description Of The Invention and appended graphic being further understood.
Description of drawings
Fig. 1 is the schematic diagram of known image playing system 10;
Fig. 2 is that the interlacing video signal 11 by Fig. 1 forms the device schematic diagram of video signal 31 line by line;
Fig. 3 is the schematic diagram of known image playing system 30;
Fig. 4 is that the known image playing system 30 of Fig. 3 is in order to produce the schematic diagram of interlacing video signal 11;
Fig. 5 is the schematic diagram of image playing system 50 of the present invention;
Fig. 6 is the schematic diagram that the image playing system 50 of Fig. 5 is exported interlacing video signal 11 separately;
Fig. 7 is the schematic diagram of another embodiment of the present invention image playing system 90;
Fig. 8 is the temporary mode schematic diagram of the oem character set that uses of the interlace signal rebuilding module 60 of Fig. 5.
Fig. 9 is interlace signal rebuilding module 60 schematic diagrames of the present invention; With
Figure 10 uses an outside progressive signal to flow 86 schematic diagrames for the image playing system 50 of Fig. 5.
The drawing reference numeral explanation
10,30: known image playing system 11: interlacing video signal
13: interlacing is change-over circuit 14,34 line by line: video information coder
20: shadow memory 22: signal of video signal
32: picture processor 50,90: image playing system
52: key frame processor 54: the auxiliary image processor
56: blender 58,96,98: preceding level processor
60,92: interlace signal generation module 61: brightness row buffer
62: video coding module 63: video coding module line by line
64: 65: the first colourity row of interlacing video coding module buffer
66: 67: the second colourity row of sprite decoder buffer
68: look control display menu processor 69: control circuit
72: low pass filter 74: the brightness adjuster
76: colourity adjuster 78: the contrast adjuster
80: main screen signal 81 line by line: the interlacing main screen signal
82: the sprite signal 83 line by line: interlacing sprite signal
84: osd signal 85 line by line: the interlacing osd signal
86,93: progressive signal stream 88,94: interlace signal stream
96: interlacing video signal co-generator line by line
Embodiment
See also Fig. 5, Fig. 5 is the calcspar of image playing system 50 of the present invention.Image playing system 50 comprises a key frame processor 52, an auxiliary image processor 54, a blender 56, one preceding level processor 58, an interlace signal generation module 60 and a video coding module 62.Auxiliary image processor 54 comprises a sprite decoder 66 and and looks control display menu processor 68.Preceding level processor 58 comprises a low pass filter 72, a brightness adjuster 74, a colourity adjuster 76 and a contrast adjuster 78.
Image playing system 50, be used for producing together one line by line video signal 31 and an interlacing video signal 11 give at least one image display, show to carry out image.
As shown in Figure 5, key frame processor 52, the signal of video signal 22 that can be transmitted according to shadow memory 20, and produce corresponding main screen signal line by line 80.If signal of video signal 20 interlacing forms, then key frame processor 52 carries out interpolation between adjacent scanning lines or simulation with signal of video signal 22 and produces main screen signal 80 line by line.If signal of video signal 20 is form line by line, then do not need the program of this interpolation or emulation, and can produce main screen signal 80 line by line by key frame processor 52.Main screen signal 80 includes the image data of the key frame of desiring playing video line by line.Main screen signal 80 produces progressive signal stream 86 through a predetermined image processing program line by line.
Should predetermined image processing program be carried out via auxiliary image processor 54, blender 56 and prime treatment circuit 58.
Auxiliary image processor 54 comprise sprite (Sub-picture) decoder 66 and look the control display menu (On Screen Display, OSD) processor 68.Sprite decoder 66 is according to signal of video signal 22, to be decoded into the corresponding signal of sprite line by line 82.Look control display menu processor 68 according to signal of video signal 22, produce corresponding osd signal line by line 84.But include in the sprite signal 82 line by line the sprite of superposition on key frame (as captions, trade mark,,, etc.) image data.Osd signal 84 includes the image data of looking control display menu (On Screen DisplayMenu, OSD Menu) that is beneficial to operate image playing system 50 line by line.56 in blender line by line sprite signal 82 and line by line osd signal 84 carry out mixing of signal with main screen signal 80 line by line, and then be sent to processing and the adjustment of carrying out image in the prime treatment circuit 58.
As shown in Figure 5, prime treatment circuit 58 comprises a low pass filter (lowpass filter) 72, one brightness adjuster (brightness adjuster) 74, one colourity adjuster (color adjuster) 76 and one contrast adjuster (contrast adjuster) 78.Main screen signal 80 further can carry out the adjustment of low-pass filtering, image brilliance, colourity and contrast by prime treatment circuit 58 after the mixing of signal line by line, and produces progressive signal stream 86.
Interlace signal generation module 60 can receive progressive signal stream 86, and uses the temporary mode of an oem character set optionally this progressive format signal to be stored in the inner row buffer, to rebuild interlace signal stream 88.Please refer to Fig. 9, Fig. 9 is interlace signal generation module 60 schematic diagrames of the present invention.Present embodiment is the color representation form that adopts brightness (Luminance), colourity (Chrominance), and Y represents brightness value, and C represents chromatic value (C comprises CB and CR, represents first and second chromatic value respectively).Therefore interlace signal generation module 60 inside have comprised brightness row buffer 61 with temporary monochrome information; The first colourity row buffer 65, the second colourity row buffer 67 are with temporary chrominance information; And one control circuit 69 with the access of control brightness, chrominance information.Defined three kinds of sampling forms among the MPEG-2, be respectively 4: 2: 0 sampling forms, 4: 2: 2 sampling forms, and 4: 4: 4 sample formats, represented three kinds of different chroma sampling frequencies respectively, this is that the people in the industry is known.Therefore can be provided with one or two colourity row buffer in the interlace signal generation module 60 and keep in chrominance information.
As shown in Figure 5, video coding module 62 includes a video coding module 63 and an interlacing video coding module 64 line by line.Video coding module 63 and interlacing video coding module 64 can flow progressive signal 86 and be encoded into the video signal line by line 31 and interlacing video signal 11 of the video signal specification that meets this image display respectively with interlace signal stream 88 line by line.
This image playing system can be with video signal 31 line by line with 11 outputs of interlacing video signal by this, show so that corresponding one or a plurality of image display can carry out image.
At this of particular note, the present invention so-called " (together) together " considers to cause transfer process between signal line by line video signal 31 is not that " (simultaneous) simultaneously " produces with interlacing video signal 11.In other words, no matter line by line whether the time point that produced of video signal 31 and interlacing video signal 11 is identical, can produce " together " line by line scan video signal 31 and interlacing scan video signal 11 and give image display and carry out the image playing system that image displays the play and all should be covered by in the category of claim of the present invention.In the image playing system 50 shown in Figure 5, key frame processor 52, sprite decoder 66 and look control display menu processor 68 threes and operate to meet the mode of lining by line scan.Only with output optionally line by line scan video signal 31 or interlacing scan video signal 11, both are play compared to Fig. 3 and known image playing system 30 shown in Figure 4 together.Image playing system 50 of the present invention uses the temporary mode of an oem character set with an interlace signal rebuilding module 60, and finally can make the video signal 51 of lining by line scan with 11 outputs of interlacing scan video signal.
See also Fig. 6, Fig. 6 is the calcspar that the image playing system 50 of Fig. 5 is exported interlacing video signal 11 separately.Image playing system 50 of the present invention also can be exported interlacing video signal 11 separately except making line by line video signal 31 with 11 outputs of interlacing video signal.When utilizing image playing system 50 separately during output interlacing video signal 11, key frame processor 52 does not carry out the interpolation between adjacent scanning lines or the processing of simulation.Key frame processor 52, sprite decoder 66 and look control display menu processor 68 and operate to meet interleaved mode respectively, according to signal of video signal 22, produce an interlacing main screen signal 81, an interlacing sprite signal 83 and an interlacing osd signal 85.This embodiment is same as the known technology of Fig. 4.Under this embodiment, interlace signal generation module 60 and line by line video coding module 64 there is no effect.
See also Fig. 7, Fig. 7 is the calcspar of another embodiment of the present invention image playing system 90.The image playing system 90 of Fig. 7 and the image playing system 50 main difference of Fig. 5 are the configuration of interlace signal generation module 92 circuit positions.Interlace signal generation module 92 uses the storing mode of an oem character set optionally this progressive format signal to be stored the progressive signal stream 93 that blender 56 is transmitted, to draw interlace signal stream 94.
As shown in Figure 7, progressive signal stream 93 carries out the adjustment of low-pass filtering, image brilliance, colourity and contrast via preceding level processor 96 with preceding level processor 98 respectively with interlace signal stream 94.And then progressive signal stream 93 and interlace signal stream 94 are encoded into the video signal line by line 31 and interlacing video signal 11 of the video signal specification that meets this image display respectively by video coding module line by line 63 and interlacing video coding module 64.
The embodiment of comparison diagram 5 and Fig. 7, the embodiment of Fig. 5 had carried out the adjustment of low-pass filtering, image brilliance, colourity and contrast earlier before using interlace signal generation module 60 generation interlace signal streams 88 as can be known, therefore can reduce the use of a prime treatment circuit.And only partly designed 64 liang of covers of video coding module 63 and interlacing video coding module circuit line by line respectively for the video coding that must handle respectively.
See also Figure 10, Figure 10 uses an outside progressive signal to flow 86 schematic diagrames for the image playing system 50 of Fig. 5.In the foregoing embodiments, image playing system 50 is in order to play as stored image data in the image Storage Medias such as VCD, DVD.As shown in figure 10, image playing system 50 of the present invention further can utilize the progressive signal stream 86 of an outside, to produce a video signal 31 and an interlacing video signal 11 line by line together.Generally speaking from the wired or wireless TV signal of high-order, for example, some sports casts adopt the bigger interlace signal stream 86 of data volume to outside progressive signal stream 86 when playing, in the hope of the quality of image quality in the motion.In addition, many cities change to the form of lining by line scan with the specification that country is also just planning wireless television signal, to meet the display unit with the function of lining by line scan.In the present embodiment, the interlace signal generation module 60 of image playing system 50 and video coding module 62 can be regarded as an interlacing video signal co-generator 96 line by line, with in the process that reads progressive signal stream 86, utilize interlace signal generation module 60 to produce interlace signal stream 88, and utilize video coding module 62 that two kinds of signal flows are encoded into interlacing video signal 31 and video signal 11 line by line.
See also Fig. 8, Fig. 8 is the temporary mode schematic diagram of the oem character set that uses of the interlace signal generation module 60 of Fig. 5.P1 is for constituting the progressive-scan signal of a picture.The odd number bar scanning-line signal of P1 (P1L1, P1L3, P1L5, ,) is kept, even number bar scanning-line signal (P1L2, P1L4, P1L6, ,) give up.The signal that keeps is stored to the one or more row buffers in the interlace signal generation module 60.And, therefore make data that interlace signal generation module 60 stores with half frequency output of P1 to produce an interleaved signal I1 because the speed of lining by line scan is interleaved twice.This is the conversion of the data of a picture.And the even number bar scanning-line signal (P2L1, P2L3, P2L5, ,) that will constitute the progressive-scan signal P2 of next picture keeps, odd number bar scanning-line signal (P2L2, P2L4, P2L6, ,) give up.And the signal that keeps is stored to one or more row buffers in the interlace signal generation module 60.Make data that interlace signal generation module 60 stores with half frequency output of P2 to produce the interleaved signal I2 that constitutes this picture.Next again picture then replaces again odd number bar scanning-line signal (P3L1, P3L3, P3L5, ,) is kept, and even number bar scanning-line signal (P3L2, P3L4, P3L6, ,) is given up.This is interlace signal generation module 60 of the present invention and uses the temporary mode of an oem character set optionally this progressive format signal to be stored, to rebuild the method for an interlaced format signal.Root can be converted to interlaced format signal 88 with progressive format signal 86 accordingly.Comprehensive the above, the present invention is under the framework of the image playing system of a known one chip design, the design that adds an interlace signal rebuilding module, make image playing system of the present invention need not using under the situation of an external circuit, still reach and export the purpose of lining by line scan simultaneously with the interlacing scan video signal.Because of having avoided the use of external circuit, the present invention can make manufacturing cost decline to a great extent.
By the above detailed description of preferred embodiments, hope can be known description feature of the present invention and spirit more, and is not to come category of the present invention is limited with above-mentioned disclosed preferred embodiment.On the contrary, its objective is that hope can contain in the category that is arranged in claim of the present invention of various changes and tool equality.

Claims (20)

1.一种影像播放系统,用来一起产生一逐行视讯信号与一隔行视讯信号予至少一影像显示装置,该影像播放系统包含有:1. An image playback system, used to generate a progressive video signal and an interlaced video signal together to give at least one image display device, the image playback system includes: 一主画面处理器,用于依据一影像存储器所传来的影像信号,而产生相对应的一逐行主画面信号,该逐行主画面信号可于后续经由一预定的影像处理程序,产生一逐行信号流;A main picture processor is used to generate a corresponding progressive main picture signal according to the video signal transmitted from an image memory, and the progressive main picture signal can be subsequently passed through a predetermined image processing program to generate a Progressive signal flow; 一隔行信号产生模块,其中包含至少一列缓存器,可接收该逐行信号流,并使用一奇偶交错的暂存方式选择性地将该逐行信号流储存起来,以产生一隔行信号流;以及An interlaced signal generating module, which includes at least one column buffer, which can receive the progressive signal stream and selectively store the progressive signal stream in a parity interleaved temporary storage method to generate an interlaced signal stream; and 一视讯编码模块,可依据该影像显示装置的视讯规格,来将该逐行信号流与该隔行信号流分别编码成符合该影像显示装置的视讯规格的该逐行视讯信号与该隔行视讯信号;A video encoding module, capable of encoding the progressive signal stream and the interlaced signal stream respectively into the progressive video signal and the interlaced video signal conforming to the video standard of the image display device according to the video standard of the image display device; 藉此该影像播放系统可将该逐行视讯信号与该隔行视讯信号一起提供予该影像显示装置以进行影像显示。Therefore, the image playing system can provide the progressive video signal and the interlaced video signal to the image display device for image display. 2.一种逐行隔行视讯信号共生装置,用于依据一逐行信号流进而一起产生一逐行视讯信号与一隔行视讯信号予至少一影像显示装置,该逐行隔行视讯信号共生装置包含有:2. A progressive and interlaced video signal co-generation device, used to generate a progressive video signal and an interlaced video signal to at least one image display device together according to a progressive signal stream, the progressive and interlaced video signal co-generation device includes: : 一隔行信号产生模块,其中包含至少一列缓存器,可接收一逐行信号流,并使用一奇偶交错的暂存方式选择性地将该逐行信号流储存起来,以产生一隔行信号流;以及An interlaced signal generating module, which includes at least one column buffer, capable of receiving a progressive signal stream and selectively storing the progressive signal stream in a parity interleaved temporary storage method to generate an interlaced signal stream; and 一视讯编码模块,可依据该影像显示装置的视讯规格,来将该逐行信号流与该隔行信号流分别编码成符合该影像显示装置的视讯规格的该逐行视讯信号与该隔行视讯信号;A video encoding module, capable of encoding the progressive signal stream and the interlaced signal stream respectively into the progressive video signal and the interlaced video signal conforming to the video standard of the image display device according to the video standard of the image display device; 藉此该影像播放系统可将该逐行视讯信号与该隔行视讯信号一起提供予该影像显示装置以进行影像显示。Therefore, the image playing system can provide the progressive video signal and the interlaced video signal to the image display device for image display. 3.如权利要求1所述的影像播放系统,其中该影像播放系统还包含一辅助画面处理器以及一混合器,该辅助画面处理器包含:3. The video playback system as claimed in claim 1, wherein the video playback system further comprises an auxiliary picture processor and a mixer, and the auxiliary picture processor comprises: 一子画面译码器,依据该影像存储器的影像信号,以译码成相对应的逐行子画面信号;以及a sub-picture decoder for decoding into corresponding progressive sub-picture signals according to the video signal of the video memory; and 一视控显示选单处理器,依据该影像存储器的影像信号,以产生相对应的逐行OSD信号;A video control display menu processor, according to the image signal of the image memory, to generate a corresponding progressive OSD signal; 其中该混合器会将该逐行子画面信号以及该逐行OSD信号与该逐行主画面信号进行信号的混合。Wherein the mixer will mix the progressive sub-picture signal, the progressive OSD signal and the progressive main picture signal. 4.如权利要求2所述的影像播放系统,其中该影像播放系统还包含一前级处理电路,以将所输入的信号进行影像的处理与调整,该前级处理电路包含一低通滤波器、一亮度调整器、一色度调整器以及一对比度调整器。4. The image playing system as claimed in claim 2, wherein the image playing system further comprises a pre-processing circuit to process and adjust the input signal, and the pre-processing circuit includes a low-pass filter , a brightness adjuster, a chromaticity adjuster and a contrast adjuster. 5.如权利要求4所述的影像播放系统,其中该预定的影像处理程序是将该逐行主画面信号经由该混合器混合,并且经由该前级处理电路处理与调整。5. The video playing system as claimed in claim 4, wherein the predetermined video processing program is to mix the progressive main picture signal through the mixer, and process and adjust through the front-end processing circuit. 6.如权利要求1所述的影像播放系统,其中该视讯编码模块包含一逐行视讯编码模块以及一隔行视讯编码模块。6. The video playback system as claimed in claim 1, wherein the video encoding module comprises a progressive video encoding module and an interlaced video encoding module. 7.如权利要求6所述的影像播放系统,其中该隔行视讯编码模块并会于后续将所储存的信号以该逐行信号流一半的频率读出而产生该隔行信号流。7. The image playback system as claimed in claim 6, wherein the interlaced video encoding module will subsequently read out the stored signal at half the frequency of the progressive signal stream to generate the interlaced signal stream. 8.如权利要求1所述的影像播放系统,其中该逐行信号流系由多个帧信号所组成,而所述帧信号是由多条扫描线信号所组成。8. The image playback system as claimed in claim 1, wherein the progressive signal stream is composed of a plurality of frame signals, and the frame signals are composed of a plurality of scan line signals. 9.如权利要求8所述的影像播放系统,其中该奇偶交错的暂存方式是指该隔行信号产生模块会对于所接收的相邻的一第一与一第二帧信号进行下列信号处理:9. The image playback system as claimed in claim 8, wherein the parity interleaved temporary storage means that the interlaced signal generation module will perform the following signal processing on the received adjacent first and second frame signals: 对于该第一帧信号只储存其中奇数条扫描线信号,而对于该第二帧信号只储存其中偶数条扫描线信号。For the first frame signal, only odd-numbered scanning line signals are stored, and for the second frame signal, only even-numbered scanning line signals are stored. 10.如权利要求8所述的影像播放系统,其中该奇偶交错的暂存方式是指该隔行信号产生模块会对于所接收的相邻的一第一与一第二帧信号进行下列信号处理:10. The image playing system as claimed in claim 8, wherein the parity interleaved temporary storage means that the interlaced signal generating module will perform the following signal processing on the received adjacent first and second frame signals: 对于该第一帧信号只储存其中偶数条扫描线信号,而对于该第二帧信号只储存其中奇数条扫描线信号。For the first frame signal, only the signals of the even scanning lines are stored, and for the second frame signal, only the signals of the odd scanning lines are stored. 11.如权利要求1所述的影像播放系统,其中该影像播放系统可连接至两个不同的影像显示装置,而该影像播放系统所产生的该逐行视讯信号与该隔行视讯信号可分别传送给上述两个影像显示装置以进行影像显示。11. The image playback system as claimed in claim 1, wherein the image playback system can be connected to two different image display devices, and the progressive video signal and the interlaced video signal generated by the image playback system can be transmitted separately Provide the above two image display devices for image display. 12.如权利要求1所述的影像播放系统,其中该隔行信号产生模块中的所述列缓存器为一亮度列缓存器与至少一色度列缓存器;该色度列缓存器的数量视色度取样频率与亮度取样频率比的不同而决定。12. The image playback system as claimed in claim 1, wherein the column registers in the interlaced signal generation module are a luma column register and at least one chroma column register; the number of the chroma column register depends on the color It is determined by the ratio of the brightness sampling frequency to the brightness sampling frequency. 13.一种利用一隔行信号产生模块而使一影像播放系统可一起产生一逐行视讯信号与一隔行视讯信号予至少一影像显示装置的方法,该影像播放系统包含有该隔行信号产生模块,其中包含至少一列缓存器;以及一视讯编码模块,可依据该影像显示装置的视讯规格,来将一逐行信号流与一隔行格信号流分别编码成符合该影像显示装置的视讯规格的该逐行视讯信号与该隔行视讯信号;13. A method for using an interlaced signal generating module to enable an image playback system to generate a progressive video signal and an interlaced video signal to at least one image display device, the image playback system comprising the interlaced signal generating module, It includes at least one row of buffers; and a video encoding module, which can encode a progressive signal stream and an interlaced signal stream respectively into the progressive signal conforming to the video specification of the image display device according to the video specification of the image display device. a line video signal and the interlaced video signal; 该方法包含下列步骤:The method comprises the following steps: 在该逐行信号流尚未经由该视讯编码模块进行编码之前,将该逐行信号流利用一奇偶交错的暂存方式选择性地储存于该隔行信号产生模块中,以产生该隔行信号流;以及Before the progressive signal stream is encoded by the video coding module, the progressive signal stream is selectively stored in the interlaced signal generating module by using a parity interleaved temporary storage method, so as to generate the interlaced signal stream; and 将该逐行信号流与该隔行信号流分别编码成该逐行视讯信号与该隔行视讯信号;encoding the progressive signal stream and the interlaced signal stream into the progressive video signal and the interlaced video signal, respectively; 藉此该影像播放系统可一起产生该逐行视讯信号与该隔行视讯信号予该影像显示装置以进行影像显示。In this way, the image playing system can generate the progressive video signal and the interlaced video signal to the image display device for image display. 14.如权利要求13所述的方法,其中该影像播放系统依据一外部的影像存储器所传来的影像信号,经由一预定的影像处理程序,而产生该逐行信号流14. The method according to claim 13, wherein the video playback system generates the progressive signal stream through a predetermined video processing program according to the video signal transmitted from an external video memory 15.如权利要求13所述的方法,其中该视讯编码模块包含一逐行视讯编码模块以及一隔行视讯编码模块。15. The method of claim 13, wherein the video encoding module comprises a progressive video encoding module and an interlaced video encoding module. 16.如权利要求15所述的方法,其中该隔行视讯编码模块并会于后续将所储存的信号以该逐行信号流一半的频率读出而产生该隔行信号流。16. The method of claim 15, wherein the interlaced video encoding module subsequently reads out the stored signal at half the frequency of the progressive signal stream to generate the interlaced signal stream. 17.如权利要求13所述的方法,其中该逐行信号流系由多个帧信号所组成,而所述帧信号系由多条扫描线信号所组成。17. The method of claim 13, wherein the progressive signal stream is composed of a plurality of frame signals, and the frame signal is composed of a plurality of scan line signals. 18.如权利要求17所述的方法,其中该奇偶交错的暂存方式是指该隔行信号产生模块会对于所接收的相邻的一第一与一第二帧信号进行下列信号处理:18. The method according to claim 17, wherein the parity interleaved temporary storage means that the interlaced signal generation module will perform the following signal processing on the received adjacent first and second frame signals: 对于该第一帧信号只储存其中奇数条扫描线信号,而对于该第二帧信号只储存其中偶数条扫描线信号。For the first frame signal, only odd-numbered scanning line signals are stored, and for the second frame signal, only even-numbered scanning line signals are stored. 19.如权利要求17所述的方法,其中该奇偶交错的暂存方式是指该隔行信号产生模块会对于所接收的相邻的一第一与一第二帧信号进行下列信号处理:19. The method according to claim 17, wherein the parity interleaved temporary storage means that the interlaced signal generating module will perform the following signal processing on the received adjacent first and second frame signals: 对于该第一帧信号只储存其中偶数条扫描线信号,而对于该第二帧信号只储存其中奇数条扫描线信号。For the first frame signal, only the signals of the even scanning lines are stored, and for the second frame signal, only the signals of the odd scanning lines are stored. 20.如权利要求17所述的方法,其中该隔行信号产生模块中的所述列缓存器为一亮度列缓存器与至少一色度列缓存器;该色度列缓存器的数量视色度取样频率与亮度取样频率比的不同而决定。20. The method according to claim 17, wherein the column registers in the interlaced signal generation module are a luma column register and at least one chroma column register; the number of the chroma column registers depends on the chroma sampling The frequency is determined by the ratio of the luminance sampling frequency.
CNB031436099A 2003-07-25 2003-07-25 A video playback system that can generate progressive scan and interlaced video signals together Expired - Lifetime CN1307837C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB031436099A CN1307837C (en) 2003-07-25 2003-07-25 A video playback system that can generate progressive scan and interlaced video signals together

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB031436099A CN1307837C (en) 2003-07-25 2003-07-25 A video playback system that can generate progressive scan and interlaced video signals together

Publications (2)

Publication Number Publication Date
CN1571503A true CN1571503A (en) 2005-01-26
CN1307837C CN1307837C (en) 2007-03-28

Family

ID=34471306

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB031436099A Expired - Lifetime CN1307837C (en) 2003-07-25 2003-07-25 A video playback system that can generate progressive scan and interlaced video signals together

Country Status (1)

Country Link
CN (1) CN1307837C (en)

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8292166B2 (en) 2011-01-07 2012-10-23 Echostar Technologies L.L.C. Performing social networking functions using matrix codes
US8386339B2 (en) 2010-11-23 2013-02-26 Echostar Technologies L.L.C. Ordering via dynamic matrix code generation
US8408466B2 (en) 2011-01-04 2013-04-02 Echostar Technologies L.L.C. Assisting matrix code capture by signaling matrix code readers
US8430302B2 (en) 2011-02-03 2013-04-30 Echostar Technologies L.L.C. Enabling interactive activities for content utilizing matrix codes
US8439257B2 (en) 2010-12-01 2013-05-14 Echostar Technologies L.L.C. User control of the display of matrix codes
US8443407B2 (en) 2011-02-28 2013-05-14 Echostar Technologies L.L.C. Facilitating placeshifting using matrix code
US8468610B2 (en) 2011-01-27 2013-06-18 Echostar Technologies L.L.C. Determining fraudulent use of electronic devices utilizing matrix codes
US8511540B2 (en) 2011-02-18 2013-08-20 Echostar Technologies L.L.C. Matrix code for use in verification of data card swap
US8534540B2 (en) 2011-01-14 2013-09-17 Echostar Technologies L.L.C. 3-D matrix barcode presentation
US8553146B2 (en) 2011-01-26 2013-10-08 Echostar Technologies L.L.C. Visually imperceptible matrix codes utilizing interlacing
US8550334B2 (en) 2011-02-28 2013-10-08 Echostar Technologies L.L.C. Synching one or more matrix codes to content related to a multimedia presentation
US8640956B2 (en) 2010-12-17 2014-02-04 Echostar Technologies L.L.C. Accessing content via a matrix code
US8786410B2 (en) 2011-01-20 2014-07-22 Echostar Technologies L.L.C. Configuring remote control devices utilizing matrix codes
US8833640B2 (en) 2011-02-28 2014-09-16 Echostar Technologies L.L.C. Utilizing matrix codes during installation of components of a distribution system
US8856853B2 (en) 2010-12-29 2014-10-07 Echostar Technologies L.L.C. Network media device with code recognition
US8875173B2 (en) 2010-12-10 2014-10-28 Echostar Technologies L.L.C. Mining of advertisement viewer information using matrix code
US8886172B2 (en) 2010-12-06 2014-11-11 Echostar Technologies L.L.C. Providing location information using matrix code
US8931031B2 (en) 2011-02-24 2015-01-06 Echostar Technologies L.L.C. Matrix code-based accessibility
US9148686B2 (en) 2010-12-20 2015-09-29 Echostar Technologies, Llc Matrix code-based user interface
US9280515B2 (en) 2010-12-03 2016-03-08 Echostar Technologies L.L.C. Provision of alternate content in response to QR code
US9329966B2 (en) 2010-11-23 2016-05-03 Echostar Technologies L.L.C. Facilitating user support of electronic devices using matrix codes
US9367669B2 (en) 2011-02-25 2016-06-14 Echostar Technologies L.L.C. Content source identification using matrix barcode
US9571888B2 (en) 2011-02-15 2017-02-14 Echostar Technologies L.L.C. Selection graphics overlay of matrix code
US9596500B2 (en) 2010-12-17 2017-03-14 Echostar Technologies L.L.C. Accessing content via a matrix code
US9652108B2 (en) 2011-05-20 2017-05-16 Echostar Uk Holdings Limited Progress bar
US9736469B2 (en) 2011-02-28 2017-08-15 Echostar Technologies L.L.C. Set top box health and configuration
US9781465B2 (en) 2010-11-24 2017-10-03 Echostar Technologies L.L.C. Tracking user interaction from a receiving device
US9792612B2 (en) 2010-11-23 2017-10-17 Echostar Technologies L.L.C. Facilitating user support of electronic devices using dynamic matrix code generation

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356306B1 (en) * 1997-02-28 2002-03-12 Sanyo Electric Co., Ltd. Digital camera capable of converting a progressive scan signal into an interlace scan signal
JP3353660B2 (en) * 1997-07-31 2002-12-03 日本電気株式会社 Image display processing system
JP3797208B2 (en) * 2001-11-30 2006-07-12 日本ビクター株式会社 Color moving image encoding apparatus, decoding apparatus, encoding method, decoding method, and color moving image code string transmission method

Cited By (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9329966B2 (en) 2010-11-23 2016-05-03 Echostar Technologies L.L.C. Facilitating user support of electronic devices using matrix codes
US8386339B2 (en) 2010-11-23 2013-02-26 Echostar Technologies L.L.C. Ordering via dynamic matrix code generation
US9792612B2 (en) 2010-11-23 2017-10-17 Echostar Technologies L.L.C. Facilitating user support of electronic devices using dynamic matrix code generation
US10382807B2 (en) 2010-11-24 2019-08-13 DISH Technologies L.L.C. Tracking user interaction from a receiving device
US9781465B2 (en) 2010-11-24 2017-10-03 Echostar Technologies L.L.C. Tracking user interaction from a receiving device
US8439257B2 (en) 2010-12-01 2013-05-14 Echostar Technologies L.L.C. User control of the display of matrix codes
US9280515B2 (en) 2010-12-03 2016-03-08 Echostar Technologies L.L.C. Provision of alternate content in response to QR code
US8886172B2 (en) 2010-12-06 2014-11-11 Echostar Technologies L.L.C. Providing location information using matrix code
US8875173B2 (en) 2010-12-10 2014-10-28 Echostar Technologies L.L.C. Mining of advertisement viewer information using matrix code
US9596500B2 (en) 2010-12-17 2017-03-14 Echostar Technologies L.L.C. Accessing content via a matrix code
US8640956B2 (en) 2010-12-17 2014-02-04 Echostar Technologies L.L.C. Accessing content via a matrix code
US9148686B2 (en) 2010-12-20 2015-09-29 Echostar Technologies, Llc Matrix code-based user interface
US10015550B2 (en) 2010-12-20 2018-07-03 DISH Technologies L.L.C. Matrix code-based user interface
US8856853B2 (en) 2010-12-29 2014-10-07 Echostar Technologies L.L.C. Network media device with code recognition
US8408466B2 (en) 2011-01-04 2013-04-02 Echostar Technologies L.L.C. Assisting matrix code capture by signaling matrix code readers
US8746554B2 (en) 2011-01-07 2014-06-10 Echostar Technologies L.L.C. Performing social networking functions using matrix codes
US8292166B2 (en) 2011-01-07 2012-10-23 Echostar Technologies L.L.C. Performing social networking functions using matrix codes
US9092830B2 (en) 2011-01-07 2015-07-28 Echostar Technologies L.L.C. Performing social networking functions using matrix codes
US8827150B2 (en) 2011-01-14 2014-09-09 Echostar Technologies L.L.C. 3-D matrix barcode presentation
US8534540B2 (en) 2011-01-14 2013-09-17 Echostar Technologies L.L.C. 3-D matrix barcode presentation
US8786410B2 (en) 2011-01-20 2014-07-22 Echostar Technologies L.L.C. Configuring remote control devices utilizing matrix codes
US8553146B2 (en) 2011-01-26 2013-10-08 Echostar Technologies L.L.C. Visually imperceptible matrix codes utilizing interlacing
US8468610B2 (en) 2011-01-27 2013-06-18 Echostar Technologies L.L.C. Determining fraudulent use of electronic devices utilizing matrix codes
US8430302B2 (en) 2011-02-03 2013-04-30 Echostar Technologies L.L.C. Enabling interactive activities for content utilizing matrix codes
US9571888B2 (en) 2011-02-15 2017-02-14 Echostar Technologies L.L.C. Selection graphics overlay of matrix code
US8511540B2 (en) 2011-02-18 2013-08-20 Echostar Technologies L.L.C. Matrix code for use in verification of data card swap
US8931031B2 (en) 2011-02-24 2015-01-06 Echostar Technologies L.L.C. Matrix code-based accessibility
US9367669B2 (en) 2011-02-25 2016-06-14 Echostar Technologies L.L.C. Content source identification using matrix barcode
US8550334B2 (en) 2011-02-28 2013-10-08 Echostar Technologies L.L.C. Synching one or more matrix codes to content related to a multimedia presentation
US9686584B2 (en) 2011-02-28 2017-06-20 Echostar Technologies L.L.C. Facilitating placeshifting using matrix codes
US9736469B2 (en) 2011-02-28 2017-08-15 Echostar Technologies L.L.C. Set top box health and configuration
US8443407B2 (en) 2011-02-28 2013-05-14 Echostar Technologies L.L.C. Facilitating placeshifting using matrix code
US10015483B2 (en) 2011-02-28 2018-07-03 DISH Technologies LLC. Set top box health and configuration
US10165321B2 (en) 2011-02-28 2018-12-25 DISH Technologies L.L.C. Facilitating placeshifting using matrix codes
US8833640B2 (en) 2011-02-28 2014-09-16 Echostar Technologies L.L.C. Utilizing matrix codes during installation of components of a distribution system
US9652108B2 (en) 2011-05-20 2017-05-16 Echostar Uk Holdings Limited Progress bar

Also Published As

Publication number Publication date
CN1307837C (en) 2007-03-28

Similar Documents

Publication Publication Date Title
CN1571503A (en) A video playback system that can generate progressive scan and interlaced video signals together
US5912710A (en) System and method for controlling a display of graphics data pixels on a video monitor having a different display aspect ratio than the pixel aspect ratio
CN1230790C (en) Method and apparatus for processing DVD video
CN1153451C (en) A multiple format video signal processor
US7880808B2 (en) Video signal processing apparatus to generate both progressive and interlace video signals
CN102523372B (en) Shared memory multi video channel display apparatus and methods
US8639049B1 (en) Systems and methods for image coding and processing
CN1484914A (en) Method and apparatus for interface progressive video conversion
CN1882059A (en) Image processing apparatus capable of adjusting image quality by using moving image samples
CN87103561A (en) The display packing and the device of image
CN1236266A (en) Decoder device and receiver utilizing it
CN1997155A (en) Hybrid multiple bit-depth video processing architecture
CN1181670C (en) Superimposed image processing device and superimposed image display device
CN101065962A (en) Method and apparatus for encoding and for decoding a main video signal and one or more auxiliary video signals
CN1649397A (en) Device and method for processing video signal
JPH08172573A (en) Data rate conversion and method thereof
JPH10271529A (en) Image processor, still image pickup device and image processing method
CN1168310C (en) Signal processing device and method
CN100375509C (en) Method for scaling sub-picture data presentation size, video processing circuit and digital laser video disc playing system
CN1277697A (en) Method and apparatus for mapping a digital versatile Disk (DVD) image onto high resolution computer display device
US20110052138A1 (en) Image recording device, camera, image reproduction device, image recording method, image reproduction method, program, and integrated circuit
CN1822657A (en) Method and device for displaying frame rate converted video on interlaced display device
CN1283362A (en) Method and apparatus for reducing flicker in television display of network application data
JPH11177990A (en) Mode encoding method for binary shape signal encoding
CN1324886C (en) Device and method for processing digital video data

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20070328