CN1522557A - Fabricating method for printed circuit board - Google Patents
Fabricating method for printed circuit board Download PDFInfo
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- CN1522557A CN1522557A CNA028132009A CN02813200A CN1522557A CN 1522557 A CN1522557 A CN 1522557A CN A028132009 A CNA028132009 A CN A028132009A CN 02813200 A CN02813200 A CN 02813200A CN 1522557 A CN1522557 A CN 1522557A
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- anchor clamps
- silicon wafer
- parts
- end difference
- slope
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 44
- 239000010703 silicon Substances 0.000 claims abstract description 44
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 238000005530 etching Methods 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims description 42
- 230000015572 biosynthetic process Effects 0.000 claims description 21
- 239000011248 coating agent Substances 0.000 claims description 13
- 238000000576 coating method Methods 0.000 claims description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 11
- 150000003376 silicon Chemical class 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 9
- 238000007772 electroless plating Methods 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 230000033228 biological regulation Effects 0.000 claims description 3
- 238000001020 plasma etching Methods 0.000 claims description 2
- 230000007423 decrease Effects 0.000 claims 2
- 210000001503 joint Anatomy 0.000 claims 2
- 230000008020 evaporation Effects 0.000 claims 1
- 238000001704 evaporation Methods 0.000 claims 1
- 230000003746 surface roughness Effects 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 38
- 238000000059 patterning Methods 0.000 abstract 2
- 239000010409 thin film Substances 0.000 abstract 2
- 239000004020 conductor Substances 0.000 abstract 1
- 239000000463 material Substances 0.000 description 25
- 238000003384 imaging method Methods 0.000 description 6
- 230000003321 amplification Effects 0.000 description 5
- 239000010931 gold Substances 0.000 description 5
- 238000003199 nucleic acid amplification method Methods 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000012467 final product Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000007704 transition Effects 0.000 description 3
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000003754 machining Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000009987 spinning Methods 0.000 description 2
- 229910001369 Brass Inorganic materials 0.000 description 1
- 241000111040 Micrasema minimum Species 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000010951 brass Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 210000002421 cell wall Anatomy 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000013039 cover film Substances 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005194 fractionation Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- -1 laminated plate Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002815 nickel Chemical class 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000013517 stratification Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68778—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting substrates others than wafers, e.g. chips
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
A method for manufacturing a very-thin printed wiring board a plurality of which can be stacked, characterized by comprising the steps: A. preparing a silicon wafer (20) having a thickness of 50 to 300 [micro]m; B. attaching the silicon wafer (20) to a jig (10) for holding only the edge of the silicon wafer (20), covering the whole surface of the silicon wafer (20) with a film, and fixing the silicon wafer (20) to the jig (10); C. patterning the film to expose the front and back faces of the silicon wafer (20); D. making a through hole in a predetermined position of the exposed silicon wafer (20), and forming a metallic thin film on the exposed surface of the silicon wafer (20) having the through hole; and E. patterning the metallic thin film, and performing etching so as to produce a predetermined conductor pattern.
Description
Technical field
The present invention relates to as thin as a wafer silicon wafer is the manufacture method of the printed circuit board of base material.
Background technology
Corresponding to the requirement of the high-density installation of electronic component, printed circuit board also adopts the circuit board (multilayer printed wiring board) of multiple stratification.But multilayer printed wiring board is adopted ceramic substrate, laminated plate, composite laminated plate etc. as its substrate, and the thickness of substrate does not also meet the electrical characteristic requirement.
Summary of the invention
The present invention is a purpose with the manufacture method that the printed circuit board as thin as a wafer that can make printed substrate that can multistage lamination is provided.
That is the present invention is to comprise the manufacture method that following steps are the printed circuit board of feature.Described step is
A. preparing thickness is the silicon wafer of 50 μ m~300 μ m;
B. this silicon wafer is installed on the anchor clamps (jig) that can only support its edge part, each anchor clamps covers its whole with film, and this silicon wafer is fixed on these anchor clamps;
C. make this film form pattern, and the front and back of silicon wafer is exposed (this part of exposing is in order to form the career field that wiring pattern, through hole and relief region are used);
D. on the assigned position of this silicon wafer that exposes, form through hole, form metallic film on the face in exposing of this silicon wafer that comprises this through hole simultaneously; And,
E. make this metallic film form pattern, then carry out etching, obtain the conductive pattern of regulation.
Description of drawings
Fig. 1 is a block diagram of representing the manufacture method of printed circuit board of the present invention according to the flow process of master operation.
Fig. 2 is the plane graph that the anchor clamps that use in the manufacture method with printed circuit board of the present invention are represented with the baseplate material of its support.
Fig. 3 is the part amplification profile (along the A-A line) of a form of supporting the anchor clamps of baseplate material shown in Figure 2.
Fig. 4 is the part amplification profile (along the A-A line) of other forms of supporting the anchor clamps of baseplate material shown in Figure 2.
Fig. 5 is the part amplification profile (along the A-A line) of another form of supporting the anchor clamps of baseplate material shown in Figure 2.
Fig. 6 is the part amplification profile (along the A-A line) of a form again of supporting the anchor clamps of baseplate material shown in Figure 2.
Fig. 7 supports the anchor clamps of baseplate material shown in Figure 3 to cover with film, and makes the part amplification profile of the state that the front and back of this baseplate material exposes.
Here, each symbol is represented respectively:
10 anchor clamps
The main part of 10a anchor clamps
The end difference of 10b anchor clamps
The ramp of 10c anchor clamps (side ramp)
The ramp of 10d anchor clamps (the opposing party's ramp)
One side's of 11 anchor clamps component parts
The end difference of one side's of 11a anchor clamps component parts
One side's of 11b anchor clamps component parts (main part)
The ramp of one side's of 11c anchor clamps component parts or the ramp of main part (side ramp)
The ramp (the opposing party's ramp) of one side's of 11d anchor clamps component parts (main part)
The opposing party's of 12 anchor clamps component parts
The end difference of the opposing party's of 12a anchor clamps component parts
The opposing party's of 12b anchor clamps component parts (annular element)
The ramp of the opposing party's of 12c anchor clamps component parts
The groove of 13 anchor clamps
14 peristomes
15 cover films
20 baseplate materials
The edge part of 20a baseplate material
Embodiment
Accompanying drawing (except that Fig. 1, in order to correlation and the structure of representing each parts, illustrated size is not an actual size) below with reference to expression one execution mode elaborates to the present invention.
What Fig. 1 represented is the process chart of standard of the present invention.
A. the preparation of substrate
In the present invention, baseplate material 20 adopts the silicon wafer that is cut out by spindle.Its thickness is that (silicon wafer used of semiconductor is 8 inches to 50~300 μ m, is 735 μ m.Minimum is the thickness about 30 μ m under the situation of chip status, and this is the wafer that cuts down from spindle to be carried out the attrition process attenuate with additive method form).Again, its surperficial roughness be 1000 ~5000 (10 mean roughness of regulation on the JIS B of Japanese Industrial Standards 0601: enough Rz), do not need to be finish-machined to semiconductor with such mirror finish.
B. on anchor clamps, install
The baseplate material of preparing in preceding working procedure 20 is because thin thickness is considered operability and machining accuracy in the processing after this, with this substrate with 10 supports of special anchor clamps.Specifically, as shown in Figure 2, the edge part 20a of this substrate is carried end difference 10b that the edge part in the main part 10a that is placed at these anchor clamps is provided with to be gone up and (becomes the form that is formed at full week as shown, but also can along the circumferential direction form scattered claw-like with predetermined distance.In this case, the stability consideration from guaranteeing to support should be provided with 3 places at least) upward (as described later, make these anchor clamps and this substrate form one with film, therefore need only mounting usually thereon) at next process.Again, anchor clamps 10 shown in Figure 3 are made of a parts 10a (hereinafter referred to as " main parts of anchor clamps "), but, this substrate is held on these anchor clamps for being propped up more reliably, also these parts can be divided into two parts 11 and 12, inner edge portion at two parts is provided with end difference 11a respectively, 12a (height of step portion be respectively this substrate thickness 1/2), become the form (with reference to Fig. 4) of the edge part 20a of this substrate being clamped with two parts, the inner edge portion that only also can form at parts 11 is provided with end difference 11a (its height is identical with the thickness of this substrate), another parts 12 its lower surfaces are smooth, the leading section of available this lower surface presses the form (with reference to Fig. 5) of mounting in the upper surface of the edge part 20a of this substrate of this end difference, can also be these anchor clamps to be made (actual is to make two parts 11 that constitute as Fig. 4 and anchor clamps shown in Figure 5 by the main part 11b with end difference, the form of 12 being integral, form this end difference, make its bottom be formed at 1/2 place of hanging down this substrate thickness than the center of this main part thickness), and with the depth of this end difference as its width, its peripheral edge portion is connected to the deep of the end difference of these anchor clamps, form (with reference to Fig. 6) that plectane 12b in fact in the form of a ring (the opposing party's that Fig. 5 shows parts 12 only become the form of its leading section) constitutes.Among the figure, symbol 14 is that (Fig. 2 is depicted as on these anchor clamps the state that this substrate is installed, and therefore, symbol 20 and 14 and 20a, 10b, 11a, 12a and 12b is marked in same place respectively for the peristome of these anchor clamps.Symbol 10a, 11,11b and 12, owing to be under the upper surface of their represented parts and state that lower surface joins, to see from above, so also be marked in same place).Again, constitute the ramp 10c of the parts of these anchor clamps, 10d, 11c, 11d, 12c, 11d all be for the uniform covering of these anchor clamps in the covering process of realizing being undertaken and this substrate by following film and constitute like this forming forming of operation (1) and/or (2) and conductive pattern make coated resist in the operation thickness homogenizing of metallic film (radial arrangement use groove apply applicator-; The smooth discharge of rotation coating-residue resist).Thereby its angle can also have the diameter of these anchor clamps according to the diameter that can prop up this substrate that is held in these anchor clamps, the character of the resist of coating is suitably set in addition.Usually can be selected in 3~10 ° scope.In addition, the bight of these anchor clamps, for to for example from outer peripheral face up and down the part and the corner portion of surface transition cover reliably with certain film in next procedure, can carry out suitable chamfering in advance and form R.
Here, these anchor clamps are the rigidity that has to a certain degree, and excellent conductivity and chemically-resistant medicament arranged, (anchor clamps are made of two parts to adopt metal materials making such as aluminium, copper, brass, the one parts are in the form of plectane in the form of a ring, its weight also helps the support to this substrate, therefore, preferably adopts metal to make).In addition, the setting as described below of the end difference of these anchor clamps, promptly thereon under the state of this substrate of mounting, the distance between the upper surface of these anchor clamps and the upper surface of this substrate: H (under Fig. 4 and state shown in Figure 5, is the distance between the upper surface of the upper surface of these another parts of anchor clamps and this substrate; Under state shown in Figure 6, be the distance of the upper surface of the upper surface of main part of these anchor clamps and this substrate) to equal the distance between the lower surface of the lower surface of these anchor clamps and this substrate: H (under Fig. 4 and state shown in Figure 5, be the distance between the lower surface of the lower surface of these anchor clamps one parts and this substrate; Under state shown in Figure 6, be the distance of the lower surface of the lower surface of main part of these anchor clamps and this substrate).For seeking the densification of conductive pattern, the upper and lower surface of this substrate is formed the place flexible Application as it, the exposure in forming as its pattern that forms operation can be put upside down simply by upper and lower surface and be finished.Again, express in the drawings with respect to as 1 silicon wafer of this baseplate material form with 1 this anchor clamps, but can obtain certainly (considering with the form of this anchor clamps from the flexibility of the working region of guaranteeing to expose with respect to the multi-disc silicon wafer, correspond to one by one, on the other hand, consider, should adopt many 1 correspond to from the formation efficient of following metallic film, therefore, can according to circumstances do suitably to select).Also have, the anchor clamps among the figure come down to square, but its profile also can be got circle or polygon certainly.Also consider the synthetic distribution of these anchor clamps, the upper surface of these anchor clamps and lower surface and with slope that they link to each other on be provided with radial many (as long as its number be according to the diameter of this substrate that can support on these anchor clamps, thereby the diameter that also has these anchor clamps carries out suitably selected getting final product) (its initial point or terminal point are the peripheral ends of these anchor clamps to the groove 13 used of air-out; Its terminal point or initial point are interior all ends on the slope of these anchor clamps).This is in order to carry out following film covering work reliably.Here, the shape of this groove (section) is so long as the air that films such as semicircle, semiellipse, square, triangle exist between these anchor clamps and this substrate and film when covering can successfully be extracted out, and what shape can.But, be that the sealing of guaranteeing film preferably is pre-formed R to the transition portion of the transition of the upper and lower surface of the ramp that comprises these anchor clamps from the upper end of this cell wall.
C. cover with film
In order to ensure machining accuracy thereafter, cover fixing together with these anchor clamps with 14 pairs these baseplate materials that are held in these anchor clamps of film.As this film, can adopt dried resist, for example the dried resist of for example minus can be listed as candidate from the consideration of handling that makes things convenient for.Again, during the covering carried out with this film, for example adopting, vacuum layer platen press etc. makes this film be close to this anchor clamps integral body of supporting this baseplate material, and by making this film form pattern, make this substrate edge part 20a the inboard nearby the front and back of this baseplate material beyond the part expose that (with reference to Fig. 7, this baseplate material closely is supported on these anchor clamps under the state that more than half (scope that arrow is pointed out among the figure) that make its front and back exposed.Also have, because Fig. 7 is a profile, this cover film also should be beaten oblique line originally and represented, but for simplicity, oblique line omits).
D. the formation of through hole
For carrying out the multilayer laminated of printed substrate, on the assigned position of this baseplate material, form through hole.The thin thickness of this baseplate material is so as the formation method of this through hole, be suitable for adopting laser, such as carbon dioxide gas volumetric laser or YAG laser beam perforation method, method for plasma etching, photolithograph method etc.
E. the formation of metallic film-1
For guaranteeing that following metallic film-2 is close to, on the surface of the exposed portions serve of this baseplate material, form metallic film-1, for example the film of ITO or copper etc. (thickness is at least 50 ).As its method, can enumerate vapour deposition method.On the other hand, the so thick also passable surely purposes of variable thickness for the metallic film of gained, the also available electroless plating method of this metallic film-1 is (after forming the film of nickel, replace the part of this nickel film with gold) formation (this moment, formed film was that lower floor or basalis are nickel, and upper strata or top layer are the composite membranes of gold).Also have, this metallic film-1 not only forms on the surface of this baseplate material, also is formed on the wall of preformed through hole.
F. the formation of metallic film-2
Form the metallic film-2 that forms on the surface of this baseplate material of metallic film-1 as the main body of conductive pattern, for example Cu etc. thereon.As its method, can list electroless plating method (using at operation E under the situation of electroless plating method) without this procedure.Obtain in hope being more suitable for using galvanoplastic under the situation of thicker metallic film (thickness is more than the 3 μ m).In addition, this metallic film also is formed on the wall of preformed through hole not only on the surface of this baseplate material.
G. the formation of conductive pattern
The same with the formation of the conductive pattern of excellence, carry out resist-coating and (get final product according to usual method.But, using the groove coating that makes this anchor clamps rotation after only applying to apply the method that combines and can make the consumption figure of resist few with rotation with the method for groove applicator or with the groove applicator, recess also can be coated onto simultaneously, is desirable method.Also have, the footpath that the groove applicator is configured in anchor clamps 10 and substrate 20 makes progress, also can make this groove applicator is the pivot rotation with the center of these anchor clamps and this substrate), exposure imaging (metallic film of the part beyond the desired conductive pattern is exposed), etching remove the metallic film that exposes, and carries out the removal of peeling off of resist.In addition, as this baseplate material is fixed in the film that these anchor clamps are used, adopt under the situation of dry film of minus, here the resist that uses adopts eurymeric.This is in order to prevent that this Film Fractionation is in the imaging liquid that uses in this operation.
H. other
At first, operation manufacturing by before this has the circuit board as the function of printed circuit board, cut off according to the size of hope then, obtain printed circuit board, if also need further on this printed circuit board, to form protruding layer, can before cut-out, carry out coating, the exposure imaging (protruding layer formation place in the conductive pattern is exposed) of resist, the formation of protruding layer (can be adopted the plating of the solution that contains gold ion.In addition,, can at first form the bottom that constitutes by copper or nickel etc., only get final product in that the top layer of this bottom is gold-plated because protruding layer need have the height of certain degree), resist peel off a series of operation such as removal, or cover with scolder at assigned position according to usual method.
Up to now, the new situation that forms conductive pattern on substrate is described, but adopt the method for making of anchor clamps of the present invention to be characterised in that, even preceding unprecedented substrate (silicon wafer) as thin as a wafer, also can eliminate the problem that causes because of too thin, so for the situation that has formed conductive pattern on the substrate, the situation that for example only forms protruding layer on the IC that forms circuit also is suitable for.Incidentally, in existing IC makes, (substrate that forms protruding layer approaches use to keep the back side of the substrate (silicon wafer) of original thickness to be ground to the method that forms protruding layer behind the desired thickness with the physical grinding method, so inconvenient operation), or the substrate (silicon wafer) that keeps original thickness go up form protruding layer after again by methods such as dry ecthings with the grinding back surface of this substrate method (, needing suitable expense) because dry ecthing equipment need be set to desirable thickness.
Embodiment
Adopt 8 inches silicon wafer (thickness: 200 μ m; Nominal diameter: 200mm), make 20 of printed circuit boards by following main points.
1. baseplate material support anchor clamps
Use the anchor clamps (concrete form is seen Fig. 3) of following specification
Vertical: 230mm
Horizontal: 230mm
Thickness: 1mm
Peristome diameter: 196mm
End difference width: 2mm
The formation scope of end difference: whole circumference
The gradient of upper ramps: about 7.6 °
The gradient on slope, bottom: about 4.6 °
2. film covers
With vacuum laminator (ニ チ go-モ-ト Application corporate system, CVA MODEL 725), with mounting in the silicon wafer of the end difference of above-mentioned anchor clamps two in the face of each described anchor clamps with dry film (ニ チ go-モ-ト Application corporate system, NIT315; Thickness: 15 μ m) cover, this silicon wafer adherence is fixed on these anchor clamps, then, the dry film of this covering is carried out exposure imaging, guarantee that on this silicon wafer diameter is the working region (two sides) of 190mm by usual method.
3. the formation of through hole
With forming 10 through hole (diameters: 100 μ m) on wet etch method each silicon wafer in this working region.
4. the formation of metallic film-1
Use spray equipment (Japanese vacuum corporate system SH-450), the silicon wafer (two sides in this working region.The inwall that comprises through hole) goes up formation metallic film-1 (ITO; Thickness: 100 ) (object wafer number: 1).
With electroless plating method (using メ Le テ Star Network ス corporate system メ Le プ レ-ト Ni-867M1~M2 and Au-601), form metallic film-1 (Ni+Au again; Thickness: 0.5 μ m) (object wafer number: 1).
5. the formation of metallic film-2
Utilize electroless plating (using シ プ レ イ Off ア one イ one ス ト corporate system Cu Posit 251), formerly form metallic film-2 (Cu again on the metallic film-1 with spraying process formation; Thickness: 20 μ m)
6. the formation of conductive pattern
Applying resist (シ プ レ イ Off ア one イ one ス ト corporate system eurymeric resist: SPR-6800) respectively on the above-mentioned metallic film-2 and on the metallic film-1 that only forms with electroless plating method, then carry out exposure imaging etching resist and peel off, go up at this silicon wafer (two sides) and form wiring pattern.Also have, main points are as described below in detail.
The coating machine that uses: Hirata Spinning Ltd.'s system groove coating machine (α coating machine)
Resist-coating thickness: 10 μ m (dry back: 3 μ m)
Mask pattern: the L/S that adopts 3 μ m
Exposure light source: use the white イ Application of the order ベ ス ト メ Application ト system 200 φ PROJ-2001 of Co., Ltd.
Etching solution: use シ プ レ イ Off ア one イ one ス ト corporate system V Posit Etch746
Stripper: use シ プ レ イ Off ア one イ one ス ト corporate system リ system one バ one 1177A
7. the formation of protruding layer
Apply resist (シ プ レ イ Off ア one イ one ス ト corporate system eurymeric resist: SPR-6800), then carry out the exposure imaging platedresist and peel off, form the protruding layer of gold at the high spot of this wiring pattern.In addition, main points are as described below in detail.
The coating machine that uses: Hirata Spinning Ltd.'s system groove coating machine (α coating machine).The direction of groove is the radial direction of this substrate.
Resist-coating thickness: 10 μ m
Mask pattern: it is 100 μ m φ and 200 μ m φ that projection goes out diameter
Exposure light source: use the white イ Application of the order ベ ス ト メ Application ト system 200 φ PROJ-2001 of Co., Ltd.
Electroplate liquid: the エ バ ロ Application Ni BM-2 (end is used) and the オ one ロ レ プ ト ロ レ ス SMT250 (gold-plated) that use リ ロ Na one Le corporate system respectively
Stripper: use シ プ レ イ Off ア one イ one ス ト corporate system リ system one バ one 1177A
8. cutting
According to existing IC sheet cutting method
(20mm * 20mm) 5 layers of above-below direction laminations, full wiring plate conducting is confirmed in energising with completed printed circuit board.
Industrial applicability
As mentioned above, adopt the present invention, can provide the thickness that can make substrate and the requirement on the electrical characteristic to take into account The manufacture method of printed circuit board as thin as a wafer that can be multilayer laminated.
Claims (13)
1. the manufacture method of a printed circuit board is characterized in that, comprises following steps, promptly
A. preparing thickness is the silicon wafer of 50 μ m~300 μ m;
B. this silicon wafer is installed on the anchor clamps that can only support its edge part, covers its whole, this silicon wafer is fixed on these anchor clamps with film;
C. make this film form pattern, and the front and back of silicon wafer is exposed;
D. on the assigned position of the silicon wafer that this quilt exposes, form through hole, form metallic film on the face in exposing of this silicon wafer that comprises this through hole simultaneously;
E. make this metallic film form pattern, then carry out etching, to obtain the conductive pattern of regulation.
2. the method for claim 1 is characterized in that,
After described conductive pattern forms, carry out the coating of resist again, form pattern, then on the assigned position on this conductive pattern, implement to form protruding layer with gold-plated as bottom of copper or nickel.
3. method as claimed in claim 1 or 2 is characterized in that, described silicon wafer has the surface roughness of 1000 ~5000 .
4. as each the described method in the claim 1~3, it is characterized in that described film is the dry film of minus, the resist that is used for described metallic film formation pattern is an eurymeric.
5. as each the described method in the claim 1~4, it is characterized in that the formation of described metallic film is to utilize the method for evaporation and electroless plating copper or electroless nickel plating-Jin to carry out.
6. method as claimed in claim 5 is characterized in that, behind electroless plating copper, electroplates again.
7. as the method for each record in the claim 1~6, it is characterized in that the formation of described through hole utilizes laser beam perforation method, method for plasma etching or photolithograph method to carry out.
8. the anchor clamps of silicon seal carving brush circuit layout card manufacturing usefulness are that there is opening in heart portion therein, but nearby have the silicon seal carving brush circuit layout card manufacturing usefulness of end difference of the periphery of mounting silicon wafer at this opening, in fact are square or circular anchor clamps; It is characterized in that,
Make the spigot shaft coaxle ground of the thickness direction of the central shaft of thickness direction of these anchor clamps and this silicon wafer form described end difference;
These anchor clamps possess: horizontal upper surface and lower surface are arranged, the slope, below of the linearity that rises to the inner periphery end of the horizontal plane of this end difference from this lower surface and go up from this towards the wall upper end of this end difference or with the slope, top of the linearity of the same gradient decline in this slope, below: and
Have this upper and lower surface and should on the downslope towards this opening radially, it holds many grooves of front end of the horizontal plane that is the terminal of the upper end of wall of the excircle end of this upper and lower surface and this end difference or this upper ramps and this end difference all the time.
9. anchor clamps as claimed in claim 8 is characterized in that, described anchor clamps are made of parts.
10. anchor clamps as claimed in claim 8, it is characterized in that, described anchor clamps are made of two parts up and down with upper surface butt joint under it, described end difference is formed at each parts respectively, the mounting of the periphery of described silicon wafer is carried out the clamping realization by the horizontal plane of two end differences to it, the central shaft of the thickness direction of described anchor clamps is interfaces of these parts, and the slope of the parts of this top descends towards the front end of the horizontal plane of the end difference of the parts of this top.
11. anchor clamps as claimed in claim 8, it is characterized in that, described anchor clamps are made of two parts up and down with upper surface butt joint under it, described end difference only below parts form, the mounting of the periphery of described silicon wafer is carried out clamping by the horizontal plane of end difference and horizontal plane as the lower surface of upper part to it and is realized, the central axis of the thickness direction of described anchor clamps is in the position than 1/2 component side of the thickness of low this substrate of the interface of these parts, the slope of the parts of this top with the same gradient decline in slope of the parts of this below.
12. anchor clamps as claimed in claim 9, it is characterized in that, the gradient on slope, described top is identical with the gradient on slope, described below, but its front end stops in the upper end of the wall portion of described end difference, the thickness of the described silicon wafer of depth ratio of the wall portion of this end difference is big, also possess the perimeter thicknesses suitable with this difference arranged, and above the slope identical with the gradient on this slope, top arranged, have the compacting part with the horizontal plane of the horizontal plane subtend of this end difference below, the mounting of the periphery of described silicon wafer is carried out clamping by the horizontal plane of the horizontal plane of this end difference and this compacting part to it and is realized.
13. each the described method as in the claim 1~7 is characterized in that, adopts as each the described anchor clamps in the claim 8~12.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2001204436 | 2001-07-05 | ||
JP204436/2001 | 2001-07-05 |
Publications (2)
Publication Number | Publication Date |
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CN1522557A true CN1522557A (en) | 2004-08-18 |
CN1290390C CN1290390C (en) | 2006-12-13 |
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ID=19040905
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CNB028132009A Expired - Fee Related CN1290390C (en) | 2001-07-05 | 2002-07-03 | Fabricating method for printed circuit board |
Country Status (5)
Country | Link |
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JP (1) | JP4153422B2 (en) |
KR (1) | KR100914376B1 (en) |
CN (1) | CN1290390C (en) |
TW (1) | TW558920B (en) |
WO (1) | WO2003005786A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1747154B (en) * | 2004-09-10 | 2012-05-09 | 株式会社东芝 | Wafer supporting board, thin wafer holding method and manufacture of semiconductor device |
CN103187346A (en) * | 2011-12-29 | 2013-07-03 | 无锡华润华晶微电子有限公司 | Fixture for clamping and corroding wafer |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4863910B2 (en) * | 2007-03-19 | 2012-01-25 | 株式会社伸光製作所 | Thin plate base material conveying jig and printed wiring board manufacturing method |
CN100553405C (en) * | 2007-07-27 | 2009-10-21 | 日月光半导体制造股份有限公司 | Method for manufacturing circuit board |
CN106449512B (en) * | 2016-10-28 | 2019-01-15 | 中国电子科技集团公司第四十四研究所 | Technique fixture for ultra thin silicon wafers processing |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4709468A (en) * | 1986-01-31 | 1987-12-01 | Texas Instruments Incorporated | Method for producing an integrated circuit product having a polyimide film interconnection structure |
JPH0245921A (en) * | 1988-08-05 | 1990-02-15 | Nec Yamaguchi Ltd | Ion implantation device |
JPH07180053A (en) * | 1993-12-24 | 1995-07-18 | Nissin Electric Co Ltd | Wafer holder |
JPH0831976A (en) * | 1994-07-15 | 1996-02-02 | Sony Corp | Silicon double-sided packaging substrate and its manufacturing method |
JPH08181440A (en) * | 1994-12-26 | 1996-07-12 | Sumitomo Metal Ind Ltd | Method for manufacturing multilayer thin film circuit board |
JPH09214140A (en) * | 1995-11-29 | 1997-08-15 | Toppan Printing Co Ltd | Multilayer printed wiring board and method of manufacturing the same |
-
2002
- 2002-07-03 KR KR1020037016940A patent/KR100914376B1/en not_active Expired - Fee Related
- 2002-07-03 JP JP2003511605A patent/JP4153422B2/en not_active Expired - Fee Related
- 2002-07-03 CN CNB028132009A patent/CN1290390C/en not_active Expired - Fee Related
- 2002-07-03 WO PCT/JP2002/006711 patent/WO2003005786A1/en active Application Filing
- 2002-07-03 TW TW091114727A patent/TW558920B/en not_active IP Right Cessation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1747154B (en) * | 2004-09-10 | 2012-05-09 | 株式会社东芝 | Wafer supporting board, thin wafer holding method and manufacture of semiconductor device |
CN103187346A (en) * | 2011-12-29 | 2013-07-03 | 无锡华润华晶微电子有限公司 | Fixture for clamping and corroding wafer |
CN103187346B (en) * | 2011-12-29 | 2016-02-10 | 无锡华润华晶微电子有限公司 | For clamping wafer with the fixture corroded it |
Also Published As
Publication number | Publication date |
---|---|
JPWO2003005786A1 (en) | 2004-10-28 |
CN1290390C (en) | 2006-12-13 |
WO2003005786A1 (en) | 2003-01-16 |
KR20040017247A (en) | 2004-02-26 |
JP4153422B2 (en) | 2008-09-24 |
TW558920B (en) | 2003-10-21 |
KR100914376B1 (en) | 2009-08-28 |
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