CN1355553A - Wafer cutting and grinding method - Google Patents

Abstract

A method for cutting and grinding a chip is used for removing cracks generated during cutting of the chip. The manufacturing method comprises the steps of adhering a first adhesive tape on the back surface of a wafer, cutting along a cutting path between chips, removing the first adhesive tape after adhering a second adhesive tape on the active surface of the wafer, grinding the back surface of the wafer to enable the wafer to reach a preset thickness, adhering a third adhesive tape on the back surface of the ground wafer, and removing the second adhesive tape to finish the cutting and grinding manufacturing process of the wafer.

Description

Wafer cutting and grinding method

The invention relates to a wafer cutting and grinding method, in particular to a wafer cutting and grinding method capable of removing cracks generated by chip cutting.

Today's semiconductor devices are built on a single crystal silicon wafer (silicon wafer). In order to increase production and reduce manufacturing costs, the diameter of the wafer has evolved from the past four inches, five inches, and six inches to the current eight-inch wafer. More chips can be produced at the same time. However, due to the limitations of the crystal growth cutting technology of the wafer, and to prevent the wafer from being deformed or cracked due to force or heat in the subsequent manufacturing process, the thickness of the general silicon wafer, taking an eight-inch wafer as an example, is about 700 to 800 microns. One surface of the wafer is then polished to form a mirror surface.

Existing semiconductor manufacturing processes are carried out on the mirror surface of the wafer, including deposition, lithography, etching, doping, thermal manufacturing processes, etc., and components and interconnections are formed thereon. For today's thin and light packaging (packaging), such as thin small outline package (ThinSmall Outline Package, TSOP), the thickness of the chip far exceeds the thickness required for packaging, so the cutting operation of the chip in the packaging operation ( Before Die Sawing), it is necessary to stick a tape on the active surface of the wafer and perform grinding to make the thickness of the wafer thinner to about 100-300 microns. After the wafer is ground, the tape is first removed, and the tape is pasted on the back of the wafer to cut the wafer and separate each chip. Since the thickness of the wafer becomes thinner after grinding, the area-to-thickness ratio becomes larger. During transportation and subsequent removal of the tape on the active surface, and reattaching the tape to the back of the wafer, it is very easy to cause the chip to break and cause damage to the product. .

In addition, conventional wafer dicing is performed after wafer grinding. Please refer to FIG. 1 , which shows a schematic cross-sectional view of a conventional wafer after dicing. Wafer sawing is performed from the active surface 12 (acive surface) of the wafer 10 along the kerf 18 (kerf) between the chips 16 to the back surface 14 . As the thickness of the wafer 10 becomes thinner, stress is easily formed during dicing, resulting in the formation of cracks 20 (cracks) near the dicing line 18 near the back surface 14 . Please refer to FIG. 2 at the same time, which shows a perspective view of the chip corresponding to FIG. 1 . In addition to cracks 20 , chip dicing will also cause chipping 22 , resulting in damage to the back surface 14 of the chip 16 . For the subsequent composition or assembly process, since the chip 16 will be heated, such as molding or encapsulating, or surface mount technology (surface mount technology, SMT), the crack 20 will become larger due to thermal stress, so as to affect the quality of the product. Reliability.

Therefore, an object of the present invention is to provide a method for cutting and grinding wafers to avoid cracks during wafer cutting.

Another object of the present invention is to provide a wafer dicing and grinding method, which can remove cracks and chipped corners caused by dicing.

In order to achieve the above-mentioned purpose of the present invention, a kind of wafer cutting and grinding production method is proposed, the steps include: pasting the first tape on the back side of the wafer; then performing a cutting step along the dicing road between the chips; then, pasting the second tape After being placed on the active surface of the wafer, the first tape is removed. Next, the backside of the wafer is ground to a predetermined thickness. Finally, paste the third tape on the back of the wafer after grinding; remove the second tape to complete the cutting and grinding process of the wafer.

Since the backside of the wafer is ground after the wafer is cut, cracks and missing corners in the chip caused by cutting can be removed during grinding. At the same time, the taping and transportation before the dicing operation are all performed on a wafer with a certain thickness, so the situation of wafer breakage can be avoided.

In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is specifically cited below and described in detail with accompanying drawings. In the attached picture:

FIG. 1 is a schematic cross-sectional view of a conventional wafer after dicing.

FIG. 2 is a schematic perspective view of the chip corresponding to FIG. 1 .

FIG. 3 shows a top view of a wafer.

FIG. 4 is a schematic partial cross-sectional view of the wafer corresponding to FIG. 3 .

4 to 7 are schematic cross-sectional flow diagrams of a wafer dicing and grinding manufacturing method according to a preferred embodiment of the present invention.

Notes on attached drawings:

10, 100: chip

12, 106: active surface

14, 108, 103a: back

16, 102, 102a: chip

18, 104: Cutting Road

20, 112 cracks

22: Notch

110: The first tape

114: The second tape

116: The third tape

D1: wafer thickness

D2: chip thickness

Example

Please refer to FIG. 3 and FIG. 4 at the same time. FIG. 3 shows a top view of the chip; FIG. 4 shows a partial cross-sectional view of the chip corresponding to FIG. 3 . The wafer 100 is composed of a plurality of chips 102 , and the chips 102 are separated by dicing lines 104 . The surface of the chip 100 on which components, laminates, interconnects, pads, etc. are formed is called the active surface 106 (active surface), and the other side is called the back surface 108 of the chip.

Please refer to FIG. 4 to FIG. 7 at the same time, which are schematic cross-sectional flow diagrams of a wafer cutting and grinding manufacturing method according to a preferred embodiment of the present invention. Please refer to FIG. 4 first. The wafer dicing and grinding manufacturing method of the present invention is carried out after the wafer 100 completes the semiconductor manufacturing process, that is, on the active surface 106 of the wafer 100, many components, stacks, interconnects, and welding pads have been formed. and protective layer etc. The thickness D1 of the wafer 100 is about 700 to 800 microns.

Please refer to FIG. 5 , first paste a first tape 110 (tape) on the back surface 108 of the chip 100, and its material is, for example, polyolefin synthetic resin (polyolefinic synthetic resin). Next, for example, a sawing blade is used to cut along the dicing lines 104 between the chips 102 from the active surface 106 to the back surface 108 to separate the chips 102 to form independent chips. Since the wafer 100 is subjected to stress near the dicing line 104 during the dicing step, and the wafer is a brittle material, cracks 112 are formed near the dicing line 104 near the back surface 108 . In this cutting step, the cutting depth can be equal to the thickness of the wafer 100 or slightly larger than the thickness of the wafer 100 , but the first tape 110 is not cut through. In order to facilitate the follow-up manufacturing process, the cutting depth can also be made smaller than the thickness of the wafer 100, that is, the chips 102 are not completely separated, but the subsequent grinding and manufacturing process is used to grind away the connected parts, so that the chips 102 are separated. It also needs to be greater than the predetermined thickness of the wafer after grinding.

Referring to FIG. 6 , first stick the second tape 114 on the active surface 106 of the wafer 100 to fix the separated chips, and then peel off the first tape 110 on the back side 108 of the wafer 100 . The material of the second tape 114 can be the same as that of the first tape 110 , and the routine cleaning steps after the cutting step and the stripping step will not be repeated here. Next, the wafer 100 is ground, such as grinding the backside 108 of the wafer 100 with a grinding wheel, so as to achieve the desired thickness D2. Among them, the surface of the grinding wheel is composed of many diamond (diamond) particles and resin binder (resinous binder). The chip thickness D2 required by the general packaging process is about 100 to 200 microns. However, since the grinding step in the present invention is carried out after the wafer is cut, the cracks 112 formed during the cutting process will be ground away simultaneously in this step, so the chip 102a back side 108a in the finished product does not have any cracks and missing corners, and can Improve product quality.

Please refer to Fig. 7, then first paste a third adhesive tape 116 on the back side 108a of the wafer 100 to fix the separated sheet 102a, then peel off the second adhesive tape 114 on the active surface 106 of the wafer 100, and thus complete the present invention. Wafer dicing and grinding manufacturing method.

In summary, the wafer cutting and grinding method of the present invention has at least the following advantages:

1. In the wafer cutting and grinding manufacturing method of the present invention, since the grinding of the wafer back is carried out after the wafer is cut, cracks and missing corners caused by cutting in the chip can be removed during grinding. Therefore, the present invention can improve product quality, and is beneficial to the current packaged products that need to expose the back of the chip to enhance the heat dissipation effect. The back of the chip produced by the present invention has no cracks and missing corners, which can improve product reliability.

2. In the wafer cutting and grinding production method of the present invention, the cutting operation is carried out before the grinding production method, and the tape and transportation before the cutting operation are all performed on a wafer with a certain thickness, so the situation of wafer breakage can be avoided.

Although the present invention has been disclosed above in conjunction with a preferred embodiment, it is not intended to limit the present invention. Those skilled in the art can make changes and modifications without departing from the spirit and scope of the present invention, so the protection scope of the present invention It should be defined by the scope of the appended claims.

Claims (11)

1. A wafer cutting and grinding method, comprising: A wafer is provided, the wafer has an active surface and a back surface, the wafer is composed of a plurality of chips with a dicing line between the chips; performing a cutting step along the cutting lane; and Grinding the backside of the wafer to a predetermined thickness of the wafer. 2. The wafer cutting and grinding method according to claim 1, further comprising pasting a first tape on the back side of the wafer before the cutting step; sticking a second tape on the surface; and removing the first tape to perform the grinding step. 3. The wafer dicing and polishing manufacturing method as claimed in claim 1, wherein in the dicing step, the cutting depth is equal to the wafer thickness. 4. The wafer dicing and polishing manufacturing method as claimed in claim 1, wherein in the dicing step, the cutting depth is greater than the wafer thickness. 5. The wafer cutting and grinding method according to claim 1, wherein in the cutting step, the cutting depth is smaller than the thickness of the wafer but larger than the predetermined thickness after grinding. 6. The wafer dicing and grinding manufacturing method as claimed in claim 1, wherein the predetermined thickness is smaller than the wafer thickness. 7. A wafer cutting and grinding method, comprising: A wafer is provided, the wafer has an active surface and a back surface, the wafer is composed of a plurality of chips with a dicing line between the chips; sticking a first tape on the back side of the chip; performing a cutting step along the cutting lane; sticking a second tape on the active surface of the chip, and removing the first tape; grinding the backside of the wafer to a predetermined thickness; and Paste a third tape on the backside of the wafer after grinding, and remove the second tape. 8. The wafer dicing and polishing manufacturing method as claimed in claim 7, wherein in the dicing step, the cutting depth is equal to the wafer thickness. 9. The wafer dicing and polishing manufacturing method as claimed in claim 7, wherein in the dicing step, the cutting depth is greater than the wafer thickness. 10. The wafer cutting and grinding method according to claim 7, wherein in the cutting step, the cutting depth is smaller than the thickness of the wafer but larger than the predetermined thickness after grinding. 11. The wafer dicing and grinding manufacturing method as claimed in claim 7, wherein the predetermined thickness is smaller than the wafer thickness.

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