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CN1353507A - Core IC for implementing carrier communication over low-voltage power transmission line by software and radio technique - Google Patents

Core IC for implementing carrier communication over low-voltage power transmission line by software and radio technique Download PDF

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Publication number
CN1353507A
CN1353507A CN 00133476 CN00133476A CN1353507A CN 1353507 A CN1353507 A CN 1353507A CN 00133476 CN00133476 CN 00133476 CN 00133476 A CN00133476 A CN 00133476A CN 1353507 A CN1353507 A CN 1353507A
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CN
China
Prior art keywords
carrier communication
voltage power
core
software
power transmission
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 00133476
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Chinese (zh)
Inventor
廖壬秋
扬澍
吴晓彤
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Individual
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Individual
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Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN 00133476 priority Critical patent/CN1353507A/en
Publication of CN1353507A publication Critical patent/CN1353507A/en
Pending legal-status Critical Current

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Abstract

An IC chip used for power-line carrier communication is composed of A/D converter, D/A converter, digital signal processor (DSP), programmable logic controller (PLC) and 8-bit single-chip MCU. The said chip adopts the digital signal processing technique as the principal means to complete modulation and demodulation of various communication modulation modes.

Description

The low voltage power line carrier communication core integrated circuit of utilization software and radio technique
See also Figure of description and understand this explanation.
This chip internal is integrated with three ADC altogether, constitutes the analog input channel of this chip, and wherein analog input ADC is the high speed analog-digital converter of 14 50,000,000 bandwidth, is responsible for analog input signal is carried out digital quantization; Analog input peak value sampling and simulation output peak value sampling ADC are two 8 high speed analog-digital converters, mainly detect the peak value of input and output signal, thereby the foundation of automatic gain control and automated power control is provided for the DSP of back.
The analog output channel of this chip by a DAC and two independently digital port form, wherein simulation output DAC is the high-speed figure analog converter of 14 50,000,000 bandwidth, being responsible for the digital quantization information translation is the analog signal line output of going forward side by side; Input amplifier gain controlling and output amplifier gain control end are two parallel digital signal interfaces that independently have 8 bit widths, are used for the programmable amplifier of outside is carried out gain controlling.
To carry out Digital Signal Processing by the reception and the transmission DSP of back through the digital information after the analog input channel quantification, the process of its processing can being interpreted as with Mathematical Modeling and computing of image be finished the function that former need are finished by side circuit, and this process is handled by program command fully, therefore as long as the different instruction set of adapted can be finished the modulation and demodulation of multiple modulation signals such as direct sequence spread spectrum, frequency-hopping spread spectrum, THSS.Independently PN sign indicating number synthesizer is to be provided with in the processing speed of direct sequence spread spectrum medical treatment reconciliation timing for accelerating specially.
The major function of 8 microcontroller core is programming, the setting of finishing DSP, and stored program instruction; And management external interface.Use the purpose of this microprocessor to be to strengthen management to each module of chip internal, itself does not need to participate in directly the work of treatment of transceive data.
Interface circuit is the data I/O channel of this chip, and because of considering the simple connectivity problem with other application system, so interface circuit externally can be supported multiple general bus standard; In inside, after chip power resetted and finishs corresponding setting, interface circuit will and be received and dispatched between the DSP and set up the DMA passage, and data directly are transmitted between DSP and the external circuit.
Because of the core of this circuit is to be made of digital signal processor, therefore this mode can satisfy the requirement of at present known any modulation and demodulation mode.

Claims (1)

  1. The present invention is the low voltage power line carrier communication core integrated circuit of utilization software and radio technique, and it is in the product in wire communication field with the advanced technology graft application in the telecommunications context.
CN 00133476 2000-11-08 2000-11-08 Core IC for implementing carrier communication over low-voltage power transmission line by software and radio technique Pending CN1353507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 00133476 CN1353507A (en) 2000-11-08 2000-11-08 Core IC for implementing carrier communication over low-voltage power transmission line by software and radio technique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 00133476 CN1353507A (en) 2000-11-08 2000-11-08 Core IC for implementing carrier communication over low-voltage power transmission line by software and radio technique

Publications (1)

Publication Number Publication Date
CN1353507A true CN1353507A (en) 2002-06-12

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 00133476 Pending CN1353507A (en) 2000-11-08 2000-11-08 Core IC for implementing carrier communication over low-voltage power transmission line by software and radio technique

Country Status (1)

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CN (1) CN1353507A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100456723C (en) * 2006-11-09 2009-01-28 天津三星电子有限公司 Wireless network converter
CN1581719B (en) * 2004-05-14 2010-04-28 北京杰智讯科技有限公司 High-speed power line communication local side device
CN101296057B (en) * 2008-06-26 2011-06-29 清华大学 Waveform Signal Processor Based on Software Defined Radio
CN101621312B (en) * 2009-07-29 2012-12-26 昆明天龙经纬电子科技有限公司 Power line carrier communication chip established by utilizing singlechip
CN108964706A (en) * 2018-06-27 2018-12-07 广州视源电子科技股份有限公司 Power line signal transmission method and device and electric transmission equipment

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1581719B (en) * 2004-05-14 2010-04-28 北京杰智讯科技有限公司 High-speed power line communication local side device
CN100456723C (en) * 2006-11-09 2009-01-28 天津三星电子有限公司 Wireless network converter
CN101296057B (en) * 2008-06-26 2011-06-29 清华大学 Waveform Signal Processor Based on Software Defined Radio
CN101621312B (en) * 2009-07-29 2012-12-26 昆明天龙经纬电子科技有限公司 Power line carrier communication chip established by utilizing singlechip
CN108964706A (en) * 2018-06-27 2018-12-07 广州视源电子科技股份有限公司 Power line signal transmission method and device and electric transmission equipment
CN108964706B (en) * 2018-06-27 2022-03-11 广州视源电子科技股份有限公司 Power line signal transmission method and device and electric transmission equipment

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PB01 Publication
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication