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CN1332454C - Method for making a semiconductor light emitting element - Google Patents

Method for making a semiconductor light emitting element Download PDF

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CN1332454C
CN1332454C CNB2004100858343A CN200410085834A CN1332454C CN 1332454 C CN1332454 C CN 1332454C CN B2004100858343 A CNB2004100858343 A CN B2004100858343A CN 200410085834 A CN200410085834 A CN 200410085834A CN 1332454 C CN1332454 C CN 1332454C
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semiconductor
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CN1601775A (en
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蔡宗良
张智松
陈泽澎
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Epistar Corp
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Abstract

The invention provides a method for manufacturing a semiconductor light-emitting element. The method comprises forming at least one semiconductor laminated structure on a substrate surface, wherein the semiconductor laminated structure comprises a first conductive type semiconductor layer, a light emitting layer and a second conductive type semiconductor layer sequentially arranged on the substrate surface; then, an electrode contact layer containing indium element is formed on the surface of the semiconductor laminated structure, microwave treatment is carried out to activate the semiconductor laminated structure, and finally, a transparent conductive layer is formed on the surface of the electrode contact layer.

Description

制作一半导体发光元件的方法Method for making a semiconductor light emitting element

技术领域technical field

本发明涉及一种制作一半导体发光元件的方法,尤指一种制作一半导体发光元件的欧姆电极(ohmic electrode)的方法。The invention relates to a method for manufacturing a semiconductor light emitting element, especially a method for manufacturing an ohmic electrode of a semiconductor light emitting element.

背景技术Background technique

III-V族半导体材料,包含氮化镓系列(GaN series)、砷化镓(GaAs series)系列等化合物半导体材料的应用已成为发光组件制作的研究重点。在这些发光组件中,通常包含有一N型导电型式的III-V族化合物半导体层以及一P型导电型式的III-V族化合物半导体层堆栈于一基板上。此外,在P型半导体层上方另设有一P型接触电极,以与设于N型半导体层上或导电材料基板背面的N型接触电极配合,用来提供电流使组件发光。The application of III-V semiconductor materials, including compound semiconductor materials such as gallium nitride series (GaN series) and gallium arsenide (GaAs series) series, has become the research focus of light-emitting component manufacturing. These light-emitting components generally include an N-type conductive type III-V compound semiconductor layer and a P-type conductive type III-V compound semiconductor layer stacked on a substrate. In addition, a P-type contact electrode is provided above the P-type semiconductor layer to cooperate with the N-type contact electrode on the N-type semiconductor layer or on the back of the conductive material substrate to provide current to make the component emit light.

一般而言,P型接触电极必须覆盖于P型半导体层的整个表面,以提供均匀电流至P型半导体层,使发光组件可以产生均匀的光线。然而,用来制作接触电极的金属材料透光率并不高,若完全覆盖住发光组件的表层,必定会对发光组件的发光效率产生不良影响。为了同时兼顾发光均匀性以及发光效率,目前的改善方法是在P型半导体层上覆盖一透明导电层,然后将P型接触电极设于透明导电层上,以形成欧姆电极。Generally speaking, the P-type contact electrode must cover the entire surface of the P-type semiconductor layer to provide uniform current to the P-type semiconductor layer so that the light-emitting component can generate uniform light. However, the light transmittance of the metal material used to make the contact electrode is not high, and if it completely covers the surface of the light-emitting component, it will definitely have a negative impact on the luminous efficiency of the light-emitting component. In order to take into account both luminous uniformity and luminous efficiency, the current improvement method is to cover a transparent conductive layer on the P-type semiconductor layer, and then arrange the P-type contact electrode on the transparent conductive layer to form an ohmic electrode.

由于P型半导体层表面具有许多缺陷,使其与透明导电层间的接触电阻增加,并不易形成良好的欧姆电极。现有技术利用有机金属气相磊晶成长(metalorganic vapor phaseepitaxy,MOVPE)、分子束磊晶成长(molecular beam epitaxy,MBE)或氢化物气相磊晶成长(hybride vapor phase epitzxy,HVPE)等方法制作这些半导体层时,必须经过一约为900-1000℃的高温磊晶成长过程,同时加入含有适当掺质的气体,以于基板上形成N型或P型导电型式的III-V族化合物半导体层。Since the surface of the P-type semiconductor layer has many defects, the contact resistance between it and the transparent conductive layer increases, and it is difficult to form a good ohmic electrode. Existing technologies use methods such as metalorganic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE) or hydride vapor phase epitaxy (hybrid vapor phase epitzxy, HVPE) to fabricate these semiconductors. When layering, it must go through a high-temperature epitaxial growth process of about 900-1000 ° C, and at the same time add gas containing appropriate dopants to form a III-V compound semiconductor layer of N-type or P-type conductivity on the substrate.

在上述制作过程中,最常遇到的问题便是无法形成具有足够低阻抗的P型半导体层。可能的原因是在磊晶成长的过程中,偶发性的氢结合(hydrogen incorporation)导致受体钝化(acceptor passivation),进而使得电洞载流子浓度不足,甚至产生一种阻抗高达108Ω的半绝缘性材料,又称为I型半导体层。为了去除P型半导体层中的氢钝化现象,使得具有高阻抗的I型半导体层可以转化为P型半导体层,现有技术中已有人提出可以利用热退火、电子束照射或紫外光照射等技术来活化P型半导体材料。In the above manufacturing process, the most common problem encountered is that the P-type semiconductor layer with sufficiently low resistance cannot be formed. The possible reason is that in the process of epitaxial growth, the occasional hydrogen incorporation (hydrogen incorporation) leads to acceptor passivation (acceptor passivation), which makes the hole carrier concentration insufficient, and even produces a semi-conductor with an impedance as high as 108Ω. Insulating material, also known as I-type semiconductor layer. In order to remove the hydrogen passivation phenomenon in the P-type semiconductor layer, so that the I-type semiconductor layer with high impedance can be converted into a P-type semiconductor layer, it has been proposed in the prior art that thermal annealing, electron beam irradiation or ultraviolet light irradiation can be used. technology to activate P-type semiconductor materials.

由于为了形成良好的欧姆电极,P型半导体导电层必须具有很高的载流子浓度或是较低的功函数,因此一般具有可制作良好欧姆电极的P型半导体材料导电层并不容易达成。以氮化镓系列发光组件为例,其P型半导体层的载流子浓度不易达5e18/cm3以上,而P型氮化铟镓(InGaN)虽然较易达到高载流子浓度以及低功函数的要求,然而在P型半导体层的活化制程(例如热退火)中,却又容易因高温破坏其组成结构,使得P型氮化铟镓层成为高阻抗层。Because in order to form a good ohmic electrode, the P-type semiconductor conductive layer must have a high carrier concentration or a low work function, so it is generally not easy to achieve a P-type semiconductor conductive layer that can make a good ohmic electrode. Taking gallium nitride series light-emitting components as an example, the carrier concentration of the P-type semiconductor layer is difficult to reach above 5e18/cm3, while the P-type indium gallium nitride (InGaN) can easily achieve high carrier concentration and low work function However, in the activation process (such as thermal annealing) of the P-type semiconductor layer, its composition structure is easily destroyed due to high temperature, so that the P-type InGaN layer becomes a high-resistance layer.

另外为了制作良好的欧姆电极,除了P型半导体导电层要具有高浓度载流子的条件外,透明导电层也是一重要的部分。以ITO为例,虽然理论上ITO可作为III-N半导体的透明导电层,但在文献上或其它公开的报导中,如Semiconductor Science andTechnology,vol.18(4),2003,L21-L23(1);Solid-State Electronics,vol.47(5),2003,849-853;Materials Science and Engineering B Vol.106(1),2004,69-72;Solid-State Electronics,vol.47(9),2003,1565-1568;Photonics Technology Letters,IEEE,Vol.15(5),2003,646-648,等等文献中说明单纯使用ITO作为P-GaN layer的欧姆电极,虽具95%以上的透光率,但无法形成良好的欧姆电极,均呈现过高的组件顺向电压。因此在ITO与P-GaN之间添加Ni或Ni/Au以形成较佳的欧姆电极,降低组件的顺向电压,但Ni或Ni/Au透光性较差,所以以Ni/ITO或Ni/Au/ITO便会使发光组件的发光效率变差。In addition, in order to make a good ohmic electrode, in addition to the condition that the P-type semiconductor conductive layer must have a high concentration of carriers, the transparent conductive layer is also an important part. Taking ITO as an example, although in theory ITO can be used as a transparent conductive layer of III-N semiconductor, but in the literature or other published reports, such as Semiconductor Science and Technology, vol.18 (4), 2003, L21-L23 (1 ); Solid-State Electronics, vol.47(5), 2003, 849-853; Materials Science and Engineering B Vol.106(1), 2004, 69-72; Solid-State Electronics, vol.47(9), 2003, 1565-1568; Photonics Technology Letters, IEEE, Vol.15(5), 2003, 646-648, etc. It is stated in the literature that only ITO is used as the ohmic electrode of the P-GaN layer, although it has more than 95% light transmission rate, but cannot form a good ohmic electrode, all present too high component forward voltage. Therefore, Ni or Ni/Au is added between ITO and P-GaN to form a better ohmic electrode and reduce the forward voltage of the component, but Ni or Ni/Au has poor light transmission, so Ni/ITO or Ni/Au Au/ITO will degrade the luminous efficiency of the light-emitting component.

发明内容Contents of the invention

本发明的目的在于提供一种制作半导体发光元件的方法,能够有效提高P型半导层的载流子浓度,并且降低其与透明电极的接触阻抗,以形成良好的欧姆电极。The object of the present invention is to provide a method for manufacturing a semiconductor light-emitting element, which can effectively increase the carrier concentration of the P-type semiconductor layer, and reduce its contact resistance with the transparent electrode, so as to form a good ohmic electrode.

为实现以上目的,本发明采取的主要技术方案是:该方法包含于一基板表面形成至少一半导体叠层结构,此半导体叠层结构包含有一第一导电型式半导体层、一发光层以及一第二导电型式半导体层依序设于基板表面。然后于半导体叠层结构表面形成一含铟元素的电极接触层,并且进行一微波处理,以活化半导体叠层结构,最后再于电极接触层表面形成一透明导电层。前述的微波制程为超低温制程,因此本发明亦可在形成透明导电层后再利用微波来活化半导体层,并不会影响透明导电层的品质。In order to achieve the above object, the main technical solution adopted by the present invention is: the method includes forming at least one semiconductor stacked structure on the surface of a substrate, and the semiconductor stacked structure includes a first conductive type semiconductor layer, a light emitting layer and a second Conductive semiconductor layers are sequentially arranged on the surface of the substrate. Then an electrode contact layer containing indium element is formed on the surface of the semiconductor stack structure, and a microwave treatment is performed to activate the semiconductor stack structure, and finally a transparent conductive layer is formed on the surface of the electrode contact layer. The aforementioned microwave process is an ultra-low temperature process, so the present invention can also utilize microwaves to activate the semiconductor layer after forming the transparent conductive layer without affecting the quality of the transparent conductive layer.

由于本发明于半导体发光元件中设置含铟元素的电极接触层以提高载流子浓度,同时又利用低温的微波处理来活化半导体叠层结构,因此可以避免因高温活化使铟元素散出或半导体品质变差所导致的阻抗增加等问题,进而可以获得良好的欧姆电极。Since the present invention arranges the electrode contact layer containing indium element in the semiconductor light-emitting element to increase the carrier concentration, and utilizes low-temperature microwave treatment to activate the semiconductor laminated structure, it can avoid the indium element being scattered or semiconducting due to high temperature activation. Impedance increase caused by quality deterioration and other problems can be obtained, and then a good ohmic electrode can be obtained.

附图说明Description of drawings

下面结合附图和具体实施例对本实用新型作进一步详细说明。Below in conjunction with accompanying drawing and specific embodiment the utility model is described in further detail.

图1至4为本发明第一实施例的方法示意图;1 to 4 are method schematic diagrams of the first embodiment of the present invention;

图5至7为本发明第二实施例的方法示意图。5 to 7 are schematic diagrams of the method according to the second embodiment of the present invention.

具体实施方式Detailed ways

图1至图4为本发明第一实施例的制作一半导体发光元件的方法示意图。本发明的半导体发光元件包含发光二极管、雷射二极管、光检测器以及太阳能电池等。如图1所示,本发明于制作半导体发光元件10时先提供一基板12,例如可直接提供磊晶成长的蓝宝石绝缘基板,然后于基板12表面形成由第一导电型式半导体层14、发光层16以及第二导电型式半导体层18所形成的半导体叠层结构,并且在半导体叠层结构表面形成一具有第一导电型式或第二导电型式的含铟元素的电极接触层20。由于含铟元素的电极接触层20相对于其下方的半导体层14、18而言可以提供较窄的材料能隙,因此载流子可以被聚集在含铟元素的电极接触层20中,达到良好欧姆电极需求的高载流子浓度。1 to 4 are schematic diagrams of a method for manufacturing a semiconductor light emitting device according to a first embodiment of the present invention. The semiconductor light emitting device of the present invention includes a light emitting diode, a laser diode, a photodetector, a solar cell, and the like. As shown in Figure 1, the present invention first provides a substrate 12 when making a semiconductor light-emitting element 10, such as a sapphire insulating substrate that can directly provide epitaxial growth, and then forms a first conductive type semiconductor layer 14 and a light-emitting layer on the surface of the substrate 12. 16 and a semiconductor layer 18 of the second conductivity type to form a semiconductor stack structure, and an electrode contact layer 20 containing indium elements of the first conductivity type or the second conductivity type is formed on the surface of the semiconductor stack structure. Since the electrode contact layer 20 containing indium element can provide a narrow material energy gap relative to the semiconductor layers 14, 18 below it, carriers can be gathered in the electrode contact layer 20 containing indium element to achieve good performance. High carrier concentration required for ohmic electrodes.

在本发明的较佳实施例中,第一导电型式半导体层14为N型掺杂化合物半导体层,例如N型硅掺杂氮化镓层;发光层16为氮化铟镓/氮化镓(InGaN/GaN)多重量子井结构;第二导电型式半导体层18为P型掺杂化合物半导体层,例如P型镁掺杂氮化镓层;至于含铟元素的电极接触层20则可为厚度不大于500埃()的N型或P型氮化铟镓层,较佳厚度约略为20埃。然而本发明并不限定于此,其它可应用于半导体发光元件的掺质以及半导体材料均可适用于本发明。此外,在半导体叠层结构与基板12之间可另形成一缓冲层,例如氮化镓层,以避免半导体层14、18表面晶格结构于磊晶成长的高温过程中受到破坏。In a preferred embodiment of the present invention, the first conductivity type semiconductor layer 14 is an N-type doped compound semiconductor layer, such as an N-type silicon-doped gallium nitride layer; the light-emitting layer 16 is InGaN/GaN ( InGaN/GaN) multiple quantum well structure; the second conductivity type semiconductor layer 18 is a P-type doped compound semiconductor layer, such as a P-type magnesium-doped gallium nitride layer; The preferred thickness of the N-type or P-type InGaN layer larger than 500 angstroms (A) is about 20 angstroms. However, the present invention is not limited thereto, and other dopants and semiconductor materials applicable to semiconductor light-emitting elements are applicable to the present invention. In addition, another buffer layer, such as a gallium nitride layer, may be formed between the semiconductor stacked structure and the substrate 12 to prevent the surface lattice structure of the semiconductor layers 14 and 18 from being damaged during the high temperature process of epitaxial growth.

之后如图2所示,对半导体发光元件10进行一微波处理,以活化P型掺杂层,包含半导体层18(及电极接触层20)。微波处理为一低温处理,操作温度应小于400℃,以避免铟元素散出或半导体品质变差而导致阻抗增加。为了达到量产的目的,本发明亦可在微波处理之前进行一预热处理,将基板12预热至一预定温度范围内,使其温度高于室温但低于400℃,以防止P型掺杂层于后续微波处理中产生芯片破裂的情形。After that, as shown in FIG. 2 , a microwave treatment is performed on the semiconductor light emitting device 10 to activate the P-type doped layer, including the semiconductor layer 18 (and the electrode contact layer 20 ). Microwave treatment is a low-temperature treatment, and the operating temperature should be lower than 400° C. to avoid the increase of impedance caused by indium element scattering or deterioration of semiconductor quality. In order to achieve the purpose of mass production, the present invention can also carry out a preheating treatment before microwave treatment, preheating the substrate 12 to a predetermined temperature range, so that its temperature is higher than room temperature but lower than 400 ° C, to prevent P-type doping The impurity layer causes chip cracking during subsequent microwave processing.

如图3与图4所示,接着在电极接触层20表面形成一透明导电层22,并进行一蚀刻制程去除部分的透明导电层22、电极接触层20、半导体层18、发光层16直至半导体层14表面,以于半导体层14表面形成一接触电极24,在透明导电层22表面形成一接触电极25。透明导电层22可选自金属、金属氧化物以及金属氮化物所组成的群组,包含镍、金、银、铬、铂、氧化铟锌(IZO)、氧化铟、氧化锌(ZnO)、氧化铟锡(indium tin oxide,ITO)、氧化锡、氧化锑锡(ATO)、氧化锑、氧化锑锌(AZO)、氧化镉锡(cadmium tin oxide,CTO)、氧化镉、氮化钛(TiN)、氮化钨(WN)、氮化钛钨(TiWN)等。在本发明的较佳实施例中,接触电极24可由钛/铝等金属形成,用来作为半导体发光元件10的N型接触电极,接触电极25可由镍/金、铬/金或铂/金等金属形成,用来作为半导体发光元件10的P型接触电极。此外,当基板12由N型半导体材料形成时,N型接触电极亦可直接形成于基板12的背面,以省略前述蚀刻部分的透明导电层22、电极接触层20、半导体层18以及发光层16等步骤。As shown in Figures 3 and 4, a transparent conductive layer 22 is then formed on the surface of the electrode contact layer 20, and an etching process is performed to remove part of the transparent conductive layer 22, the electrode contact layer 20, the semiconductor layer 18, the light emitting layer 16 until the semiconductor layer 14, to form a contact electrode 24 on the surface of the semiconductor layer 14, and to form a contact electrode 25 on the surface of the transparent conductive layer 22. The transparent conductive layer 22 can be selected from the group consisting of metal, metal oxide and metal nitride, including nickel, gold, silver, chromium, platinum, indium zinc oxide (IZO), indium oxide, zinc oxide (ZnO), oxide Indium tin oxide (ITO), tin oxide, antimony tin oxide (ATO), antimony oxide, antimony zinc oxide (AZO), cadmium tin oxide (CTO), cadmium oxide, titanium nitride (TiN) , Tungsten Nitride (WN), Titanium Tungsten Nitride (TiWN), etc. In a preferred embodiment of the present invention, the contact electrode 24 can be formed of metals such as titanium/aluminum, and is used as an N-type contact electrode of the semiconductor light emitting element 10, and the contact electrode 25 can be made of nickel/gold, chromium/gold or platinum/gold, etc. Formed from metal, it is used as a P-type contact electrode of the semiconductor light emitting element 10 . In addition, when the substrate 12 is formed of an N-type semiconductor material, the N-type contact electrode can also be directly formed on the back surface of the substrate 12, so as to omit the transparent conductive layer 22, the electrode contact layer 20, the semiconductor layer 18, and the light-emitting layer 16 in the aforementioned etched portion. and other steps.

相对于热退火等高温活化P型半导体层的方法,本发明利用超低温的微波制程来活化P型半导体层,不仅可以缩短活化时间,有效降低P型半导体层的阻抗,同时更可以避免含铟元素的电极接触层于活化过程中受高温破坏,因此可使半导体发光元件具有高载流子浓度,以形成良好的欧姆电极。Compared with the method of high temperature activation of P-type semiconductor layer such as thermal annealing, the present invention uses ultra-low temperature microwave process to activate P-type semiconductor layer, which can not only shorten the activation time, effectively reduce the impedance of P-type semiconductor layer, but also avoid the indium-containing element The electrode contact layer is damaged by high temperature during the activation process, so the semiconductor light-emitting element can have a high carrier concentration to form a good ohmic electrode.

为了避免透明导电层受到高温退火制程影响其品质,现有方法是在高温活化P型半导体材料层后,再进行透明导电层的制作。然而由于微波制程为操作温度小于400℃的超低温制程,因此本发明亦可在形成透明导电层后再利用微波来活化P型半导体层,并不会影响透明导电层的品质。In order to prevent the quality of the transparent conductive layer from being affected by the high-temperature annealing process, the existing method is to activate the P-type semiconductor material layer at high temperature before manufacturing the transparent conductive layer. However, since the microwave process is an ultra-low temperature process with an operating temperature lower than 400° C., the present invention can also use microwaves to activate the P-type semiconductor layer after forming the transparent conductive layer without affecting the quality of the transparent conductive layer.

图5至图7为本发明第二实施例的制作一半导体发光元件的方法示意图。本发明的半导体发光元件包含发光二极管、雷射二极管、光检测器以及太阳能电池等。如图5所示,本发明于制作半导体发光元件30时先提供一基板32,例如可直接提供磊晶成长的蓝宝石绝缘基板,然后于基板32表面形成由第一导电型式半导体层34、发光层36以及第二导电型式半导体层38所形成的半导体叠层结构,并且在半导体叠层结构表面形成一具有第一导电型式或第二导电型式的含铟元素的电极接触层40。由于含铟元素的电极接触层40相对于其下方的半导体层34、38而言可以提供较窄的材料能隙,因此载流子可以被聚集在含铟元素的电极接触层40中,达到良好欧姆电极需求的高载流子浓度。5 to 7 are schematic diagrams of a method for manufacturing a semiconductor light emitting device according to a second embodiment of the present invention. The semiconductor light emitting device of the present invention includes a light emitting diode, a laser diode, a photodetector, a solar cell, and the like. As shown in Figure 5, the present invention first provides a substrate 32 when making the semiconductor light-emitting element 30, such as a sapphire insulating substrate that can directly provide epitaxial growth, and then forms a first conductive type semiconductor layer 34 and a light-emitting layer on the surface of the substrate 32. 36 and the semiconductor layer 38 of the second conductivity type to form a semiconductor stack structure, and an electrode contact layer 40 containing indium elements of the first conductivity type or the second conductivity type is formed on the surface of the semiconductor stack structure. Since the electrode contact layer 40 containing indium element can provide a narrow material energy gap relative to the semiconductor layers 34, 38 below it, carriers can be gathered in the electrode contact layer 40 containing indium element to achieve good High carrier concentration required for ohmic electrodes.

在本发明的较佳实施例中,第一导电型式半导体层34为N型掺杂化合物半导体层,例如N型硅掺杂氮化镓层;发光层36为氮化铟镓/氮化镓(InGaN/GaN)多重量子井结构;第二导电型式半导体层38为P型掺杂化合物半导体层,例如P型镁掺杂氮化镓层;至于含铟元素的电极接触层40则可为厚度不大于500埃()的N型或P型氮化铟镓层,较佳厚度约略为20埃。然而本发明并不限定于此,其它可应用于半导体发光元件的掺质以及半导体材料均可适用于本发明。此外,在半导体叠层结构与基板32之间可另形成一缓冲层,例如氮化镓层,以避免半导体层34-38表面晶格结构于磊晶成长的高温过程中受到破坏。In a preferred embodiment of the present invention, the first conductivity type semiconductor layer 34 is an N-type doped compound semiconductor layer, such as an N-type silicon-doped gallium nitride layer; the light-emitting layer 36 is InGaN/GaN ( InGaN/GaN) multiple quantum well structure; the second conductivity type semiconductor layer 38 is a P-type doped compound semiconductor layer, such as a P-type magnesium-doped gallium nitride layer; The preferred thickness of the N-type or P-type InGaN layer larger than 500 angstroms (A) is about 20 angstroms. However, the present invention is not limited thereto, and other dopants and semiconductor materials applicable to semiconductor light-emitting elements are applicable to the present invention. In addition, another buffer layer, such as a gallium nitride layer, may be formed between the semiconductor stacked structure and the substrate 32 to prevent the surface lattice structure of the semiconductor layers 34 - 38 from being damaged during the high temperature process of epitaxial growth.

之后如图6所示,在电极接触层40表面形成一透明导电层42,并对半导体发光元件30进行一微波处理,以活化P型掺杂层,包含半导体层38(及电极接触层40)。透明导电层42可选自金属、金属氧化物以及金属氮化物所组成的群组,包含镍、金、银、铬、铂、氧化铟锌(IZO)、氧化铟、氧化锌(ZnO)、氧化铟锡(indium tin oxide,ITO)、氧化锡、氧化锑锡(ATO)、氧化锑、氧化锑锌(AZO)、氧化镉锡(cadmium tin oxide,CTO)、氧化镉、氮化钛(TiN)、氮化钨(WN)、氮化钛钨(TiWN)等。微波处理为一低温处理,操作温度应小于400℃,以避免铟元素散出或半导体品质变差而导致阻抗增加。为了达到量产的目的,本发明亦可在微波处理之前进行一预热处理,将基板32预热至一预定温度范围内,使其温度高于室温但低于400℃,以防止P型掺杂层于后续微波处理中产生破裂的情形。After that, as shown in FIG. 6, a transparent conductive layer 42 is formed on the surface of the electrode contact layer 40, and a microwave treatment is performed on the semiconductor light-emitting element 30 to activate the P-type doped layer, including the semiconductor layer 38 (and the electrode contact layer 40) . The transparent conductive layer 42 can be selected from the group consisting of metal, metal oxide and metal nitride, including nickel, gold, silver, chromium, platinum, indium zinc oxide (IZO), indium oxide, zinc oxide (ZnO), oxide Indium tin oxide (ITO), tin oxide, antimony tin oxide (ATO), antimony oxide, antimony zinc oxide (AZO), cadmium tin oxide (CTO), cadmium oxide, titanium nitride (TiN) , Tungsten Nitride (WN), Titanium Tungsten Nitride (TiWN), etc. Microwave treatment is a low-temperature treatment, and the operating temperature should be lower than 400° C. to avoid the increase of impedance caused by indium element scattering or deterioration of semiconductor quality. In order to achieve the purpose of mass production, the present invention can also carry out a preheating treatment before microwave treatment, preheating the substrate 32 to a predetermined temperature range, making its temperature higher than room temperature but lower than 400 ° C, to prevent P-type doping The cracking of the heterolayer during the subsequent microwave treatment.

如图7所示,接着进行一蚀刻制程去除部分的透明导电层42、电极接触层40、半导体层38、发光层36直至半导体层34表面,以于半导体层34表面形成一接触电极44,在透明导电层42表面形成一接触电极45。在本发明的较佳实施例中,接触电极44可由钛/铝等金属形成,用来作为半导体发光元件30的N型接触电极,接触电极45可由镍/金、铬/金或铂/金等金属形成,用来作为半导体发光元件30的P型接触电极。此外,当基板32由N型半导体材料形成时,N型接触电极亦可直接形成于基板32的背面,以省略前述蚀刻部分的透明导电层42、电极接触层40、半导体层38以及发光层36等步骤。As shown in FIG. 7, an etching process is then performed to remove part of the transparent conductive layer 42, the electrode contact layer 40, the semiconductor layer 38, the light emitting layer 36 until the surface of the semiconductor layer 34, so as to form a contact electrode 44 on the surface of the semiconductor layer 34. A contact electrode 45 is formed on the surface of the transparent conductive layer 42 . In a preferred embodiment of the present invention, the contact electrode 44 can be formed of metals such as titanium/aluminum, and is used as an N-type contact electrode of the semiconductor light emitting element 30, and the contact electrode 45 can be made of nickel/gold, chromium/gold or platinum/gold, etc. Formed from metal, it is used as a P-type contact electrode of the semiconductor light emitting element 30 . In addition, when the substrate 32 is formed of an N-type semiconductor material, the N-type contact electrode can also be directly formed on the back surface of the substrate 32, so as to omit the transparent conductive layer 42, the electrode contact layer 40, the semiconductor layer 38, and the light-emitting layer 36 in the aforementioned etched portion. and other steps.

Claims (8)

1, a kind of method of making semiconductor light emitting component, this method includes the following step:
(1) provides a substrate;
(2) form semiconductor layered structure at least in described substrate surface, and this semiconductor lamination structure includes one first conductive type semiconductor layer, a luminescent layer and one second conductive type semiconductor layer and is located at this substrate surface in regular turn;
(3) form a contact electrode layer that contains phosphide element in described semiconductor lamination body structure surface;
(4) form a transparency conducting layer in described contact electrode layer surface;
(5) after forming described transparency conducting layer, carry out a Microwave Treatment, to activate described semiconductor lamination structure.
2, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: described first conductive type is the N type, and described second conductive type is the P type.
3, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: described Microwave Treatment is the p type semiconductor layer that is used for activating in the described semiconductor lamination structure.
4, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: described contact electrode layer is formed by the P type semiconductor material, and utilizes described Microwave Treatment to be activated.
5, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: described transparency conducting layer is selected from the group that metal, metal oxide and metal nitride are formed.
6, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: the operating temperature of described Microwave Treatment is less than 400 ℃.
7, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: the thickness of described contact electrode layer is not more than 500 dusts.
8, according to the method for the described making semiconductor light emitting component of claim 1, it is characterized in that: described semiconductor light-emitting elements comprises light-emitting diode, laser diode, photodetector or solar cell.
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Publication number Priority date Publication date Assignee Title
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CN1416181A (en) * 2001-10-31 2003-05-07 国联光电科技股份有限公司 Light emitting diode and its preparation method
US20030132442A1 (en) * 2001-07-23 2003-07-17 Liann-Be Chang Semiconductor device with an ohmic ontact and method of manufacturing the same
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Publication number Priority date Publication date Assignee Title
CN1307356A (en) * 2000-02-03 2001-08-08 国联光电科技股份有限公司 Method for making light-emitting diode epitaxial wafer
CN1355570A (en) * 2000-11-27 2002-06-26 国联光电科技股份有限公司 Light-emitting diode and its manufacturing method
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