CN1307593C - Data carrier comprising memory means for storing information significant for intermediate operating states - Google Patents
Data carrier comprising memory means for storing information significant for intermediate operating states Download PDFInfo
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- CN1307593C CN1307593C CNB02811230XA CN02811230A CN1307593C CN 1307593 C CN1307593 C CN 1307593C CN B02811230X A CNB02811230X A CN B02811230XA CN 02811230 A CN02811230 A CN 02811230A CN 1307593 C CN1307593 C CN 1307593C
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
- G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
- G06K7/10544—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum
- G06K7/10821—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum further details of bar or optical code scanning devices
- G06K7/10861—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation by scanning of the records by radiation in the optical part of the electromagnetic spectrum further details of bar or optical code scanning devices sensing of data fields affixed to objects or articles, e.g. coded labels
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
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Abstract
A data carrier (2) or an integrated circuit (41) for a data carrier (2) comprises a memory (54) which is designed to store intermediate operating state information (ZS, CI16, CI20, BRS) significant for an intermediate operating state of the data carrier (2) or the integrated circuit (41) and comprises a memory control device (51), which after the occurrence of information significant for intermediate operating states ensures that this intermediate operating state information is stored in the memory (54) and comprises a control device (51), which-after the detection of the non-existence of the supply voltage (V) required for faultless operation during execution of a communication sequence interrupted by this non-existence and the subsequent detection of the re-existence of the supply voltage (V)-ensure that the data carrier (2) or the integrated circuit (41) is controlled in an intermediate operating state for which intermediate operating state information (ZS, CI16, CI20, BRS) stored in the memory (54) is significant.
Description
The present invention relates to data carrier and the integrated circuit that is used for data carrier, this circuit comprises and is used for the communicator that the communication sequence carried out according to communication period and at least one communication station communicate, described communication sequence comprises a plurality of communication steps, in data carrier, because of intermediate state of operation appears in a communication steps in the specific communications step, and in data carrier, appearance is to the important intermediate state of operation information of an intermediate state of operation in the specific intermediate state of operation, described data carrier comprises pick-up unit, is used to detect at least one the required performance variable of operation that whether has data carrier or integrated circuit.
This data carrier and the integrated circuit that is used for data carrier are that the motion of standard ISO/IEC 18000-3-5 in March 1 calendar year 2001 of ISO/WD18000-3-v40-5 is open in Ref. No., are known therefore.According to the known embodiment that is proposed, imagination is in communication station and data carrier or be used between the integrated circuit of this type of data carrier after the executive communication sequence, and the characteristic information of the final mode of operation that will reach is stored in the storer; Specifically, by ceasing and desisting order to data carrier or one of integrated circuit transmission from this communication station, this is ceased and desisted order related data carrier or integrated circuit is quit work, make in this idle condition, data carrier or integrated circuit can't be reacted to coming the instant order of communication station since then, in this 6.5.3.2.3.2.3 bar in above-mentioned standard proposals-" the quiet answer-mode fully " description are arranged.
For known data carrier or known integrated circuit, have following problem: communication station is deactivation and activation repeatedly again regularly, make and such a case occurs in communication period according to communication sequence, during the executive communication sequence, the deactivation of communication station causes lacking supply voltage in data carrier or the integrated circuit, the term of execution that causing the communication station sequence, this only reaches specific intermediate state of operation, rather than the final mode of operation of expectation, and the information of relevant this known data carrier or the specific intermediate state of operation that integrated circuit reached can be lost unfriendly because of lacking supply voltage.As a result, when communication station activated again, known data carrier had to from the beginning start once more previous interrupted communication sequence.Disadvantage is that this causes occurring comparatively continually rough sledding, makes to finish time that signal post needs situation when communication station forever keeps activating between communication station and a large amount of known data carrier.
The objective of the invention is to correct the problems referred to above, and realize improved data carrier and improved integrated circuit.
To achieve these goals, data carrier according to the present invention has been equipped with according to feature of the present invention, makes can characterize as follows according to data carrier of the present invention, that is:
Data carrier comprises and is used for the communicator that the communication sequence carried out according to communication period and at least one communication station communicate, described communication sequence comprises a plurality of communication steps, in data carrier, because of intermediate state of operation appears in a communication steps in the specific communications step, and in data carrier, the intermediate state of operation information (ZS, CI16, CI20, BRS) important to an intermediate state of operation in the specific intermediate state of operation appears; Whether described data carrier comprises pick-up unit, be used to detect exist data carrier to operate required at least one performance variable (V); Described data carrier comprises the memory storage that is used for canned data, and described memory storage is designed to store the intermediate state of operation information important to middle mode of operation (ZS, CI16, CI20, BRS); Described data carrier comprises memory control device, these devices are through design, make the intermediate state of operation information (ZS, CI16, CI20, BRS) important to middle mode of operation occurring afterwards, they guarantee important this intermediate state of operation information (ZS, CI16, CI20, BRS) of middle mode of operation is stored in the described memory storage; Described data carrier comprises control device, these devices are through design, make and detecting after at least one performance variable (V) do not exist, do not exist owing to described at least one performance variable (V) cause communication sequence interrupt to carry out and subsequently pick-up unit detect described at least one performance variable (V) duration of existence again, they guarantee that data carrier is controlled in intermediate state of operation, and the intermediate state of operation information (ZS, CI16, CI20, BRS) that is stored in the memory storage is important to described intermediate state of operation.
To achieve these goals, integrated circuit according to the present invention has been equipped with according to feature of the present invention, makes can characterize as follows according to integrated circuit of the present invention, that is:
The integrated circuit that is used for data carrier comprises and is used for the communicator that the communication sequence carried out according to communication period and at least one communication station communicate, described communication sequence comprises a plurality of communication steps, in integrated circuit, because of intermediate state of operation appears in a communication steps in the specific communications step, and in integrated circuit, appearance is for the important intermediate state of operation information (ZS of an intermediate operation step of specific intermediate state of operation, CI16, CI20, BRS), described integrated circuit comprises pick-up unit, is used to detect at least one performance variable (V) that whether exists integrated circuit operation required; Described integrated circuit comprises the memory storage that is used for canned data, and memory storage is designed to store for the important intermediate state of operation information of intermediate state of operation (ZS, CI16, CI20, BRS); Described integrated circuit comprises memory control device, it is through design, make occurring afterwards that they guarantee to be stored in the memory storage for important this intermediate state of operation information (ZS, CI16, CI20, BRS) of intermediate state of operation for the important intermediate state of operation information of intermediate state of operation (ZS, CI16, CI20, BRS); Described integrated circuit comprises control device, these devices are through design, make and detecting after at least one performance variable (V) do not exist, do not exist owing to described at least one performance variable (V) cause communication sequence interrupt to carry out and subsequently pick-up unit detect described at least one performance variable (V) duration of existence again, they guarantee that integrated circuit is controlled in intermediate state of operation, and the intermediate state of operation information (ZS, CI16, CI20, BRS) that is stored in the memory storage is important to described intermediate state of operation.
Provide feature according to the present invention very simple at the circuit engineering design aspect, and only need a small amount of extra cost to guarantee: for data carrier according to the present invention with according to integrated circuit of the present invention, the information of the specific intermediate state of operation that is reached the term of execution of can storing relevant communication sequence, thereby when the required performance variable of the failure-free operation of this data carrier or integrated circuit lost efficacy, the information that has reached intermediate state of operation is retained, subsequently, when the required performance variable of the failure-free operation of data carrier or integrated circuit exists once more, can make data carrier or integrated circuit turn back to the intermediate state of operation that had before reached immediately by plain mode.This is that the required performance variable of data carrier failure-free operation lost efficacy or lacked and needs from the beginning to start once more the straightforward procedure of the communication sequence of part execution term of execution of avoiding because of communication sequence.This guarantees that the total call duration time between the mass data carrier of communication station and communication station link therewith is short a lot.
Utilization is according to data carrier of the present invention or according to integrated circuit of the present invention, can be designed to the field intensity of detection effect in data carrier or integrated circuit with being used to detect the pick-up unit whether data carrier or at least one required performance variable of integrated circuit operation exist.Particularly advantageously be that pick-up unit is designed to detect whether have data carrier or a used sufficiently high supply voltage of integrated circuit operation.The embodiment of this type is characterised in that, realizes especially easily aspect circuit design.
Utilization is according to data carrier of the present invention or according to integrated circuit of the present invention, particularly advantageously be, control device is through design, make data carrier or integrated circuit be controlled in this intermediate state of operation, detecting before described at least one performance variable do not exist, to the important intermediate state of operation information of described intermediate state of operation as last intermediate state of operation information stores in memory storage.This has guaranteed short especially total call duration time.Yet, should be clear and definite, for data carrier according to the present invention or according to integrated circuit of the present invention, it also is favourable in some cases data carrier or integrated circuit being controlled at following intermediate state of operation, to the important intermediate state of operation information of this intermediate state of operation not as last storage, but as second from the bottom or even more early intermediate state of operation information stores.This type of data carrier or this adhesive integrated circuit can also be controlled at such intermediate state of operation, in the middle of it operational status information detect that at least one reference variable does not occur before not existing as yet and this state corresponding to only detecting the intermediate state of operation that at least one reference variable just may occur after not existing.
Utilization is according to data carrier of the present invention or integrated circuit, and particularly advantageous is that control device makes data carrier or integrated circuit are controlled at least one intermediate state of operation that occurs in the process of carrying out the anti-collision program through design.This embodiment advantageous particularly, because specifically, carrying out the anti-collision program takies in the communication sequence than the long time and because constantly restart communication sequence, thereby restart the anti-collision program, for known data carrier or known integrated circuit, this means bigger time waste, advantageously avoided this situation in data carrier according to the present invention or in according to integrated circuit of the present invention, because provide according to measure of the present invention, after the traffic carried step, can after the traffic carried step, continue again to carry out in the anti-collision program of interrupting during the communication sequence.
Utilization is according to data carrier of the present invention or integrated circuit, and particularly advantageous is that control device makes data carrier or integrated circuit are controlled at the intermediate state of operation that occurs as the result who carries out password program through design.More common important step when carrying out password program and being the executive communication sequence, therefore, it is favourable continuing communication sequence afterwards at the password program of having carried out (if essential).
For the embodiment of the memory storage of storing important intermediate state of operation information, very advantageously be that this memory storage is made of FRAM.Advantageously, such memory storage can carry out fast recording, and comprises in non-volatile mode and be stored in wherein information.
But, embodiment for the memory storage of storing important intermediate state of operation information, also find particularly advantageously to be, memory storage comprises at least two storage levels, they respectively comprise capacitor cell, and these two storage levels are suitable for the storage in limited time to the important intermediate state of operation information of middle mode of operation.This type of own known solution combination is very favorable according to data carrier of the present invention or integrated circuit according to the present invention.
For memory storage, what it might also be mentioned is, also can adopt other to write down as early as possible and with the memory storage of non-volatile mode canned data, for example the battery buffering or the electric capacity buffering SRAM or DRAM, perhaps even simple filp-flop stage.
For data carrier according to the present invention or according to integrated circuit of the present invention, also finding particularly advantageous is to be equipped with erasing apparatus, can wipe the memory storage of the important intermediate state of operation information of storage by this erasing apparatus.Have been found that this type of embodiment advantageous particularly under the situation that memory storage is made of FRAM.
Above-mentioned aspect of the present invention and others can derive from the example of following examples, and utilize these examples of embodiment to describe.
In addition, also shown in reference to the accompanying drawings but the example that do not limit embodiments of the invention illustrates the present invention.
Fig. 1 schematically illustrates with the block diagram form and is used for the communication station that communicates by letter with the data carrier of first example according to the embodiment of the invention shown in Figure 2.
Fig. 2 explanation is according to the data carrier of first example of the embodiment of the invention, and it is designed to communicate with communication station 1 according to Fig. 1, and is furnished with FRAM and stores important intermediate state of operation information as memory storage.
The process flow diagram of the agenda of carrying out in the sequence control device of Fig. 3 explanation according to the data carrier of Fig. 2.
Fig. 4 explanation is used to store the memory storage of important intermediate state of operation information, and in this example, it comprises the storage level with capacitor cell, is used for the data carrier of not representing separately according to second example of the embodiment of the invention.
Fig. 1 illustrates communication station 1.Communication station 1 is set up with being designed to and communicates by letter with data carrier 2, and data carrier 2 is illustrated among Fig. 2, and describes in detail hereinafter.Communication station 1 comprises communicator 3, describes its embodiment below in detail.Communicator 3 is designed to communicate by letter with data carrier 2 according to the communication sequence of carrying out in this type of communication, and wherein communication sequence comprises several communication steps, will illustrate in more detail below.
Communication station 1 comprises microcomputer 4.Except that microcomputer 4, can also provide wired logic circuitry.
Microcomputer 4 comprises sequence control device 5, and sequence control device 5 is connected to main frame by bus links B, and is used for controlling many devices that microcomputer 4 is realized.Sequence control device 5 comprises switchgear 6, by means of it, thereby can be with the execution deactivation and the activation again of communication station 1 with communication sequence, even in the communication sequence implementation of this type, this operation is to realize by the mode that no longer describes in detail in communication station 1, when communication station 1 was deactivated, communication station 1 did not send any signal, does not even send carrier signal discussed in more detail below.
Microcomputer 4 also comprises and can generate clock signal clk 1 and it is fed to the clock signal generating device 7 of sequence control device 5.In addition, microcomputer 4 also comprises the memory storage 8 that can store data and out of Memory.Memory device stores station data RDA.Data carrier data TDA also can be stored in the memory storage 8.
In addition, utilize microcomputer 4, can also realize many devices, hereinafter can be illustrated them.
Utilize microcomputer 4, realize wake-up signal generating apparatus 9, control information CI1 can be fed to generating apparatus 9 from sequence control device 5, generating apparatus 9 is designed to generate wake-up signal WUP.
Utilize microcomputer, realize waking up response signal pick-up unit 10, can present to device 10 waking response signal UPR up, and can generate control information CI4 by device 10, this information can be fed to sequence control device 5.
In addition, utilize microcomputer 4, realize the first sequence number request signal generating apparatus 11, control information CI5 can be fed to device 11 from sequence control device 5, and generate the first sequence number request signal SNA1 by device 11.
In addition, utilize microcomputer 4, realize comprising the sequence number signal pick-up unit 12 of collision-detection means 13.Sequence number signal SNS can be fed to sequence number signal pick-up unit 12.By sequence number signal pick-up unit 12, can formation sequence data SND or control information CI8 or control information CI9 and they are sent to sequence control device 5.If collision-detection means 13 detects at least two sequence number signal SNS conflicts, control information CI8 then appears.If after collision-detection means 13 detects between two sequence number signal SNS conflict at least and through after the special time TV, sequence number signal pick-up unit 12 does not detect or definite any sequence number, control information CI9 then occurs.The control information CI8 and the CI9 of serial number data SND and two types can be fed to sequence control device 5.
In addition, utilize microcomputer, realize conflict shows signal generating apparatus 14, control information CI10 can be fed to device 14 from sequence control device 5, and generate conflict shows signal COL by device 14.
In addition, utilize microcomputer 4, realize the second sequence number request signal generating apparatus 15, control information CI13 is fed to device 15 from sequence control device 5, and generate the second sequence number request signal SNA2 by device 15.
In addition, utilize microcomputer 4, realize confirmation signal generating apparatus 16, control information CI15 is fed to device 16 from sequence control device 5, and generate confirmation signal QIT by device 16.
In addition, utilize microcomputer 4, realize cipher inquiry signal supervisory instrument 17, cipher inquiry signal PWA can be presented to device 17, and generate control information CI18 by device 17, this information can be fed to sequence control device 5.
In addition, utilize microcomputer 4, realize code signal generating apparatus 18, control information CI19 is fed to device 18 from sequence control device 5, and generate code signal PWS by device 18.
In addition, utilize microcomputer 4, realize standby signal pick-up unit 19, standby signal BRS can be presented to device 19, and install 19 and be designed to generate control information CI22, this information can be fed to sequence control device 5.
In addition, utilize microcomputer 4, realize data processing equipment 20, specifically device 20, is used for treating stations data RDA and deal with data carrier data TDA for deal with data is provided with and designs.
In addition, utilize microcomputer 4, realize read command generating apparatus 21, control information CI23 is fed to device 21 from sequence control device 5, and generate read command LCO by device 21.
In addition, utilize microcomputer 4, realize write order generating apparatus 22, control information CI25 is fed to device 22 from sequence control device 5, and generate write order SCO by device 22.
In addition, utilize microcomputer 4, realize erase command generating apparatus 23, control information CI27 is fed to device 23 from sequence control device 5, and generate erase command ECO by device 23.
Utilize microcomputer 4, also can realize other device, for example idle order generating apparatus and some other devices, this paper does not discuss in more detail to it.
As mentioned above, communication station 1 comprises and is used for the communicator 3 of communicating by letter with at least one data carrier 2.In this example, communicator 3 comprises above-mentioned sequence control device 5 and device 9 to 23.
In addition, utilize microcomputer 4, also can realize code device 24 and decoding device 25.Code device 24 is set up and is designed to encode to presenting to its signal, here be noted that and be fed to code device 24 so that encoded signals WUP, SNA1, SNA2, QIT, PWS, RDA, LCO, SCO and ECO indicate to pass through the numerical data that code device 24 is encoded.Decoding device 25 is set up and is designed for decodes to the signal of the coding form that is fed to decoding device 25, so in this example, decoding device sends signal UPR, SNS, PWA, BRS and TDA.
In addition, communication station 1 also comprises modulating device 26, and it is in the downstream of code device 24.In addition, carrier signal maker 27 is set also, can generates carrier signal CS, this signal is fed to modulating device 26 and modulates, carry out amplitude modulation in this example with the signal correction ground that code device 24 sends by it.Yet, can also be provided with and carry out frequency modulation or phase modulation (PM) or even the device of other type modulation.In the downstream of modulating device 26, first amplifier 28 is arranged, its output signal is fed to adaptive device 29, and amplifying signal is forwarded to transmitting device 30 from adaptive device 29.Transmitting device 30 is used for the transmitting device that sends to data carrier 2 to their signal with presenting, hereinafter will further discuss this.In this example, transmitting device 30 comprises transmission coil, and it can be by transformer coupled transmission line chart in the transmitting device of data carrier 2.Yet transmitting device 30 can also be designed to have the electric capacity effect.Transmitting device 30 can also be designed to antenna and come work by launching electromagnetic wave.
Transmitting device 30 not only is used to send signal, and is used for received signal, and the signal that is received is fed to second amplifier 31 in the communication station 1 by adaptive device 29.Second amplifier 31 comprises downstream demodulating equipment 32, and decoding device 25 is connected to demodulating equipment 32.In this example, demodulating equipment 32 is designed to load modulation signal is carried out demodulation, load modulation signal is to carry out load-modulate by the unmodulating carrier signal CS that carrier signal maker 27 is generated to obtain, this technology is widely known by the people already in the academic circle of expert, so do not elaborate herein.
Describe embodiment below in detail according to the data carrier 2 of Fig. 2.
Data carrier 2 comprises transmitting device 40, it be designed to communication station 1 in transmitting device 30 communicate.Data carrier 2 also comprises integrated circuit 41, and it is provided with the port 42 that is connected to transmitting device 40.Port 42 is connected to internal circuit supply voltage generating apparatus 43, demodulating equipment 44 and modulating device 45.Supply voltage generating apparatus 43 is set up and is designed for the signal that utilizes transmitting device 40 to be provided to port 42 and generates supply voltage V.Supply voltage V can be fed to that all need the parts of this supply voltage V in the integrated circuit 41, becomes complicated for fear of accompanying drawing, and is not shown among Fig. 2.
Supply voltage generating apparatus 43 comprises the so-called electric detection means 46 that adds, device 46 is set to detect whether have the required performance variable of data carrier 2 operations, is specially the required supply voltage V of failure-free operation whether detection exists data carrier 2 or integrated circuit 41 in this example.If supply voltage generating apparatus 43 has sent the required supply voltage V of failure-free operation, then add electric detection means 46 and will send characteristic signal, promptly so-called power-on reset signal POR with high level.If supply voltage generating apparatus 43 does not send the sufficiently high supply voltage V that is used for failure-free operation, then do not have power-on reset signal POR, or this power-on reset signal becomes afterwards low level from previous high level.
Be provided with and design demodulating equipment 44 to be used for that the signal of presenting to them from port 42 is carried out demodulation, these signals are sent by communication station 1.
Modulating device 45 is set the signal that is fed to them is modulated, so that the signal that transmitting device 40 is fed to their modulation format sends to the transmitting device 30 in the communication station 1.In this example, be provided with and design modulating device 45 to be used for that the unmodulating carrier signal CS that communication station 1 carrier signal maker 27 is generated is carried out load-modulate, this technology is widely known by the people already in the academic circle of expert.
Data carrier 2 comprises microcomputer 47.Except that microcomputer 47, can also provide wired logic circuitry.
Utilize microcomputer 47, realize decoding device 48 and code device 49.Decoding device 48 is in the downstream of demodulating equipment 44, is provided with and designs it, so that code device 24 encoded signals (being data-signal) in the communication station 1 are decoded.Code device 49 is in the upstream of modulating device 45, and it is set up and is designed to the signal that is fed to them is encoded, and specifically carries out as follows: code device 49 encoded signals can be by 25 decodings of the decoding device in the communication station 1.
In addition, utilize microcomputer 47, realize the communicator 50 of data carrier 2 or integrated circuit 41.Communication sequence and at least one communication station that communicator 50 is designed to carry out in the communication process according to this type communicate, and wherein said communication sequence comprises a plurality of communication steps in conjunction with communication station 1 explanation.Communicator 50 comprises many devices that microcomputer 47 is realized, hereinafter will give more detailed description.
Microcomputer 47 comprises sequence control device 51, and many devices can be controlled by it; These devices will further describe hereinafter.
In addition, microcomputer 47 also comprises and can generate clock signal clk 2 and it is fed to the clock signal generating device 52 of sequence control device 51.
In addition, microcomputer 47 also comprises first memory storage 53 and second memory storage 54.First memory storage 53 is set up and is designed to mainly to store data, promptly stores data carrier data TDA and storage sites data RDA.Second memory storage 54 is set up and is designed to store specific information; Hereinafter will give more detailed description.In this example, second memory storage 54 preferably is made of so-called FRAM.
Utilize microcomputer 47, realize wake-up signal pick-up unit 55, wake-up signal WUP can be presented to device 55, and generate control information CI2 by device 55, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize waking response signal generating apparatus 56 up, control information CI3 is fed to device 56 from sequence control device 51, and wake response signal UPR up by device 56 generations.
In addition, utilize microcomputer 47, realize the first sequence number request signal pick-up unit 57, the first sequence number request signal SNA1 can be fed to device 57, and generate control information CI6 by device 57, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize sequence number signal generating apparatus 58, control information CI7 can be fed to device 58 from sequence control device 51, and by device 58 formation sequence signal SNS.Except that serial number data SND, sequence number signal SNS also comprises verification and data and other secure data.
In addition, utilize microcomputer 47, realize conflict shows signal pick-up unit 59, conflict shows signal COL can be presented to device 59, and generate control information CI11 by device 59, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize being used to generate the random number generator 60 of random number, still, in this example, can only generate two random numbers, i.e. random number " 0 " or " 1 " by the agency.The random number " 0 " that random number generator 60 is generated or " 1 " can be used as control information CI12 and are fed to sequence control device 51.
In addition, utilize microcomputer 47, realizing counter 61, its function, is that meter reading increases progressively or successively decrease can be on the one hand by random number generator 60 controls, the second sequence number request signal pick-up unit, 62 controls that realized by microcomputer 47 on the other hand.By counter 61, can generate meter reading ZS, it can be fed to sequence control device 51, and this is very important in this example.
Utilize microcomputer 47, realize the second sequence number request signal pick-up unit 62 already mentioned above, the second sequence number request signal SNA2 can be fed to device 62, and by device 62 generation control information CI14, this information can be fed to sequence control device 51 and be used for control counter 61.
In addition, utilize microcomputer 47, realize confirmation signal pick-up unit 63, confirmation signal QIT can be presented to device 63, and generate control information CI16 by device 63, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize cipher inquiry signal generating apparatus 64, control information CI17 can be fed to device 64 from sequence control device 51, and can generate cipher inquiry signal PWA by device 64.
In addition, utilize microcomputer 47, realize code signal pick-up unit 65, code signal PWS can be presented to device 65, and generate control information CI20 by device 65, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize standby signal generating apparatus 66, control information CI21 can be fed to device 66 from sequence control device 51, and by device 66 generation standby signal BRS, this information both had been fed to code device 49 so that be sent to communication station 1, also had been fed to sequence control device 51, so that can be by the usefulness of sequence control device 51 forwardings for other purpose; Because this point is extremely important in this example, so hereinafter will give more detailed description.
In addition, utilize microcomputer 47, realize data processing equipment 67, it is provided with and designs for deal with data.By data processing equipment 67, can deal with data carrier data TDA and station data RDA.
In addition, utilize microcomputer 47, realize read command pick-up unit 68, read command LCO can be fed to this device 68, and generate control information CI24 by this device 68, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize write order pick-up unit 69, write order SCO can be fed to this device 69, and generate control information CI26 by this device 69, this information can be fed to sequence control device 51.
In addition, utilize microcomputer 47, realize erase command pick-up unit 70, erase command LCO can be fed to this device 70, and generate control information CI28 by this device 70, can be with this feed information to sequence control device 51.In addition, erasing apparatus 71 is set also here, can be used for wiping all data and the information that before be stored in second memory storage 54.
Utilize microcomputer 47, also can realize other device, for example idle order pick-up unit and other device, but will not make any more detailed description herein.
As mentioned above, communicator 50 is realized by microcomputer 47.In this example, communicator 50 comprises sequence control device 51 and the top device 55 to 69 that describes in detail one by one.
The following describes according to the communication station 1 of Fig. 1 with according to the communication sequence between the data carrier 2 of Fig. 2.Here, it is to be noted obviously that this is an example of communication sequence, has other communication sequence that is different from the following stated communication sequence on some communication steps.
In principle, in this should be clear and definite, for communication station 1 and data carrier 2, result as some communication steps in the following stated communication sequence, intermediate state of operation can appear, and for communication station 1 and data carrier 2, important intermediate state of operation information can appear all in each specific intermediate state of operation.To describe in detail this below.
Suppose that communication station 1 has connected, the data carrier 2 of Fig. 2 the same with numerous other data carriers of this type is arranged in the communication zone of communication station 1.Relevant communication station 1 also will should be mentioned that, the deactivation of the periodicity of communication station 1 is carried out (this with the communication sequence that is performed current to be in which communication steps irrelevant) by switchgear 6 and after each deactivation subsequently, to activate again by 6 pairs of communication stations 1 of switchgear, deactivation causes unmodulated or modulated carrier signal CS to interrupt to the transmission of data carrier 2, this causes during communication station 1 deactivation, the voltage source of data carrier 2 lost efficacy, supply voltage generating apparatus 43 no longer is the sufficiently high supply voltage V of integrated circuit 41 outputs of data carrier 2 or data carrier 2 thus, thereby causes power-on reset signal POR to change to low level from high level.
When communication sequence begins, sequence control device 5 in the communication station 1 offers wake-up signal generating apparatus 9 with control information CI1, cause wake-up signal WUP to be sent to data carrier 2 by communication station 1, and be waken up signal supervisory instrument 55 and detect, thereby control information CI2 is offered sequence control device 50.As a result, sequence control device 51 offers control information CI3 and wakes response signal generating apparatus 56 up, wakes response signal UPR up and sends to communication station 1 by data carrier 2 thereby generate, and is detected by the response signal pick-up unit 10 that wakes up there then.This causes control information CI4 to offer sequence control device 5.This informs communication station 1: at least one data carrier 2 provides wakes response signal UPR up, thereby is arranged in the communication zone of communication station 1.
Because the appearance of control information CI4, generate control information CI5 and send it to the first sequence number request signal generating apparatus 11 by sequence control device 5, thereby generate the first sequence number request signal SNA1, wherein the first sequence number request signal SNA1 is sent to data carrier 2 by communication station 1, and detected, thereby generate control information CI6 and it is supplied with sequence control device 51 by the first sequence number request signal pick-up unit 57.This causes sequence control device 51 to guarantee to read serial number data SND from first memory storage 53 again, and wherein first memory storage 53 is used for storage sequence data SND.The serial number data SND that reads is fed to sequence number signal generating apparatus 58 with the control information CI7 that sequence control device 51 generates, wherein form sequence number signal SNS by serial number data SND and by verification and data and other secure data, it is sent to communication station 1 by data carrier 2 subsequently, and is fed to sequence number signal pick-up unit 12 in communication station 1.Carry out inspection by the collision-detection means in the sequence number signal pick-up unit 12 13, judge between two sequence number signal SNS whether clash at least.
If 12 of sequence number signal pick-up units are received a sequence number signal SNS, then collision-detection means 13 detects conflict, causes sequence number signal pick-up unit 12 that serial number data SND is offered sequence control device 5.In the case, finished so-called anti-collision program, the data carrier 2 of present known its serial number data SND is stored in communication station 1 in the communication station 1.
But, if collision-detection means 13 detects conflict, this means that at least two sequence number signal SNS are fed to sequence number signal pick-up unit 12, this can cause sequence number signal pick-up unit 12 that control information CI8 is offered sequence control device 5.From and make sequence control device 5 generate control information CI10 and it be fed to conflict shows signal generating apparatus 14, thereby generate conflict shows signal COL and send to data carrier 2 by communication station 1, in data carrier 2, detected, shown in the square frame 80 of flow process Figure 81 of Fig. 3 by conflict shows signal pick-up unit 59.
The shows signal that leads to a conflict thus pick-up unit 59 generates control information CI11, and provides it to sequence control device 51, and wherein sequence control device 51 is guaranteed control information CI11 is forwarded to random number generator 60.Random number generator 60 becomes activation thus, shown in the square frame 82 of flow process Figure 81.So, random number generator 60 generate two kinds of possible random numbers " 0 " or " 1 " one of them, and the random number that generates offered sequence control device 51 as control information CI12.Subsequently, by the device (not shown) in the square frame 83 of flow process Figure 81, carry out and check, the control information CI12 that judgement random number generator 60 is generated has value " 0 " and still has value " 1 ".
If the previous random number that generates has value " 0 ", then by another device (not shown), in the square frame 84 of flow process Figure 81, carry out and check that judge whether the meter reading ZS of counter 61 has value " 0 ", wherein meter reading ZS is fed to sequence control device 51.Generate after the power-on reset signal POR when activating the first time of data carrier 2, counter 61 always has value " 0 ".As previous supposition, determine random number " 0 " at square frame 83, counter 61 still has its original counter reading ZS, i.e. " 0 ", therefore the inspection in the square frame 84 as a result has positive result, by after device shown is not checked in square frame 84, trigger the generation of control information CI7, wherein control information CI7 is fed to sequence number signal generating apparatus 58, thus formation sequence signal SNS once more, and send it to communication station 1.
If no conflict occurred now, then can provide serial number data SND to sequence control device 5.If new conflict takes place, then can cause generating once more conflict shows signal COL, send it to data carrier 2 again, and detected by conflict shows signal pick-up unit 59 according to the square frame among flow process Figure 81 80.
If in square frame 80, determine conflict shows signal COL and produce subsequently after the random number as control information CI12, generate random number " 1 ", therefore checking subsequently in square frame 83 produces the check result of negating, thus at square frame 86, counter 61 increases progressively, and promptly meter reading ZS adds 1.Therefore checking subsequently in the square frame 84 also will produce negative check result, from and sequence number signal generating apparatus 58 is not activated at square frame 85.Therefore, in the case, although communication station 1 transmits conflict shows signal COL to data carrier 2, data carrier 2 can not send any sequence number signal SNS to communication station 1.Therefore, through the period TV of appointment and the sequence number signal pick-up unit 12 in the communication station 1 can not receive sequence number signal SNS, this signal by comprising sequence number signal pick-up unit 12 or collision-detection means 13 detect, then can generate control information CI9 and offer sequence control device 5.
Occur control information CI9 in the sequence control device 5 and then make sequence control device 5 that control information CI13 is offered the second sequence number request signal generating apparatus 15, thereby the second sequence number request signal SNA2 is sent to data carrier 2 by communication station 1.The second sequence number request signal pick-up unit 62 detects the second sequence number request signal SNA2 in the square frame 87 of flow process Figure 81 of Fig. 3 then, generates control information CI14 thus and it is supplied with sequence control device 51.Control information CI14 is forwarded to counter 61 from sequence control device 51 then, makes that counter 61 is successively decreased in the square frame 88 of flow process Figure 81.Suppose that counter 61 before only increased progressively once according to square frame 86, then square frame 88 successively decrease mean counter 61 meter reading ZS once more for " 0 ", at square frame 84 this is judged subsequently.Therefore, in the case, sequence number signal generating apparatus 58 Be Controlled information CI7 activate in square frame 85, thus formation sequence signal SNS, and send it to communication station 1 by data carrier 2.
Shown in flow process Figure 81, after square frame 80 determines that conflict shows signal COL occurs, also activate at square frame 82 random number generators 60, this can make counter 61 be incremented at square frame 86.In other words, this means that the meter reading ZS that each of counter 61 left " 0 " represents advanced how far measure of anti-collision program in the communication sequence of carrying out.A plurality of meter reading ZS may appear in the anti-collision program, because a plurality of intermediate state of operation may occur in the anti-collision program.Therefore, therefore the intermediate state of operation of the data carrier 2 that each meter reading ZS has occurred the term of execution of having characterized the anti-collision program represents the intermediate state of operation information of in this anti-collision program specific intermediate state of operation being overstated and wanting.Therefore, meter reading ZS is important intermediate state of operation information, is fed to second memory storage 54 to store by sequence control device 51 in data carrier 2.This means that the current meter reading ZS in the counter 61 is always arranged in second memory storage 54.In this example, second memory storage 54 is made of FRAM, if voltage generator element 43 stops to provide sufficiently high supply voltage V, what for to keeping the information that is stored in wherein.
If receive in the data carrier 2 in the square frame 87 after the second sequence number request signal SNA2, in square frame 85 communication sequence further the term of execution, sequence number signal generating apparatus 58 is activated and after this no longer includes conflict and takes place, cause then in communication station 1, receiving that sequence number signal pick-up unit 12 offers sequence control device 5 with serial number data SND after the sequence number signal SNS.In the case, finish so-called anti-collision program, and data carrier 2 detects serial number data SND after a plurality of conflicts in overcoming communication station 1, leaves it in communication station 1.In the case, sequence control device 5 offers confirmation signal generating apparatus 16 with control information CI15, thereby generates confirmation signal QIT and send it to data carrier 2.In data carrier 2, confirmation signal QIT is identified signal supervisory instrument 63 and detects, and generates control information CI16 thus and provides it to sequence control device 51.
Control information CI16 also represents important intermediate state of operation information, specifically, control information CI16 is for being characterised in that the anti-collision program is finished and notifying the intermediate state of operation of this relevant data carrier 2 to overstate by confirmation signal QIT to communication station 1 and want.Owing to this reason, the intermediate state of operation information CI16 that wants that above-mentioned intermediate state of operation overstated also is fed to second memory storage 54 by sequence control device 51 and is stored in wherein.
In sequence control device 51, receive after the control information CI16, sequence control device 51 makes control information CI17 be fed to cipher inquiry signal generating apparatus 64, make and generate cipher inquiry signal PWA and sent to communication station 1 by data carrier 2, detected by cipher inquiry signal supervisory instrument 17 at this then, cause control information CI18 to send to sequence control device 5.Make also sequence control device 5 that control information CI19 is outputed to code signal generating apparatus 18, thereby generate code signal PWS and sent to data carrier 2 that this signal is fed to code signal pick-up unit 65 therein by communication station 1.Code signal pick-up unit 65 will compare with the code data that is stored in the data carrier 2 from the code data that communication station 1 is sent to data carrier 2 by code signal PWS.If relatively obtain positive result, then code signal pick-up unit 65 sends control information CI20 to sequence control device 51.Control information CI20 also represents important intermediate state of operation information, because its indication password program completes successfully, thereby control information CI20 is fed to second memory storage 54 by sequence control device 51 and is stored in wherein.
The control information CI20 that is fed to sequence control device 51 also makes sequence control device 51 send control information CI21 to standby signal generating apparatus 66, generate standby signal BRS thus, standby signal BRS is sent to communication station 1, detected by standby signal pick-up unit 19 therein, thereby cause control information CI22 to send to sequence control device 5.Standby signal BRS also represents important intermediate state of operation information, it comes notification data carrier 2 ready to next communication steps with signal, and standby signal BRS also is fed to second memory storage 54 that is used for storing and it is stored in second memory storage 54 by sequence control device 51 thus.
In communication sequence, in communication station 1, can generate read command LCO or can generate write order SCO after a while by read command generating apparatus 21 by write order generating apparatus 22.Read command LCO is detected by read command generating apparatus 68 after being sent to data carrier 2 by communication station 1, and generates control information CI24, and reader is carried out, and wherein data carrier data TDA is read out first memory storage 53 and sends to communication station 1.Write order SCO causes generating control information CI26 after being sent to data carrier 2 by communication station 1 and being detected by write order pick-up unit 69, write order is carried out, and the data of wherein standing RDA is written into second memory storage 53.
Can release according to the previous explanation of communication sequence, the term of execution of communication sequence, carry out a plurality of communication steps, because of intermediate state of operation appears in these communication steps, and occur for the important intermediate state of operation information of each specific intermediate state of operation, that is, be meter reading ZS, control information CI16 and CI20 and standby signal BRS in the case.This intermediate state of operation information is stored in second memory storage 54 by sequence control device 51.Here, after information ZS, CI16, CI20 and the BRS important for intermediate state of operation occurring, sequence control device 51 guarantees that this intermediate state of operation information ZS CI16, CI20 and BRS are stored in second memory storage 54.
For data carrier 2, present embodiment is through design, makes that add the power-on reset signal POR that electric detection means 46 can generate also is fed to sequence control device 51.Here, sequence control device 51 makes when for the first time power-on reset signal POR occurring through design, microcomputer 47 can all be changed to original state by all devices of sequence control device 51 controls.If this change supply voltage V inefficacy afterwards to original state, promptly, if lack the required supply voltage V of failure-free operation, the execution of communication sequence is interrupted, but the important intermediate state of operation information that is stored in second memory storage 54 can be retained before interrupting.If supply voltage V recovers subsequently, promptly the term of execution of communication sequence, lack after the supply voltage V, this supply voltage V occurs subsequently again, then adds electric detection means 46 and resends power-on reset signal POR, and this signal is fed to sequence control device 51 once more.Yet, in the case, power-on reset signal POR is fed to sequence control device 51 can makes data carrier 2 or integrated circuit 41 be handled (these sequence control devices 51 for this reason and through suitably design) by sequence control device 51 and enter intermediate state of operation, and the intermediate state of operation information that is stored in second memory storage 54 is important for this state.In other words, this means that data carrier 2 or integrated circuit 41 can be by adding electric detection means 46 and being handled and entered and belong to the intermediate state of operation that is stored in the important intermediate state of operation information in second memory storage 54 by sequence control device 51.For data carrier 2 or integrated circuit 41 according to Fig. 2, this embodiment is in this process design, make that data carrier 2 can be by adding electric detection means 46 and handled and entered intermediate state of operation by sequence control device 51, its important intermediate state of operation information detect supply voltage V do not exist before, as last intermediate state of operation information stores in second memory storage 54.
Utilization is according to data carrier 2 and the integrated circuit 41 of Fig. 2, the significant advantage that obtains is: after supply voltage V lost efficacy back and reappeared supply voltage V subsequently, data carrier 2 and integrated circuit 41 can turn back to data carrier 2 or integrated circuit 41 residing intermediate state of operation before supply voltage V does not exist immediately.This is extremely important, the storage of those intermediate state of operation of carrying out the term of execution of especially about the anti-collision program, because it proceeds the anti-collision program all the time from the intermediate state of operation that supply voltage V inefficacy reaches before, advantage has been obviously to reduce to be carried out anti-collision required T.T. of program.
What should be mentioned that is according to the execution of 1 pair of communication sequence of above-mentioned communication station, can also generate erase command ECO by erase command generating apparatus 23.Erase command ECO can be wiped free of order pick-up unit 70 and detect in data carrier 2, detect after the erase command ECO erase command pick-up unit 70 CI28 that sends control information.Control information CI28 is fed to erasing apparatus 71, by sequence control device 51,71 pairs second memory storages of erasing apparatus 54 carry out following operation: second memory storage 54 makes and intermediate state of operation information ZS, CI16, CI20 and BRS that be stored in second memory storage 54 important for intermediate state of operation be wiped free of through wiping program.
In the data carrier 2 according to Fig. 2, second memory storage 54 is made of FRAM.The another kind of selection scheme of the embodiment of second memory storage 54 of this type as shown in Figure 4.Second memory storage 54 according to Fig. 4 comprises three storage levels 90,91 and 92.In these three storage levels 90,91 and 92 each comprises 93,94 and 95 and two field effect transistors 96,97,98,99,100 and 101 of capacitor cell.These three storage levels 90,91 and 92 are suitable for each storage of prescribing a time limit to the important intermediate state of operation information of middle mode of operation.Here, the most common failure that must guarantee the supply voltage V that storage in limited time takes place during the routine operation than the data carrier 2 of second memory storage 54 that comprises Fig. 4 in time continues longerly.
Claims (8)
1. an integrated circuit (41) that is used for data carrier (2) is used for according to comprising that the communication sequence of some communication steps and at least one communication station (1) communicate; Described integrated circuit (41) comprising:
Pick-up unit (46), whether required at least one performance variable (V) of operation that is used to detect described integrated circuit (41) exists;
Memory storage (54) is used to store the intermediate state of operation information relevant with intermediate state of operation (ZS, CI16, CI20, BRS), and described intermediate state of operation is the result of a concrete communication steps; With
Control device (51), be designed to, make that the intermediate state of operation information (ZS, CI16, CI20, BRS) by described storage is arranged on intermediate state of operation with described integrated circuit (41) when detecting described performance variable (4) and exist again after through one non-existent period.
2. integrated circuit as claimed in claim 1 (41) is characterized in that, described pick-up unit (46) designed to be used the used sufficiently high supply voltage (V) of operation whether detection exists described integrated circuit (41).
3. integrated circuit as claimed in claim 1 (41) is characterized in that, described control device (51) be designed to described integrated circuit (41) be arranged on detect described at least one performance variable (V) do not exist before last intermediate state of operation.
4. integrated circuit as claimed in claim 1 (41) is characterized in that, described control device (51) is designed to described integrated circuit (41) is controlled at least one intermediate state of operation that occurs in the process of carrying out the anti-collision program.
5. integrated circuit as claimed in claim 1 (41) is characterized in that, described control device (51) is designed to described integrated circuit (41) is controlled at the intermediate state of operation that occurs as the result who carries out password program.
6. integrated circuit as claimed in claim 1 (41) is characterized in that, described memory storage (54) is made of ferroelectric RAM.
7. integrated circuit as claimed in claim 1 (41), it is characterized in that, described memory storage (54) comprises at least two storage levels (90,91,92), each storage level comprises capacitor cell (93,94,95) respectively, and described two storage levels (P0, P1, P2) are suitable for the intermediate state of operation information that storage is in limited time overstated and wanted middle mode of operation.
8. integrated circuit as claimed in claim 1 (41), it is characterized in that comprising erasing apparatus (71), can wipe described memory storage (54) by described erasing apparatus (71), thus can delete middle mode of operation overstated want and be stored in each intermediate state of operation information (ZS, CI16, CI20, BRS) in the described memory storage (54).
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP01890176.9 | 2001-06-06 | ||
| EP01890176 | 2001-06-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1513157A CN1513157A (en) | 2004-07-14 |
| CN1307593C true CN1307593C (en) | 2007-03-28 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB02811230XA Expired - Fee Related CN1307593C (en) | 2001-06-06 | 2002-06-04 | Data carrier comprising memory means for storing information significant for intermediate operating states |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6961829B2 (en) |
| EP (1) | EP1402469B1 (en) |
| JP (1) | JP4074853B2 (en) |
| CN (1) | CN1307593C (en) |
| AT (1) | ATE426214T1 (en) |
| DE (1) | DE60231619D1 (en) |
| WO (1) | WO2002099741A1 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4074853B2 (en) * | 2001-06-06 | 2008-04-16 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Integrated circuit and data carrier having memory means for storing information associated with an intermediate operating state |
| WO2005038834A1 (en) | 2003-10-20 | 2005-04-28 | Showa Denko K.K. | Production method of a capacitor |
| US8057553B2 (en) | 2007-03-15 | 2011-11-15 | Sanyo Electric Co., Ltd. | Method for manufacturing solid electrolytic capacitor and solid electrolytic capacitor |
| JP5259541B2 (en) * | 2009-09-17 | 2013-08-07 | 株式会社東芝 | Portable electronic device, method for controlling portable electronic device, and IC card |
| US8296508B1 (en) * | 2010-04-27 | 2012-10-23 | Micron Technology, Inc. | Secure memory device erase |
| US8914576B2 (en) * | 2012-07-30 | 2014-12-16 | Hewlett-Packard Development Company, Lp. | Buffer for RAID controller with disabled post write cache |
| TWI834603B (en) * | 2017-02-14 | 2024-03-11 | 日商索尼半導體解決方案公司 | Communication device, communication method, communication program and communication system |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5966082A (en) * | 1997-05-23 | 1999-10-12 | Intemec Ip Corp. | Method of flagging partial write in RF tags |
| EP0973127A2 (en) * | 1998-07-16 | 2000-01-19 | Kabushiki Kaisha Toshiba | IC card, IC card processing system, and IC card processing method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5485154A (en) * | 1987-12-04 | 1996-01-16 | Magellan Corporation (Australia) Pty. Ltd. | Communication device and method(s) |
| US5539394A (en) * | 1994-03-16 | 1996-07-23 | International Business Machines Corporation | Time division multiplexed batch mode item identification system |
| US6097292A (en) | 1997-04-01 | 2000-08-01 | Cubic Corporation | Contactless proximity automated data collection system and method |
| JP4129845B2 (en) * | 1997-01-21 | 2008-08-06 | エヌエックスピー ビー ヴィ | Transponder communication device for wireless communication with at least one transponder and transponder for wireless communication with at least one transponder communication device |
| JP4074853B2 (en) * | 2001-06-06 | 2008-04-16 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | Integrated circuit and data carrier having memory means for storing information associated with an intermediate operating state |
-
2002
- 2002-06-04 JP JP2003502778A patent/JP4074853B2/en not_active Expired - Fee Related
- 2002-06-04 EP EP02735725A patent/EP1402469B1/en not_active Expired - Lifetime
- 2002-06-04 WO PCT/IB2002/002060 patent/WO2002099741A1/en active Application Filing
- 2002-06-04 CN CNB02811230XA patent/CN1307593C/en not_active Expired - Fee Related
- 2002-06-04 DE DE60231619T patent/DE60231619D1/en not_active Expired - Lifetime
- 2002-06-04 US US10/161,751 patent/US6961829B2/en not_active Expired - Lifetime
- 2002-06-04 AT AT02735725T patent/ATE426214T1/en not_active IP Right Cessation
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5966082A (en) * | 1997-05-23 | 1999-10-12 | Intemec Ip Corp. | Method of flagging partial write in RF tags |
| EP0973127A2 (en) * | 1998-07-16 | 2000-01-19 | Kabushiki Kaisha Toshiba | IC card, IC card processing system, and IC card processing method |
Also Published As
| Publication number | Publication date |
|---|---|
| ATE426214T1 (en) | 2009-04-15 |
| EP1402469B1 (en) | 2009-03-18 |
| EP1402469A1 (en) | 2004-03-31 |
| JP4074853B2 (en) | 2008-04-16 |
| DE60231619D1 (en) | 2009-04-30 |
| US20020186789A1 (en) | 2002-12-12 |
| CN1513157A (en) | 2004-07-14 |
| JP2004528663A (en) | 2004-09-16 |
| US6961829B2 (en) | 2005-11-01 |
| WO2002099741A1 (en) | 2002-12-12 |
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