CN1304974C - Control method of intelligent disk equipment based on interconnected net interface - Google Patents
Control method of intelligent disk equipment based on interconnected net interface Download PDFInfo
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- CN1304974C CN1304974C CNB2004100038880A CN200410003888A CN1304974C CN 1304974 C CN1304974 C CN 1304974C CN B2004100038880 A CNB2004100038880 A CN B2004100038880A CN 200410003888 A CN200410003888 A CN 200410003888A CN 1304974 C CN1304974 C CN 1304974C
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Abstract
本发明涉及计算机总线控制技术、计算机存储设备控制技术、ASIC设计技术领域的一种基于TCP/IP接口的ATAPI设备新型控制方法。其步骤包括：S1，TCP/IP总线接口，完成总线收发器；S2，完成TCP/IP协议解译；S3，主机上的硬件驱动程序初始化主机侧DMA控制器；S4，在数据传输时用异步FIFO作数据缓存；S5，桥接器中设备侧DMA控制器根据ATAPI设备的DMA请求，把FIFO中的数据写入ATAPI设备；S6，完成IDE总线控制与接口。使用这种技术的ATAPI设备(硬盘、光驱、磁带机等)具有接口灵活、携带方便、挂接距离远等优点。
The invention relates to a new ATAPI device control method based on a TCP/IP interface in the fields of computer bus control technology, computer storage device control technology and ASIC design technology. The steps include: S1, TCP/IP bus interface, complete bus transceiver; S2, complete TCP/IP protocol interpretation; S3, hardware driver on the host initializes the host side DMA controller; S4, use asynchronous FIFO is used as a data cache; S5, the device-side DMA controller in the bridge writes the data in the FIFO into the ATAPI device according to the DMA request of the ATAPI device; S6, completes the IDE bus control and interface. ATAPI devices using this technology (hard disk, optical drive, tape drive, etc.) have the advantages of flexible interface, easy portability, and long mounting distance.
Description
Technical field
The present invention relates to computer bus control technology, computer memory device control technology, ASIC (Application Specific Integrated Circuit, special IC) design field, particularly a kind of ATAPI (Intelligent Disk Equipment bus) equipment new type of control method based on TCP/IP (Transmission Control Protocol/Internet Protocol, TCP) protocol interface.
Background technology
The interface of ATAPI equipment (hard disk, CD-ROM drive, magnetic tape station etc.) generally all uses parallel IDE bus (the DE bus is the Intelligent Disk Equipment bus, is ata bus again).For the general user, the shortcoming of DE bus is mainly reflected in that the length of interface cable is too short, and equipment generally all must place in the computer cabinet, and does not possess hot swap characteristics, and installing/dismounting is inconvenience extremely.Serial ATA (AT Attachment) bus and widely used USB (the Universal Serial Bus that are rising at present, the USB (universal serial bus) of Intel Company's exploitation) the disk cartridge technology has solved above problem basically, but the place of blemish in an otherwise perfect thing has also been arranged.For the seagate of USB interface, remain in following problem:
(1) transmission speed of at present general USB1.1 agreement only is 12Mbps; The USB2.0 that speed is the highest is 480Mbps only;
(2) standard USB cable length can not be above 3 meters;
(3) many old-fashioned computing machines do not possess usb bus, make its use be subjected to certain limitation.
In the present computer network epoch, goed deep into huge numbers of families based on the computer network bus of ICP/IP protocol, ubiquitous.If ATAPI equipment (hard disk, CD-ROM drive, magnetic tape station etc.) can be articulated on the computer network bus, will bring infinite benefit for our life.
Summary of the invention
The object of the present invention is to provide a kind of ATAPI (ATAttachment Packet Interface) equipment new type of control method (based on the Intelligent Disk Equipment new type of control method of internet interface) based on the ICP/IP protocol interface.Its step comprises: step S1:TCP/IP bus interface, finish bus transceiver; Step S2: finish the ICP/IP protocol decipher, finish device status inquiries, order transmission and data double-way transmission according to ICP/IP protocol; Step S3: the hardware drive program initializes host side dma controller on the main frame makes bridge be operated in the TCP/IP bus master status; Step S4: host computer side dma controller and equipment side dma controller adopt dma mode to finish data transmission in the bridge, make the data buffer memory with asynchronous FIFO when data transmission; Step S5: the equipment side dma controller writes ATAPI equipment to the data among the FIFO according to the DMA of ATAPI equipment request, perhaps reads the data in the ATAPI equipment into and writes FIFO; Step S6: finish total line traffic control of IDE and interface.Use the ATAPI equipment (hard disk, CD-ROM drive, magnetic tape station etc.) of this technology have interface flexible, easy to carry, articulate advantages such as distance.
The invention technical scheme
A kind of ATAPI equipment bridge joint control method is based on the ICP/IP protocol interface.
The TCP/IP bus protocol is to the conversion of atapi bus agreement.
The ASIC of bus protocol conversion realizes.
The present invention has designed the bridging technology between the computer network bus of a kind of IDE bus and ICP/IP protocol, realized the seamless link between ATAPI equipment and the computer network, made ATAPI equipment (hard disk, CD-ROM drive, magnetic tape station etc.) can make things convenient for freely and be connected with computing machine.The major advantage of this technology has:
(1) versatility is good.Closely linked to each other as the computer network bus based on ICP/IP protocol such as Ethernet with our life, inseparable;
(2) speed is fast.General calculation machine network speed all is 100Mbps, at a high speed reach 1000Mbps;
(3) equipment is installed and is disposed easily, possesses hot swap characteristics;
(4) be easy to expansion.By using the Hub (hub), Switch equipment such as (interchangers) can multistage expansion and exchange;
(5) length of straight through cable can reach tens meters.
Description of drawings
Figure one is the bridge joint implementation method process flow diagram of IDE bus of the present invention and ICP/IP protocol bus.
Shown in the figure one is bridge joint implementation method between the computer network bus of IDE bus and ICP/IP protocol.This bridge can realize that wherein ICP/IP protocol decipher device is finished with the microprocessor core (MCU core) of an embedding with a special IC (ASIC).Implementation step is respectively described below: step S1:TCP/IP bus interface, promptly finish the bus transceiver function; Step S2: finish ICP/IP protocol decipher function, finish device status inquiries, order transmission and data double-way transmission according to ICP/IP protocol; Step S3: the hardware drive program initializes host side dma controller on the main frame, make bridge be operated in the TCP/IP bus master status, finish data transmission with dma mode; Step S4: because ATAPI equipment generally all is the Electric Machine Control formula, to the impossible summary responses of its read-write operation that carries out; The host computer side of bridge generally all is operated in different clock zones with equipment side simultaneously.Therefore when data transmission, must make the data buffer memory with asynchronous FIFO; Step S5: the equipment side dma controller writes ATAPI equipment to the data among the FIFO according to the DMA of ATAPI equipment request in the bridge, perhaps reads the data in the ATAPI equipment into and writes FIFO; Step S6: finish total line traffic control of DE and interface.
Embodiment
Based on the ATAPI device control technology of ICP/IP protocol interface, realize the bridge joint of DE bus and ICP/IP protocol bus exactly, its difficult point and core are exactly the decipher and the realization of ICP/IP protocol.ICP/IP protocol is the protocol suite of a more complicated, and we know that ICP/IP protocol adopts hierarchy, its hierarchical model and agreement such as following table:
| Application layer (Applicati on) | HTTP、Telnet、FTP、 SMTP、SNMP |
| Transport layer (Transport) | TCP、UDP |
| Inter-network layer (Internet) | IP【ARP、RARP、ICMP】 |
| Network interface layer (Network) | Ethernet、X.25、SLIP、 PPP |
ICP/IP protocol is at first wanted the interface problem of resolution protocol, i.e. the Physical layer of agreement.It is convenient that it has interface, drives simply, takies advantages such as resource is few.We can an integrated ready-made IPcore (Intelligent Property core, intellectual property core) realize the Physical layer of ICP/IP protocol.
In bridge, can realize the ICP/IP protocol decipher with 8051 microprocessor cores that are operated in more than the 40MHz.ICP/IP protocol adopts hierarchy, and therefore, we realize that the ICP/IP protocol decipher also adopts the method for layering.At first be the driving of Physical layer, solve the transmitting-receiving of data packet from Ethernet.This is substantially the most also to be most important, and the quality of its realization directly influences the performance of agreement.Because the transmitting-receiving of Ethernet data bag must rely on physical address, and IP (Internet Protocol, Internet protocol) adopts the IP address, this just is related to the problem that change mutually two kinds of addresses, promptly need us to realize ARP (Address Resolution Protocol), ARP realizes and is uncomplicated, as long as ask to LAN broadcast ARP, receive arp reply, and response ARP request gets final product.But the ARP deviser reduces the quantity of broadcast packet in the network for improving the efficient of ARP agreement, and agreement has been done a little optimizations.Require agreement to set up the ARP table dynamically updating of buffer memory and ARP table, i.e. address aging are carried out in the address.Realize IP communications protocol and general checking routine, just be not difficult to write ICMP (Internet Control Messages Protocol, Internet Control Message Protocol), UDP (User Datagram Protocol, User Datagram Protoco (UDP)) supervisor.The ICMP agreement has a variety of data packet formats, and we realize response request and response message that it is the most frequently used.Specifically be exactly to realize that ping orders the getatability of testing stay of two nights machine.Be the difficult point of ping the two-way time of test packet.We know that the ping message does not have the content of specified data, and the other side wants former state to return after receiving the ping message, and this just provides foundation to our test.Promptly in packet, add the current time, return the back and subtract each other with present time and promptly get message two-way time, provide the assessment of this machine and stay of two nights machine connection speed.UDP is a non-connection-oriented insecure Data Transport Protocol, compares its efficient height with TCP, and system overhead is little.UDP and TCP check are more special places, and it does not follow strict hierarchical model, add a pseudo-leader verification together of taking from the IP layer.After finishing udp protocol, just can do some based on the application layer protocol of udp protocol, such as plain text host-host protocol TFTP (Trivial File Transfer Protocol).Compare with file transfer protocol (FTP) FTP (File Transfer Protocol), TFTP is based on insecure Data Transport Protocol UDP, so agreement will lean on overtime re-transmission to guarantee the correct reception of data.Length of data package is restricted to 512 bytes, does not have the notion in path, only is used for simple files and transmits.The most complicated in the ICP/IP protocol, the most difficult realization has been exactly connection-oriented reliable data transmission agreement Transmission Control Protocol, and this is the difficult point that microprocessor 8051 is realized ICP/IP protocol.Because a lot of application layer protocols all adopt TCP as transport layer protocol, therefore, TCP is the soul of protocol stack, and its quality directly has influence on the success or failure of whole protocol stack.But in the such system of microprocessor 8051, resource is very limited, can not also there is no need to realize all the elements of agreement.Not only can the economize on hardware cost to the suitable simplification of agreement, and can improve data throughput.System program adopts serial EEPROM (Electrically Erasable Programmable Read Only Memory, EEPROM (Electrically Erasable Programmable Read Only Memo)) to deposit the program true form.
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| CNB2004100038880A CN1304974C (en) | 2004-02-10 | 2004-02-10 | Control method of intelligent disk equipment based on interconnected net interface |
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| CN1304974C true CN1304974C (en) | 2007-03-14 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5491812A (en) * | 1992-09-28 | 1996-02-13 | Conner Peripherals, Inc. | System and method for ethernet to SCSI conversion |
| US5996024A (en) * | 1998-01-14 | 1999-11-30 | Emc Corporation | Method and apparatus for a SCSI applications server which extracts SCSI commands and data from message and encapsulates SCSI responses to provide transparent operation |
| US6363428B1 (en) * | 1999-02-01 | 2002-03-26 | Sony Corporation | Apparatus for and method of separating header information from data in an IEEE 1394-1995 serial bus network |
| CN1348648A (en) * | 1999-12-20 | 2002-05-08 | 精工爱普生株式会社 | Data transfer controller, information storage medium, and electronic apparatus |
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2004
- 2004-02-10 CN CNB2004100038880A patent/CN1304974C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5491812A (en) * | 1992-09-28 | 1996-02-13 | Conner Peripherals, Inc. | System and method for ethernet to SCSI conversion |
| US5996024A (en) * | 1998-01-14 | 1999-11-30 | Emc Corporation | Method and apparatus for a SCSI applications server which extracts SCSI commands and data from message and encapsulates SCSI responses to provide transparent operation |
| US6363428B1 (en) * | 1999-02-01 | 2002-03-26 | Sony Corporation | Apparatus for and method of separating header information from data in an IEEE 1394-1995 serial bus network |
| CN1348648A (en) * | 1999-12-20 | 2002-05-08 | 精工爱普生株式会社 | Data transfer controller, information storage medium, and electronic apparatus |
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