CN1272762C - Liquid crystal display panel driving circuit and method, and liquid crystal display - Google Patents

Abstract

A liquid crystal display panel driving circuit is suitable for outputting corresponding video signals according to image control signals provided by a host to control a liquid crystal display panel. The grid driver is used for sending a scanning signal to the grid electrode; the data driver is used for outputting video signals to the data electrodes according to the image control signals. The video signals are corresponding to the image control signals of the first frame and the second frame and are respectively a first signal level and a second signal level, when the first signal level is lower than the second signal level, the video signals output by the data driver in the third frame are sequentially a first output signal higher than the second signal level and a second output signal with the second signal level, and the video signals output by the data driver in the fourth frame are sequentially a third output signal lower than the first signal level and a fourth output signal with the first signal level.

Description

Liquid crystal display panel driving circuit and method, and liquid crystal display

technical field

The present invention relates to a driving circuit and a driving method of a liquid crystal display panel, in particular to a driving circuit and a driving method of a liquid crystal display panel which adopts an over driving mode to switch the gray scale of a liquid crystal display (LCD).

Background technique

The currently known liquid crystal display includes a plurality of pixels arranged in an array. The liquid crystal in each pixel is controlled by the voltage applied to it, and the transmittance of the liquid crystal can be changed to show the required gray on the screen. Spend.

FIG. 1 shows a schematic diagram of an equivalent circuit of a known liquid crystal display panel (hereinafter referred to as LCD panel) and its peripheral driving circuit. As shown in the figure, the LCD panel 1 is composed of criss-cross data electrodes (indicated by D1, D2, D3, ... Dm) and gate electrodes (indicated by G1, G2, ... Gn), and each group The alternate data electrodes and gate electrodes can be used to control a display unit, for example, the data electrode D1 and the gate electrode G1 can be used to control the display unit 200 . As shown in the figure, the equivalent circuit of each display unit mainly includes thin film transistors (Q11~Q1m, Q21~Q2m, ..., Qn1~Qnm) for controlling data entry and storage capacitors (C11~C1m, C21~C2m,... , Cn1_Cnm). The gate and drain of the thin film transistor are respectively connected to the gate electrodes (G1-Gn) and the data electrodes (D1-Dm), and the same row can be turned on and off by scanning signals on the gate electrodes (G1-Gn). That is, all the thin film transistors on the same scan line) are used to control whether the video signal on the data electrodes (D1˜Dm) can be written into the corresponding display unit. It must be noted that each display unit corresponds to a single bright spot on the LCD panel. That is, for a monochrome LCD, each display unit corresponds to a single pixel; for a color LCD, each display unit corresponds to a single subpixel (subpixel), which can be red (indicated by R), Blue (indicated by B) or green (indicated by G), in other words, a group of RGB sub-pixels (three display units) can constitute a single pixel.

In addition to this, the drive circuit portion of the LCD panel 1 is also shown in FIG. 1 . A gate driver (gate driver) 10 sends out scanning signals to the respective gate electrodes G1, G2, . . . , Gn according to a predetermined scanning sequence. When a scan signal is applied to a certain gate electrode, it will make the thin film transistors in all display units on the same row or on the same scan line be in a conduction state. When a scanning line is selected, the data driver 20 sends corresponding video signals to the m display units in the row via the data electrodes D1, D2, . . . Dm according to the image data to be displayed. When the gate driver 10 completes a scanning operation on all n scanning lines, it means that the display operation of a single frame is completed. Therefore, the purpose of continuously displaying images can be achieved by repeatedly scanning each scanning line and sending out video signals. Wherein, the signal CPV represents the clock signal of the gate driver 10, the signal CTR represents the scanning control information received by the gate driver 10; the signal LD represents the data latch signal of the data driver 20, and the signal DATA represents the input image information .

Generally, the video signals transmitted on the data electrodes D1 , D2 , D3 , . The positive polarity video signal means that its potential is higher than the common electrode voltage VCOM, and according to the gray value it represents, the actual potential is between the voltage Vp1 and the voltage Vp2 (generally, the closer to the common electrode voltage VCOM corresponds to the lower gray value). In contrast, a negative polarity video signal means that its potential is lower than the common electrode voltage VCOM, and the actual potential is between the voltage Vn1 and the voltage Vn2 according to the gray value represented by it (similarly, the closer to the common electrode voltage VCOM). corresponding to lower grayscale values). When the same gray value is represented by a positive polarity video signal and a negative polarity video signal, the display effect is the same in principle, but there are still some differences in practice. In addition, in order to prevent the liquid crystal molecules from being continuously biased by a single-polarity electric field, resulting in a shortened lifetime of the liquid crystal molecules, a single display unit receives video signals of opposite polarities in odd and even frames.

Referring to FIG. 2A , FIG. 2A is a time sequence diagram showing liquid crystal voltage corresponding to each frame. FIG. 2A shows the timing sequence of the original video signal. Here, the frame rate (frame rate) is 60 Hz as an example, so the time of each frame is 16.6 ms. At this time, the voltage stored in the storage capacitor (liquid crystal) will gradually reach the applied voltage, as shown by the dotted line in the diagram.

Referring to FIG. 2B , FIG. 2B is a time sequence diagram showing liquid crystal voltage corresponding to each frame. Fig. 2B shows that the video signal shown in Fig. 2A above is processed in an accelerated driving manner by adjusting the video signal level output to the data electrode by referring to the video signal level of the original first frame and the second frame . Through the above accelerated driving technology, the speed of polarity switching of the liquid crystal molecules can be accelerated, so that the LCD can more truly display the proper gray scale.

However, the above-mentioned traditional acceleration driving method can accelerate the polarity switching speed of the liquid crystal molecules, which means to speed up the charging speed of the liquid crystal. However, under the trend of increasing frame rate of LCD, it is impossible to accurately control the voltage supplied to the liquid crystal under the state of high-frequency scanning signal. or discharge resulting in erroneous images. In order to accurately provide the correct voltage of the liquid crystal in the state of high-frequency scanning signal, additional hardware and more complex calculations and tests must be added.

Contents of the invention

In view of this, in order to solve the above-mentioned problems, the main purpose of the present invention is to provide a driving circuit and a driving method for a liquid crystal display panel, which accelerates the speed at which the liquid crystal molecules reach a predetermined gray value by accelerating the driving technology, and can accurately control the liquid crystal supplied to the liquid crystal. voltage accuracy.

In order to achieve the above-mentioned purpose, the present invention proposes a liquid crystal display panel drive circuit, which is suitable for outputting corresponding video signals to control a liquid crystal display panel according to an image control signal provided by a host computer. The liquid crystal display drive device includes a gate driver and data drive. The gate driver is used for sending scan signals to the gate electrodes. The data driver is used to output the video signal to the data electrode according to the image control signal, the video signal corresponding to the image control signal of the first frame and the second frame is respectively the first signal level and the second signal level, wherein, when the above video When the signal is driven in an accelerated manner, if the first signal level is lower than the second signal level, the video signal output by the data driver in the third frame is the first output signal higher than the second signal level in sequence And the second output signal with the second signal level, and the video signal output by the data driver in the fourth frame is the third output signal lower than the first signal level and the fourth output signal with the first signal level output signal.

In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and understandable, a preferred embodiment is specifically cited below, together with the accompanying drawings, and the detailed description is as follows:

Description of drawings

FIG. 1 shows a schematic diagram of an equivalent circuit of a known thin film transistor liquid crystal display panel and its peripheral driving circuit.

FIG. 2A is a graph showing the timing relationship of liquid crystal voltage corresponding to each frame.

FIG. 2B is a diagram showing the timing relationship of the liquid crystal voltage corresponding to each frame when the video signal shown in FIG. 2A is traditionally processed in an accelerated driving manner.

FIG. 3 is a schematic diagram showing an equivalent circuit of a liquid crystal display according to an embodiment of the present invention.

FIG. 4 is a timing diagram showing the liquid crystal voltage corresponding to each frame when the video signal shown in FIG. 2A is processed in the accelerated driving mode according to the embodiment of the present invention.

Symbol Description:

1, 3: LCD panel

10, 30: gate driver

20, 40: Data drive

200, 300: display unit

D1, D2, D3, ... Dm: data electrodes

G1, G2, ...Gn: Gate electrodes

Q11～Q1m, Q21～Q2m, ..., Qn1～Qnm: thin film transistors

C11～C1m, C21～C2m, ..., Cn1～Cnm: storage capacitor

Detailed ways

FIG. 3 is a schematic diagram showing an equivalent circuit of a liquid crystal display according to an embodiment of the present invention. As shown in the figure, the LCD panel 3 is formed by criss-cross data electrodes (indicated by D1, D2, D3, ... Dm) and gate electrodes (indicated by G1, G2, ... Gn), and each group The interlaced data electrodes and gate electrodes can be used to control a display unit, for example, the data electrode D1 and the gate electrode G1 can be used to control the display unit 300 . As shown in the figure, the equivalent circuit of each display unit mainly includes thin film transistors (Q11~Q1m, Q21~Q2m, ..., Qn1~Qnm) for controlling data entry and storage capacitors (C11~C1m, C21~C2m,... , Cn1 ~ Cnm). The gate and drain of the thin film transistor are connected to the gate electrodes (G1-Gn) and data electrodes (D1-Dm) respectively, and the same row can be turned on and off by scanning signals on the gate electrodes (G1-Gn) (also That is, all the thin film transistors on the same scan line) are used to control whether the video signal on the data electrodes (D1˜Dm) can be written into the corresponding display unit. It must be noted that each display unit corresponds to a single bright spot on the LCD panel. That is, for a monochrome LCD, each display unit corresponds to a single pixel; for a color LCD, each display unit corresponds to a single subpixel (subpixel), which can be red (indicated by R), respectively, Blue (indicated by B) or green (indicated by G), in other words, a group of RGB sub-pixels (three display units) can constitute a single pixel.

In addition, the driving circuit part is also shown in FIG. 3 . A gate driver (gated driver) 30 sends out scan signals (or scan pulses) on each gate electrode G1, G2, . . . , Gn according to a predetermined scan sequence. When a scanning signal is applied to a gate electrode, the thin film transistors in all display units on the same row or on the same scanning line will be turned on. When a scanning line is selected, the data driver 40 sends the corresponding video signal (gray value) to the m display units in the row via the data electrodes D1, D2, . . . Dm according to the image data to be displayed.

Referring to FIG. 2A , FIG. 2A shows a time sequence diagram of liquid crystal voltage corresponding to each frame. FIG. 2A shows the timing sequence of the original video signal. Here, the frame rate is 60 Hz as an example, so the time of each frame is 16.6 ms.

According to the embodiment of the present invention, according to the signal level of the above-mentioned original video signal in the first frame and the second frame, the signal level is converted in an accelerated driving mode, and provided in the period of the third frame. The waveform of the converted video signal is shown in FIG. 4 . FIG. 4 is a timing diagram showing liquid crystal voltages corresponding to each frame, which is to process the video signal shown in FIG. 2A in an accelerated driving manner according to an embodiment of the present invention. Referring to FIG. 2A, the image control signals corresponding to the first frame and the second frame of the video signal are respectively the first signal level and the second signal level. Taking the first signal level lower than the second signal level as an example, then In FIG. 4 , the video signal output by the data driver 40 in the third frame is sequentially a first output signal 40A higher than the second signal level and a second output signal 40B having the second signal level, and the data driver The video signals output in the fourth frame are the third output signal 40C lower than the first signal level and the fourth output signal 40D having the first signal level in sequence.

According to the waveform of the video signal above, if the original video signal needs to apply a voltage of 8V across the liquid crystal, it can be divided into two stages. First, in the first half of one frame time (take the third frame as an example), first provide a signal higher than 8V (the first output signal, such as 10V) to charge the liquid crystal in an accelerated driving mode, so that the charging of the liquid crystal can be accelerated Next, in the second half period of the third frame, charge the liquid crystal with the original preset 8V signal (the second output signal), which can avoid the problem of overcharging or make the liquid crystal that has not reached the target gray level Continue to charge or discharge. Similarly, when the polarity of the liquid crystal is reversed, take the original video signal to apply a voltage of 4V across the liquid crystal as an example, in the first half of the fourth frame, first provide a signal lower than 4V in an accelerated driving mode (the third output signal , such as 2V) to discharge the liquid crystal, so that the discharge speed of the liquid crystal can be accelerated; next, in the second half period of the fourth frame, the liquid crystal is discharged with the original preset 4V signal (the fourth output signal), that is It can avoid the problem of over-discharge or continue to charge or discharge the liquid crystal that has not reached the target gray level, and has the function of fine-tuning the video signal that was previously processed in the accelerated drive mode. As shown in FIG. 4 , the dotted line part represents the voltage change at both ends of the liquid crystal, which shows that the speed of change is faster than that of the traditional technology, and can ensure that the final gray scale is correct.

When the gate driver 30 completes a scanning operation on all n scanning lines, it means that the display operation of a single frame is completed. Therefore, the purpose of continuously displaying images can be achieved by repeatedly scanning each scanning line and sending out video signals. Wherein, the signal CPV represents the clock signal of the gate driver 30, the signal CTR represents the scanning control information received by the gate driver 30; the signal LD represents the data latch signal of the data driver 40, and the signal DATA represents the input image information .

According to the circuit structure described in the embodiment of the present invention, the corresponding image can be displayed according to the image control signal provided by the host. In this embodiment, the video signal provided to the data driver 40 can have the effect of speed-up driving, and can overcome the hidden danger of wrong images caused by overcharging or discharging of the liquid crystal due to the use of speed-up driving, thereby achieving the goal of the present invention Purpose. In addition, the driving method used in the embodiment of the present invention does not need to add too many components in implementation, which is very suitable for industrial application.

Although the present invention is disclosed above with preferred embodiments, it is not intended to limit the scope of the present invention. Any person skilled in the art can make changes and improvements without departing from the spirit and scope of the present invention. Therefore The scope of protection of the present invention shall prevail as defined by the scope of the appended patent application.

Claims (9)

1. liquid crystal display drive circuit, be applicable to that an image control signal that is provided according to a main frame exports a corresponding vision signal to control a LCD panel, above-mentioned LCD panel comprises multi-aspect unit, connect corresponding multidata electrode and multiple-grid utmost point electrode respectively, above-mentioned LCD driving mechanism comprises:

One gate drivers is in order to send sweep signal to above-mentioned gate electrode; And

One data driver, in order to export above-mentioned vision signal according to above-mentioned image control signal to above-mentioned data electrode, above-mentioned vision signal is respectively first signal level and secondary signal level corresponding to the above-mentioned image control signal of first frame and second frame,

Wherein, when above-mentioned vision signal is driven with accelerated mode, if above-mentioned first signal level is lower than the secondary signal level, the vision signal that then above-mentioned data driver is exported in the 3rd frame comprises first output signal that is higher than above-mentioned secondary signal level and second output signal with above-mentioned secondary signal level, and the vision signal that above-mentioned data driver is exported in the 4th frame comprises the 3rd output signal that is lower than above-mentioned first signal level and the 4th output signal with above-mentioned first signal level.

2. liquid crystal display drive circuit according to claim 1, wherein above-mentioned first output signal and the 3rd output signal level are decided according to the relation of above-mentioned first signal level and secondary signal level.

3. liquid crystal display drive circuit according to claim 2, the width of wherein above-mentioned first output signal, second output signal, the 3rd output signal and the 4th output signal is identical.

4. LCD is applicable to the image control signal that is provided according to a main frame and display image comprises:

One LCD panel comprises multi-aspect unit, connects corresponding multidata electrode and multiple-grid utmost point electrode respectively;

One gate drivers is in order to send sweep signal to above-mentioned gate electrode; And

One data driver, in order to export above-mentioned vision signal according to above-mentioned image control signal to above-mentioned data electrode, above-mentioned vision signal is respectively first signal level and secondary signal level corresponding to the above-mentioned image control signal of first frame and second frame,

Wherein, when above-mentioned vision signal is driven with accelerated mode, if above-mentioned first signal level is lower than the secondary signal level, the vision signal that then above-mentioned data driver is exported in the 3rd frame comprises first output signal that is higher than above-mentioned secondary signal level and second output signal with above-mentioned secondary signal level, and the vision signal that above-mentioned data driver is exported in the 4th frame comprises the 3rd output signal that is lower than above-mentioned first signal level and the 4th output signal with above-mentioned first signal level.

5. liquid crystal display drive circuit according to claim 4, wherein above-mentioned first output signal and the 3rd output signal level are decided according to the relation of above-mentioned first signal level and secondary signal level.

6. liquid crystal display drive circuit according to claim 5, the width of wherein above-mentioned first output signal, second output signal, the 3rd output signal and the 4th output signal is identical.

7. LCD panel driving method, be applicable to that an image control signal that is provided according to a main frame exports a corresponding vision signal to control a LCD panel, above-mentioned LCD panel comprises multi-aspect unit, connect corresponding multidata electrode and multiple-grid utmost point electrode respectively, above-mentioned LCD panel driving method comprises the following steps:

Send sweep signal to above-mentioned gate electrode; And

Export above-mentioned vision signal to above-mentioned data electrode according to above-mentioned image control signal, above-mentioned vision signal is respectively first signal level and secondary signal level corresponding to the above-mentioned image control signal of first frame and second frame,

Wherein, when above-mentioned vision signal is driven with accelerated mode, if above-mentioned first signal level is lower than the secondary signal level, then the vision signal in the 3rd frame comprises first output signal that is higher than above-mentioned secondary signal level and second output signal with above-mentioned secondary signal level, and comprises the 3rd output signal that is lower than above-mentioned first signal level and the 4th output signal with above-mentioned first signal level in the vision signal that the 4th frame is exported.

8. LCD panel driving method according to claim 7, wherein above-mentioned first output signal and the 3rd output signal level are decided according to the relation of above-mentioned first signal level and secondary signal level.

9. LCD panel driving method according to claim 8, the width of wherein above-mentioned first output signal, second output signal, the 3rd output signal and the 4th output signal is identical.

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