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CN1253722C - Ferroelectric thin film material dielectric performance multi-frequency automatic testing method and device - Google Patents

Ferroelectric thin film material dielectric performance multi-frequency automatic testing method and device Download PDF

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CN1253722C
CN1253722C CN 200310106478 CN200310106478A CN1253722C CN 1253722 C CN1253722 C CN 1253722C CN 200310106478 CN200310106478 CN 200310106478 CN 200310106478 A CN200310106478 A CN 200310106478A CN 1253722 C CN1253722 C CN 1253722C
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CN1547036A (en
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褚家如
李磊
鲁健
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University of Science and Technology of China USTC
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Abstract

The present invention relates to a ferroelectric thin film material dielectric performance multi-frequency automatic testing method and a device thereof, which is a testing method and a device of ferroelectric functional ceramic materials. The testing method is characterized in that any end of a ferroelectric thin film to be tested is connected with a negative electrode of an output end of a signal generator, an electrode on the other end of the ferroelectric thin film is in series connected with any end of a resistor, the resistance quantity of which is known, the other end of the resistor is connected with a positive electrode of the output end of the signal generator, wherein the negative electrode of the output end of the signal generator is used as a reference ground; sampled signals are calculated by a sensitive detection method of a digital phase to obtain amplitudes V0 and Vp of signals of both ends and phase difference theta between the signals of the both of the two ends, wherein the sensitive detection method of a digital phase is characterized in that after converted through analog/digital, a signal to be tested is digitally demodulated and calculated by a microprocessor. Thus, the equivalent capacitance quantity Cp and an equivalent resistance value Rp of the ferroelectric thin film to be tested are obtained, and a relative dielectric constant epsilon r and the dielectric loss tg delta of the ferroelectric thin film to be tested are also obtained.

Description

铁电薄膜材料介电性能多频率自动测试方法及装置Multi-frequency automatic test method and device for dielectric properties of ferroelectric thin film materials

                         技术领域Technical field

本发明是一种铁电功能陶瓷材料的测试方法及装置,尤其是锆钛酸铅(PZT)铁电薄膜材料的介电性能测试方法及装置。The invention relates to a method and device for testing ferroelectric functional ceramic materials, in particular to a method and device for testing the dielectric properties of lead zirconate titanate (PZT) ferroelectric film materials.

                         背景技术 Background technique

铁电材料是一种功能材料,其在电子工业部门、计算、激光、红外、微声、自控、计测和能源工程等领域中有广泛的用途。锆钛酸铅(分子式为Pb(Zr,Ti)O3,简称PZT)是一种性能优异的铁电材料,早已应用于非挥发性动态随机存储器的制作。近年来,随着微机电系统技术的迅速发展,PZT铁电薄膜因为具有高的压电常数和高的机电耦合系数等优点而受到了青睐,被认为是微机电系统中最有前途的传感和驱动材料之一,广泛应用于微机电系统中微马达、微镜以及微压电悬臂梁等的制作。目前,有多种技术用于微机电系统中PZT铁电薄膜的制备,如:溶胶-凝胶法、磁控溅射法、脉冲激光淀积法、水热法、以及喷射铸造法等,然而,不同方法制备得到的PZT铁电薄膜的性能差别很大,而同一种方法在不同工艺条件下制备得到的PZT铁电薄膜,其性能也有较大差别,因而对于PZT铁电薄膜介电性能的测试方法的适应性和测试方便性有很高要求。另外,对微器件加工工艺过程中微小PZT图形的性能测试,也对测试装置的灵敏度以及分辨率提出了更高的要求。因此,PZT铁电薄膜的性能测试技术研究已成为PZT铁电薄膜制备技术研究以及基于PZT铁电薄膜的微型传感器与微型驱动器设计中的关键问题之一。Ferroelectric material is a kind of functional material, which has a wide range of uses in the fields of electronics industry, computing, laser, infrared, micro-acoustic, automatic control, measurement and energy engineering. Lead zirconate titanate (molecular formula: Pb(Zr,Ti)O 3 , referred to as PZT) is a ferroelectric material with excellent performance, which has long been used in the manufacture of non-volatile dynamic random access memory. In recent years, with the rapid development of MEMS technology, PZT ferroelectric thin film has been favored because of its advantages of high piezoelectric constant and high electromechanical coupling coefficient, and is considered to be the most promising sensor in MEMS. It is widely used in the manufacture of micro-motors, micro-mirrors and micro-piezoelectric cantilever beams in micro-electromechanical systems. At present, there are a variety of techniques for the preparation of PZT ferroelectric thin films in MEMS, such as: sol-gel method, magnetron sputtering method, pulsed laser deposition method, hydrothermal method, and spray casting method, etc. However, , the properties of PZT ferroelectric films prepared by different methods are very different, and the properties of PZT ferroelectric films prepared by the same method under different process conditions are also quite different, so for the dielectric properties of PZT ferroelectric films There are high requirements for the adaptability and test convenience of the test method. In addition, the performance test of tiny PZT patterns in the process of micro-device processing also puts forward higher requirements for the sensitivity and resolution of the test device. Therefore, the research on the performance testing technology of PZT ferroelectric thin film has become one of the key issues in the research of PZT ferroelectric thin film preparation technology and the design of microsensors and microdrivers based on PZT ferroelectric thin film.

铁电材料的介电性能包括相对介电常数(εr)、介质损耗(tgδ)等参数。铁电材料的相对介电常数(εr)的测量是通过测量样品的电容量,经过计算求得的。其方法有多种,如谐振法、差拍法、比较法、替代法、分压法、Q表法和电桥法等等。铁电材料的介质损耗(tgδ)的测量方法有Q表法、阻抗电桥法、tgδ表直读法等。这些常用方法存在各种缺点,例如它们需要标准的可变电容器或高精度的频率计或高精度的专用电容测量仪;并且对于微系统中用到的铁电薄膜需要知道其在各个频率下的相对介电常数和介质损耗,而以上几种方法都是针对样品单一频率下的相对介电常数和介质损耗。The dielectric properties of ferroelectric materials include relative permittivity (ε r ), dielectric loss (tgδ) and other parameters. The measurement of the relative permittivity (ε r ) of the ferroelectric material is calculated by measuring the capacitance of the sample. There are many methods, such as resonance method, beat method, comparison method, substitution method, voltage division method, Q meter method and bridge method, etc. The dielectric loss (tgδ) measurement methods of ferroelectric materials include Q meter method, impedance bridge method, tgδ meter direct reading method, etc. These commonly used methods have various disadvantages, for example, they require standard variable capacitors or high-precision frequency meters or high-precision dedicated capacitance measuring instruments; The relative permittivity and dielectric loss, and the above methods are all aimed at the relative permittivity and dielectric loss of the sample at a single frequency.

                          发明内容Contents of Invention

技术问题:本发明的目的在于提供一种具有较高的精度,能准确、方便、快速的自动测量铁电薄膜材料在各频率下的介电性能的铁电薄膜材料介电性能多频率自动测试方法及装置。Technical problem: the object of the present invention is to provide a multi-frequency automatic test of the dielectric properties of ferroelectric thin film materials with high precision, which can accurately, conveniently and quickly automatically measure the dielectric properties of ferroelectric thin film materials at various frequencies Methods and devices.

技术方案:本发明的技术解决方案如下:Technical solution: the technical solution of the present invention is as follows:

测试方法(方案一)为:The test method (plan 1) is:

1).将待测铁电薄膜的任意一端与信号发生器的输出端的负电极相连,将该待测铁电薄膜的另一端的电极与一个已知阻值的电阻的任意一端串联,该电阻另一端与信号发生器输出端的正电极相连,以信号发生器输出端的负电极作为参考地:1). Connect any end of the ferroelectric film to be tested to the negative electrode of the output terminal of the signal generator, and connect the electrode at the other end of the ferroelectric film to be tested in series with any end of a resistor with a known resistance value. The other end is connected to the positive electrode of the output terminal of the signal generator, and the negative electrode of the output terminal of the signal generator is used as the reference ground:

2).设置信号发生器,使其输出待测频率点下的正弦波;对该已知电阻的两端的正弦电压信号进行同步采集,至少采集一个完整周期的信号,采样频率根据具体所采用的数字相敏检测算法的要求设定;对采样得到到的信号用数字相敏检测的方法进行计算,得出这两端信号的幅度V0和Vp以及这两端信号之间的相位差θ;2). Set the signal generator so that it outputs a sine wave at the frequency point to be tested; synchronously collect the sine voltage signal at both ends of the known resistance, at least one complete cycle of the signal is collected, and the sampling frequency depends on the specific used The requirements of the digital phase-sensitive detection algorithm are set; the sampled signal is calculated by the digital phase-sensitive detection method, and the amplitude V 0 and V p of the signals at both ends and the phase difference θ between the signals at the two ends are obtained ;

3).根据式 C P = | sin θ | * V 0 R * 2 * π * f * V P , R P = R | COSθ | * V 0 V P - 1 - - - ( 1 ) 3). According to formula C P = | sin θ | * V 0 R * 2 * π * f * V P , R P = R | COSθ | * V 0 V P - 1 - - - ( 1 )

得到待测铁电薄膜的等效电容量Cp和等效电阻值RpObtain the equivalent capacitance Cp and equivalent resistance value Rp of the ferroelectric thin film to be tested;

根据式 ϵ r = C p t ϵ 0 A , tgδ = 1 2 πf C p R p - - - ( 2 ) According to formula ϵ r = C p t ϵ 0 A , tgδ = 1 2 πf C p R p - - - ( 2 )

得到待测铁电薄膜的相对介电常数εr和介质损耗tgδ;Obtain the relative permittivity ε r and the dielectric loss tgδ of the ferroelectric thin film to be measured;

式中V0为测量辅助分压电阻与信号发生器输出端正电极相连端的正弦电压信号的幅值;Vp为测量辅助分压电阻与待测铁电薄膜连接端的正弦电压信号的幅值,θ为测量辅助分压电阻两端(即以上两路)的正弦电压信号之间的相位差,f为信号发生器产生的正弦波的频率,R为已知电阻的阻值;t为待测铁电薄膜的厚度,A为待测铁电薄膜的电极面积,ε0为真空介电常数。In the formula, V0 is the amplitude of the sinusoidal voltage signal at the end of the auxiliary voltage dividing resistor connected to the positive electrode of the signal generator output; Vp is the amplitude of the sinusoidal voltage signal at the connecting end of the auxiliary voltage dividing resistor and the ferroelectric film to be measured, θ In order to measure the phase difference between the sinusoidal voltage signals at both ends of the auxiliary voltage divider resistor (namely the above two circuits), f is the frequency of the sine wave generated by the signal generator, R is the resistance value of the known resistor; t is the iron to be tested The thickness of the electric film, A is the electrode area of the ferroelectric film to be tested, and ε0 is the vacuum permittivity.

测试方法(方案二)为:The test method (plan 2) is:

1).将待测铁电薄膜的任意一端电极与信号发生器输出端的负电极相连,将待测铁电薄膜的另一端电极与一个已知阻值的电阻的任意一端串联,该电阻另一端与信号发生器输出端的正电极相连,以信号发生器输出端的负电极作为参考地;1). Connect any terminal electrode of the ferroelectric film to be tested to the negative electrode of the output terminal of the signal generator, connect the other terminal electrode of the ferroelectric film to be tested in series with any terminal of a resistor with a known resistance value, and the other terminal of the resistor Connect to the positive electrode of the output terminal of the signal generator, and use the negative electrode of the output terminal of the signal generator as the reference ground;

2).设置信号发生器,使其输出待测频率点下的正弦波信号,用商用锁相放大器分别测出已知电阻的两端的正弦电压信号的幅值V0和Vp以及这两路信号相对于信号发生器输出的同步参考信号的相位差θ0、θp,由这两个相位差计算出这两路信号之间的相位差θ=θ0p2). Set the signal generator so that it outputs a sine wave signal at the frequency point to be measured, and use a commercial lock-in amplifier to measure the amplitudes V 0 and V p of the sinusoidal voltage signals at both ends of the known resistance and the two channels The phase difference θ 0 and θ p of the signal relative to the synchronous reference signal output by the signal generator, and the phase difference θ=θ 0p between the two signals is calculated from these two phase differences;

3)根据式 C P = | sin θ | * V 0 R * 2 * π * f * V P , R P = R | cos θ | * V 0 V P - 1 - - - ( 1 ) 3) According to the formula C P = | sin θ | * V 0 R * 2 * π * f * V P , R P = R | cos θ | * V 0 V P - 1 - - - ( 1 )

得到待测铁电薄膜的等效电容量Cp和等效电阻值RpObtain the equivalent capacitance Cp and equivalent resistance value Rp of the ferroelectric thin film to be tested;

根据式 ϵ r = C p t ϵ 0 A , tgδ = 1 2 πf C p R p - - - ( 2 ) According to formula ϵ r = C p t ϵ 0 A , tgδ = 1 2 πf C p R p - - - ( 2 )

得到待测铁电薄膜的相对介电常数εr和介质损耗tgδ。The relative permittivity ε r and dielectric loss tgδ of the ferroelectric thin film to be tested are obtained.

测量装置(方案一)包含的部分为:测试信号发生器、测量辅助分压电阻、A/D转换及接口控制单元、实现数字锁相计算以及采样控制的微处理器主控单元以及计算机。将待测铁电薄膜的任意一端电极与测试信号发生器的输出端的负电极相连,待测铁电薄膜的另一端与测量辅助分压电阻的任意一端串联,测量辅助分压电阻的另一端与测试信号发生器的输出端的正电极相连。这样待测铁电薄膜、测量辅助分压电阻和测试信号发生器串联成回路,该回路以测试信号发生器输出端的负电极作为参考地。A/D转换及接口控制单元的两个输入端分别与测量辅助分压电阻的两端相连。A/D转换及接口控制单元的数字信号输出以及控制信号与微处理器主控单元的数字及控制总线相连。微处理器主控单元与计算机通过打印机并行接口或者RS232串行接口或者USB接口或者PCI总线相连。The measuring device (Scheme 1) includes: a test signal generator, a measuring auxiliary voltage dividing resistor, an A/D conversion and interface control unit, a microprocessor main control unit and a computer for realizing digital phase-locking calculation and sampling control. Connect any end electrode of the ferroelectric film to be tested to the negative electrode of the output terminal of the test signal generator, connect the other end of the ferroelectric film to be tested with any end of the auxiliary voltage dividing resistor in series, and connect the other end of the measuring auxiliary voltage dividing resistor to The positive electrode of the output terminal of the test signal generator is connected. In this way, the ferroelectric thin film to be tested, the auxiliary voltage dividing resistor for measurement and the test signal generator are connected in series to form a loop, and the loop uses the negative electrode at the output end of the test signal generator as a reference ground. The two input ends of the A/D conversion and interface control unit are respectively connected with the two ends of the measuring auxiliary voltage dividing resistor. The digital signal output and control signal of the A/D conversion and interface control unit are connected with the digital and control bus of the microprocessor main control unit. The microprocessor main control unit is connected with the computer through a printer parallel interface or an RS232 serial interface or a USB interface or a PCI bus.

或者本发明的装置(方案二)包括:测试信号发生器、测量辅助分压电阻、商用锁相放大器单元以及计算机。待测铁电薄膜的任意一端与测试信号发生器的输出端的负电极相连,待测铁电薄膜的另一端电极与测量辅助分压电阻的任意一端串联,测量辅助分压电阻的另一端与测试信号发生器的输出端的正电极相连。这样待测铁电薄膜、测量辅助分压电阻和测试信号发生器串联成回路,该回路以测试信号发生器输出端的负电极作为参考地。测试信号发生器的同步输出端与商用锁相放大器单元的参考输入端相连。商用锁相放大器单元的输入端与测量辅助分压电阻两端相连。商用锁相放大器单元与计算机通过打印机并行口或者RS232串行接口或者USB接口或者PCI总线相连。Or the device (solution 2) of the present invention includes: a test signal generator, a measuring auxiliary voltage dividing resistor, a commercial lock-in amplifier unit and a computer. Any end of the ferroelectric film to be tested is connected to the negative electrode of the output terminal of the test signal generator, the other end electrode of the ferroelectric film to be tested is connected in series with any end of the measuring auxiliary voltage dividing resistor, and the other end of the measuring auxiliary voltage dividing resistor is connected to the test The positive electrode of the output terminal of the signal generator is connected. In this way, the ferroelectric thin film to be tested, the auxiliary voltage dividing resistor for measurement and the test signal generator are connected in series to form a loop, and the loop uses the negative electrode at the output end of the test signal generator as a reference ground. The sync output of the test signal generator is connected to the reference input of a commercial lock-in amplifier unit. The input terminal of the commercial lock-in amplifier unit is connected to both ends of the measuring auxiliary voltage dividing resistor. The commercial lock-in amplifier unit is connected with the computer through a printer parallel port or an RS232 serial port or a USB port or a PCI bus.

方案一及方案二中所述的测试信号发生器为通用的函数发生器,其用于产生各频率的标准正弦波。测试系统以该信号发生器所产生的正弦波信号作为测试的基准信号,也就是说测试系统测试待测铁电薄膜在该信号发生器所产生的正弦波的频率点下的相对介电常数和介质损耗。The test signal generators described in Scheme 1 and Scheme 2 are general-purpose function generators, which are used to generate standard sine waves of various frequencies. The test system uses the sine wave signal generated by the signal generator as the reference signal for the test, that is to say, the test system tests the relative permittivity and Dielectric loss.

方案一及方案二中所述测量辅助分压电阻为已知阻值的标准电阻,其取值与待测铁电薄膜在测量频率范围的中间频率处的等效电阻值为同一量级;测量辅助分压电阻与待测铁电薄膜串联连接,分压电阻和铁电薄膜的另一端分别与信号发生器输出端的正、负电极相联;该串联回路以信号发生器的负输出端作为参考地。The measurement auxiliary voltage dividing resistance described in scheme one and scheme two is the standard resistance of known resistance value, and its value is of the same order of magnitude as the equivalent resistance value of the ferroelectric film to be measured at the intermediate frequency of the measurement frequency range; The auxiliary voltage divider resistor is connected in series with the ferroelectric film to be tested, and the other ends of the voltage divider resistor and the ferroelectric film are respectively connected to the positive and negative electrodes of the output terminal of the signal generator; the series circuit takes the negative output terminal of the signal generator as a reference land.

方案一中所述的A/D转换和接口控制单元包括:模拟信号放大调整电路、A/D转换部分、接口控制部分和供电电源部分。The A/D conversion and interface control unit described in the first solution includes: an analog signal amplification and adjustment circuit, an A/D conversion part, an interface control part and a power supply part.

A/D转换部分包括完全相同的两路A/D转换通道,每一个通道包括A/D转换电路,以及与之相适应的模拟信号放大调整电路。A/D转换电路和模拟信号放大调整电路同样以前述的信号发生器的负输出端为参考地。两路A/D转换通道要能够完全同步的进行A/D转换,并且两路A/D转换通道能各自独立的输出数据有效通知信号。两路A/D转换通道的模拟信号放大调整电路的输入端分别与前述的已经与待测铁电薄膜和信号发生器串连成回路的测量辅助分压电阻的两端相连。两路模拟信号放大调整电路的输出分别与相应的A/D转换电路的输入相连。A/D转换部分的数据线和控制线与接口控制部分的数据线和控制线相连。接口控制部分具有接口控制和数据缓冲功能,接口控制部分能够对两路A/D转换通道的数据、控制和状态存储器进行访问,并且能够选择对任何一路A/D转换通道进行读写和控制。供电电源部分的输出与模拟信号放大调整电路,A/D转换电路和接口控制部分的相应的电源输入相连,为这三个部分提供电源。The A/D conversion part includes exactly the same two A/D conversion channels, each channel includes an A/D conversion circuit, and an analog signal amplification and adjustment circuit corresponding to it. The A/D conversion circuit and the analog signal amplification and adjustment circuit also use the negative output terminal of the aforementioned signal generator as a reference ground. The two A/D conversion channels must be able to perform A/D conversion completely synchronously, and the two A/D conversion channels can output valid data notification signals independently. The input terminals of the analog signal amplification and adjustment circuits of the two A/D conversion channels are respectively connected to the two ends of the aforementioned measurement auxiliary voltage dividing resistors which have been connected in series with the ferroelectric film to be tested and the signal generator to form a loop. The outputs of the two analog signal amplification and adjustment circuits are respectively connected to the inputs of the corresponding A/D conversion circuits. The data line and control line of the A/D conversion part are connected with the data line and control line of the interface control part. The interface control part has interface control and data buffering functions. The interface control part can access the data, control and state memory of two A/D conversion channels, and can choose to read, write and control any A/D conversion channel. The output of the power supply part is connected with the analog signal amplification and adjustment circuit, the A/D conversion circuit and the corresponding power input of the interface control part to provide power for these three parts.

方案一中所述的实现数字锁相计算以及采样控制的微处理器主控单元在硬件上可以由基于数字信号处理器(DSP)的系统、基于单片机的系统或者基于嵌入式微处理器的系统构成,在功能上该单元实现数字锁相放大计算以及采样控制、端口控制和通信控制等。对于内置有A/D转换和接口控制单元的微处理器系统,如果内置的A/D转换和接口控制单元的性能满足本系统的要求,则可以省略前述的A/D转换和接口控制单元。微处理器主控单元至少应包括微处理器,主机接口控制单元,程序及数据存储器,扩充外设总线控制单元,电源和其他外设。微处理器主控单元的扩充外设总线与前述的A/D转换和接口控制单元的接口控制部分的输出总线相连接。微处理器主控单元能够输出频率连续可调的并且作为前述两路A/D转换的采样时钟信号;前述两路A/D转换的数据有效通知信号与微处理器单元的两个外部中断输入端相联作为相应的中断触发信号。微处理器主控单元通过前述的A/D转换和接口控制单元中的接口控制部分来对任意一路A/D转换通道的数据进行读取并对其进行控制。微处理器单元通过主机接口控制单元经并行总线或串行总线或USB口或PCI总线与主机进行通信。The microprocessor main control unit for implementing digital phase-locking calculation and sampling control described in Scheme 1 can be composed of a system based on a digital signal processor (DSP), a system based on a single-chip microcomputer or a system based on an embedded microprocessor. , Functionally, the unit realizes digital lock-in amplification calculation, sampling control, port control and communication control, etc. For a microprocessor system with a built-in A/D conversion and interface control unit, if the performance of the built-in A/D conversion and interface control unit meets the requirements of the system, the aforementioned A/D conversion and interface control unit can be omitted. The microprocessor main control unit shall at least include a microprocessor, a host interface control unit, a program and data memory, an expansion peripheral bus control unit, a power supply and other peripherals. The expansion peripheral bus of the microprocessor main control unit is connected with the output bus of the interface control part of the aforementioned A/D conversion and interface control unit. The microprocessor main control unit can output a sampling clock signal whose frequency is continuously adjustable and used as the aforementioned two-way A/D conversion; the aforementioned two-way A/D conversion data valid notification signal and the two external interrupt inputs of the microprocessor unit The terminal is connected as the corresponding interrupt trigger signal. The microprocessor main control unit reads and controls the data of any A/D conversion channel through the interface control part in the aforementioned A/D conversion and interface control unit. The microprocessor unit communicates with the host through a host interface control unit via a parallel bus or a serial bus or a USB port or a PCI bus.

方案二中所述的商用锁相放大器单元,其作用相当于方案一中的A/D转换和接口控制单元以及微处理器主控单元的集合。商用锁相放大器的输入端与前述的已经与待测铁电薄膜以及与信号发生器串联成回路的测量辅助分压电阻的两端相连,另外商用锁相放大器单元的参考输入端与测试信号发生器的同步输出端相连。商用锁相放大器单元通过外部打印机并行接口或RS232串行接口或USB接口或PCI总线与计算机相连。The commercial lock-in amplifier unit described in the second scheme is equivalent to the collection of the A/D conversion and interface control unit and the microprocessor main control unit in the first scheme. The input terminal of the commercial lock-in amplifier is connected to the two ends of the measurement auxiliary voltage dividing resistor which has been connected in series with the ferroelectric film to be tested and the signal generator in series. In addition, the reference input terminal of the commercial lock-in amplifier unit is connected to the test signal generator. connected to the synchronous output of the device. The commercial lock-in amplifier unit is connected to the computer through an external printer parallel interface or RS232 serial interface or USB interface or PCI bus.

方案一和方案二中所述的计算机与微处理器主控单元或商用锁相放大器单元之间通过并行口或串行口或USB口或者PCI总线相连接,用于参数输入、测量状态监控和结果显示。The computer described in scheme one and scheme two is connected with the microprocessor main control unit or the commercial lock-in amplifier unit through a parallel port or a serial port or a USB port or a PCI bus for parameter input, measurement status monitoring and The results show that.

综上本发明是将测试信号发生器,测量辅助分压电阻,A/D转换及接口控制单元,实现数字锁相计算以及采样控制部分的微处理器主控单元以及计算机组成有机的整体,或者将测试信号发生器,测量辅助分压电阻,商用锁相放大器单元,计算机组成有机的整体,各部分之间的连接线应尽量短以减小线间寄生电容和外界干扰。In summary, the present invention is to form an organic whole with the test signal generator, the auxiliary voltage dividing resistor for measurement, the A/D conversion and interface control unit, the microprocessor main control unit and the computer that realize the digital phase-locking calculation and sampling control part, or The test signal generator, measurement auxiliary voltage divider resistor, commercial lock-in amplifier unit, and computer form an organic whole, and the connection lines between each part should be as short as possible to reduce the parasitic capacitance between lines and external interference.

本发明的测试方法是通过测量在各个频率下的待测铁电薄膜的等效电容量和等效电阻值进而计算出待测铁电薄膜的相对介电常数和介质损耗。The testing method of the invention calculates the relative permittivity and dielectric loss of the ferroelectric film to be tested by measuring the equivalent capacitance and equivalent resistance of the ferroelectric film to be tested at various frequencies.

对于方案一,测量的具体工作过程为:计算机根据用户设定的参数即待测的频率值和已知的辅助分压电阻的阻值向微处理器主控单元发出指令;微处理器主控单元首先初始化各部分和各端口包括信号发生器,A/D转换和接口控制单元;然后微处理主控单元进入数据采集程序,数据采集程序启动定时器发出采样信号,采样信号的频率与待测的频率点值和所采用的数字锁相算法有关,A/D转换及接口控制单元中的两路A/D转换电路在采样信号的控制下同时对取自测量辅助分压电阻两端并且经过模拟信号调整放大电路(7)处理过的正弦电压信号进行采样,之后微处理器主控单元的数据采集程序进入等待状态;两路A/D转换通道采样完数据并且转换结束后,各自发出数据有效信号;这两路信号分别触发微处理器主控单元的两个外部中断,这时微处理器主控单元的数据采集程序进入中断例程,分别读取两路A/D转换通道所采集得到的数据;待本频率下的全部数据点采集完毕之后微处理器主控单元进入数据处理程序,该程序对所采集到的数据进行数字锁相计算,计算得到两路信号的幅值和相位差,进而由式(1)得到待测压电薄膜的等效电容量和等效电阻值。所采用的数字锁相计算的算法可以有多种,其目的都是计算获得两待测正弦信号的幅度和相位。For scheme 1, the specific working process of the measurement is: the computer sends instructions to the microprocessor main control unit according to the parameters set by the user, that is, the frequency value to be measured and the known resistance value of the auxiliary voltage dividing resistor; The unit first initializes each part and each port including the signal generator, A/D conversion and interface control unit; then the micro-processing main control unit enters the data acquisition program, and the data acquisition program starts the timer to send out the sampling signal, and the frequency of the sampling signal is the same as that to be tested The frequency point value is related to the digital phase-locking algorithm adopted. The two-way A/D conversion circuit in the A/D conversion and interface control unit is under the control of the sampling signal and is taken from both ends of the measurement auxiliary voltage divider resistor and passed through The sinusoidal voltage signal processed by the analog signal adjustment amplifier circuit (7) is sampled, and then the data acquisition program of the microprocessor main control unit enters a waiting state; after the two A/D conversion channels have sampled the data and the conversion is completed, each sends out the data Effective signal; these two signals respectively trigger two external interrupts of the microprocessor main control unit, at this time, the data acquisition program of the microprocessor main control unit enters the interrupt routine, and reads the data collected by the two A/D conversion channels respectively. The obtained data; after all the data points at this frequency are collected, the microprocessor main control unit enters the data processing program, which performs digital phase-locking calculation on the collected data, and calculates the amplitude and phase of the two signals Then, the equivalent capacitance and equivalent resistance of the piezoelectric film to be tested can be obtained from formula (1). There are various algorithms for digital phase-locking calculation, and the purpose is to calculate and obtain the amplitude and phase of the two sinusoidal signals to be measured.

在得到待测铁电薄膜的等效电容量和等效电阻值后由式(2)则可以得到待测铁电薄膜在频率f下的相对介电常数和介质损耗。改变信号频率f,再重复以上步骤,就能得到待测铁电薄膜在各个频率值下的相对介电常数和介质损耗,即可完成整个测试过程。After obtaining the equivalent capacitance and equivalent resistance of the ferroelectric film to be tested, the relative permittivity and dielectric loss of the ferroelectric film to be tested at frequency f can be obtained from formula (2). By changing the signal frequency f and repeating the above steps, the relative permittivity and dielectric loss of the ferroelectric film to be tested at various frequency values can be obtained, and the entire testing process can be completed.

对于方案二,测量的具体工作过程为:用户对信号发生器设定参数即所需要的频率值f;计算机通过接口对商用锁相放大器单元发出指令,使其分两次分别测出前述测量辅助分压电阻两端的正弦电压信号的幅值V0,Vp和它们各自相对于信号发生器同步输出信号的相位差θ0,θp。由θ0,θp可以计算出测量辅助分压电阻两端信号的相位差θ(θ=θ0p)。之后由式(1),(2)则可以得到待测压电薄膜在频率f下的相对介电常数和介质损耗。改变信号频率f,再重复以上步骤,就能得到待测铁电薄膜在各个频率值下的相对介电常数和介质损耗,即可完成整个测试过程。For the second scheme, the specific working process of the measurement is: the user sets the parameters for the signal generator, that is, the required frequency value f; the computer sends instructions to the commercial lock-in amplifier unit through the interface, so that it can measure the aforementioned measurement aids twice. The amplitudes V 0 , V p of the sinusoidal voltage signals at both ends of the voltage dividing resistor and their respective phase differences θ 0 , θ p relative to the synchronous output signal of the signal generator. From θ 0 and θ p , the phase difference θ (θ=θ 0p ) of the signals at both ends of the auxiliary voltage dividing resistor can be calculated. Then, according to formulas (1) and (2), the relative permittivity and dielectric loss of the piezoelectric film to be tested at frequency f can be obtained. By changing the signal frequency f and repeating the above steps, the relative permittivity and dielectric loss of the ferroelectric film to be tested at various frequency values can be obtained, and the entire testing process can be completed.

有益效果:综上所述,本发明将信号发生器、辅助分压电阻、A/D转换及接口控制单元、微处理器主控单元、计算机各部分有机地结合为一体,组成铁电薄膜介电性能的多频率自动测试系统,该系统能实现在各频率下的铁电薄膜相对介电常数和介质损耗的测量。其具有测试过程简单,用户调整性好,测量精度高,并且能连续测量各频率点的介点常数和介质损耗等特点,具有很好的应用前景。Beneficial effects: In summary, the present invention organically combines the signal generator, auxiliary voltage dividing resistor, A/D conversion and interface control unit, microprocessor main control unit, and various parts of the computer to form a ferroelectric thin film medium A multi-frequency automatic test system for electrical properties, which can measure the relative permittivity and dielectric loss of ferroelectric thin films at various frequencies. It has the characteristics of simple test process, good user adjustment, high measurement accuracy, and can continuously measure the dielectric constant and dielectric loss of each frequency point, etc., and has a good application prospect.

                         附图说明Description of drawings

图1为本装置整体连接框图。其中有信号发生器1、辅助分压电阻2、待测铁电薄膜21、A/D转换及接口控制单元3、微处理器主控单元4、计算机5。Figure 1 is the overall connection block diagram of the device. There are signal generator 1, auxiliary voltage dividing resistor 2, ferroelectric thin film 21 to be tested, A/D conversion and interface control unit 3, microprocessor main control unit 4, and computer 5.

图2为本装置方案二的整体连接框图。其中有商用锁相放大器单元6。Fig. 2 is the overall connection block diagram of the second scheme of the device. Among them is a commercial lock-in amplifier unit 6 .

图3为A/D转换及接口控制单元3的电原理框图。其中有模拟信号调整放大电路7、A/D转换电路(8)、接口控制部分9、供电电源部分10。FIG. 3 is an electrical functional block diagram of the A/D conversion and interface control unit 3 . There are an analog signal adjustment amplifier circuit 7 , an A/D conversion circuit ( 8 ), an interface control part 9 and a power supply part 10 .

图4为微处理器主控单元4的电原理框图。其中有扩充外设总线控制单元11、微处理器12、主机接口控制单元13、程序及数据存储器14、外设15、电源16。FIG. 4 is an electrical functional block diagram of the microprocessor main control unit 4 . There are expansion peripheral bus control unit 11 , microprocessor 12 , host interface control unit 13 , program and data memory 14 , peripherals 15 and power supply 16 .

图5为A/D转换电路8和接口控制部分9的电路原理图。FIG. 5 is a schematic circuit diagram of the A/D conversion circuit 8 and the interface control section 9 .

图6为模拟信号放大调整电路7具体连接图,其中只包括一路,另一路相同。FIG. 6 is a specific connection diagram of the analog signal amplification and adjustment circuit 7, which only includes one path, and the other path is the same.

图7为电源部分10的电路原理图。FIG. 7 is a schematic circuit diagram of the power supply section 10 .

图8为计算机5以及DSP主控单元程序流程图。Fig. 8 is a program flowchart of the computer 5 and the DSP main control unit.

图9为锁相放大算法框图。Figure 9 is a block diagram of the lock-in amplification algorithm.

图10为实施例一所测量得到的PZT薄膜样品的相对介电常数与频率关系图。FIG. 10 is a graph showing the relationship between relative permittivity and frequency of the PZT thin film sample measured in Example 1. FIG.

图11为实施例一所测量得到的PZT薄膜样品的介质损耗与频率关系图。FIG. 11 is a graph showing the relationship between dielectric loss and frequency of the PZT thin film sample measured in Example 1. FIG.

图12为实施例二的计算机程序流程图。Fig. 12 is a computer program flow chart of the second embodiment.

图13为实施例二所测量得到的PZT薄膜样品的相对介电常数与频率关系图。FIG. 13 is a graph showing the relationship between relative permittivity and frequency of the PZT thin film sample measured in Example 2. FIG.

图14为实施例二所测量得到的PZT薄膜样品的介质损耗与频率关系图。FIG. 14 is a graph showing the relationship between the dielectric loss and the frequency of the PZT thin film sample measured in the second embodiment.

                        具体实施方式 Detailed ways

以下结合实施例对本发明再作进一步描述。The present invention will be further described below in conjunction with embodiment.

实施例一,本实施例采用方案一,即由测试信号发生器(1)、测量辅助分压电阻(2)、A/D转换及接口控制单元(3)、实现数字锁相计算以及采样控制的微处理主控单元(4)以及计算机(5)组成测试装置。Embodiment one, the present embodiment adopts scheme one, promptly by test signal generator (1), measuring auxiliary voltage divider resistance (2), A/D conversion and interface control unit (3), realize digital phase lock calculation and sampling control A micro-processing main control unit (4) and a computer (5) form a test device.

其中信号发生器(1)、辅助分压电阻(2)、待测铁电薄膜(21)串联成一个电回路,在辅助分压电阻(2)的两端分别接A/D转换及接口控制单元(3)。其中测试信号发生器(1)采用MOTECH FG503型DDS函数发生器,其能产生从1Hz到3MHz的正弦波信号以及与之同步的方波信号。辅助分压电阻(2)为碳膜电阻,其阻值与待测铁电薄膜在测量频率范围的中段频率(1KHz)的等效电阻值为同一量级。Among them, the signal generator (1), the auxiliary voltage dividing resistor (2), and the ferroelectric film to be tested (21) are connected in series to form an electric circuit, and the two ends of the auxiliary voltage dividing resistor (2) are respectively connected to A/D conversion and interface control. Unit (3). Among them, the test signal generator (1) adopts MOTECH FG503 DDS function generator, which can generate sine wave signals from 1Hz to 3MHz and square wave signals synchronized with it. The auxiliary voltage dividing resistor (2) is a carbon film resistor, and its resistance value is in the same order as the equivalent resistance value of the ferroelectric film to be measured at the middle frequency (1KHz) of the measurement frequency range.

其中A/D转换及接口控制单元(3)采用自制的系统,由模拟信号调整放大电路(7)、A/D转换电路(8)、接口控制部分(9)、供电电源部分(10)组成。模拟信号调整放大电路(7)主要由运算放大器max410和max4108、电压参考芯片max6341组成。A/D转换电路(8)主要由A/D转换芯片max1201构成。接口控制部分(9)主要由数据缓冲芯片74LVTH162245、地址译码芯片74HC138、信号缓冲芯片74HCT541组成。供电电源部分(10)主要由芯片LM7815、LM7915、LM7805、LM7905、TL783、LM337等构成。两路模拟信号放大调整电路(7)的输入端与待测铁电薄膜(21)的两端相联。两路模拟信号放大调整电路(7)的输出分别与相应的A/D转换电路(8)的输入相连;A/D转换电路(8)的数据线和控制线与接口控制部分(9)的数据线和控制线相连;供电电源部分(10)的输出与模拟信号放大调整电路(7),A/D转换电路(8)和接口控制部分(9)的相应的电源输入相连,为这三个部分提供电源。A/D转换及接口控制单元的输出信号包括16位数据线、3位地址线、两个读写控制线、一路时钟信号线、和两路中断控制线,这些信号线与微处理单元(4)相联。Among them, the A/D conversion and interface control unit (3) adopts a self-made system, which is composed of an analog signal adjustment amplifier circuit (7), an A/D conversion circuit (8), an interface control part (9), and a power supply part (10) . The analog signal adjustment amplifier circuit (7) is mainly composed of operational amplifiers max410 and max4108, and a voltage reference chip max6341. The A/D conversion circuit (8) is mainly composed of an A/D conversion chip max1201. The interface control part (9) is mainly composed of a data buffer chip 74LVTH162245, an address decoding chip 74HC138, and a signal buffer chip 74HCT541. The power supply part (10) is mainly composed of chips LM7815, LM7915, LM7805, LM7905, TL783, LM337 and the like. The input terminals of the two analog signal amplification and adjustment circuits (7) are connected to the two ends of the ferroelectric film (21) to be tested. The outputs of the two analog signal amplification and adjustment circuits (7) are respectively connected to the inputs of the corresponding A/D conversion circuit (8); the data line and the control line of the A/D conversion circuit (8) are connected with the interface control part (9) The data line is connected with the control line; the output of the power supply part (10) is connected with the analog signal amplification and adjustment circuit (7), the A/D conversion circuit (8) is connected with the corresponding power input of the interface control part (9), for these three part to provide power. The output signals of the A/D conversion and interface control unit include 16-bit data lines, 3-bit address lines, two read-write control lines, one clock signal line, and two interrupt control lines. These signal lines are connected with the micro-processing unit (4 ) associated.

微处理器主控单元(4)采用TI公司的TMS320C6711 DSP STARTER KIT。该DSP STARTER KIT板以TMS320C6711数字信号微处理器(12)为核心,并包括主机接口控制单元(13),扩充外设总线控制单元(11),程序及数据存储器(14),电源(16)以及其他外设(15)。微处理器(12)的数据及控制总线与程序及数据存储器(14)、扩充外设总线控制单元(11)、主机接口控制单元(13)以及外设(15)的相应数据和控制接口相连。电源(16)的输出与微处理器(12)、程序及数据存储器(14)、扩充外设总线控制单元(11)、主机接口控制单元(13)以及外设(15)的相应电源输入相连。扩充外设总线控制单元(11)的外设总线与前述的A/D转换和接口控制单元(3)的接口控制部分(9)的输出总线相连接。主机接口控制单元(13)的输出数据及控制总线与计算机(5)通过外部打印机并行相连。The microprocessor main control unit (4) adopts TMS320C6711 DSP STARTER KIT of TI Company. The DSP STARTER KIT board takes TMS320C6711 digital signal microprocessor (12) as the core, and includes host interface control unit (13), expansion peripheral bus control unit (11), program and data memory (14), power supply (16) and other peripherals (15). The data and control bus of the microprocessor (12) is connected with the corresponding data and control interface of the program and data memory (14), the expansion peripheral bus control unit (11), the host interface control unit (13) and the peripheral hardware (15) . The output of the power supply (16) is connected with the corresponding power input of the microprocessor (12), program and data memory (14), expansion peripheral bus control unit (11), host interface control unit (13) and peripheral equipment (15) . The peripheral bus of the expansion peripheral bus control unit (11) is connected with the output bus of the interface control part (9) of the aforementioned A/D conversion and interface control unit (3). The output data and control bus of the host interface control unit (13) are connected in parallel with the computer (5) through an external printer.

测试时计算机将参数以及运行程序下载到DSP中,并将控制权交给DSP,待DSP采集完数据并计算出结果后将结果传递给计算机显示结果。所采用的锁相放大算法如附图9所示,图中S(t)为待测信号,频率为ω1,采样后成为数字信号S(n)。R1(n)、R2(n)为参考序列,为计算机产生的标准正弦序列,振幅为1,二者频率相同皆为ω2、相位相差90度。参考序列的频率ω2与A/D转换的采样频率相同,并且满足ω2=Kω1,K为4的倍数且最小为8,采样的总点数为N。最后可以得到待测信号的幅度Ur为:Ur=2UO。待测信号相对参考信号的初相位φ为: cos φ = 2 Y 1 U r , sin φ = 2 Y 2 U r . 本装置测试了采用溶胶-凝胶技术在Pt/Ti/SiO2/Si衬底上制备的铁电薄膜,该铁电薄膜用溅射法在薄膜表面镀上150nm厚的Au膜作为薄膜的上电极,50nm的Cr薄膜被用来增强PZT与Au之间的粘着力。实验测试了样品(t=1μm,A=6.1mm2)从100Hz到10KHz的相对介电常数和介质损耗,结果如图10,11。During the test, the computer downloads the parameters and running programs to the DSP, and gives the control right to the DSP. After the DSP collects the data and calculates the results, the results are passed to the computer to display the results. The lock-in amplification algorithm adopted is shown in Fig. 9, in which S(t) is the signal to be tested, the frequency is ω 1 , and becomes a digital signal S(n) after sampling. R 1 (n) and R 2 (n) are reference sequences, which are standard sinusoidal sequences generated by a computer, with an amplitude of 1, the same frequency as ω 2 , and a phase difference of 90 degrees. The frequency ω 2 of the reference sequence is the same as the sampling frequency of the A/D conversion, and satisfies ω 2 =Kω 1 , K is a multiple of 4 and the minimum is 8, and the total number of sampling points is N. Finally, the amplitude U r of the signal to be measured can be obtained as: U r =2U O . The initial phase φ of the signal to be measured relative to the reference signal is: cos φ = 2 Y 1 u r , sin φ = 2 Y 2 u r . This device tested the ferroelectric thin film prepared on the Pt/Ti/SiO 2 /Si substrate by sol-gel technology. The ferroelectric thin film was coated with 150nm thick Au film on the surface of the thin film by sputtering method as the upper surface of the thin film. For electrodes, a 50nm Cr film was used to enhance the adhesion between PZT and Au. The relative permittivity and dielectric loss of the sample (t=1μm, A=6.1mm 2 ) were tested from 100Hz to 10KHz, and the results are shown in Figures 10 and 11.

实施例二,本实施例采用方案二即包括测试信号发生器(1)、测量辅助分压电阻(2)、商用锁相放大器(6)以及计算机(5)。Embodiment 2. This embodiment adopts the scheme 2, which includes a test signal generator (1), a measurement auxiliary voltage dividing resistor (2), a commercial lock-in amplifier (6) and a computer (5).

其中所用的测试信号发生器(1)以及测量辅助分压电阻(2)与实施例一中所用相同。待测铁电薄膜(21)、测量辅助分压电阻(2)和测试信号发生器(1)的连接与实施例一相同。The test signal generator (1) and measurement auxiliary voltage dividing resistor (2) used therein are the same as those used in the first embodiment. The connections of the ferroelectric thin film to be tested (21), the auxiliary measuring voltage divider resistor (2) and the test signal generator (1) are the same as those in the first embodiment.

本实施例采用商用锁相放大器(6)型号为NF LI5630。锁相放大器(6)的输入端与待测铁电薄膜(21)的两端相联,锁相放大器的参考输入端与信号发生器同步信号输出端相联,锁相放大器与计算机通过RS232口连接。测试时锁相放大器先后测试待测铁电膜薄两端的信号幅度和这两端信号相对于测试信号发生器的同步信号的相位。计算机通过RS232口从锁相放大器中读取其测试的结果并计算出待测铁电薄膜的相对介电常数和介质损耗。本装置测试了采用溶胶-凝胶技术在Pt/Ti/SiO2/Si衬底上制备的铁电薄膜,该铁电薄膜用溅射法在薄膜表面镀上150nm厚的Au膜作为薄膜的上电极,50nm的Cr薄膜被用来增强PZT与Au之间的粘着力。实验测试了样品(t=1μm,A=6.1mm2)从100Hz到10KHz的相对介电常数和介质损耗,结果如图13,14。In this embodiment, the commercial lock-in amplifier (6) model is NF LI5630. The input end of the lock-in amplifier (6) is connected with the two ends of the ferroelectric film (21) to be tested, the reference input end of the lock-in amplifier is connected with the synchronous signal output end of the signal generator, and the lock-in amplifier and the computer are connected through the RS232 port. connect. During the test, the lock-in amplifier successively tests the signal amplitude at both ends of the ferroelectric film to be tested and the phase of the signals at both ends relative to the synchronous signal of the test signal generator. The computer reads the test results from the lock-in amplifier through the RS232 port and calculates the relative permittivity and dielectric loss of the ferroelectric film to be tested. This device tested the ferroelectric thin film prepared on the Pt/Ti/SiO 2 /Si substrate by sol-gel technology. The ferroelectric thin film was coated with 150nm thick Au film on the surface of the thin film by sputtering method as the upper surface of the thin film. For electrodes, a 50nm Cr film was used to enhance the adhesion between PZT and Au. The relative permittivity and dielectric loss of the sample (t=1μm, A=6.1mm 2 ) were tested from 100Hz to 10KHz, and the results are shown in Figures 13 and 14.

Claims (6)

1, a kind of ferroelectric thin-flim materials dielectric properties multi-frequency automatic test approach is characterized in that method of testing is:
1), any end with ferroelectric thin film to be measured links to each other with the negative electrode of the output terminal of signal generator, the electrode of the other end of this ferroelectric thin film to be measured is connected with any end of the resistance of a known resistance, this resistance other end links to each other with the positive electrode of signal generator output terminal, with the negative electrode of signal generator output terminal as with reference to ground;
2), the signalization generator, make it export sine wave under the Frequency point to be measured; Sine voltage signal to the two ends of this known resistance carries out synchronous acquisition, gathers the signal of a complete cycle at least, and sample frequency is set according to the requirement of the concrete digital phase-sensitive detection algorithm that adopts; The signal that sampling is obtained calculates with the method that digital phase-sensitive detects, and draws the amplitude V of this two end signal 0And V pAnd these two ends phase difference between signals θ; So-called digital phase-sensitive detection method is meant behind the measured signal process analog/digital conversion, carries out digital demodulation by microprocessor and calculate.
3), according to formula C P = | sin θ | * V 0 R * 2 * π * f * V P , R P = R | cos θ | * V 0 V P - 1
Obtain the equivalent electric capacity C of ferroelectric thin film to be measured pWith equivalent resistance R p
According to formula ϵ r = C p t ϵ 0 A , tgδ = 1 2 πf C p R p
Obtain the relative dielectric constant ε of ferroelectric thin film to be measured rWith dielectric loss tg δ;
V in the formula 0For measuring link to each other with signal generator (1) the output terminal positive electrode amplitude of sine voltage signal of end of auxiliary divider resistance (2); V pAmplitude for the sine voltage signal of measuring auxiliary divider resistance (2) and ferroelectric thin film link to be measured, θ is the phase differential between the sine voltage signal that to measure auxiliary divider resistance (2) two ends be above two-way, f is the sinusoidal wave frequency that signal generator produces, and R is the resistance of known resistance; T is the thickness of ferroelectric thin film to be measured, and A is the electrode area of ferroelectric thin film to be measured, ε 0Be permittivity of vacuum.
2, ferroelectric thin-flim materials dielectric properties multi-frequency automatic test approach according to claim 1, the step 2 that it is characterized in that above method of testing is: the signalization generator, make it export sine wave signal under the Frequency point to be measured, measure the amplitude V of sine voltage signal at the two ends of known resistance with commercial lock-in amplifier respectively 0And V pAnd this two paths of signals is with respect to the phase differential θ of the synchronous reference signal of signal generator output 0, θ p, calculate phase differential θ=θ between this two paths of signals by these two phasometers 0p
3, a kind of ferroelectric thin-flim materials dielectric properties multi-frequency automatic testing equipment, it is characterized in that this device comprises signal generator (1), auxiliary divider resistance (2), A/D conversion and interface control unit (3), microprocessor main control unit (4), computing machine (5), signal generator (1) wherein, auxiliary divider resistance (2), ferroelectric thin film to be measured (21) is connected into an electric loop, connect A/D conversion and interface control unit (3) respectively at the two ends of auxiliary divider resistance (2), the digital signal output and the control signal of A/D conversion and interface control unit (3) link to each other with the numeral and the control bus of microprocessor main control unit (4), and microprocessor main control unit (4) and computing machine (5) link to each other by printer parallel interface or RS232 serial line interface or USB interface or pci bus.
4, ferroelectric thin-flim materials dielectric properties multi-frequency automatic testing equipment according to claim 3, it is characterized in that A/D conversion and interface control unit (3), microprocessor main control unit (4) is replaced by commercial lock-in amplifier unit (6), the input end of commercial lock-in amplifier unit (6) links to each other with the two ends that ferroelectric thin film to be measured (21) and signal generator (1) are connected into the auxiliary divider resistance (2) of measurement in loop, the reference input of commercial lock-in amplifier unit (6) links to each other with the synchronous output end of measuring signal generator (1), and commercial lock-in amplifier unit (6) passes through external printer parallel interface or RS232 serial line interface or USB interface or pci bus and links to each other with computing machine (5).
5, ferroelectric thin-flim materials dielectric properties multi-frequency automatic testing equipment according to claim 3, it is characterized in that A/D changes and interface control unit (3) is made up of simulating signal adjustment amplifying circuit (7), A/D change-over circuit (8), interface control section (9), power supply part (10), the two-way simulating signal is amplified the output of adjusting circuit (7) and is linked to each other with the input of corresponding A/D change-over circuit (8) respectively; The data line of A/D change-over circuit (8) links to each other with control line with the data line of control line with interface control section (9); The output of power supply part (10) and simulating signal are amplified adjustment circuit (7), and the corresponding power supply input of A/D change-over circuit (8) and interface control section (9) links to each other, for these three parts provide power supply.
6, ferroelectric thin-flim materials dielectric properties multi-frequency automatic testing equipment according to claim 3, it is characterized in that microprocessor main control unit (4) by expand peripheral bus control module (11), microprocessor (12), host interface control module (13), program and data-carrier store (14), peripheral hardware (15), power supply (16) is formed, the corresponding data of the data of microprocessor (12) and control bus and program and data-carrier store (14), expansion peripheral bus control module (11), host interface control module (13) and peripheral hardware (15) links to each other with control interface.The output of power supply (16) links to each other with the corresponding power supply input of microprocessor (12), program and data-carrier store (14), expansion peripheral bus control module (11), host interface control module (13) and peripheral hardware (15).The expansion peripheral bus of microprocessor main control unit (13) is connected with the output bus of the interface control section (9) of aforesaid A/D conversion and interface control unit (3).The output data of host interface control module (13) and control bus and computing machine (5) link to each other by external printer parallel interface or RS232 serial line interface or USB interface or pci bus.
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