CN1223942C - Automatic test system and method for power switch cycle of computer equipment - Google Patents

Abstract

The invention provides a power switch period automatic test system of computer equipment, which comprises a remote main control computer, a data collecting circuit, a plurality of data acquisition and transmission circuits, a plurality of data transmission lines and a power switch period switching unit. The computer machine to be tested sends the generated starting-up test error code to the data input port of the data collecting circuit through the connected data capturing and transmitting circuit in the switching period of the power switching period test power supply, and then the data capturing and transmitting circuit transmits and records the starting-up test error code transmitted by each computer machine to be tested in the remote main control computer.

Description

Automatic test system and method for power switch cycle of computer equipment

technical field

The invention relates to a testing technology of computer equipment, in particular to a computer equipment power switch cycle automatic testing system and a testing method thereof.

Background technique

Generally, when a newly developed computer device is in the trial production stage, all aspects of the computer device will be tested to ensure its product quality. For example, in the testing of product reliability items, the power on-off cycle test (Power On-off Cycles Test) is one of the very important product reliability testing items.

In the design of a computer system, whenever the computer is activated, the basic input-output system (BIOS) of the computer will conduct a series of tests on the system hardware, such as the display, keyboard, memory, hard disk, etc. connected to the computer system. Test, the system self-test program (Power On SelfTest) that is carried out when starting up is generally referred to as POST. When in the power-on self-test program of the computer system, if an error is detected in any device, a corresponding power-on test error code (POST Code) will be generated. For example, when the memory test detects an error, a memory test error message will be displayed on the computer screen, or a warning sound will be issued. Most of the currently widely used personal computer systems follow the definition of IBM standard error codes. For example, error code 201 represents a memory test error (Memory Test Failed). Users and technicians can check out the error of the system according to the definition of this error code. For computer manufacturers, assemblers or repairers, the power-on test error code is even more important test information.

When carrying out the test of the power switch cycle, the current test method often needs to continuously test the power switch for more than 2000 times or more than 3 days, and each computer machine under test must pass the test. When a crash occurs, the product reliability of the computer equipment can be ensured, and then mass production can be considered.

However, in the current power switching cycle testing technology or method, if one or two or more errors occur during the test, it is often impossible to record the adverse phenomena in real time. Because when the power of the computer under test is restarted and the system cannot be activated normally, its error message or error code will disappear along with the shutdown, making it difficult to trace and analyze errors. In the current test technology, it can only record the execution of a specific file after each power-on to activate the system (System Boot), and add 1 to its count value (Counter), and store the test result data file (Report) on the floppy disk or hard disk. File) or by a special person at any time to record the power execution results and bad phenomena of each computer machine under test and each switch of the computer circuit. However, this traditional testing method is neither perfect nor efficient.

Contents of the invention

For this reason, the main purpose of the present invention is to develop a computer power switch cycle test system for the lack of the aforementioned commonly used technologies and actual needs, so as to save manpower and fully record each computer under test during the test process. The execution status of the power switch cycle of the computer platform and each computer platform under test.

Another object of the present invention is to provide a computer power switch cycle automatic test system, which utilizes a remote main control computer to simultaneously monitor several tested computer machines, and each tested computer machine performs a power-on self-test The execution status of the program is recorded, and the power-on test error code generated in the power-on self-test program can be sent to the remote host computer for comparison or to generate a test result report.

Another object of the present invention is to provide a computer power switch cycle test system that facilitates follow-up error tracking and analysis. The test engineer only needs to check the remote control computer and the specific information on the computer under test when the test time is over. With the recorded results of the file, it is easy to know the detailed execution results of each power switch of each tested computer machine.

Another object of the present invention is to provide a method for automatically testing the power switch cycle of computer equipment, which uses a remote master computer to test the power switch cycle of multiple tested computer machines. When the power-on self-test program is performed and a power-on test error code is generated, the power-on test error code can be captured by the data acquisition transmission circuit, and then a data collection circuit can collect the data captured by each data acquisition transmission circuit. The error codes of the power-on test are read and collected and sent to the remote master computer.

In order to achieve the above-mentioned purpose, the present invention provides a power switch cycle automatic test system for computer equipment, including:

a remote master computer;

A data collection circuit, including a plurality of data buffers, the data bus of each data buffer is connected to the bus of the remote master computer, and the data buffer is controlled by an enabling signal generated by the remote master computer;

A plurality of data acquisition and transmission circuits, each data acquisition and transmission circuit includes a data latch, its data bus is connected to the bus of the computer machine under test, and its data output port is connected to one of the data collection circuits a data input port of a data buffer, the data latch being controlled by an enable signal generated by the computer machine under test;

A power switching cycle switching unit, after obtaining AC power from an AC power supply, outputs switching cycle test power from its power output end, and supplies it to each tested computer machine;

When performing the test, the remote master computer will read the execution status of each tested computer machine when executing the power-on self-test program through the data collection circuit and the data acquisition transmission circuit, and record each The power-on test error code of the computer under test;

The data collection circuit includes several AND gates, and one of the input terminals of each AND gate is connected to the I/O device reading signal generated by the bus of the remote host computer, while the other input terminal is connected to the remote host computer respectively. The selected I/O port address in the control computer, use the I/O device to read the signal and the I/O port address signal, so that the output end of the AND gate generates an enable signal and sends it to the enable end of each corresponding data buffer; the data The capture and transmission circuit includes an AND gate, one of the inputs of each AND gate is connected to the I/O device write signal generated by the bus of the computer under test, and the other input is connected to the computer under test The I/O port address selected in the stage uses the write signal of the I/O device and the I/O port address signal to make the output end of the AND gate generate an enable signal and send it to the enable end of the data latch.

The present invention also provides a method for automatically testing the power switch cycle of computer equipment. A remote main control computer is used to test the power switch cycle of a plurality of tested computer machines. The remote main control computer is connected with a data collection circuit, and A data acquisition and transmission circuit is connected to each tested computer machine, and the test method includes the following steps:

supplying a switching cycle test power supply to each tested computer machine;

During the switching cycle test power supply period, each computer machine under test performs a power-on self-test program and generates a power-on test error code;

The power-on test error code sent by the connected computer machine under test when executing the power-on self-test program is retrieved by each data retrieval transmission circuit, and stored in the data latch of each data retrieval transmission circuit; and

The data collection circuit reads the boot test error codes of the tested computer machines captured by each data collection and transmission circuit, and collects and transmits them to the remote main control computer.

In order to further illustrate the above-mentioned purpose, structural features and effects of the present invention, the present invention will be described in detail below in conjunction with the accompanying drawings.

Description of drawings

Fig. 1 is the connection schematic diagram showing the computer power switch cycle automatic test system of the present invention;

Fig. 2 is the output waveform diagram showing the switching cycle test power supply used in the present invention;

Fig. 3 is a further circuit block diagram showing the data collection circuit of the present invention, and the connection relationship diagram between the data collection circuit and the remote main control computer and the computer under test;

Fig. 4 is a further circuit block diagram showing the data acquisition and transmission circuit of the present invention, and a connection relationship diagram between the data acquisition and transmission circuit, the computer machine under test, and the data collection circuit;

Fig. 5 is a control flow diagram showing the present invention.

Detailed ways

First referring to shown in Fig. 1, it has shown the connection schematic diagram of the power switch cycle automatic test system of computer equipment of the present invention, and this test system comprises a remote main control computer (Remote ControlPC) 1, a data collection circuit (Data Acquisition Device) 2 , multiple data capture transmission circuits (Data Port Capture Device) 3a, 3b...3n, multiple data transmission lines (Data TransferCable) 4a, 4b...4n, a power switch cycle switching unit 5 (Power On-off Cycles SwitchUnit), Using the above circuit arrangement, the automatic test of the power switch cycle can be performed on multiple tested computer machines 6a, 6b...6n.

The data collection circuit 2 can be made into a plug-in card type, which can be inserted into the bus of the remote host computer 1, such as a PCI bus slot (PCI Bus Slot). The data collection circuit 2 has several data ports (DataPort) or data channels, and each data port is respectively connected to the data acquisition and transmission circuits 3a, 3b...3n via data transmission lines 4a, 4b...4n. The data acquisition and transmission circuits 3a, 3b...3n can also be made into a plug-in card type, which can be inserted into a bus on the tested computer machine 6a, 6b...6n, such as a PCI bus slot (PCIBus Slot).

The switching cycle test power ACV' of each tested computer machine 6a, 6b...6n is provided by the power switching cycle switching unit 5. In this embodiment, after the power switching cycle switching unit 5 obtains the AC power from an AC power source ACV, it outputs the switching cycle test power source ACV' (shown in FIG. On) time is 50 seconds (T1), and power off (PowerOff) time is 5 seconds (T2). In this way, the switching cycle test power supply ACV' is periodically supplied to each tested computer machine 6a, 6b...6n, whereby the number of power switch operations of the computer machine in actual use in the future can be simulated.

As shown in FIG. 3 , it shows a further circuit block diagram of the data collection circuit 2 of the present invention, and a connection relationship diagram between the data collection circuit 2 and the remote main control computer and the computer under test. The remote host computer 1 includes conventional components such as a central processing unit 11 , a main memory 12 , a data bus 13 , an address bus 14 , a control bus 15 , a PCI bridge 16 , and a PCI bus 17 . The data collection circuit 2 includes several data buffers (Data Buffer) 21a, 21b...21n, and the data bus (AD Bus) of each data buffer 21a, 21b...21n is connected to the PCI bus of the remote host computer. 17.

In addition, the data collection circuit 2 includes several AND gates 22a, 22b...22n, one of the input ends of each AND gate 22a, 22b...22n is connected to the I/O device read signal IOR generated by the PCI bus, and The other input end is respectively connected to the selected I/O port address (for example, 380H~39CH) in the remote host computer 1 . Using the I/O device to read the signal IOR and the I/O port address signal, the output terminals of the AND gates 22a, 22b...22n can respectively generate enable signals and send them to the enable terminals G of the data buffers 21a, 21b...21n, Instead, the data buffer can be optionally enabled.

The data input ports P1, P2...Pn of each data buffer 21a, 21b...21n are connected to the data acquisition and transmission circuits 3a, 3b...6n of the computer machine under test 6a, 6b...6n via the data transmission lines 4a, 4b...4n 3n. The data transmission lines 4a, 4b...4n can use general 9-wire signal transmission cables, of which 8 wires are eight-bit data signal lines connected to the power-on test error code data, and the other line is connected to the computer machine under test. The working power supply Vcc of the electronic components is used to determine whether the computer under test is in the Power On period. Certainly, the signal data transmission line can also adopt other types of signal data transmission lines.

FIG. 4 is a further circuit block diagram showing the data acquisition and transmission circuit of the present invention, and a connection relationship diagram between the data acquisition and transmission circuit, the computer machine under test, and the data collection circuit. In the tested computer machine, for example, the first tested computer machine 6a includes a central processing unit 61, a main memory 62, a data bus 63, an address bus 64, a control bus 65, a PCI bridge 66, and a PCI bus 67 and other known components. And the data acquisition transmission circuit 3a includes a data latch 31, and its data bus (AD Bus) is connected to the PCI bus 67 of the tested computer machine 6a.

In addition, the data acquisition transmission circuit 3a includes an AND gate 32, one of which is connected to the I/O device write signal IOW generated by the PCI bus 67 of the tested computer machine 6a, and the other input is Connect to one of the I/O port addresses (eg 08XH) of the tested computer machine 6a. Utilize this I/O device to write signal IOW and I/O port address signal, make the output end of AND gate 32 can produce enable signal and send to enable terminal G of this data latch device 31, and can selectively enable this data latch locker. The data output ports D0-D7 of the data latch 31 are connected to the first data input port P1 of the data collection circuit 2 via the data transmission line 4a. In this way, the power-on test error code (POST Code) generated during the power-on test of the computer under test can be sent to the remote master computer through the data latch, data transmission line, and data buffer.

When the remote main control computer starts to execute the test, it first executes the reading program (I/O Ports Read Program) of each input and output port, and starts to read the fixed ports connected to each computer under test on the data collection circuit. Output the data of the port address, and record the power-on test error code (POST Code) on each computer machine under test read at a fixed time. This power-on test error code can be stored in the memory of the remote master computer or on disk. And when each tested computer machine is testing, the tested computer machine can also display the power-on test error code of each tested computer machine in real time, and can also store the power-on test error code in the tested computer machine. computer memory or disk.

FIG. 5 shows a control flow diagram of a specific embodiment of the present invention, and the processing steps of the present invention will be described as follows in conjunction with the architecture shown in FIGS. 1 to 4 . The steps of the present invention mainly include supplying a switching cycle test power supply ACV' from the power switching cycle switching unit 5 to each tested computer machine 6a, 6b...6n (step 101). During the power supply period of the switching cycle test power supply ACV ', each tested computer machine base 6a, 6b ... 6n performs a power-on self-test program (step 102), and generates a power-on test error code (POST Code) in the power-on self-test program. ). Now, each tested computer machine 6a, 6b...6n can store the power-on test error code in a specific file in the memory or disk (step 103), and can also display the power-on test error code on its display .

In step 104, each data capture transmission circuit 3a, 3b...3n retrieves the power-on test error codes sent by the connected tested computer machines 6a, 6b...6n when executing the power-on self-test program, and stores them in the In the data latches of each data acquisition and transmission circuit.

In step 105, the power-on test error codes of the tested computer machines 6a, 6b...6n captured by the data collection and transmission circuits 3a, 3b...3n are read by the data collection circuit 2, and collected and sent to Remote host computer 1. At this point, each remote master computer 1 can store the power-on test error code in a specific file in the internal memory or disk (step 106), and can also display the power-on test error code on its display.

Utilize above-mentioned description to know, test system of the present invention utilizes a remote main control computer to simultaneously monitor several (for example 8-16) computer machines under test, and when each computer machine under test executes the self-testing program of power on The execution status that occurs is recorded, and the power-on test error code generated in the power-on self-test program can be sent to the remote host computer for comparison or to generate a test result report. Therefore, the test engineer only needs to check the record results of the specific files on the remote master computer and the computer under test at the end of the test time, and can easily know the details of each power switch of each computer under test. Results of the. Therefore, the present invention clearly has high industrial application value.

Of course, those of ordinary skill in the art should recognize that the above embodiments are only used to illustrate the present invention, rather than as a limitation to the present invention, as long as within the scope of the spirit of the present invention, the implementation of the above Changes and modifications of the examples will fall within the scope of the claims of the present invention.

Claims (11)

1. A power switch cycle automatic test system for computer equipment, comprising: a remote master computer; A data collection circuit, including a plurality of data buffers, the data bus of each data buffer is connected to the bus of the remote master computer, and the data buffer is controlled by an enabling signal generated by the remote master computer; A plurality of data acquisition and transmission circuits, each data acquisition and transmission circuit includes a data latch, its data bus is connected to the bus of the computer machine under test, and its data output port is connected to one of the data collection circuits a data input port of a data buffer, the data latch being controlled by an enable signal generated by the computer machine under test; A power switching cycle switching unit, after obtaining AC power from an AC power supply, outputs switching cycle test power from its power output end, and supplies it to each tested computer machine; When performing the test, the remote master computer will read the execution status of each tested computer machine when executing the power-on self-test program through the data collection circuit and the data acquisition transmission circuit, and record each The power-on test error code of the computer under test; The data collection circuit includes several AND gates, and one of the input terminals of each AND gate is connected to the I/O device reading signal generated by the bus of the remote host computer, while the other input terminal is connected to the remote host computer respectively. The selected I/O port address in the control computer, use the I/O device to read the signal and the I/O port address signal, so that the output end of the AND gate generates an enable signal and sends it to the enable end of each corresponding data buffer; the data The capture and transmission circuit includes an AND gate, one of the inputs of each AND gate is connected to the I/O device write signal generated by the bus of the computer under test, and the other input is connected to the computer under test The I/O port address selected in the stage uses the write signal of the I/O device and the I/O port address signal to make the output end of the AND gate generate an enable signal and send it to the enable end of the data latch. 2. The automatic test system for power switch cycle of computer equipment as claimed in claim 1, characterized in that, the data collection circuit is made into a plug-in card type, which can be inserted into the PCI bus slot of the remote host computer. 3. The power switch cycle automatic test system of computer equipment as claimed in claim 1, wherein the data acquisition and transmission circuit is made into a plug-in card type, which can be inserted into the PCI bus slot of the computer machine under test . 4. The power switch cycle automatic test system of computer equipment as claimed in claim 1, characterized in that, the data acquisition and transmission circuit is connected with the data collection circuit with a data transmission line, so that the data acquisition and transmission circuit The retrieved startup test error code sent by the tested computer machine is sent to the data collection circuit through the data transmission line. 5. The power switch cycle automatic test system of computer equipment as claimed in claim 4, is characterized in that, this data transmission line comprises a plurality of signal data transmission lines as data signal line, also comprises that a line is connected to the computer machine under test The working power on the computer is used to judge whether the computer machine under test is in the power-on period. 6. The power switch cycle automatic test system of computer equipment as claimed in claim 1, it is characterized in that, the power-on test error code that this tested computer machine produces is also displayed in this tested computer machine in real time, and the power-on The test error code is stored in the tested computer machine. 7. A method for automatically testing the power switch cycle of computer equipment is to carry out the test of the power switch cycle of a plurality of tested computer machines with a remote master control computer, the remote master control computer is connected with a data collection circuit, and each A data acquisition transmission circuit is connected to a computer machine under test, and the test method includes the following steps: supplying a switching cycle test power supply to each tested computer machine; During the switching cycle test power supply period, each computer machine under test performs a power-on self-test program and generates a power-on test error code; The power-on test error code sent by the connected computer machine under test when executing the power-on self-test program is retrieved by each data retrieval transmission circuit, and stored in the data latch of each data retrieval transmission circuit; and The data collection circuit reads the boot test error codes of the tested computer machines captured by each data collection and transmission circuit, and collects and transmits them to the remote main control computer. 8. the automatic test method of the power switch cycle of computer equipment as claimed in claim 7, is characterized in that, also comprises the power-on test error code that each tested computer machine produces is stored in the internal memory of the tested computer machine or in the magnetic disk A step of. 9. The automatic test method of the power switch cycle of computer equipment as claimed in claim 7, further comprising the step of displaying the error codes of the power-on test produced by each computer under test on the display of the computer under test. 10. The method for automatically testing the power switch cycle of computer equipment as claimed in claim 7, further comprising storing the error codes of the power-on test generated by each tested computer machine in the memory or disk of the remote master computer A step of. 11. The automatic test method of the power switch cycle of computer equipment as claimed in claim 7, further comprising the step of displaying the error codes of the power-on test produced by each tested computer machine on the display of the remote master computer.

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