CN1216423C - Semiconductor device and its manufacturing method - Google Patents

Abstract

A semiconductor device with electronic elements is prepared as electrically connecting electronic element to the first base plate, connecting the first base plate to semiconductor chip or the second base plate, electrically connecting the first base plate, the second base plate and chip after the semiconductor chip is connected to the second base plate, then carrying out die pressing, ball planting and cutting to obtain the final product.

Description

Semiconductor device and its manufacturing method

technical field

The present invention relates to a semiconductor device and its manufacturing method, especially to a semiconductor device integrated with electronic components such as passive components and its manufacturing method.

Background technique

In order to improve the performance of a general semiconductor device, electronic components such as passive components are often added to the semiconductor device. For example, U.S. Patents No. 5,264,730, No. 5,311,405, No. 5,811,880, No. 5,825,628, and No. 6,316,828, etc., disclose that passive components are arranged on the substrate of a ball grid array (BGA) package to improve packaging The technical content of the overall electrical function of the component.

The substrate configuration of this kind of semiconductor device with passive components is as shown in Figure 9. Preferably, passive components 40 such as resistors or capacitors are connected to the ground ring (Ground Ring) 13 and the power ring (Power Ring) 12 of the substrate 10. It is best to place the passive components 40 adjacent to the four corners of the chip 20 at positions adjacent to the chip 20 .

However, due to the addition of passive components 40 in this configuration of the substrate 10, the layout gap P of the bonding pad (Bond Finger) 11 between the passive components 40 is forced to be narrowed from the traditional 0.150 ^mm , for example, to a small The gap (Fine Pitch) of 0.125 ^mm causes a substantial increase in manufacturing costs.

In addition, the arrangement of the above-mentioned passive components 40 will also cause the wiring of the substrate 10 to avoid the passive components 40 so that the wiring area and space are limited, thereby affecting the overall design of the substrate; wiring, the number and location of the passive components 40 are also limited, resulting in a bottleneck in the improvement of the performance of the semiconductor device.

Furthermore, if the passive element 40 must be placed near the periphery outside the corner of the chip 20 in order to meet the actual needs, it is often possible to bypass the passive element 40 by the bonding pad (Bond Pad) 21 of the chip 20 due to the wire 30 and electrically connected to the corresponding bonding wire pad 11 of the substrate 10, so that the wire 30 is likely to touch the corner edge of the passive component 40 as shown in FIG. reliability. Although this shortcoming of easy short circuit can be solved by coating the passive element 40 with a layer of insulating material in advance, such an increase in the process will also bring about a substantial increase in production cost.

In order to solve the above problems, although U.S. Patent No. 5,670,824 provides a structure in which passive components are integrated on a board and placed under the chip, this integrated passive component board cannot use traditional Passive components such as resistors or capacitors are very expensive, so it is difficult to meet market demand and cannot be mass-produced.

In addition, although Taiwan Patent Application No. 89121891 also proposes a structure in which the passive element 40 is directly electrically connected to the chip 40 as shown in FIG. Adhesive pad 22, and perform the Under Bumping Metalization process (Under Bumping Metalization) on this adhesive pad 22, so as to be electrically connected with the solder paste (Solder Paste) of the passive component 40, which causes the process to be complicated, and Resulting in a substantial increase in manufacturing costs.

This patent also proposes a method of directly bonding the passive component 40 on the chip 20 as shown in FIG. The structure of the grounding ring 13, however, the contact terminal (Terminal) of the passive component 40 of this structure is not smooth enough, so it is difficult to use the wire bonding machine of the traditional packaging process to carry out the wire bonding. At the same time, if the contact terminal is not gold-plated , that is, wire bonding cannot be performed. Therefore, this structure cannot meet the market demand because it is difficult to carry out mass production under the existing equipment and process framework.

Contents of the invention

In order to overcome the deficiencies in the prior art, the purpose of the present invention is to provide a semiconductor device and its manufacturing method, which can eliminate the need for a substrate with a fine-gap wire pad layout when adding electronic components such as passive components. reduce manufacturing cost.

Another object of the present invention is to provide a semiconductor device and its manufacturing method. When electronic components such as passive components are added, the wiring design of the substrate and the number and positions of the electronic components do not need to be limited.

Another object of the present invention is to provide a semiconductor device and its manufacturing method, which can avoid short circuit caused by wires touching the electronic components when adding electronic components such as passive components.

Another object of the present invention is to provide a semiconductor device and its manufacturing method, which can effectively save manufacturing cost without using an expensive integrated electronic component board when adding electronic components such as passive components.

Another object of the present invention is to provide a semiconductor device and a method for manufacturing the same. When adding electronic components such as passive components, it is not necessary to arrange the bonding pads of the electronic components on the chip in advance, and it is not necessary to install the bonding pads of the electronic components in advance. The process of applying under-solder bump metallization on the pads simplifies the manufacturing process and reduces costs.

Another object of the present invention is to provide a semiconductor device and its manufacturing method, which can avoid the problem of difficulty in using existing wire bonding equipment to perform wire bonding on electronic components when adding electronic components such as passive components , and can be mass-produced under the existing process architecture.

To achieve the above object, the semiconductor device of the present invention includes: an electronic component having a first surface and a second surface; a first substrate having a first surface and a second surface, wherein the second surface of the electronic component is electrically connected to On the first surface of the first substrate; a semiconductor chip having a first surface and a second surface; a second substrate having a first surface and a second surface, wherein the second surface of the semiconductor chip is connected to the second The first surface of the substrate, while the second surface of the first substrate loaded with electronic components is connected to the structure formed by the semiconductor chip and the second substrate, for example, connected to the first surface of the semiconductor chip on the surface, or on the first surface of the second substrate, or at other appropriate positions; electrically connecting the first surface of the semiconductor chip, the first surface of the first substrate, and the first surface of the second substrate A plurality of wires; an encapsulant covering the electronic component, the first substrate, the semiconductor chip, and the wires on the first surface of the second substrate; and a plurality of wires planted on the second surface of the second substrate Solder balls.

The manufacturing method of the semiconductor device of the present invention includes the following steps: preparing a first substrate having a first surface and a second surface, an electronic component, a semiconductor chip, and a second substrate; electrically connecting the second surface of the electronic component to the On the first surface of the first substrate; connecting the second surface of the semiconductor chip on the first surface of the second substrate; connecting the second surface of the first substrate carrying electronic components on the semiconductor chip and the second surface On the structure formed by the second substrate, for example, it is placed on the first surface of the semiconductor chip, or on the first surface of the second substrate, or at other appropriate positions; a plurality of wires are welded to make the first surface of the semiconductor chip A surface, the first surface of the first substrate, and the first surface of the second substrate can form an electrical connection state; the electronic component, the first substrate, the semiconductor chip, and the wire are encapsulated coating on the first surface of the second substrate; and planting solder balls on the second surface of the second substrate.

The above-mentioned semiconductor device and its manufacturing method can also be applied to a semiconductor device using a lead frame, wherein the second surface of the first substrate carrying electronic components is connected to the first surface of the semiconductor chip.

According to the above-mentioned semiconductor device of the present invention and its manufacturing method, when people want to improve the performance of the semiconductor device by adding electronic components such as passive components such as resistors or capacitors, it is not necessary to change the design of the substrate or chip, that is, The path can use the existing hardware and software facilities such as components, raw materials, processes, technologies, and machinery and equipment to manufacture substrates with electronic components, and then place them in the packaging structure of semiconductor devices, which can save costs It is far cheaper than the existing technology, but under the condition of improving the product yield, the effect of strengthening the electrical function of the semiconductor device can be obtained immediately.

Description of drawings

Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, but the scope of implementation of the present invention is not limited to the content of the embodiments.

1A and 1B are respectively a front view and a top view showing a first substrate that can be used in the present invention;

2A and 2B are a front view and a top view respectively showing the electrical connection of the electronic component of the present invention on the first substrate;

3A and 3B are respectively a front view and a top view showing that the semiconductor chip of the present invention is connected to a second substrate;

4A and 4B are a front view and a top view respectively showing that the first substrate carrying electronic components of the present invention is connected to a semiconductor chip and wire bonding is completed;

FIG. 5 is a front view showing the semiconductor device of the present invention that has completed molding and balling;

6A and 6B are schematic diagrams respectively showing other embodiments of the wire bonding method of the present invention;

Figure 7 is a schematic diagram showing another embodiment of the present invention;

FIG. 8A is a top view showing yet another embodiment of the present invention that has not yet undergone a molding process;

FIG. 8B is a schematic diagram showing the completion of molding and ball planting in the embodiment of FIG. 8A;

9 is a schematic diagram showing a substrate configuration of a conventional semiconductor device with passive components;

10 is a schematic diagram showing a short-circuit wire of a conventional semiconductor device with passive components;

11 is a schematic structural view showing another conventional semiconductor device with passive elements;

FIG. 12 is a schematic diagram showing the structure of another conventional semiconductor device with passive components.

Explanation of symbols in the figure:

10, 10' substrate, second substrate 11, 52 power supply wire pad

12 Power Ring 13 Grounding Ring

14, 14′, 22, 44, 56 The first surface

100 Chip Holder 20 Semiconductor Chips, Chips

21 Soldering Pads 22 Bonding Pads

23, 45, 57 Second surface

30, 31, 32, 32', 33, 34', 42, 43 wire

40 Passive components 41 Electronic components

50 First Substrate 53 Ground Bonding Pad

54 Power pad 55 Ground pad

60, 60' encapsulation colloid 70 more solder balls

70′ multiple guide pins

Detailed ways

The semiconductor device of the present invention, as shown in FIG. 5 , includes an electronic component 41, a first substrate 50, a semiconductor chip 20, a second substrate 10, a plurality of wires 30, 31, 32, 33, 34, an encapsulant 60, and a plurality of Solder ball 70.

Wherein, the electronic component 41 has a first surface 44 and a second surface 45 , and the electronic component 41 can be passive components such as resistors or capacitors or other suitable electronic components. The second surface 45 of the electronic component 41 is welded on the first surface 56 of the first substrate 50 by conventional methods such as reflow soldering (Reflow), so that it is electrically connected to the power supply formed on the first surface 56. pad 54 and ground pad 55 .

The semiconductor chip 20 also has a first surface 22 and a second surface 23 , and the second surface 23 is connected to the first surface 14 of the second substrate 10 by conventional means such as adhesion. The first substrate 50 on which the electronic components 41 are placed can optionally be connected to the first surface 22 of the semiconductor chip 20 by the second surface 57 of the conventional method such as adhesion.

A plurality of conducting wires 30, 31, 32, 33, 34 such as gold wires (Gold Wire) are respectively welded and electrically connected to the first surface 22 of the semiconductor chip 20 and the first surface of the first substrate 50. 56, and between the first surface 14 of the second substrate 10, wherein, as shown in FIG. 4B and FIG. pad (Signal Pad) to the signal pad (Signal Finger) 11 formed on the first surface 14 of the second substrate 10, and the wire 31 is then electrically connected to the pad formed on the first surface 22 of the semiconductor chip 20 The power pad (Power Pad) in 21 is formed on the first surface 56 of the first substrate 50 and is electrically connected with the power pad 54 on the power pad (Power Finger) 52, and the wire 32 is electrically connected Another power bonding pad 52 parallel to the power bonding pad 52 formed on the first surface 56 of the first substrate 50 is connected to the power ring 12 formed on the first surface 14 of the second substrate 10 .

Similarly, the wire 33 is electrically connected to the ground pad (Ground Pad) in the pad 21 formed on the first surface 22 of the semiconductor chip 20 to the ground pad formed on the first surface 56 of the first substrate 50. 55 electrically connected to the grounding wire pad (Ground Finger) 53, while the wire 34 is electrically connected to another grounding wire formed on the first surface 56 of the first substrate 50 and connected in parallel with the grounding wire pad 53 The pad 53 is connected to the ground ring 13 formed on the first surface 14 of the second substrate 10 .

The protective encapsulant 60 covers the electronic component 41 , the first substrate 50 , the semiconductor chip 20 , and the wires 30 , 31 , 32 , 33 , 34 on the first surface 14 of the second substrate 10 . A plurality of solder balls (Solder Balls) 70 are planted on the second surface 15 of the second substrate 10 to electrically connect the semiconductor device of the present invention to the outside.

The above-mentioned first substrate 50 carrying the electronic components 41 can also be optionally connected to the first surface 14' of the second substrate 10' as shown in FIG. 8A and FIG. 8B, so as to reduce the overall height of the semiconductor device. Among them, the plurality of wires 30, 35, 36 are respectively welded between the first surface 22 of the semiconductor chip 20, the first surface 14' of the second substrate 10', and the first surface 56 of the first substrate 50, namely The purpose of electrically connecting the semiconductor chip 20 , the second substrate 10 ′, and the first substrate 50 (electronic component 41 ) can be achieved.

In addition, the wire connection mode between the first substrate 50, the semiconductor chip 20, and the second substrate 10 can also be selected as shown in FIG. 6A, that is, the wires 32 and 34 in the original FIG. The power pad in the pad 21 formed on the first surface 22 of the chip 20 is electrically connected to the wire 32' on the power ring 12 formed on the first surface 14 of the second substrate 10, and from the semiconductor chip 20 If the ground pad in the pad 21 formed on the first surface 22 of the second substrate 10 is electrically connected to the wire 34' on the ground ring 13 formed on the first surface 14 of the second substrate 10, the same performance can still be achieved. Effect.

Again, the above-mentioned first substrate 50, the semiconductor chip 20, and the wire connection mode between the second substrate 10 also have to select the type shown in Figure 6B, that is, the wires 31 and 33 of the original Figure 5 are respectively changed to the wires shown in Figure 6B. The wires 32' and 34' shown in 6A are replaced to achieve the same effect.

The connection method of the wires in the above-mentioned embodiments shown in FIG. 8A and FIG. 8B may also be equivalently changed with reference to, for example, the configuration in FIG. 6A or FIG. 6B , and the details will not be repeated here.

Furthermore, the technical idea of the present invention can also be applied to a semiconductor device using a lead frame, as shown in FIG. 7 . Wherein, the first substrate 50 on which the electronic components 41 are placed is connected to the first surface 22 of the semiconductor chip 20 by its second surface 57 by conventional methods such as adhesion, and the semiconductor chip 20 is connected by its second surface 57 The surface 23 is attached to the chip holder 100 by conventional means such as adhesive. A plurality of wires 30, 31, 32, 33, 34 are respectively soldered and electrically connected to the first surface 22 of the semiconductor chip 20, the first surface of the first substrate 50, and a plurality of wires disposed on the periphery of the semiconductor chip 20. between the inner ends of the guide pins 70'. The protective encapsulant 60' covers the inner side of the electronic component 41, the first substrate 50, the semiconductor chip 20, the chip holder 100, a plurality of wires 30, 31, 32, 33, 34, and a plurality of leads 70' part. In addition, the wire can also be connected in an equivalent manner as shown in FIG. 6A or FIG. 6B , and still achieve the same effect.

The manufacturing method of the semiconductor device of the present invention as shown in FIG. 5 includes the following steps.

First, a first substrate 50 having a first surface 56 and a second surface 57 is prepared, as shown in FIGS. 1A and 1B . Wherein, the first surface 56 of the first substrate 50 is formed with a plurality of power pads 52, ground pads 53, power pads 54, and ground pads 55, and the power pads 52 and ground pads The wire pads 53 are electrically connected to the power pads 54 and the ground pads 55 in parallel pairs.

The second surface 45 of electronic components 41 such as passive components such as resistors or capacitors is welded on the first surface 56 of the first substrate 50 in a conventional manner such as reflow soldering, as shown in FIGS. 2A and 2B , so as to be electrically connected to the power pad 54 and the ground pad 55 formed on the first surface 56 .

Then connect the second surface 23 of the semiconductor chip 20 on the first surface 14 of the second substrate 10 by a conventional method such as adhesion, as shown in FIG. 3A and FIG. 3B .

The second surface 57 of the first substrate 50 on which the electronic components 41 are placed is then placed on the first surface 22 of the semiconductor chip 20 in a conventional manner such as adhesion, and a plurality of gold wires (Gold wires) are soldered. Wire) and other conductive wires 30, 31, 32, 33, 34, as shown in Figure 4A and Figure 4B, so that the first surface 22 of the semiconductor chip 20, the first surface 56 of the first substrate 50, and the An electrical connection state is formed between the first surfaces 14 of the second substrate 10 . The detailed connection relationship of the wires 30 , 31 , 32 , 33 , 34 has been described in the aforementioned embodiments of the semiconductor device of the present invention, so it will not be repeated here.

Then carry out a molding step, so that the encapsulant 60 with a protective effect covers the electronic component 41, the first substrate 50, the semiconductor chip 20, and a plurality of wires 30, 31, 32, 33, 34 on the first surface of the second substrate 10. on surface 14. Finally, a plurality of solder balls 70 such as solder balls are planted on the second surface 15 of the second substrate 10, so that the fabricated semiconductor device can be electrically connected to the outside through the solder balls 70, as shown in FIG. 5.

The connection method of the above wires can also be selected as shown in FIG. 6A or FIG. 6B as mentioned above, and the same effect can still be achieved.

In addition, the above-mentioned first substrate 50 on which the electronic components 41 are placed must also be connected to the first surface 14' of the second substrate 10' in the manner shown in FIG. overall height.

Furthermore, the above method for manufacturing a semiconductor device can also be applied to the manufacture of a semiconductor device using a lead frame as shown in FIG. 7 . Wherein, the manufacturing method of the semiconductor device using the lead frame only needs to add the step of connecting the first substrate 50 carrying the electronic components 41 on the semiconductor chip 20 in the existing manufacturing method, and adding soldering by the first substrate 50 Steps such as wires drawn out from the first surface 56 of the first surface 56 are enough, so details thereof will not be repeated here.

In addition, the manufacturing method of the above-mentioned semiconductor device can also be applied to substrates arranged in a matrix form (Matrix), so as to facilitate mass production. Wherein, the first substrate 50 can be prepared in advance in the form of a matrix arrangement, and after the electronic components 41 are respectively soldered to their corresponding positions, they will be singulated (Singulation) to form a single first substrate carrying the electronic components 41. Substrate 50. At the same time, the second substrate 10 can also be made into a matrix arrangement, so that the semiconductor chips 20 and the above-mentioned independent first substrate 50 carrying the electronic components 41 are respectively connected, and wires are soldered, molded and planted. After balling, the semiconductor device of the present invention can be completed by adding singulation.

The above description is only used to illustrate the specific examples of the present invention, and is not intended to limit the scope of the present invention. For example, all equivalents completed by those skilled in the art without departing from the spirit and technical ideas disclosed in the present invention Changes or modifications should still be covered by the protection scope of this patent.

Claims (19)

1. A semiconductor device comprising: an electronic component having a first surface and a second surface; a first substrate having a first surface and a second surface, the second surface of the electronic component is electrically connected to the first surface of the first substrate; a semiconductor chip having a first surface and a second surface; A second substrate having a first surface and a second surface, the second surface of the semiconductor chip is connected to the first surface of the second substrate, and the second surface of the first substrate on which the electronic component is placed is connected to placed on a structure formed by the semiconductor chip and the second substrate; a plurality of wires electrically connecting the first surface of the semiconductor chip, the first surface of the first substrate, and the first surface of the second substrate; an encapsulant coating the electronic component, the first substrate, the semiconductor chip, and the wire on the first surface of the second substrate; and A plurality of solder balls are planted on the second surface of the second substrate. 2 . The semiconductor device according to claim 1 , wherein the second surface of the first substrate on which the electronic component is placed is connected to the first surface of the semiconductor chip. 3 . 3 . The semiconductor device according to claim 1 , wherein the second surface of the first substrate on which the electronic component is mounted is connected to the first surface of the second substrate. 4 . 4. The semiconductor device according to any one of claims 1-3, wherein the wires include electrically connecting the first surface of the first substrate and the first surface of the semiconductor chip, and the first surface of the semiconductor chip respectively. The first surface and the first surface of the second substrate, and the wires between the first surface of the first substrate and the first surface of the second substrate. 5. The semiconductor device according to any one of claims 1-3, wherein the wires include electrically connecting the first surface of the first substrate and the first surface of the semiconductor chip, and the semiconductor chip respectively. wires on the first surface of the second substrate and the first surface of the second substrate. 6. The semiconductor device according to any one of claims 1-3, wherein the wires include electrically connecting the first surface of the first substrate and the first surface of the second substrate respectively, and the semiconductor device. The first surface of the chip is connected with the first surface of the second substrate. 7. The semiconductor device according to any one of claims 1-3, wherein the electronic component is a passive component. 8. The semiconductor device according to any one of claims 1-3, wherein the electronic component is soldered on the first surface of the first substrate by reflow soldering. 9. A method for manufacturing a semiconductor device, comprising the steps of: preparing a first substrate, an electronic component, a semiconductor chip, and a second substrate respectively having a first surface and a second surface; electrically connecting the second surface of the electronic component to the first surface of the first substrate; placing the second surface of the semiconductor chip on the first surface of the second substrate; placing the second surface of the first substrate on which the electronic component is mounted on the structure formed by the semiconductor chip and the second substrate; Welding a plurality of wires to form an electrical connection state between the first surface of the semiconductor chip, the first surface of the first substrate, and the first surface of the second substrate; coating the electronic component, the first substrate, the semiconductor chip, and the wires on the first surface of the second substrate with encapsulant; and Solder balls are planted on the second surface of the second substrate. 10 . The method of manufacturing a semiconductor device according to claim 9 , wherein the second surface of the first substrate on which the electronic component is mounted is bonded to the first surface of the semiconductor chip. 11 . 11 . The method of manufacturing a semiconductor device according to claim 9 , wherein the second surface of the first substrate on which the electronic component is placed is connected to the first surface of the second substrate. 12. The method for manufacturing a semiconductor device according to any one of claims 9-11, wherein the wires include electrically connecting the first surface of the first substrate and the first surface of the semiconductor chip, the semiconductor The first surface of the chip and the first surface of the second substrate, and the wires between the first surface of the first substrate and the first surface of the second substrate. 13. The method for manufacturing a semiconductor device according to any one of claims 9-11, wherein the wires include electrically connecting the first surface of the first substrate and the first surface of the semiconductor chip respectively, and The wires between the first surface of the semiconductor chip and the first surface of the second substrate. 14. The method for manufacturing a semiconductor device according to any one of claims 9-11, wherein the wires include electrically connecting the first surface of the first substrate and the first surface of the second substrate respectively , and wires between the first surface of the semiconductor chip and the first surface of the second substrate. 15. The method for manufacturing a semiconductor device according to any one of claims 9-11, wherein the electronic component is a passive component. 16. The method for manufacturing a semiconductor device according to any one of claims 9-11, wherein the electronic component is soldered on the first surface of the first substrate by reflow soldering. 17. A semiconductor device comprising: an electronic component having a first surface and a second surface; a substrate having a first surface and a second surface, the second surface of the electronic component is electrically connected to the first surface of the substrate; a semiconductor chip having a first surface and a second surface, the second surface of the substrate on which the electronic component is placed is connected to the first surface of the semiconductor chip; a die holder for mounting the second surface of the semiconductor die; a plurality of leads arranged on the periphery of the semiconductor chip; a plurality of wires electrically connecting the first surface of the semiconductor chip, the first surface of the substrate, and the inner ends of the leads; and The encapsulation compound covering the electronic component, the substrate, the semiconductor chip, the chip seat, the wire, and the inner part of the lead pin. 18. The semiconductor device according to claim 17, wherein the electronic component is a passive component. 19. The semiconductor device according to claim 17 or 18, wherein the electronic component is soldered on the first surface of the substrate by reflow soldering.

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