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CN120848348A - A disturbance suppression device and method based on FPGA frequency rapid identification - Google Patents

A disturbance suppression device and method based on FPGA frequency rapid identification

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Publication number
CN120848348A
CN120848348A CN202511353971.9A CN202511353971A CN120848348A CN 120848348 A CN120848348 A CN 120848348A CN 202511353971 A CN202511353971 A CN 202511353971A CN 120848348 A CN120848348 A CN 120848348A
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frequency
disturbance
time
fpga
control
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CN202511353971.9A
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CN120848348B (en
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唐涛
李业攀
杨虎
冯念
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Institute of Optics and Electronics of CAS
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Institute of Optics and Electronics of CAS
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moiré or halo
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
    • G05B19/0423—Input/output
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/20—Pc systems
    • G05B2219/25—Pc structure of the system
    • G05B2219/25257—Microcontroller

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Mechanical Light Control Or Optical Switches (AREA)

Abstract

The invention discloses a disturbance suppression device and a disturbance suppression method based on FPGA frequency rapid identification, belonging to the technical field of tracking control, wherein the device comprises a disturbance tilting mirror, a control tilting mirror, a target, an image sensor and a parallel filtering frequency identification module based on FPGA; when the device operates, laser emitted by a target is reflected to a control tilting mirror through a disturbance tilting mirror, the control tilting mirror is reflected to an image sensor, the image sensor provides a visual axis error, a parallel filtering frequency identification module based on an FPGA (field programmable gate array) is used for completing identification of time-varying multi-frequency narrow-band disturbance of the visual axis error, a control algorithm of a control system comprising an error observer is used for calculating deflection quantity of the control tilting mirror, deflection of the control tilting mirror is driven based on the deflection quantity so that a light beam is kept at a target position of an optical axis, and the disturbance tilting mirror is used for simulating the time-varying multi-frequency narrow-band disturbance from an optical link. The invention realizes rapid and accurate capturing of disturbance characteristics under the condition of time-varying multi-frequency narrow-band disturbance.

Description

Disturbance suppression device and method based on FPGA frequency rapid identification
Technical Field
The invention belongs to the technical field of tracking control, and particularly relates to a disturbance suppression device and method based on FPGA frequency rapid identification.
Background
FPGAs (field programmable gate arrays) allow users to configure hardware circuits according to specific requirements to achieve customized logic functions, and are therefore widely used in applications requiring highly parallel processing, high-speed data flow, and low latency. Most of the self-adaptive algorithms in the optical axis correction system need a large amount of computation, and the real-time performance of the system is difficult to ensure by adopting the traditional DSP hardware scheme.
The conventional adaptive disturbance suppression method such as LMS (least mean square method), RMS (recursive least square method), the adaptive trap method and the like capture disturbance characteristics through iteration, and achieve adaptive disturbance suppression. However, these methods capture the disturbance characteristics (e.g., the disturbance frequency) in an iterative manner, have long iteration times, and mostly require additional sensors to measure the disturbance. Meanwhile, the optical axis correction system has high requirements on instantaneity, and the algorithms have high complexity and large calculation amount, so that the instantaneity of the digital system is difficult to maintain. In addition, most control methods focus on the disturbance suppression effect within the closed-loop bandwidth and cannot effectively suppress the disturbance outside the bandwidth due to the delay limitation of the optical axis correction system.
Disclosure of Invention
In order to solve the technical problems, the invention adopts the following technical scheme:
A disturbance suppression device based on FPGA frequency quick identification comprises a disturbance tilting mirror, a control tilting mirror, a target, an image sensor and a parallel filtering frequency identification module based on FPGA;
when the disturbance suppression device based on FPGA frequency fast identification operates, laser emitted by a target is reflected to a control inclined mirror through the disturbance inclined mirror, then reflected to an image sensor through the control inclined mirror, the image sensor provides a visual axis error, the FPGA-based parallel filtering frequency identification module completes identification of time-varying multi-frequency narrow-band disturbance of the visual axis error, a control algorithm of a control system comprising an error observer calculates deflection quantity of the control inclined mirror, and the deflection of the control inclined mirror is driven based on the deflection quantity so that a light beam is kept at a target position of an optical axis, and meanwhile, the disturbance inclined mirror is used for simulating the time-varying multi-frequency narrow-band disturbance in an optical link.
A disturbance suppression method based on FPGA frequency quick identification is used for the disturbance suppression device based on FPGA frequency quick identification, and comprises the following steps:
Step 1, a disturbance suppression device based on FPGA frequency quick identification obtains a visual axis error sampling digital signal containing time-varying multi-frequency narrow-band disturbance through an image sensor;
step 2, processing the visual axis error sampling digital signal by using a parallel filtering algorithm realized by a parallel filtering frequency identification module based on the FPGA to obtain a preliminary estimation result of the time-varying multi-frequency narrow-band disturbance frequency;
Step 3, a parallel filtering algorithm is applied to process the preliminary estimation result of the time-varying multi-frequency narrow-band disturbance frequency obtained in the step 2, and a frequency storage array is constructed to obtain the final estimated frequency;
And 4, designing an error observer on the basis of PI control, and inhibiting time-varying multi-frequency narrow-band disturbance according to the final estimated frequency through delay compensation and multi-rate control.
The invention has the following beneficial effects:
according to the invention, a parallel filtering frequency identification method and an error observer control scheme based on the FPGA are adopted, so that time-varying multi-frequency disturbance is effectively restrained, the self-adaptive parameter generation efficiency is improved, the multi-frequency peak identification effect is good, and the time-varying multi-frequency narrow-band disturbance restraining effect is obvious.
(1) The invention realizes rapid and accurate capturing of disturbance characteristics under the condition of time-varying multi-frequency narrow-band disturbance by recognizing signal frequencies through the parallel band-pass filters.
(2) The invention carries out frequency identification on the video axis error, realizes the suppression of time-varying multi-frequency narrow-band disturbance from the base and the optical link, and avoids the use of an additional sensor.
(3) The invention adopts the FPGA to realize parallel filtering, ensures the instantaneity of the optical axis correction system and increases the applicable scenes.
(4) The invention adopts an error observer, realizes full-band peak disturbance suppression through delay compensation and multi-rate control, and effectively improves the suppression capability of the optical axis correction system on the disturbance outside the bandwidth.
Drawings
FIG. 1 is a block diagram of a disturbance suppression device based on FPGA frequency quick identification of the present invention;
FIG. 2 is a schematic diagram of a parallel filtering algorithm of the present invention;
FIG. 3 is a schematic diagram of an error observer of the present invention;
Fig. 4 is a comparison chart of the disturbance suppression effect of the time-varying multi-frequency narrow-band before and after the disturbance suppression method based on the rapid identification of the FPGA frequency, which is applied to the conventional PI feedback control, wherein (a) is a time domain chart of the disturbance suppression effect of the time-varying multi-frequency narrow-band under the conventional PI feedback control, and (b) is a time domain chart of the disturbance suppression effect of the time-varying multi-frequency narrow-band under the disturbance suppression method based on the rapid identification of the FPGA frequency.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention. In addition, the technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
As shown in fig. 1, the invention provides a disturbance suppression device (or optical axis correction system or device) based on rapid frequency identification of an FPGA, which consists of a disturbance tilting mirror, a control tilting mirror (fast reflection mirror), a target (the invention is simulated by a laser), an image sensor, a parallel filtering frequency identification module based on the FPGA (field programmable gate array), and the like.
When the device operates, laser emitted by the laser is reflected to the control tilting mirror through the disturbance tilting mirror, then reflected to the image sensor through the control tilting mirror, the image sensor provides visual axis errors, the parallel filtering frequency identification module based on the FPGA is used for completing identification of time-varying multi-frequency narrow-band disturbance of the visual axis errors (the difference value between the actual position and the target position of the light beam, measured by the image sensor), the deflection quantity of the control tilting mirror is calculated by a control algorithm of a control system comprising an error observer and is used as the control quantity for controlling the deflection of the tilting mirror, the deflection of the control tilting mirror is driven based on the deflection quantity, so that the light beam is always kept at the target position of the optical axis, and meanwhile, the time-varying multi-frequency narrow-band disturbance from the optical link is simulated by using the disturbance tilting mirror. The control system comprises a parallel filtering frequency identification module based on an FPGA and an error observer.
The invention further provides a disturbance suppression method based on FPGA frequency quick identification, which is used for the disturbance suppression device based on FPGA frequency quick identification, and comprises the following implementation steps:
Step 1, a disturbance suppression device based on FPGA frequency rapid identification obtains a visual axis error sampling digital signal containing time-varying multi-frequency narrow-band disturbance through an image sensor.
And step 2, processing the visual axis error sampling digital signal by using a parallel filtering algorithm realized by a parallel filtering frequency identification module based on the FPGA to obtain a preliminary estimation result of the time-varying multi-frequency narrow-band disturbance frequency.
The parallel filtering algorithm comprises the steps of enabling the visual axis error sampling digital signals obtained in the step 1 to pass through a plurality of parallel band-pass filters, enabling the plurality of parallel band-pass filters to be uniformly distributed in a frequency band to be identified according to central frequency, enabling output signals of the plurality of parallel band-pass filters to reflect frequency components of the visual axis error sampling digital signals, taking absolute values of the output signals of the plurality of parallel band-pass filters, adjusting time-varying multi-frequency narrow-band disturbance peak identification threshold values of the band-pass filters according to disturbance received by an optical path and a time-varying multi-frequency narrow-band disturbance suppression effect of a disturbance suppression device based on FPGA frequency fast identification, and extracting poles (corresponding to the central frequency of the band-pass filters) exceeding the time-varying multi-frequency narrow-band disturbance peak identification threshold values as preliminary estimation results of time-varying multi-frequency narrow-band disturbance frequencies.
And step 3, processing the preliminary estimation result of the time-varying multi-frequency narrow-band disturbance frequency obtained in the step 2 by using a parallel filtering algorithm, constructing a frequency storage array, and obtaining the final estimated frequency.
The average pole number in window time (generally more than 2 seconds) is taken as the estimation of the frequency number of the time-varying multi-frequency narrow-band disturbance, the pole identified by each sampling point in future window time is judged, when the pole number is equal to the estimated time-varying multi-frequency narrow-band disturbance frequency number, the time-varying multi-frequency narrow-band disturbance frequencies are arranged into a frequency storage array according to the order from small to large, the most frequent frequency of each column in the array is taken as the final estimation frequency in each window time.
And 4, designing an error observer on the basis of PI (proportional integral) control, and inhibiting time-varying multi-frequency narrow-band disturbance according to the final estimated frequency through delay compensation and multi-rate control.
As shown in fig. 2, a schematic diagram of the parallel filtering algorithm in step 2 is presented, wherein:
;
signal to be identified (visual axis error sampling digital signal) Simultaneously through a plurality of parallel band-pass filters distributed in the full frequency bandThe output of the parallel bandpass filter isAmplitude absolute value of output of parallel band-pass filterThe distribution condition of the visual axis error sampling digital signal in the frequency domain is reflected, and the preliminary estimation result of the pole which is the time-varying multi-frequency narrow-band disturbance frequency and is larger than the time-varying multi-frequency narrow-band disturbance peak value identification threshold value is obtained for the output absolute value on the basis. Wherein, the Represent the firstBand-pass filters having values of 1 to 1Is a whole number of (a) and (b),Is the total number of band pass filters; As a function of the transfer of the wave trap, As a variable of the discrete domain,As a parameter of the wave trap,The center frequencies of the band pass filters connected in parallel. As can be seen from FIG. 2 (where the ordinate of the graph is absolute amplitude and the abscissa is frequency in Hertz), the absolute value of the bandpass filter output isThe distribution condition of signals in the frequency domain can be reflected according to the arrangement of the central frequencies of the corresponding filters, a frequency storage array is constructed, the average pole number in window time is calculated to be used as the estimation of the number of the time-varying multi-frequency narrow-band disturbance frequencies, the pole identified by each sampling point in a future window time is judged, the time-varying multi-frequency narrow-band disturbance frequencies are arranged into a frequency storage array according to the order from small to large and are stored into a row vector, and the most frequent frequency of each column in the array is used as the final estimation frequency in each window time.
As shown in fig. 3, a schematic diagram of the error observer in step 4, wherein,For the optical axis target position,In order for the visual axis error to be a function of,Is a basic PI controller that is configured to control the operation of the device,Is the actual delay of the optical axis correction system,To control a tilting mirror (quick reflection mirror) system model (a system model obtained after identifying a system for controlling a tilting mirror),For a time-varying multi-frequency narrowband disturbance signal,For the actual position of the optical axis, the thin solid line uses a low sampling rateThe thick solid line uses a high update rate,,Is a positive integer greater than 1; the input to and output from the filter is at a high sampling rate, Is an estimate of the delay of the optical axis correction system,Is a model for controlling a tilting mirror (quick reflecting mirror) systemDeriving a sensitivity transfer function of a control system including an error observerThe method comprises the following steps:
;
wherein, the Is a filter used in the error observer.
Analysis shows that the error suppression effect of the disturbance suppression method based on the rapid identification of the FPGA frequency mainly depends onWill beDesigned to notch it to achieve disturbance rejection;
filter (multiple band pass filters) And corresponding delay linksParallel connection structureA filter, wherein,The number of the filter is 1 toIs a positive integer of (a) and (b),Total number of filters) is designed to:
;
;
is an intermediate quantity, without physical meaning;
In the time-course of which the first and second contact surfaces, The filter is designed as a bandpass filter with a negative sign,;In the time-course of which the first and second contact surfaces,The filters being designed as bandpass filters with negative signs,;Is a band-pass filterNumbering with a value of 1 toFor distinguishing between bandpass filters; The total number of the band-pass filters is consistent with the number of the time-varying multi-frequency narrow-band disturbance frequencies estimated by the parallel filtering frequency identification module based on the FPGA; Estimating delay for optical axis correction system The frame of the frame is a frame of a frame,Is thatIs used for the delay compensation frame number of the (a),Representing pairs in a control system having an error observerThe delay compensation frame number of (2) is(Take a value of 1 toPositive integer of (a) (as shown in fig. 3, wherein the right side is a parallel filter); in order to sample the period of time, Is a band-pass filterIs set at the center frequency of (a),Is an imaginary symbol; Is a band-pass filter which is used for the filtering, In the form of a band-pass filter S domain; Affecting the bandwidth of the band-pass filter, Is the depth of the notch(s),Is a variable in the s-domain,Is thatThe center frequency of the bandpass,Is a natural number (without physical meaning).
It can be seen that only at the multi-frequency narrowband disturbance frequencyThe multi-frequency narrow-band disturbance suppression can be realized for the notch characteristic, and the identification result of the parallel filtering frequency identification module based on the FPGA is combined for real-time adjustmentThe suppression of time-varying multi-frequency narrow-band disturbance can be realized.
In order to show the effect of improving the disturbance suppression capacity of the FPGA-based rapid frequency identification disturbance suppression method in time-varying multi-frequency narrow-band disturbance suppression, a corresponding controller is designed, and a position tracking experiment is carried out. As shown in fig. 4 (the abscissa is time, the ordinate is amplitude; the lines of PI and YK in fig. 4 are waveform lines, because there are about two hundred sampling points per second, which means about two hundred fold lines per second, so that single lines are not visually seen and overlap together to form a color block; in addition, fig. 4 mainly shows the maximum amplitude of the signal, the maximum amplitude of the signal in fig. 4 (a) is greater than the maximum amplitude of the signal in fig. 4 (b), which indicates that the disturbance signal is suppressed), and fig. 4 is a comparison diagram of the effects of the disturbance suppression on time-varying multi-frequency narrow-band disturbance before and after the conventional PI feedback control and the rapid identification method based on FPGA frequency of the present invention are applied. Fig. 4 (a) is a time domain diagram of a time-varying multi-frequency narrow-band disturbance suppression effect by using a conventional PI feedback control, and fig. 4 (b) is a time domain diagram of a disturbance suppression effect on a time-varying multi-frequency narrow-band disturbance by using the disturbance suppression method based on FPGA frequency fast identification. The PI (proportional integral) line in fig. 4 (a) is a time domain diagram of the conventional PI feedback control time-varying multi-frequency narrow-band disturbance suppression effect, and the YK (short for error observer) line in fig. 4 (b) is a time-varying multi-frequency narrow-band disturbance suppression effect diagram after the disturbance suppression method based on FPGA frequency fast identification of the present invention is applied. As can be seen from FIG. 4, because the time-varying multi-frequency narrow-band disturbance is distributed in the full frequency band, when the method of the invention is not applied, the closed-loop error of the optical axis correction system is large, and the stable image tracking is difficult to realize.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
What is not described in detail in the present specification belongs to the prior art known to those skilled in the art.

Claims (10)

1.一种基于FPGA频率快速辨识的扰动抑制装置，其特征在于，包括：扰动倾斜镜、控制倾斜镜、目标、图像传感器、基于FPGA的并行滤波频率辨识模块；1. A disturbance suppression device based on FPGA fast frequency identification, characterized by comprising: a disturbance tilt mirror, a control tilt mirror, a target, an image sensor, and an FPGA-based parallel filtering frequency identification module; 所述基于FPGA频率快速辨识的扰动抑制装置运行时，目标发射的激光经由扰动倾斜镜反射至控制倾斜镜，再由控制倾斜镜反射至图像传感器，图像传感器提供视轴误差，由基于FPGA的并行滤波频率辨识模块完成对视轴误差的时变多频窄带扰动的识别，再由含有误差观测器的控制系统的控制算法计算控制倾斜镜的偏转量，通过基于该偏转量驱动控制倾斜镜的偏转使得光束保持在光轴目标位置；同时，使用扰动倾斜镜模拟来自光链路中的时变多频窄带扰动。When the disturbance suppression device based on FPGA fast frequency identification is in operation, the laser emitted by the target is reflected by the disturbance tilt mirror to the control tilt mirror, and then reflected by the control tilt mirror to the image sensor. The image sensor provides the line of sight error. The FPGA-based parallel filtering frequency identification module completes the identification of the time-varying multi-frequency narrowband disturbance of the line of sight error. The control algorithm of the control system containing the error observer calculates the deflection amount of the control tilt mirror. The deflection of the control tilt mirror is driven based on the deflection amount so that the light beam is maintained at the target position of the optical axis. At the same time, the disturbance tilt mirror is used to simulate the time-varying multi-frequency narrowband disturbance from the optical link. 2.根据权利要求1所述的基于FPGA频率快速辨识的扰动抑制装置，其特征在于，所述控制倾斜镜为快反镜。2 . The disturbance suppression device based on FPGA fast frequency identification according to claim 1 , wherein the control tilt mirror is a fast reflection mirror. 3.根据权利要求1或2所述的基于FPGA频率快速辨识的扰动抑制装置，其特征在于，所述控制系统包括基于FPGA的并行滤波频率辨识模块和误差观测器。3. The disturbance suppression device based on FPGA fast frequency identification according to claim 1 or 2, characterized in that the control system includes an FPGA-based parallel filtering frequency identification module and an error observer. 4.一种基于FPGA频率快速辨识的扰动抑制方法，用于如权利要求1至3中任一项所述的基于FPGA频率快速辨识的扰动抑制装置，其特征在于，包括：4. A disturbance suppression method based on FPGA fast frequency identification, used in the disturbance suppression device based on FPGA fast frequency identification according to any one of claims 1 to 3, characterized in that it comprises: 步骤1，基于FPGA频率快速辨识的扰动抑制装置通过图像传感器获得包含时变多频窄带扰动的视轴误差采样数字信号；Step 1: The disturbance suppression device based on FPGA frequency rapid identification obtains a line of sight error sampling digital signal containing time-varying multi-frequency narrowband disturbance through an image sensor; 步骤2，使用基于FPGA的并行滤波频率辨识模块实现的并联滤波算法处理视轴误差采样数字信号，得到时变多频窄带扰动频率的初步估计结果；Step 2: Use the parallel filtering algorithm implemented by the FPGA-based parallel filtering frequency identification module to process the boresight error sampled digital signal to obtain a preliminary estimate of the time-varying multi-frequency narrowband disturbance frequency; 步骤3，应用并联滤波算法处理步骤2获得的时变多频窄带扰动频率的初步估计结果，构造频率存储数组，获得最终估计频率；Step 3, applying a parallel filtering algorithm to process the preliminary estimation result of the time-varying multi-frequency narrowband disturbance frequency obtained in step 2, constructing a frequency storage array, and obtaining the final estimated frequency; 步骤4，在PI控制的基础上，设计误差观测器，通过时延补偿和多速率控制，根据最终估计频率对时变多频窄带扰动进行抑制。Step 4: Based on PI control, an error observer is designed to suppress the time-varying multi-frequency narrowband disturbance according to the final estimated frequency through delay compensation and multi-rate control. 5.根据权利要求4所述的基于FPGA频率快速辨识的扰动抑制方法，其特征在于，步骤2中，并联滤波算法包括将步骤1获得的视轴误差采样数字信号通过多个并行的带通滤波器，多个并行的带通滤波器按中心频率均匀分布在待识别频段；对多个并行的带通滤波器的输出信号取绝对值，根据光路受到的扰动和基于FPGA频率快速辨识的扰动抑制装置的时变多频窄带扰动抑制效果调整带通滤波器的时变多频窄带扰动峰值识别阈值，提取超过时变多频窄带扰动峰值识别阈值的极点作为时变多频窄带扰动频率的初步估计结果。5. The disturbance suppression method based on FPGA frequency rapid identification according to claim 4 is characterized in that in step 2, the parallel filtering algorithm includes passing the line of sight error sampled digital signal obtained in step 1 through multiple parallel bandpass filters, and the multiple parallel bandpass filters are evenly distributed in the frequency band to be identified according to the center frequency; taking the absolute value of the output signals of the multiple parallel bandpass filters, adjusting the time-varying multi-frequency narrowband disturbance peak recognition threshold of the bandpass filter according to the disturbance suffered by the optical path and the time-varying multi-frequency narrowband disturbance suppression effect of the disturbance suppression device based on FPGA frequency rapid identification, and extracting the pole exceeding the time-varying multi-frequency narrowband disturbance peak recognition threshold as the preliminary estimation result of the time-varying multi-frequency narrowband disturbance frequency. 6.根据权利要求5所述的基于FPGA频率快速辨识的扰动抑制方法，其特征在于，步骤2中，并联滤波算法使用的滤波器的表达式如下：6. The disturbance suppression method based on FPGA frequency rapid identification according to claim 5, characterized in that in step 2, the filter expression used in the parallel filtering algorithm is as follows: 待识别的视轴误差采样数字信号同时通过多个分布在全频段的并行的带通滤波器，并行的带通滤波器的输出的绝对值大于时变多频窄带扰动峰值识别阈值的极点为 时变多频窄带扰动频率的初步估计结果； The sampling digital signal of the boresight error to be identified Simultaneously passes through multiple parallel bandpass filters distributed across the entire frequency band The point where the absolute value of the output of the parallel band-pass filter is greater than the time-varying multi-frequency narrow-band disturbance peak recognition threshold is the preliminary estimation result of the time-varying multi-frequency narrow-band disturbance frequency; 其中，表示第个带通滤波器，取值为1至的整数，为带通滤波器的总数；为陷 波器传递函数，为离散域变量，为陷波器参数，为并联的带通滤波器各自的中心频率。 in, Indicates the A bandpass filter with a value between 1 and integer, is the total number of bandpass filters; is the notch filter transfer function, is a discrete domain variable, is the notch filter parameter, are the center frequencies of the parallel bandpass filters. 7.根据权利要求6所述的基于FPGA频率快速辨识的扰动抑制方法，其特征在于，步骤3中，求窗口时间内的平均极点个数作为对时变多频窄带扰动频率个数的估计，在未来一段窗口时间内对每个采样点识别的极点判定。7. The disturbance suppression method based on FPGA frequency rapid identification according to claim 6 is characterized in that in step 3, the average number of poles within the window time is calculated as an estimate of the number of frequencies of the time-varying multi-frequency narrowband disturbance, and the poles identified at each sampling point are determined within a future window time. 8.根据权利要求7所述的基于FPGA频率快速辨识的扰动抑制方法，其特征在于，步骤3中，对每个采样点识别的极点判定包括：当极点数等于估计的时变多频窄带扰动频率个数时，将时变多频窄带扰动频率按由小到大的顺序排列成行向量储存进频率存储数组，每段窗口时间将出现在数组中每一列最频繁的频率作为最终估计频率。8. The disturbance suppression method based on FPGA frequency rapid identification according to claim 7 is characterized in that in step 3, the pole determination for each sampling point identification includes: when the number of poles is equal to the estimated number of time-varying multi-frequency narrowband disturbance frequencies, the time-varying multi-frequency narrowband disturbance frequencies are arranged in ascending order as row vectors and stored in a frequency storage array, and the frequency that appears most frequently in each column of the array in each window time is used as the final estimated frequency. 9.根据权利要求7或8所述的基于FPGA频率快速辨识的扰动抑制方法，其特征在于，所述窗口时间设置为2秒以上。9 . The disturbance suppression method based on FPGA frequency rapid identification according to claim 7 or 8 , wherein the window time is set to be more than 2 seconds. 10.根据权利要求9所述的基于FPGA频率快速辨识的扰动抑制方法，其特征在于，步骤4 中，含有误差观测器的控制系统的灵敏度传递函数为： 10. The disturbance suppression method based on FPGA frequency rapid identification according to claim 9, characterized in that in step 4, the sensitivity transfer function of the control system containing the error observer is for: 其中，是对光轴校正系统延时的估计，为含有误差观测器的控制系统中使用的 滤波器，是基本PI控制器，为控制倾斜镜系统模型，是光轴校正系统实际延 时；滤波器的输入输出为高采样速率，是控制倾斜镜系统模型的逆的估 计。 in, is an estimate of the time delay of the optical axis correction system, is the filter used in the control system with error observer, is a basic PI controller, To control the tilt mirror system model, is the actual delay of the optical axis correction system; The input and output of the filter are at high sampling rates. is the control tilt mirror system model An estimate of the inverse of .
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