CN120321140A - High-speed signal integrity testing method, device, equipment and storage medium - Google Patents
High-speed signal integrity testing method, device, equipment and storage mediumInfo
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- CN120321140A CN120321140A CN202510408935.1A CN202510408935A CN120321140A CN 120321140 A CN120321140 A CN 120321140A CN 202510408935 A CN202510408935 A CN 202510408935A CN 120321140 A CN120321140 A CN 120321140A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/02—Capturing of monitoring data
- H04L43/022—Capturing of monitoring data by sampling
- H04L43/024—Capturing of monitoring data by sampling by adaptive sampling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/06—Management of faults, events, alarms or notifications
- H04L41/0677—Localisation of faults
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0823—Errors, e.g. transmission errors
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/50—Testing arrangements
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- Environmental & Geological Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
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Abstract
本发明提供的高速信号完整性的测试方法、装置、设备及存储介质，通过采集待测试信号；对所述待测试信号进行双路径信号处理，得到主信号和噪声频谱特征；将所述主信号和所述噪声频谱特征与预设的缺陷数据库进行匹配，得到所述待测试信号的故障信息。本发明采用双路径信号处理，精确提取噪声频谱特征，有助于对噪声的定量分析和定位，为故障诊断提供多维度数据支撑。并且，利用预设的缺陷数据库，将处理后的主信号与噪声频谱特征进行匹配，自动确定故障类型和缺陷位置，实现故障信息的快速诊断和准确定位。
The high-speed signal integrity testing method, device, equipment and storage medium provided by the present invention collect the signal to be tested; perform dual-path signal processing on the signal to be tested to obtain the main signal and noise spectrum characteristics; match the main signal and the noise spectrum characteristics with a preset defect database to obtain the fault information of the signal to be tested. The present invention adopts dual-path signal processing to accurately extract the noise spectrum characteristics, which is helpful for quantitative analysis and positioning of noise and provides multi-dimensional data support for fault diagnosis. In addition, using the preset defect database, the processed main signal is matched with the noise spectrum characteristics to automatically determine the fault type and defect location, thereby realizing rapid diagnosis and accurate positioning of fault information.
Description
Technical Field
The present invention relates to the field of signal fault testing technologies, and in particular, to a method, an apparatus, a device, and a storage medium for testing high-speed signal integrity.
Background
The high-speed signal integrity test technology is mainly applied to the fields of 5G communication, vehicle-mounted electronics, consumer electronics and the like, and has the core aims to ensure that high-speed digital signals are not distorted and crosstalk-free in the transmission process, and meet key index requirements of eye patterns, jitter, rise time and the like. In the prior art, common test methods include conventional instrumental test methods, time Domain Reflectometry (TDR), frequency domain average noise reduction methods, and methods for signal prediction using machine learning.
However, conventional test systems typically employ a fixed sampling rate, and when testing high frequency signals (e.g., exceeding 20 GHz), signal distortion is easily caused due to aliasing effects, and expensive hardware filters must be relied upon for anti-aliasing processing. In addition, the crosstalk, reflection and thermal noise in the signals cannot be effectively distinguished by the fixed sampling and simple noise reduction method, so that faults cannot be accurately positioned and diagnosed, the testing period is long, and the misjudgment risk is high. Moreover, most of the prior art relies on complex instrumentation and manual operations, and the ability to compensate, calibrate and automate diagnostics in real time is inadequate, resulting in the difficulty of achieving rapid and accurate fault detection in high speed signal environments.
In view of the above, there is a need to solve the problems in the prior art.
Disclosure of Invention
The invention provides a method, a device, equipment and a storage medium for testing high-speed signal integrity, which are used for solving the defects in the prior art and realizing accurate positioning and classification of signal faults.
The invention provides a method for testing the integrity of a high-speed signal, which comprises the following steps:
collecting a signal to be tested;
performing dual-path signal processing on the signal to be tested to obtain main signals and noise spectrum characteristics;
And matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
According to the method for testing the integrity of the high-speed signal provided by the invention, the step of collecting the signal to be tested comprises the following steps:
when the signal frequency of the signal to be tested is smaller than a first preset frequency, acquiring the signal to be tested at a first sampling rate;
When the signal frequency of the signal to be tested is larger than the first preset frequency and smaller than the second preset frequency, acquiring the signal to be tested at a second sampling rate;
when the signal frequency of the signal to be tested is larger than a second preset frequency, acquiring the signal to be tested at a third sampling rate;
wherein the first preset frequency is smaller than the second preset frequency.
According to the method for testing the integrity of the high-speed signal, after the step of collecting the signal to be tested, the method further comprises the following steps:
analyzing the signal to be tested, and determining an error area;
Determining an interpolation algorithm according to a preset precision requirement;
And carrying out interpolation reconstruction on the error region according to the interpolation algorithm.
According to the method for testing the high-speed signal integrity, the dual-path signal processing comprises main signal path processing and noise extraction path processing.
According to the method for testing the integrity of the high-speed signal provided by the invention, the step of performing dual-path signal processing on the signal to be tested to obtain the main signal and the noise spectrum characteristic comprises the following steps:
Performing the main signal path processing and the noise extraction path processing on the signal to be tested;
the main signal path processing includes:
Eliminating baseline drift of the signal to be tested through an FIR filter to obtain the main signal;
the noise extraction path processing includes:
performing wavelet transformation on the signal to be tested according to the number of decomposition layers to obtain sub-signals under different scales, wherein the number of decomposition layers is determined according to the broadband of the signal to be tested;
When the noise power of the sub-signal is larger than a preset noise threshold, noise exists in the sub-signal with the decomposition layer number;
separating the sub-signals with noise to obtain a first noise signal;
Performing delay difference detection on the signal to be tested to obtain a second noise signal;
and carrying out spectrum analysis on the first noise signal and the second noise signal to obtain noise spectrum characteristics.
According to the method for testing the high-speed signal integrity provided by the invention, before the step of matching the main signal and the noise spectrum characteristics with a preset defect database to obtain the fault information of the signal to be tested, the method further comprises the following steps:
and when the signal jitter of the main signal exceeds a preset jitter threshold value, performing jitter compensation on the main signal.
According to the method for testing the high-speed signal integrity provided by the invention, after the step of matching the main signal and the noise spectrum characteristics with a preset defect database to obtain the fault information of the signal to be tested, the method further comprises the following steps:
And generating a visual report according to the fault information of the signal to be tested, wherein the fault information comprises the fault type and the defect position coordinates of the signal to be tested.
The invention also provides a device for testing the integrity of the high-speed signal, which comprises:
The signal acquisition module is used for acquiring signals to be tested;
the signal processing module is used for carrying out dual-path signal processing on the signal to be tested to obtain a main signal and noise spectrum characteristics;
and the fault diagnosis module is used for matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
The invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing a method for testing the integrity of a high-speed signal as described above when executing the program.
The present invention also provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method of testing high speed signal integrity as described in any of the above.
The invention also provides a computer program product comprising a computer program which when executed by a processor implements a method of testing high speed signal integrity as described in any of the above.
The method, the device, the equipment and the storage medium for testing the integrity of the high-speed signal are characterized by acquiring the signal to be tested, performing dual-path signal processing on the signal to be tested to obtain main signals and noise spectrum characteristics, and matching the main signals and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested. The invention adopts dual-path signal processing to accurately extract the noise spectrum characteristics, is beneficial to quantitative analysis and positioning of noise, and provides multidimensional data support for fault diagnosis. And the processed main signal is matched with the noise spectrum characteristics by utilizing a preset defect database, so that the fault type and the defect position are automatically determined, and the rapid diagnosis and the accurate positioning of the fault information are realized.
Drawings
In order to more clearly illustrate the invention or the technical solutions of the prior art, the following description will briefly explain the drawings used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are some embodiments of the invention, and other drawings can be obtained according to the drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for testing high-speed signal integrity provided by the present invention;
FIG. 2 is a schematic diagram of a high-speed signal integrity testing apparatus provided by the present invention;
Fig. 3 is a schematic structural diagram of an electronic device provided by the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
In order to solve the problems in the prior art, the invention provides a high-speed signal integrity testing method for accurately positioning and classifying signal faults. The method for testing the integrity of the high-speed signal is described below, as shown in FIG. 1, and includes, but is not limited to, the following steps:
Step 110, collecting a signal to be tested.
In this embodiment, a signal to be tested is first input from a signal source to a signal acquisition module. The module adopts a dynamic sampling rate selection strategy to automatically select the sampling rate according to the frequency characteristic of the signal.
To ensure the quality and integrity of the acquired signal, the acquisition module also includes hardware impedance matching (e.g., to ensure 50 Ω±2% matching) and dynamic amplitude attenuation means (to support ±3dB dynamic adjustment) for avoiding signal overload and reducing external interference. Before entering the next processing stage, the acquired signals are subjected to baseline correction and amplitude normalization by a preprocessing module, so that the characteristics of the signals can be accurately reflected by subsequent data processing.
And 120, performing dual-path signal processing on the signal to be tested to obtain main signal and noise spectrum characteristics.
After the preprocessed signals are collected, the signals are further analyzed by adopting a dual-path signal processing scheme, and the method is specifically divided into main signal path processing and noise extraction path processing.
The main signal path processing filters the preprocessed signals by using an FIR filter, eliminates baseline drift caused by environment and device characteristics, and obtains a main signal capable of truly reflecting signal transmission characteristics. The filtered main signal is used to evaluate signal integrity, such as calculating key metrics such as eye pattern parameters, jitter, etc.
The noise extraction path processing decomposes the preprocessed signal by wavelet transformation, and the decomposition layer number is determined according to the broadband characteristics of the signal (typically 3 to 5 layers) so as to obtain sub-signals under different scales. For each decomposition layer, whether noise exists in the layer sub-signal is judged according to a preset noise threshold (for example, the noise power is larger than-40 dBm). Further separation is performed for the decomposed layer for which it is determined that noise is present, and at the same time, reflected noise information is determined by a delay difference detection (for example, a delay difference exceeding 10 ps). And carrying out spectrum analysis on the separated noise signals to generate a noise spectrogram. The noise spectrogram shows the energy distribution of the noise in each frequency band in detail and is used as auxiliary data for subsequent fault diagnosis. After the dual-path processing, the system obtains a main signal representing the signal integrity index and a noise spectrogram describing the noise distribution characteristics, and the two types of data provide sufficient basis for subsequent fault information matching.
And 130, matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
After obtaining the primary signal and noise spectral features, the fault diagnosis module matches the two sets of data with a pre-established defect database. The defect database stores various signal characteristic data of typical faults, including but not limited to fault modes such as abrupt impedance, open circuit, short circuit and the like, and the waveform characteristics and the noise characteristics of the fault are preset.
The matching process comprises the following steps:
and comparing the processed main signal and noise spectrum characteristics with each defect mode in the database by using a preset matching algorithm, and primarily judging the main signal and noise spectrum characteristics as corresponding fault types when the waveform similarity exceeds a preset threshold (for example, 90%).
After the matching is successful, the system further determines the position coordinates of the fault, and the positioning error can be controlled within 1mm in a PCB wiring scene.
If the signal jitter of the main signal exceeds the preset threshold value, automatically starting a jitter compensation module to perform real-time compensation so as to ensure the accuracy of the matched data.
Finally, the fault diagnosis module generates fault information containing fault types and defect position coordinates, and meanwhile, the system supports outputting test results in a visual report (for example, PDF or CSV format) so as to facilitate the fault analysis and subsequent processing of field technicians.
The invention provides a method for realizing high-speed signal integrity test by collecting signals to be tested, performing dual-path signal processing (obtaining main signals and noise spectrum characteristics) and matching processing results with a defect database. The method utilizes various technical means such as dynamic sampling, preprocessing, F I R filtering, noise extraction based on wavelet transformation, time delay detection, spectrum analysis and the like, comprehensively improves the testing precision, fault positioning accuracy and system automation level, and effectively solves the problems of aliasing, low noise processing efficiency and the like caused by fixed sampling rate in the prior art.
As an optional embodiment, the step of collecting the signal to be tested specifically includes:
when the signal frequency of the signal to be tested is smaller than a first preset frequency, acquiring the signal to be tested at a first sampling rate;
When the signal frequency of the signal to be tested is larger than the first preset frequency and smaller than the second preset frequency, acquiring the signal to be tested at a second sampling rate;
when the signal frequency of the signal to be tested is larger than a second preset frequency, acquiring the signal to be tested at a third sampling rate;
wherein the first preset frequency is smaller than the second preset frequency.
In this embodiment, the step of collecting the signal to be tested includes dynamically selecting a sampling rate according to the signal frequency, so as to fully satisfy the sampling requirements of the high-speed signal in different frequency bands. The specific implementation is as follows:
before the signal to be tested is collected, the signal is subjected to preliminary frequency analysis through a front-end detection module, and frequency information of the current signal to be tested is obtained. The frequency information is used as a basis for the selection of the subsequent sampling rate.
In the first case, when the detected signal frequency to be tested is lower than a preset first preset frequency, the system adopts a first sampling rate to collect.
At this time, the lower sampling rate can meet the sampling requirement due to lower signal frequency, and is helpful for reducing the system power consumption and the data processing pressure.
And in the second case, when the detected signal frequency is larger than the first preset frequency and smaller than the second preset frequency, the system adopts the second sampling rate to collect the signal.
In this frequency band, the signal frequency is relatively high, and the sampling rate needs to be properly increased to ensure accurate reconstruction of the signal and prevent aliasing.
And in the third case, when the detected signal frequency is greater than the second preset frequency, the system adopts a third sampling rate to collect.
For high-frequency signals, a high sampling rate is required to fully capture high-frequency components in the signals, so that the acquired data can be ensured to completely restore the original signal waveform.
In this embodiment, the first preset frequency is set as the demarcation point of the lower frequency band, and the second preset frequency is set as the demarcation point of the higher frequency band, and the first preset frequency is required to be smaller than the second preset frequency. According to different signal frequency intervals, the system automatically switches the corresponding sampling rate so as to achieve the optimal signal acquisition effect.
Illustratively, the sampling rate is increased to 20GS/s-200GS/s in the high frequency mode when the signal frequency is >10GHz, and the sampling rate is decreased to below 1GS/s in the low frequency mode when the signal frequency is <1GHz to save resources, and the sampling rate is >5 times the signal frequency when the signal frequency is <10 GHz.
By the dynamic sampling rate selection scheme, the system can automatically adjust the sampling rate according to the actual frequency of the signal to be tested, and the problems of aliasing and signal distortion possibly occurring in high-speed signal sampling are effectively solved. Meanwhile, the method can reduce unnecessary resource consumption and data processing complexity, and further improve the accuracy and efficiency of high-speed signal integrity test.
The step of collecting the signal to be tested in the embodiment realizes efficient collection of signals in different frequency bands by carrying out real-time detection and dynamic sampling rate selection on the signal frequency, and provides a high-quality data base for subsequent signal processing, noise extraction and fault diagnosis.
As an alternative embodiment, after the step of collecting the signal to be tested, the method further comprises:
analyzing the signal to be tested, and determining an error area;
Determining an interpolation algorithm according to a preset precision requirement;
And carrying out interpolation reconstruction on the error region according to the interpolation algorithm.
After the acquisition of the signal to be tested is completed, in order to further improve the accuracy and the reduction degree of the signal sampling data, the error analysis and the interpolation reconstruction steps of the signal are added after the acquisition step. The specific process is as follows:
After the signal to be tested is collected, the system firstly carries out comprehensive analysis on the collected data so as to identify a sampling error area caused by reasons such as insufficient sampling rate or aliasing effect. And quantitatively evaluating the difference between the sampled signal and the expected signal by adopting means of data statistics, time domain and frequency domain analysis and the like. And on the frequency domain, analyzing whether abnormal energy distribution or spectrum deletion exists in the signal spectrum by utilizing a Fourier transform or wavelet transform technology. According to the analysis result, the region with obvious distortion or aliasing is marked as an error region, and the start-stop position of the region in the signal and relevant error indexes are recorded, so that a basis is provided for subsequent reconstruction.
After defining the error region, the system determines a proper interpolation algorithm according to preset precision requirements and characteristics of the signal to be reconstructed. And setting parameters of reconstruction accuracy and interpolation algorithm according to system design requirements (for example, the target interpolation reconstruction accuracy is required to be less than or equal to 0.1 UI) and the bandwidth characteristics of the sampling signals. The system is internally provided with various interpolation algorithms, such as linear interpolation, spline interpolation, high-order polynomial interpolation and the like. For the case of stable signal variation and narrow error area, linear or spline interpolation can be adopted, and for the case of wide complex waveform or error area, a higher-order interpolation algorithm may be required to improve reconstruction accuracy. According to the signal characteristics detected in real time, the system can automatically select or switch the interpolation algorithm which is most suitable for the current error region characteristics, and the compensated data is ensured to be consistent with the original signal as much as possible. And carrying out data interpolation reconstruction on the identified error region according to the selected interpolation algorithm so as to compensate distortion caused by undersampling or aliasing.
According to the embodiment, the error region detection and interpolation reconstruction process is added after the step of collecting the signal to be tested, so that signal distortion caused by fixed sampling rate or aliasing effect is effectively compensated. The self-adaptive interpolation algorithm is utilized to ensure that the accuracy of interpolation reconstruction meets the design requirement of the system, thereby improving the data reduction degree and the diagnosis accuracy of the whole high-speed signal integrity test flow. The scheme not only reduces the risk caused by sampling errors, but also provides more accurate data support for subsequent signal processing and fault positioning.
As an alternative embodiment, the dual path signal processing includes a main signal path processing and a noise extraction path processing.
In this embodiment, in order to improve accuracy of the high-speed signal integrity test, the dual-path signal processing includes main signal path processing and noise extraction path processing, so as to extract and analyze main signal and noise information of the signal to be tested, respectively.
As an optional embodiment, the step of performing dual-path signal processing on the signal to be tested to obtain the main signal and the noise spectrum feature specifically includes:
Performing the main signal path processing and the noise extraction path processing on the signal to be tested;
the main signal path processing includes:
Eliminating baseline drift of the signal to be tested through an FIR filter to obtain the main signal;
the noise extraction path processing includes:
performing wavelet transformation on the signal to be tested according to the number of decomposition layers to obtain sub-signals under different scales, wherein the number of decomposition layers is determined according to the broadband of the signal to be tested;
When the noise power of the sub-signal is larger than a preset noise threshold, noise exists in the sub-signal with the decomposition layer number;
separating the sub-signals with noise to obtain a first noise signal;
Performing delay difference detection on the signal to be tested to obtain a second noise signal;
and carrying out spectrum analysis on the first noise signal and the second noise signal to obtain noise spectrum characteristics.
In this embodiment, after the signal to be tested is preprocessed, the system performs a dual-path processing on the signal, where the processing is divided into two complementary branches, main signal path processing and noise extraction path processing. The method comprises the following specific steps:
the overall flow of the dual-path processing is that the preprocessed signal to be tested is simultaneously sent into two processing paths, wherein the main signal path is used for acquiring high-quality signal data after baseline drift correction, and the noise extraction path is used for separating and extracting noise components from the signal to form noise spectrum characteristics.
The main signal path processing adopts an FIR filter to carry out filtering processing on the signal to be tested.
The FIR filter is designed to compensate for baseline drift in the signal caused by hardware bias, temperature drift, or other environmental factors, ensuring that the DC component and low frequency drift of the filtered signal are effectively eliminated.
After filtering, the output signal is the main signal, and the signal can accurately reflect the real waveform characteristics of the signal to be tested, so that the subsequent fault diagnosis and signal integrity analysis are facilitated.
The noise extraction path processing is to perform wavelet transformation processing on a signal to be tested, and decompose the signal into sub-signals with multiple scales (or decomposition layers). The number of decomposition layers is chosen based on the wideband characteristics of the signal to be tested, typically 3 to 5 layers are chosen to capture small variations in the signal over different frequency bands. The resulting sub-signals of each layer reflect the characteristics of the signal at different scales, respectively.
The noise power of each sub-signal obtained by each decomposition level is calculated. And judging whether the sub-signals of each decomposition layer contain noise components or not according to a preset noise threshold (for example, the noise power is larger than-40 dBm). When the noise power of a certain sub-signal exceeds a preset noise threshold, the sub-signal of the decomposition layer is considered to have noise, and is marked as a noise signal.
And for the sub-signals judged to contain noise, the noise part is stripped from the whole sub-signals through a corresponding signal separation algorithm to form a first noise signal. In the separation process, methods such as amplitude threshold, local statistical characteristics and the like can be adopted to ensure the accuracy of noise separation.
And performing delay difference detection on the signal to be tested to capture noise caused by reflection or multipath effect. In the detection process, signal delay information is acquired by using a high-precision clock, and when a delay difference exceeding a set threshold (such as 10 ps) exists in the detected signal, corresponding noise information is extracted to form a second noise signal.
The first noise signal and the second noise signal are subjected to spectral analysis separately or in combination. And obtaining the energy distribution of the noise signal in each frequency band by utilizing Fourier transformation or other frequency spectrum analysis methods, and generating a noise spectrogram. The noise spectrum characteristics intuitively reflect the distribution condition of noise components in the signal to be tested, and provide data basis for subsequent fault diagnosis and noise positioning.
After the main signal path processing and the noise extraction path processing, the system respectively obtains:
Primary signal, which is the signal after baseline drift elimination by fIR filtering, for measuring signal integrity (e.g. eye pattern, jitter, rise time, etc.);
Noise spectrum characteristics, namely noise energy distribution information obtained by noise separation and spectrum analysis, is used for assisting in judging noise types (such as crosstalk and reflection noise) and locating fault areas.
The dual-path processing flow realizes effective separation of signals and noise, so that when subsequent fault diagnosis and matching are carried out, the main signals can be utilized to reflect key characteristics of the signals, and the noise spectrogram can be utilized to provide auxiliary information for fault positioning, thereby comprehensively improving accuracy and reliability of high-speed signal integrity test.
As an optional embodiment, before the step of matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the signal to be tested, the method further includes:
and when the signal jitter of the main signal exceeds a preset jitter threshold value, performing jitter compensation on the main signal.
In this embodiment, in order to ensure that the main signal used in the subsequent fault matching process can accurately reflect the characteristics of the signal itself, especially in high-speed signal transmission, a jitter phenomenon may occur in the main signal due to factors such as a system clock, equipment jitter, or environmental interference. For this purpose, the present embodiment adds the main signal jitter detection and compensation steps before the main signal and noise spectral features are fed into the defect database for matching. The specific process is as follows:
Signal jitter detection
After the main signal path processing is finished, the system carries out jitter detection on the obtained main signal and measures parameters such as time sequence offset, rising edge, falling edge and the like of the signal.
And comparing the detected jitter amplitude by using a preset jitter threshold value. For example, if the preset threshold is a certain percentage of Unit Intervals (UI), the main signal is considered to have a larger jitter problem when the actual jitter amplitude exceeds the threshold.
Jitter compensation determination and triggering
When the detection result shows that the jitter of the main signal exceeds a preset jitter threshold value, the system automatically triggers the jitter compensation module.
The compensation module determines a compensation strategy according to preset algorithm parameters, and ensures that the compensated signal can be restored to an ideal waveform state as much as possible.
Jitter compensation process
The compensation process includes a time recalibration of the key moments (e.g., rising edge, falling edge) of the main signal.
The signal segments affected by the jitter are smoothed and time-sequence adjusted by using a time-domain or frequency-domain-based compensation algorithm, so that signal waveform offset caused by the jitter is reduced or eliminated.
After compensation, the system will output a jitter-compensated main signal with higher timing stability and more accurate waveform characteristics.
Subsequent match preparation
The main signal after jitter compensation is used as the data input for matching with the preset defect database together with the noise spectrum characteristics obtained by the noise extraction path.
Therefore, in the matching process, the basis of fault diagnosis is optimized signal data, and the accuracy of fault type identification and defect positioning is improved.
As an optional embodiment, after the step of matching the main signal and the noise spectrum feature with a preset defect database to obtain fault information of the signal to be tested, the method further includes:
And generating a visual report according to the fault information of the signal to be tested, wherein the fault information comprises the fault type and the defect position coordinates of the signal to be tested.
After the fault information matching step is completed, the system further sorts and displays the detection result, and specifically comprises the following steps:
the system classifies fault information obtained by matching with a preset defect database, wherein the fault information comprises, but is not limited to, fault types (such as impedance mutation, open circuit, short circuit and the like) and corresponding defect position coordinates. And carrying out data statistics and analysis on the fault type, the position, the matching degree and other related data to form a detailed fault detection result record.
From the consolidated fault information, a basic framework of the report is constructed, the content generally including:
Fault abstract briefly describing the type and number of detected faults;
Fault detail information, namely, for each fault record, listing fault types, defect position coordinates (such as specific positioning information on a PCB), matching degree indexes and other auxiliary parameters;
marking the fault position in the test signal waveform or the PCB layout in a graphic mode, and intuitively displaying the position distribution of the defect area;
The additional description comprises auxiliary information such as sampling rate, signal processing parameters, jitter compensation condition and the like adopted in the test, so that technicians can know the test environment and conditions comprehensively.
The system converts the constructed report content into a preset visual format, and supports PDF, CSV or other common file formats.
Meanwhile, the system supports real-time generation of an electronic report with high-resolution graphic display, and ensures that graphic information (such as fault location coordinate graphs and signal waveform graphs) in the report has enough definition and readability.
The generated visual report is automatically saved to a local storage or transmitted to a remote server through a network interface for subsequent retrieval and archiving.
Meanwhile, the system can display report content in real time through a user interface (such as a touch screen or a remote control terminal), so that a field technician can conveniently and quickly grasp the detection result and carry out subsequent fault processing or decision support.
The embodiment not only enables the fault detection result to be more visual and easier to understand by generating the detailed visual report, but also provides solid data support for subsequent fault analysis, maintenance decision and technical improvement.
The high-speed signal integrity testing device provided by the invention is described below, and as shown in fig. 2, the high-speed signal integrity testing device described below and the high-speed signal integrity testing method described above can be referred to correspondingly.
A high speed signal integrity testing apparatus comprising:
a signal acquisition module 210, configured to acquire a signal to be tested;
The signal processing module 220 is configured to perform dual-path signal processing on the signal to be tested to obtain a main signal and a noise spectrum characteristic;
The fault diagnosis module 230 is configured to match the main signal and the noise spectrum feature with a preset defect database, so as to obtain fault information of the signal to be tested.
Fig. 3 illustrates a physical schematic diagram of an electronic device, which may include a processor 310, a communication interface (Communicat i ons I NTERFACE), a memory 330, and a communication bus 340, as shown in fig. 3, where the processor 310, the communication interface 320, and the memory 330 communicate with each other via the communication bus 340. Processor 310 may invoke logic instructions in memory 330 to perform a method of testing high-speed signal integrity, the method comprising:
collecting a signal to be tested;
performing dual-path signal processing on the signal to be tested to obtain main signals and noise spectrum characteristics;
And matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
Further, the logic instructions in the memory 330 described above may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on this understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. The storage medium includes a U disk, a removable hard disk, a Read-only memory (ROM, read-On lyMemory), a random access memory (RAM, randomAccessMemory), a magnetic disk or an optical disk, etc., which can store program codes.
In another aspect, the present invention also provides a computer program product comprising a computer program, the computer program being storable on a non-transitory computer readable storage medium, the computer program, when executed by a processor, being capable of performing a method of testing high-speed signal integrity provided by the methods described above, the method comprising:
collecting a signal to be tested;
performing dual-path signal processing on the signal to be tested to obtain main signals and noise spectrum characteristics;
And matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
In yet another aspect, the present invention provides a non-transitory computer readable storage medium having stored thereon a computer program which, when executed by a processor, is implemented to perform a method of testing high-speed signal integrity provided by the above methods, the method comprising:
collecting a signal to be tested;
performing dual-path signal processing on the signal to be tested to obtain main signals and noise spectrum characteristics;
And matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
The apparatus embodiments described above are merely illustrative, wherein the elements illustrated as separate elements may or may not be physically separate, and the elements shown as elements may or may not be physical elements, may be located in one place, or may be distributed over a plurality of network elements. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present invention without undue burden.
From the above description of the embodiments, it will be apparent to those skilled in the art that the embodiments may be implemented by means of software plus necessary general hardware platforms, or of course may be implemented by means of hardware. Based on this understanding, the foregoing technical solution may be embodied essentially or in a part contributing to the prior art in the form of a software product, which may be stored in a computer readable storage medium, such as ROM/RAM, a magnetic disk, an optical disk, etc., including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method described in the respective embodiments or some parts of the embodiments.
It should be noted that the above-mentioned embodiments are merely for illustrating the technical solution of the present invention, and not for limiting the same, and although the present invention has been described in detail with reference to the above-mentioned embodiments, it should be understood by those skilled in the art that the technical solution described in the above-mentioned embodiments may be modified or some technical features may be equivalently replaced, and these modifications or substitutions do not make the essence of the corresponding technical solution deviate from the spirit and scope of the technical solution of the embodiments of the present invention.
Claims (10)
1. A method for testing high-speed signal integrity, comprising:
collecting a signal to be tested;
performing dual-path signal processing on the signal to be tested to obtain main signals and noise spectrum characteristics;
And matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
2. The method for testing the integrity of high-speed signals according to claim 1, wherein said step of collecting signals to be tested comprises the steps of:
when the signal frequency of the signal to be tested is smaller than a first preset frequency, acquiring the signal to be tested at a first sampling rate;
When the signal frequency of the signal to be tested is larger than the first preset frequency and smaller than the second preset frequency, acquiring the signal to be tested at a second sampling rate;
when the signal frequency of the signal to be tested is larger than a second preset frequency, acquiring the signal to be tested at a third sampling rate;
wherein the first preset frequency is smaller than the second preset frequency.
3. The method for testing the integrity of high-speed signals according to claim 1, wherein after said step of collecting the signals to be tested, said method further comprises:
analyzing the signal to be tested, and determining an error area;
Determining an interpolation algorithm according to a preset precision requirement;
And carrying out interpolation reconstruction on the error region according to the interpolation algorithm.
4. The method of claim 1, wherein the dual path signal processing comprises a main signal path processing and a noise extraction path processing.
5. The method for testing the integrity of high-speed signals according to claim 4, wherein said step of performing dual-path signal processing on said signal to be tested to obtain primary signal and noise spectrum characteristics comprises the steps of:
Performing the main signal path processing and the noise extraction path processing on the signal to be tested;
the main signal path processing includes:
eliminating baseline drift of the signal to be tested through an FIR filter to obtain the main signal;
the noise extraction path processing includes:
performing wavelet transformation on the signal to be tested according to the number of decomposition layers to obtain sub-signals under different scales, wherein the number of decomposition layers is determined according to the broadband of the signal to be tested;
When the noise power of the sub-signal is larger than a preset noise threshold, noise exists in the sub-signal with the decomposition layer number;
separating the sub-signals with noise to obtain a first noise signal;
Performing delay difference detection on the signal to be tested to obtain a second noise signal;
and carrying out spectrum analysis on the first noise signal and the second noise signal to obtain noise spectrum characteristics.
6. The method of claim 1, wherein prior to the step of matching the primary signal and the noise spectrum signature to a predetermined defect database to obtain fault information for the signal under test, the method further comprises:
and when the signal jitter of the main signal exceeds a preset jitter threshold value, performing jitter compensation on the main signal.
7. The method for testing the integrity of high-speed signals according to claim 1, wherein after said step of matching said main signal and said noise spectrum characteristics with a predetermined defect database to obtain fault information of said signal to be tested, said method further comprises:
And generating a visual report according to the fault information of the signal to be tested, wherein the fault information comprises the fault type and the defect position coordinates of the signal to be tested.
8. A high speed signal integrity testing apparatus comprising:
The signal acquisition module is used for acquiring signals to be tested;
the signal processing module is used for carrying out dual-path signal processing on the signal to be tested to obtain a main signal and noise spectrum characteristics;
and the fault diagnosis module is used for matching the main signal and the noise spectrum characteristics with a preset defect database to obtain fault information of the signal to be tested.
9. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the method of testing high speed signal integrity as claimed in any one of claims 1 to 7 when the program is executed by the processor.
10. A non-transitory computer readable storage medium having stored thereon a computer program, which when executed by a processor implements a method of testing high speed signal integrity according to any of claims 1 to 7.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040036478A1 (en) * | 2002-05-06 | 2004-02-26 | Enikia L.L.C. | Method and system for power line network fault detection and quality monitoring |
| CN102095560A (en) * | 2010-11-09 | 2011-06-15 | 中国人民解放军重庆通信学院 | Mechanical fault judgment system and method based on noise test |
| CN111640519A (en) * | 2020-05-07 | 2020-09-08 | 中国工程物理研究院核物理与化学研究所 | Reactor neutron noise spectrum analysis method based on improved wavelet fractal algorithm |
| CN116032357A (en) * | 2021-10-26 | 2023-04-28 | 华为技术有限公司 | Fault location method, equipment and optical network system |
| CN119493984A (en) * | 2025-01-20 | 2025-02-21 | 赫里欧新能源有限公司 | A photovoltaic inverter fault detection system based on electrical signals |
-
2025
- 2025-04-02 CN CN202510408935.1A patent/CN120321140B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040036478A1 (en) * | 2002-05-06 | 2004-02-26 | Enikia L.L.C. | Method and system for power line network fault detection and quality monitoring |
| CN102095560A (en) * | 2010-11-09 | 2011-06-15 | 中国人民解放军重庆通信学院 | Mechanical fault judgment system and method based on noise test |
| CN111640519A (en) * | 2020-05-07 | 2020-09-08 | 中国工程物理研究院核物理与化学研究所 | Reactor neutron noise spectrum analysis method based on improved wavelet fractal algorithm |
| CN116032357A (en) * | 2021-10-26 | 2023-04-28 | 华为技术有限公司 | Fault location method, equipment and optical network system |
| CN119493984A (en) * | 2025-01-20 | 2025-02-21 | 赫里欧新能源有限公司 | A photovoltaic inverter fault detection system based on electrical signals |
Non-Patent Citations (1)
| Title |
|---|
| 程利军;张英堂;罗亮;丁俊芳;: "柴油机缸盖噪声信号处理方法及故障诊断研究", 振动与冲击, no. 04, 25 April 2009 (2009-04-25), pages 173 - 176 * |
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