CN119673923A - An AiP packaging component - Google Patents

Abstract

The present application discloses an AiP packaging component, which relates to the field of packaging technology and is used to solve the problem that existing AiP packaging components are prone to signal crosstalk. The AiP packaging component includes a shell, an antenna radiation structure, a shielding structure, a first chip and a second chip; a housing cavity is formed in the shell, and the shell includes a first surface and a second surface arranged oppositely, the antenna radiation structure is arranged close to the first surface, the first chip and the second chip are arranged close to the second surface, and the first chip and the second chip are arranged at intervals; the shielding structure is arranged in the housing cavity, at least for shielding electromagnetic interference between the first chip, the second chip and the antenna radiation structure.

Description

AiP packaging assembly

Technical Field

The application belongs to the technical field of packaging, and particularly relates to a AiP packaging assembly.

Background

The array antenna in the package antenna technology (AiP a-in-package) has the requirements of high gain, low profile, high efficiency, wide band (covering 5G millimeter wave band), convenient integration with chip, high consistency of antenna unit, small size, etc.

The current AiP packaging processes are typically three of low temperature co-fired ceramics (low temperature co-FIRED CERAMIC, LTCC), high density interconnects (HIGH DENSITY interconnector, HDI), and fan out packages (fan out WAFER LEVEL PACKAGE, FOWLP). Compared with HDI and FOWLP, LTCC has relatively mature development, and is a main substrate material in a high-performance radio frequency microwave assembly, and has the characteristics of stable performance, mature manufacturing process, low electromagnetic wave signal loss, wide working stability range and the like. The thermal stability and the heat good conductor of the LTCC are beneficial to solving the problems of low thermal stability and insufficient radiation power value of the AiP products in the industry.

The LTCC packaging process can assemble and integrate different kinds of chips and other components into the same package body to realize certain functions of the system, thereby realizing important means of miniaturization, integration, multifunction and high reliability of the system. However, integrating the antenna and the plurality of chips in one package, signals are prone to crosstalk, thereby affecting communications.

Disclosure of Invention

The application provides a AiP packaging component which is used for solving the problem that signal crosstalk is easy to occur in the conventional AiP packaging component.

In order to achieve the above purpose, the application provides a AiP packaging component which comprises a shell, an antenna radiation structure, a shielding structure, a first chip and a second chip, wherein a containing cavity is formed in the shell, the shell comprises a first surface and a second surface which are oppositely arranged, the antenna radiation structure is arranged close to the first surface, the first chip and the second chip are arranged close to the second surface, the first chip and the second chip are arranged at intervals, and the shielding structure is arranged in the containing cavity and is at least used for shielding electromagnetic interference among the first chip, the second chip and the antenna radiation structure.

According to the embodiment of the application, the antenna radiation structure is arranged close to the first surface a, the first chip and the second chip are arranged close to the second surface b, and the first chip and the second chip are arranged at intervals, so that the distances between the first chip and the antenna radiation structure, between the second chip and the antenna radiation structure, and between the first chip and the second chip are kept relatively far, and the occurrence of signal crosstalk is reduced. In addition, a shielding structure is arranged in the accommodating cavity, and the shielding structure is at least used for shielding electromagnetic interference among the first chip, the second chip and the antenna radiation structure. Therefore, electromagnetic interference among the first chip, the second chip, the first chip, the antenna radiation structure, the second chip, the antenna radiation structure, the first chip, the second chip and the antenna radiation structure can be shielded through the shielding structure, so that signal crosstalk in the shell is greatly reduced, signal damage can be reduced, and system performance and system reliability are both better.

In one possible structural design, the housing includes a multi-layer substrate disposed in the accommodating cavity at intervals along a first direction, and the first direction is a direction from the first face to the second face.

In one possible structural design, the number of layers of the substrate is N, which is an integer greater than or equal to 12.

In one possible structural design, the housing further includes a plurality of metal floors, the plurality of metal floors are arranged at intervals along a first direction, and any one of the metal floors is disposed on the substrate, the metal floors are used for conducting signals or transferring heat, and the first direction is an arrangement direction from the first face to the second face.

In one possible structural design, the second surface is provided with a first groove and a second groove, the first groove and the second groove are arranged at intervals along a second direction, the second direction is perpendicular to the first direction, the first chip is arranged in the first groove, and the second chip is arranged in the second groove.

In one possible design, one of the first chip and the second chip is used for transmitting and amplifying the power of the signal and/or for receiving and amplifying the signal, and the other is used for adjusting the phase and amplitude of the radio frequency signal.

In one possible structural design, the AiP package assembly further includes a via disposed between the multilayer substrates, the via being connected to the antenna radiating structure and/or the metal floor for conducting heat, grounding, and/or communication.

In one possible structural design, the conducting element includes a first conducting element, and the first conducting element is connected between the antenna radiating structure and the first chip, and is used for conducting signals between the first chip and the antenna radiating structure.

In one possible structural design, the AiP package assembly further includes a first antenna feed electrically connected to the first chip, the first conductive feature being connected to the first chip through the first antenna feed.

In one possible structural design, the conductive member further includes a second conductive member, the metal floor includes a first metal floor, and the second conductive member is connected between the first metal floor and the second surface for transferring heat from the metal floor to the second surface.

In one possible structural design, the metal floor includes a second metal floor, and the conductive member further includes a third conductive member connected between the second metal floor and the second chip for communication with the second chip.

In one possible design, the metal floor includes a third metal floor electrically connected to the second chip, and the third conductive element is connected to the second chip through the third metal floor.

In one possible structural design, the shielding structure includes a first shielding structure disposed within the receiving cavity, the first shielding structure disposed between the first chip and the second chip.

In one possible structural design, the shielding structure includes a second shielding structure disposed between the first chip and the antenna radiation structure and located on the substrate near the first chip.

In one possible structural design, the shielding structure includes a third shielding structure disposed between the second chip and the antenna radiation structure and located on the substrate near the second chip.

In one possible structural design, the shielding structure comprises a cylindrical structure or a cubic structure surrounded by a plurality of metal posts, and the metal posts are connected through feeder lines.

In one possible structural design, the antenna radiating structure includes a parasitic antenna and a radiating antenna, the parasitic antenna is disposed on the first face and located outside the accommodating cavity, and the radiating antenna is disposed in the accommodating cavity and located on the substrate near the first face.

In one possible design, one side wall of the first chip is electrically connected to the substrate by a wire, and the other side wall of the first chip is bonded to the other substrate by eutectic soldering.

In one possible design, the active surface of the second chip is bonded to the substrate by the first ball implant.

In one possible structural design, the substrate is an LTCC substrate or an epoxy substrate or a glass substrate.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.

In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort.

FIG. 1 is a schematic diagram of a AiP package assembly according to one embodiment of the present application;

FIG. 2 is a schematic diagram of a AiP package according to one embodiment of the present application;

FIG. 3 is a third schematic diagram of a AiP package according to one embodiment of the present application;

FIG. 4 is a diagram of a AiP package according to one embodiment of the present application;

FIG. 5 is a schematic diagram of a AiP package according to one embodiment of the present application;

Fig. 6 is a schematic top view of a shielding structure according to an embodiment of the present application;

FIG. 7 is a second schematic top view of a shielding structure according to an embodiment of the present application;

fig. 8 is a schematic top view of an antenna radiation structure according to an embodiment of the present application;

fig. 9 is a second schematic top view of an antenna radiation structure according to an embodiment of the present application;

fig. 10 is a schematic perspective view of an antenna radiation structure according to an embodiment of the present application.

Detailed Description

Embodiments of the present application will be described in detail below with reference to the accompanying drawings.

In the description of the present application, it should be understood that the terms "center," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like indicate orientations or positional relationships based on the orientation or positional relationships shown in the drawings, merely to facilitate describing the present application and simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.

The terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.

In the description of the present application, unless explicitly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected, mechanically connected, electrically connected, directly connected, indirectly connected via an intervening medium, or in communication between two elements. The specific meaning of the above terms in the present application will be understood in specific cases by those of ordinary skill in the art.

AiP packaging is a packaging technology that integrates an antenna with a circuit, aiP packaging enables the antenna to be integrated with radio frequency components such as a transceiver within the same package, eliminating the need for the antenna as a separate component in the wireless device. The integration mode remarkably improves the integration level and the space utilization rate of the equipment. And, aiP encapsulation can realize the optimization of antenna performance, such as improve the gain of antenna, reduce the noise of antenna etc.. Also, aiP packages help to reduce signal attenuation and improve signal integrity and power integrity. Furthermore, aiP packages enable the antenna and radio frequency components to be tightly integrated together, thereby greatly reducing the volume of the wireless device.

However, due to the higher packing density of components (e.g., antenna radiating structures, chips, etc.) in AiP packages, the pin pitch decreases, increasing the likelihood of capacitive and inductive coupling, thereby exacerbating the crosstalk problem. And exacerbation of the crosstalk problem can have various adverse effects.

First, crosstalk can lead to impaired signal quality. Crosstalk can cause signals to distort during transmission, thereby affecting signal quality. Specifically, crosstalk may cause changes in parameters such as amplitude, phase, and frequency of a signal, so that the signal cannot be accurately and completely transmitted to a receiving end. Such degradation of signal quality may cause data transmission errors and even cause the system to fail to function properly.

Second, crosstalk can lead to reduced system performance. In high-speed data transmission and signal processing applications, crosstalk can limit the bandwidth and transmission rate of the system. When crosstalk is severe, the performance of the system may be significantly degraded, failing to meet the design requirements and application requirements.

Third, crosstalk can lead to increased power consumption. When a signal is disturbed during transmission, additional energy may be required to overcome such disturbance and maintain stable transmission of the signal. This not only increases the energy consumption of the system, but may also adversely affect the heat dissipation and stability of the system.

Fourth, crosstalk can lead to reduced system reliability. When the signal is disturbed, the stability of the system may be affected, thereby increasing the risk of the system failing. This may reduce the reliability and usability of the system, negatively impacting the user's use experience.

Based on this, the embodiment of the application provides a AiP packaging assembly, and the AiP packaging assembly can reduce occurrence of signal crosstalk in the packaging assembly, so as to avoid signal quality damage and ensure that system performance and system reliability are better.

Fig. 1 shows a AiP package assembly provided in an embodiment of the present application, the AiP package assembly including a housing 100, an antenna radiating structure 200, a shielding structure 300, a first chip 400, and a second chip 500. The antenna radiating structure 200 may be used for transmission or reception of signals.

The housing 100 includes a first surface 100a and a second surface 100b, the first surface 100a and the second surface 100b are disposed opposite to each other, the antenna radiation structure 200 is disposed near the first surface 100a, the first chip 400 and the second chip 500 are disposed near the second surface 100b, and the first chip 400 and the second chip 500 are disposed at intervals. A plurality of second implant balls 600 may be provided on the second face 100b, and the second implant balls 600 may be used to connect with a heat sink. The second ball-mounting 600 may be solder paste printing ball-mounting, laser ball-mounting, and the like, which is not limited in the present application.

Specifically, the housing 100 may include a first surface 100a and a second surface 100b disposed at intervals along a first direction (i.e., an X-axis direction of fig. 1), a receiving cavity 1001 is formed between the first surface 100a and the second surface 100b, the antenna radiation structure 200 is disposed near the first surface 100a, and the first chip 400 and the second chip 500 are both disposed near the second surface 100 b. In addition, the first chip 400 and the second chip 500 may be disposed at intervals along the second direction (i.e., the Y-axis direction in fig. 1), where the second direction may be a direction perpendicular to the first direction, and the second direction may also be a direction close to perpendicular to the first direction, for example, an angle between the first direction and the second direction may be 70-110 degrees, which is not limited in the present application.

In this way, the first chip 400, the second chip 500 and the antenna radiation structure 200 are arranged on the housing 100 in a triangle shape, so that the distances between the first chip 400 and the antenna radiation structure 200, between the second chip 500 and the antenna radiation structure 200, and between the first chip 400 and the second chip 500 are kept far, and signal crosstalk is reduced.

In addition, a shielding structure 300 is provided in the accommodating chamber 1001, the shielding structure 300 being at least for shielding electromagnetic interference between the first chip 400, the second chip 500 and the antenna radiating structure 200. Specifically, the shielding structure 300 is at least used for shielding electromagnetic interference between the first chip 400 and the second chip 500, the first chip 400 and the antenna radiation structure 200, the second chip 500 and the antenna radiation structure 200, and the first chip 400 and the second chip 500 and the antenna radiation structure 200.

Thus, in the embodiment of the present application, by disposing the antenna radiation structure 200 close to the first surface 100a, the first chip 400 and the second chip 500 are disposed close to the second surface 100b, and the first chip 400 and the second chip 500 are disposed at intervals, it is ensured that the distances between the first chip 400 and the antenna radiation structure 200, between the second chip 500 and the antenna radiation structure 200, and between the first chip 400 and the second chip 500 are kept relatively far, so as to reduce occurrence of signal crosstalk. In addition, a shielding structure 300 is provided in the accommodating chamber 1001, the shielding structure 300 being at least for shielding electromagnetic interference between the first chip 400, the second chip 500 and the antenna radiating structure 200. In this way, electromagnetic interference among the first chip 400, the second chip 500, the first chip 400, the antenna radiation structure 200, the second chip 500, the antenna radiation structure 200, the first chip 400, the second chip 500 and the antenna radiation structure 200 can be shielded by the shielding structure 300, so that signal crosstalk in the shell 100 is greatly reduced, signal damage can be reduced, and system performance and system reliability are both better.

In some embodiments of the present application, the housing 100 includes a multi-layered substrate 101, and the multi-layered substrate 101 may be disposed in the accommodating cavity 1001 at intervals along a first direction, where the first direction is an arrangement direction of the first surface 100a and the second surface 100 b. Wherein, the substrate 101 may be provided with a feeder line, the antenna radiation structure 200 may be disposed on the substrate 101 near the first face 100a, and the antenna radiation structure 200 and the first chip 400 may be connected through the feeder line on each layer of the substrate 101.

The multilayer substrate 101 may divide the housing chamber 1001 into a plurality of chambers, and a plurality of components may be provided in the plurality of chambers and connected to the substrate 101. By way of example, the plurality of components may include, but are not limited to, inductors, capacitors, power amplifiers, oscillators, signal sources, and the like.

In one possible structural design, the number of layers of the multilayer substrate 101 described above is N, where N is an integer greater than or equal to 12. The value of N may be 12, 13, 14, 15, 16, etc. by way of example, and the application is not limited thereto.

Since the number of layers of the substrate 101 is related to the distribution of the feeder lines on each layer of the substrate 101, if the number of layers of the substrate 101 is too small, the wiring is difficult, and the embodiment of the application can facilitate the wiring arrangement in the housing 100 by limiting the number of layers of the substrate 101 to be greater than or equal to 12.

Since the number of layers of the substrate 101 is related to the distribution of the feeder lines on each layer of the substrate 101, wiring is difficult if the number of layers of the substrate 101 is too small, and material is wasted and miniaturization of the package is not facilitated if the number of layers of the substrate 101 is too large. Thus, in one possible structural design, the housing 100 may include 20 layers of substrates 101.

In some embodiments of the present application, the housing 100 further includes a plurality of metal floors 102, the plurality of metal floors 102 are arranged at intervals along a first direction, and any one of the metal floors 102 is disposed on the substrate 101, where the first direction is an arrangement direction of the first surface 100a to the second surface 100 b. The metal floor 102 is used for signal conduction or heat transfer, specifically, the metal floor 102 may transfer heat emitted by components (i.e. including the chip, inductor, capacitor, power amplifier, oscillator, signal source, etc. described above), or the metal floor 102 may transfer signals, i.e. the metal floor 102 is used for connecting multiple components in communication.

For example, as shown in fig. 1, when the number of layers of the substrate 101 is 12, a metal floor 102 may be disposed between every three layers of the substrate 101 in the housing 100, and a strip line feeding structure may be disposed on the metal floor 102.

Alternatively, the material of the metal floor 102 may be an alloy, alternatively, the material of the metal floor 102 may be a pure metal, which is not limited in the present application.

In this way, signal transmission among the components can be realized through the metal floor 102, so that the internal transmission performance of the AiP packaging assembly can be ensured to be better. In addition, when a certain component in the accommodating cavity 1001 heats seriously, the heating element can transfer heat to other positions through the metal floor 102, so that the heat is prevented from being concentrated on the component accessory, and the service life of the component is reduced and even damaged due to high temperature.

In some embodiments of the present application, the second face 100b is provided with first grooves and second grooves that are spaced apart along a second direction that is perpendicular to the first direction. The first chip 400 is disposed in the first recess, and the second chip 500 is disposed in the second recess. In this manner, by disposing the first chip 400 and the second chip 500 in two recesses disposed at a distance, electromagnetic interference between the first chip 400 and the second chip 500 can be reduced.

In one possible structural design, one of the first chip 400 and the second chip 500 is used to transmit and amplify the power of a signal and/or to receive and amplify a signal, and the other is used to adjust the phase and amplitude of a radio frequency signal. Specifically, one of the first chip 400 and the second chip 500 is used for transmitting and amplifying the power of the signal and/or for receiving and amplifying the signal while minimizing the introduction of noise, and the other is used for adjusting the phase and amplitude of the radio frequency signal.

Optionally, the first chip 400 is used for transmitting and amplifying the power of the signal and/or for receiving and amplifying the signal, and reducing the introduction of noise, and the second chip 500 is used for adjusting the phase and amplitude of the radio frequency signal.

Optionally, the second chip 500 is used for transmitting and amplifying the power of the signal and/or for receiving and amplifying the signal, and reducing the introduction of noise, and the first chip 400 is used for adjusting the phase and amplitude of the radio frequency signal. The application is not limited in this regard.

For convenience of description, the embodiment of the present application is described taking the example that the first chip 400 is used to transmit and amplify the power of a signal and/or to receive and amplify a signal, and to reduce the introduction of noise, and the second chip 500 is used to adjust the phase and amplitude of a radio frequency signal.

In one possible structural design, the bottom surface of the first groove may be provided with the substrate 101, the first chip 400 is disposed in the first groove, the first side 400a of the first chip 400 is bonded to the substrate 101 by eutectic soldering, the second side 400b of the first chip 400 is electrically connected to the other substrate 101 by the wire 401, the second side is a surface of the first chip 400 facing away from the bottom surface of the first groove, and the first side is a surface of the first chip 400 near (facing) the bottom surface of the first groove.

Specifically, one end of the lead 401 is connected to the second side of the first chip 400, and the other end of the lead 401 is connected to the antenna feed of the other substrate 101. Preferably, the lead 401 is a gold wire, and thus, the lead 401 has good conductivity and stable chemical stability.

In one possible structural design, the bottom surface of the second groove may also be provided with a substrate 101, and the substrate 101 of the bottom surface of the second groove and the substrate 101 of the bottom surface of the first groove may be the same substrate 101 or may be different substrates 101, which is not limited in this application.

The second chip 500 is disposed in the second groove, and the active surface of the second chip 500 may be bonded to the substrate 101 through the first ball 501. The first ball-planting 501 may be solder paste printing ball-planting, ball-placing ball-planting, laser ball-planting, etc., which is not limited in the present application.

Specifically, the active surface of the second chip 500 is welded to the substrate 101 through the first balls 501 arranged in an array, so that the connection between the second chip 500 and the substrate 101 is realized, and a heat sink can be connected to one side of the second chip 500 away from the active surface, so that heat of the second chip 500 can be dissipated through the heat sink, and the heat dissipation performance of the second chip 500 is improved.

The second chip 500 may be mounted on the substrate 101 by a Flip-chip technology (Flip-chip), and the second chip 500 may draw input and output pins from a silicon wafer to the periphery and electrically connect with the substrate 101 through the input and output pins. Therefore, the AiP packaging assembly has the advantages of small size, strong performance, good heat dissipation capability and the like, and meanwhile, the connection length between the second chip 500 and the substrate 101 is greatly shortened, so that signal delay between components is reduced, and the transmission performance is effectively improved.

In one possible structural design, the first chip 400 is a compound chip, and the material of the substrate 101 in the compound-based process is generally an insulating material, so that the rf signal loss is small. The manufacturing process of the first chip 400 may include a GaN HEMT process, a GAAS PHEMT process, and an InP DHBT process.

Specifically, the first chip 400 is a compound rf front-end chip. Illustratively, the first chip 400 is a low noise amplifier (Low Noise Amplifier, LNA) for receiving and amplifying signals while minimizing the introduction of noise. The first chip 400 is, for example, a Power Amplifier (PA) for emitting and amplifying Power of signals, and the LNA or PA is mounted in a first recess on the LTCC substrate by back eutectic bonding and front gold wire bonding, and fed into the antenna radiating structure 200 through a first conductive member (which will be described later) to ensure low insertion loss.

In one possible structural design, the second chip 500 may be a silicon-based chip, the substrate 101 material of the silicon-based chip may be a semi-insulator, and the radio frequency signal loss is relatively large, and alternatively, the process of the second chip 500 may include a CMOS RF process, a GeSi BiCMOS process, an SOI RFIC process, and the like.

The second chip 500 is, for example, a silicon-based beamforming chip, the second chip 500 may be used to adjust the phase and amplitude of the signals in the circuit and for the combining of the signal paths if the first chip 400 is an LNA, and the second chip 500 may be used to adjust the phase and amplitude of the signals in the circuit and for the splitting of the signal paths if the first chip 400 is a PA.

The substrate 101 described above may be an LTCC substrate, an epoxy substrate, a glass substrate, or the like, which is not limited in the present application. The substrate 101 according to the embodiment of the present application will be described by taking an LTCC substrate as an example. The LTCC multilayer circuit board may integrate passive devices such as a resistor, a capacitor, an inductor, and chips made of various materials into the multilayer board 101. The LTCC substrate has the following characteristics:

(1) LTCC substrates facilitate integration of passive devices. The LTCC substrate integrated passive device mainly comprises two modes, namely a resistor, a capacitor and an inductance functional circuit is built directly based on the material characteristics and the multilayer board characteristics of the LTCC substrate integrated passive device, and the other mode is that certain layers of the multilayer dielectric layers are grooved to form a cavity, and components such as the capacitor, the inductor, the resistor, the passive semiconductor device and the passive chip are implanted into the cavity to realize the integration of the passive device.

(2) The LTCC substrate is suitable for high-density high-quality wiring. The LTCC substrate supports line width wiring of about 50 μm and multilayer connection holes of 75 μm diameter, and is suitable for wiring design of high density, high quality, high current value, and the like. The high-density and high-definition link hole and metal plating process is suitable for manufacturing an ideal electromagnetic shielding layer or electromagnetic reference ground, and has obvious improvement on the antenna design requirements of radio frequency signal feeder lines of antenna units, electromagnetic isolation between the antenna units, feed isolation of dual-polarized antennas and the like. Precise routing and excellent controllable electromagnetic shielding design help to provide packaging density for the system, reducing the size and volume of the system.

(3) The electrical sealing performance is good. The hot pressing and sintering of the LTCC substrate are beneficial to forming high-reliability air tightness, and are important to protecting the metal property stability of components and wires inside the LTCC. Advanced LTCC multilayer substrate 101 processes support internal thermally conductive micro-fluidic designs that advantageously provide an upper power consumption density limit for LTCC modules that appears to support higher radiated power densities in radio frequency millimeter wave modules.

(4) The LTCC substrate has good high-frequency characteristics, and supports the adjustment of the dielectric constant of dielectric materials used for packaging according to different application scenes, and the excellent dielectric constant of ceramic materials supports a better antenna resonant cavity, thereby being beneficial to expanding the working bandwidth of the antenna or improving the radiation efficiency.

(5) The LTCC substrate is excellent in thermal stability and thermal conductivity. The thermal stability is favorable for maintaining the loss stability of radio frequency signal propagation in the LTTC substrate and avoiding the stress distortion characteristic of thermal expansion and cold contraction, which is important for the performance stability of the antenna, and the excellent thermal propagation characteristic is favorable for heat dissipation of an internal active device. The active array antenna manufactured based on the LTCC substrate supports higher power consumption density, and is beneficial to realizing higher radiation power of the antenna by using a power amplifier with higher power.

In some embodiments of the present application, the AiP package assembly further includes a via 700, the via 700 may be disposed between the multilayer substrate 101, the via 700 being connected to the antenna radiating structure 200 and/or the metal floor 102 for heat conduction, ground, and/or communication.

The conductive member 700 may include a body, an insulating portion, and a conductive portion. Wherein, the conducting member 700 may have an opening therein, a circle of insulating portion may be disposed along an inner surface of the opening, and the conductive portion is disposed inside the insulating portion. As such, the outer (body) portion of the via 700 may be used for heat conduction, while the inner portion of the via 700 may be used for ground and/or communication connection. Therefore, the conducting member 700 can integrate heat conduction and electric conduction functions, and is beneficial to facilitating the internal arrangement design of AiP packaging components.

The body may be made of silicon, which is a semiconductor material, for example, and has no good electrical conductivity, but has good heat conduction performance, so that heat conduction can be realized.

The material of the insulating portion may be, for example, ceramic, rubber, glass, plastic, etc., which is not limited in the present application, and the material of the conductive portion may be, for example, a metal material such as silver, copper, gold, aluminum, etc., and the material of the conductive portion may be, for example, an alloy, graphite, carbon fiber, superconducting material, etc., which is not limited in the present application.

In some embodiments, the conductive element 700 includes a first conductive element 701, and the first conductive element 701 is connected between the antenna radiating structure 200 and the first chip 400 for signal conduction between the first chip 400 and the antenna radiating structure 200. Specifically, the first conductive member 701 may be vertically disposed between the antenna radiation structure 200 and the first antenna feeder connected to the first chip 400, and the first conductive member 701 may penetrate the antenna radiation structure 200 and the substrate 101 between the first chip 400 to conduct signals between the first chip 400 and the antenna radiation structure 200.

In this way, the signal output by the first chip 400 is transmitted to the antenna radiation structure 200 through the first conductive element 701, or the signal received by the antenna radiation structure 200 can be transmitted to the first chip 400 through the first conductive element 701.

Alternatively, as shown in fig. 2, the first conductive member 701 may be an integral structure, one end of the first conductive member 701 is connected to the first antenna feeder connected to the first chip 400, the other end is connected to the antenna radiating structure 200, and the first conductive member 701 is not connected to the metal floor 102. In this way, since the first conductive member 701 is an integral structure, there are fewer processing steps when the first conductive member 701 is connected to the first chip 400 and the antenna radiation structure 200, thereby improving the production efficiency.

Optionally, as shown in fig. 3, the first conductive member 701 may further include a plurality of conductive segments staggered in the housing 100, where the plurality of conductive segments are not directly connected. Any of the conductive segments may include the body, insulating portion, and conductive portion described above. In this manner, signal conduction between the antenna radiating structure 200 and the first chip 400 is achieved through the plurality of conductive segments.

Specifically, a plurality of conductive segments may be disposed between the antenna radiating structure 200 and the metal floor 102, between the metal floor 102 and the metal floor 102, and between the metal floor 102 and the first antenna feed line, respectively, from top to bottom. It should be noted that, the metal floor 102 directly connected to any conducting section of the first conducting member 701 is not connected to other metal floors 102 of the same layer, which would cause a short circuit of the circuit in the housing 100. Likewise, the plurality of conductive segments included in the first conductive element 701 may be disposed vertically between the antenna radiating structure 200 and the metal floor 102, between the metal floor 102 and the metal floor 102, and between the metal floor 102 and the first antenna feed.

In other embodiments, the conductive member 700 further includes a second conductive member 702, the metal floor 102 includes a first metal floor 1021, and the second conductive member 702 is connected between the first metal floor 1021 and the second surface 100b for transferring heat of the first metal floor 1021 to the second surface 100b. The heat generating device may be a component with high heat generation, such as a capacitor, an inductor, an oscillator, a signal source, etc., which is not limited in this application. In this way, heat of the heat generating device may be transferred to the first metal floor 1021, and heat may be transferred to the second face 100b through the second conductive member 702, so that heat may be emitted due to the contact of the second face 100b with the outside air.

The second conductive member 702 may include the body, the insulating portion, and the conductive portion described above, among others. The opening in the body of the second conductive member 702 may be a blind hole. As such, the second conductive member 702 may be used not only for heat dissipation within the housing 100, but also for circuit interconnection of the exterior surface and interior of the housing 100.

In still other embodiments, the metal floor 102 further includes a second metal floor 1022 and a third metal floor 1023, the third metal floor 1022 being electrically connected to the second chip 500. The via 700 further includes a third via 703, the third via 703 being connected between the second metal floor 1022 and the second chip 500, the third via 703 being for communication with the second chip 500. The first end of the third conductive member 703 is connected to the second metal floor 1022, and the second end of the third conductive member 703 is connected to the third metal floor 1023 connected to the second chip 500 for communication with the second chip 500. Specifically, the opening of the third conductive member 703 may be a buried hole, and the third conductive member 703 may be vertically connected between the second metal floor 1022 and the third metal floor 1023.

Alternatively, the via structure in AiP package assembly may include one or two or three of the first via 701, the second via 702, and the third via 703.

In some embodiments of the present application, the shielding structure 300 includes a first shielding structure 301 disposed in the accommodating cavity 1001, the first shielding structure 301 is disposed between the first chip 400 and the second chip 500, at least one end of the first shielding structure 301 is connected to the first surface 100a of the housing 100, and the other end of the first shielding structure 301 may be connected to any metal floor 102. As such, the first shielding structure 301 is capable of shielding electromagnetic interference between the first chip 400 and the second chip 500.

Further, as shown in fig. 1 to 5, the shielding structure 300 in the housing 100 includes a second shielding structure 302, and the second shielding structure 302 is disposed between the first chip 400 and the antenna radiation structure 200 and is located on the substrate 101 near the first chip 400.

In particular, the second shielding structure 302 may include a plurality of second shielding bodies disposed at intervals, and by way of example, the second shielding bodies may be provided with 3, 4, 5, 6, 7, or 8, which is not limited thereto by the present application.

In addition, the widths of the plurality of second shielding bodies may be equidistant or non-equidistant, which is not limited by the present application, and the lateral width (i.e. the length in the second direction) of the second shielding structure 302 needs to cover the length of the first chip 400 entirely. As such, the second shielding structure 302 can completely shield electromagnetic interference between the first chip 400 and the antenna radiating structure 200.

Further, as shown in fig. 1-5, the shielding structure 300 in the housing 100 may further include a third shielding structure 303, where the third shielding structure 303 is disposed between the second chip 500 and the antenna radiation structure 200 and is located on the substrate 101 near the second chip 500.

In particular, the third shielding structure 303 may be disposed on any of several layers of the substrate 101 that are close to the top of the second chip 500. Specifically, the third shielding structure 303 is disposed on the three-layer substrate 101 near the top of the second chip 500, or the third shielding structure 303 is disposed on the four-layer substrate 101 near the top of the second chip 500. In this way, a gap exists between the third shielding structure 303 and the second chip 500, so that the first ball-mounting is convenient to connect with components inside the housing 100.

Meanwhile, the third shielding structure 303 includes at least five third shielding bodies that may be disposed at intervals, and widths between the plurality of third shielding bodies may be equidistant or non-equidistant, which is not limited in the present application.

Optionally, the shielding structure 300 in AiP package assembly may include one or two or three of the first shielding structure 301, the second shielding structure 302, and the third shielding structure 303 at the same time. It is understood that in the embodiment in which the shielding structure 300 in AiP packages includes the first shielding structure 301, the second shielding structure 302, and the third shielding structure 303 at the same time, electromagnetic interference between the first chip 400, the second chip 500, and the antenna radiating structure 200 is minimized.

Specifically, as shown in fig. 6 and 7, the shielding structure 300 includes a cylindrical structure or a cubic structure surrounded by a plurality of metal posts 3011, and the metal posts 3011 are connected by feeder lines. As shown in fig. 6, the first shielding structure 301 includes a plurality of metal posts 3011, and the metal posts 3011 form a cylindrical structure, and each metal post 3011 is connected by a feeder line. As shown in fig. 7, the first shielding structure 301 includes a plurality of metal posts 3011, and the metal posts 3011 form a cubic structure, and the metal posts 3011 are connected by feeder lines. Likewise, the specific structures of the second shielding structure 302 and the third shielding structure 303 may refer to fig. 6 and fig. 7, and are not described herein.

Further, the size of the shielding structure 300 directly affects the shielding performance. Preferably, the shielding structure 300 comprises 6 or 7 or 8 metal posts 3011. Specifically, the first shielding structure 301 includes 6 or 7 or 8 metal posts 3011, the second shielding structure 302 includes at least three spaced apart second shields, each of which may include 6 or 7 or 8 metal posts 3011, and the third shielding structure 303 includes at least five spaced apart third shields, each of which may include 6 or 7 or 8 metal posts 3011. The number of the metal posts 3011 may be set according to the diameter of the metal posts 3011 and the distance between the metal posts 3011 and 3011, which is not limited in the present application.

As shown in fig. 4, the antenna radiation structure 200 includes a parasitic antenna 201 and a radiation antenna 202, and the parasitic antenna 201 may be disposed on the first surface 100a of the housing 100 and located outside the accommodating cavity 1001. The radiation antenna 202 is disposed in the accommodating chamber 1001 and is located on the substrate 101 near the first face 100 a.

In particular, the radiating antenna 202 may be disposed within an open window of one or more layers of the metal floor 102 proximate the first face 100a of the housing 100. The parasitic antenna 201 is disposed on the first side 100a of the housing 100, the radiating antenna 202 is disposed in an opening window of the first metal floor 102A adjacent to the first side 100a of the housing 100, wherein the first metal floor 102A is adjacent to the first side 100a of the housing 100 with at least 2 layers of substrates 101, the parasitic antenna 201 is disposed on the first side 100a of the housing 100, the radiating antenna 202 is disposed in an opening window of the first metal floor 102A and the second metal floor 102B adjacent to the first side 100a of the housing 100, wherein the first metal floor 102A is adjacent to the first side 100a of the housing 100 with at least 2 layers of substrates 101 therebetween with at least 2 layers of substrates 101.

Specifically, the parasitic antenna 201 may be an antenna structure with different shapes, and the shape of the parasitic antenna 201 is a square, a circle, or a rectangle that are regularly arranged. As shown in fig. 8, the parasitic antenna 201 includes a plurality of first radiating structures 2011, wherein the plurality of first radiating structures 2011 are regularly arranged square and are disposed on the first surface 100a of the housing 100, and as shown in fig. 9, the radiating antenna 202 includes a plurality of second radiating structures 2012, wherein the plurality of second radiating structures 2012 are regularly arranged circular and are disposed on the first surface 100a of the housing 100.

In one embodiment, as shown in fig. 10, the radiation antenna 202 includes a microstrip patch antenna, where the microstrip patch antenna is relatively simple in form, and the basic construction method is that a metal patch is soldered and covered on the substrate 101 with the metal floor 102, where the metal patch is usually printed with gold, silver or copper, specifically, each metal patch may be provided with multiple feeding ends for connecting to different components so that signals received or transmitted by the antenna have a phase difference, for example, for a dual-polarized multi-channel phased array architecture, each metal patch is provided with two feeding ends with a phase difference, and each feeding end is connected to a different signal link so that signals transmitted or received by the antenna have a phase difference, and by adjusting the phases of the transmitting and receiving signal links at the same time, a jump in an optimal radiation direction of the AiP antenna can be achieved, and a jump in an optimal radiation direction can be continuous to cover a target area, so that sector coverage is achieved.

In some embodiments of the present application, as shown in fig. 5, the AiP package assembly further includes a PCB 800, and the PCB 800 is communicatively interconnected with the PCB 800 through a plurality of second balls 600 on the second face 100b of the housing 100.

In this manner, the AiP package assembly may also be interconnected with the communications of the peripheral PCB 800 through a plurality of second balls 600 on the second side 100 b.

The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (20)

1. A AiP packaging component is characterized by comprising a shell, an antenna radiation structure, a shielding structure, a first chip and a second chip;

The housing is internally provided with a containing cavity and comprises a first surface and a second surface which are oppositely arranged, the antenna radiation structure is arranged close to the first surface, the first chip and the second chip are arranged close to the second surface, and the first chip and the second chip are arranged at intervals;

the shielding structure is arranged in the accommodating cavity and is at least used for shielding electromagnetic interference among the first chip, the second chip and the antenna radiation structure.

2. The AiP package assembly of claim 1, wherein the housing includes a multi-layer substrate disposed within the receiving cavity at intervals along a first direction, the first direction being an arrangement direction of the first face and the second face.

3. The AiP package assembly of claim 2, wherein the number of layers of the substrate is N, N being an integer greater than or equal to 12.

4. The AiP package assembly of claim 3, wherein the housing further includes a plurality of metal floors, the plurality of metal floors being arranged at intervals along a first direction, and any one of the metal floors being disposed on the substrate, the metal floors being used for signal conduction or heat transfer, the first direction being an arrangement direction of the first face to the second face.

5. The package assembly of any one of claims 2-4, wherein a first groove and a second groove are disposed on the second surface, the first groove and the second groove being spaced apart along a second direction, the second direction being perpendicular to the first direction, the first chip being disposed in the first groove, the second chip being disposed in the second groove.

6. The AiP package assembly of any one of claims 1-4, wherein one of the first chip and the second chip is used to transmit and amplify power of a signal and/or to receive and amplify a signal, and the other is used to adjust the phase and amplitude of a radio frequency signal.

7. The AiP package assembly of claim 4, further comprising vias disposed between the multilayer substrates, the vias being connected to the antenna radiating structure and/or the metal floor for heat conduction, ground, and/or communication.

8. The AiP package assembly of claim 7, wherein said conductive elements comprise first conductive elements connected between said antenna radiating structure and a first chip for signal conduction between said first chip and said antenna radiating structure.

9. The AiP package assembly of claim 8, further including a first antenna feed electrically connected to the first chip, the first via being connected to the first chip through the first antenna feed.

10. The AiP package assembly of claim 7, wherein the pass-through further includes a second pass-through, the metal floor including a first metal floor, the second pass-through being connected between the first metal floor and the second face for transferring heat from the first metal floor to the second face.

11. The AiP package assembly of claim 7, wherein the metal floor includes a second metal floor, the via further including a third via connected between the second metal floor and the second chip for communication with the second chip.

12. The AiP package assembly of claim 11, wherein the metal floor includes a third metal floor electrically connected to the second chip, the third via being connected to the second chip through the third metal floor.

13. The AiP package assembly of any one of claims 1-4, wherein the shielding structure includes a first shielding structure disposed within the containment cavity, the first shielding structure disposed between the first chip and the second chip.

14. The AiP package assembly of any one of claims 1-4, wherein the shielding structure includes a second shielding structure disposed between the first chip and the antenna radiating structure and on a substrate proximate to the first chip.

15. The AiP package assembly of any one of claims 1-4, wherein the shielding structure includes a third shielding structure disposed between the second chip and the antenna radiating structure and on a substrate proximate to the second chip.

16. The AiP package assembly of any one of claims 1 to 4 wherein the shielding structure includes a cylindrical or cubic structure surrounded by a plurality of metal posts, the plurality of posts being connected by feed lines.

17. The AiP package assembly of any one of claims 2-4, wherein the antenna radiating structure includes a parasitic antenna and a radiating antenna, the parasitic antenna being disposed on the first face and outside the containment cavity, the radiating antenna being disposed within the containment cavity and on the substrate proximate the first face.

18. The AiP package assembly of any one of claims 2 to 4, wherein one side wall of the first chip is electrically connected to the substrate by a wire, and the other side wall of the first chip is bonded to the other substrate by eutectic bonding.

19. The AiP package assembly of any one of claims 2-4, wherein the active face of the second chip is bonded to the substrate by a first ball implant.

20. The AiP package assembly according to any one of claims 2 to 4, wherein the substrate is an LTCC substrate or an epoxy substrate or a glass substrate.