[go: up one dir, main page]

CN119673763A - Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device - Google Patents

Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device Download PDF

Info

Publication number
CN119673763A
CN119673763A CN202411761634.9A CN202411761634A CN119673763A CN 119673763 A CN119673763 A CN 119673763A CN 202411761634 A CN202411761634 A CN 202411761634A CN 119673763 A CN119673763 A CN 119673763A
Authority
CN
China
Prior art keywords
gallium nitride
temperature
layer
low
nitride layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202411761634.9A
Other languages
Chinese (zh)
Inventor
王瑞
王彦彬
敖辉
庄文荣
颜建锋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sino Nitride Semiconductor Co Ltd
Original Assignee
Sino Nitride Semiconductor Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sino Nitride Semiconductor Co Ltd filed Critical Sino Nitride Semiconductor Co Ltd
Priority to CN202411761634.9A priority Critical patent/CN119673763A/en
Publication of CN119673763A publication Critical patent/CN119673763A/en
Pending legal-status Critical Current

Links

Landscapes

  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

The invention discloses a manufacturing method of a gallium nitride substrate, which comprises the steps of alternately growing N first low-temperature gallium nitride layers and N second high-temperature gallium nitride layers on a gallium nitride template from bottom to top in sequence to form a first epitaxial layer, wherein the first low-temperature gallium nitride layers are silicon-doped gallium nitride films grown in a low-temperature range, the second high-temperature gallium nitride layers are undoped gallium nitride films grown in a high-temperature range, stripping the growth substrate of the gallium nitride template, electrochemically etching the first epitaxial layers, etching each first low-temperature gallium nitride layer to form a hole structure, enabling the first epitaxial layers to be etched into a porous gallium nitride thick film, and sequentially growing a third low-temperature gallium nitride layer and a doped fourth high-temperature gallium nitride layer on the second high-temperature gallium nitride layer on the uppermost layer to form a non-porous gallium nitride thick film. The invention provides a homogeneous gallium nitride substrate, which reduces the negative warpage caused by the temperature difference between the upper surface and the lower surface of a growth substrate. The invention also discloses a manufacturing method of the semiconductor device and a gallium nitride substrate.

Description

Gallium nitride substrate and manufacturing method thereof, and manufacturing method of semiconductor device
Technical Field
The invention relates to the field of semiconductor growth substrate materials, in particular to a gallium nitride substrate structure and a preparation method thereof.
Background
GaN single crystal growth substrates, while disadvantageous in terms of price and size, have significantly less defect density than GaN layers grown epitaxially on heterogeneous substrates (Si, siC), such as heteroepitaxial GaN on Si growth substrates, with dislocation densities typically around 1E9cm -2, while epitaxial GaN dislocation densities on GaN free-standing substrates typically decrease to around 1E6cm -2. Therefore, a GaN single crystal growth substrate, whether a laser chip or a power, radio frequency device, would be the most preferred or even the only choice for high performance, highly stable high end products.
On one hand, the commercial GaN self-supporting substrate is obtained by grinding and polishing after growing in an HVPE epitaxial mode, and is limited by technology and cost, the thickness of the GaN growth substrate is not large and is generally about 500 mu m, and on the other hand, the chip manufacturing process of the radio frequency device and the power device is often carried out under the large size of 4-8 inches. However, in the epitaxial growth process of the gallium nitride substrate with the large-size thin growth substrate, the growth substrate can form very large negative warpage due to temperature difference, which can affect the thickness and the component ratio of the epitaxial film layer, further affect the uniformity of the device performance, and the uniformity is often unacceptable in the industrialization process of the device.
Therefore, there is an urgent need for a method and structure for fabricating a gallium nitride substrate that can solve the above-mentioned problems.
Disclosure of Invention
The invention aims to provide a manufacturing method of a gallium nitride substrate, and provides a homogeneous gallium nitride substrate, which reduces negative warpage caused by temperature difference between the upper surface and the lower surface of a growth substrate.
In order to achieve the above purpose, the invention provides a manufacturing method of a gallium nitride substrate, which comprises the steps of alternately growing N first low-temperature gallium nitride layers and N second high-temperature gallium nitride layers on a gallium nitride template in sequence from bottom to top to form a first epitaxial layer, wherein the first low-temperature gallium nitride layers are silicon-doped gallium nitride films grown in a low-temperature range, the second high-temperature gallium nitride layers are undoped gallium nitride films grown in a high-temperature range, N is an integer greater than or equal to 2, peeling the growth substrate of the gallium nitride template, electrochemically etching the first epitaxial layers, forming corrosion holes where silicon impurities gather when current flows through the silicon-doped first low-temperature gallium nitride layers, enabling each first low-temperature gallium nitride layer to be etched into a hole structure, etching the first high-temperature gallium nitride thick film into the first epitaxial layer, sequentially growing a third low-temperature gallium nitride layer and a fourth low-temperature gallium nitride layer on the second high-temperature gallium nitride layer of the uppermost layer in the porous gallium nitride to form a gallium nitride film in the high-temperature range, and growing the third low-temperature gallium nitride layer into the non-porous gallium nitride film.
Preferably, N is 10 or more and 20 or less. The porous non-porous periodic structure with 10-20 periods of the scheme ensures that the prepared porous gallium nitride thick film has thicker thickness and stable structure.
Preferably, when the first epitaxial layer is grown, in each cycle of growing the first low-temperature gallium nitride layer and the second high-temperature gallium nitride layer, the time ratio of the silane-off time to the silane-on time is 1:3, and the doping concentration of silicon doping in the first low-temperature gallium nitride layer is 1E19-3E19cm -3.
Preferably, the low temperature range of the growth of the first low temperature gallium nitride layer is 850-950 ℃, and the high temperature range of the growth of the second high temperature gallium nitride layer is 1000-1100 ℃.
Preferably, the thickness ratio of the second high-temperature gallium nitride layer to the first low-temperature gallium nitride layer is less than or equal to 1:15.
Preferably, the total thickness of the first low-temperature gallium nitride layer is 250-350um, and the total thickness of the second high-temperature gallium nitride layer is 10-20um.
Preferably, the gallium nitride template further comprises a buffer layer grown on the growth substrate, the first epitaxial layer is grown on one side of the buffer layer away from the growth substrate, the buffer layer is a gallium nitride layer, and the thickness of the buffer layer is 3-5um.
Preferably, the gallium nitride template further comprises a buffer layer grown on the growth substrate, the first epitaxial layer is grown on one side of the buffer layer away from the growth substrate, the buffer layer is a gallium nitride layer, and the stripping of the growth substrate from the buffer layer specifically comprises the step of using ultraviolet laser to scan the heated side of the gallium nitride template away from the first epitaxial layer so as to strip the growth substrate.
Specifically, the heating temperature of the ultraviolet laser scanning gallium nitride template is 800-900 ℃.
Preferably, the fourth high temperature gallium nitride layer is a silicon doped gallium nitride layer, and the silicon doping concentration is 1E18-5E18cm -3.
Preferably, the fourth high temperature gallium nitride layer is a carbon doped gallium nitride layer, and the carbon doping concentration is 5E18-10E18cm -3.
Preferably, the thickness ratio of the third low-temperature gallium nitride layer to the fourth high-temperature gallium nitride layer is less than or equal to 1:30.
Specifically, the thickness of the third low-temperature gallium nitride layer is 5-10um, and the thickness of the fourth high-temperature gallium nitride layer is 250-350um.
Preferably, after the second epitaxial layer is grown, grinding and polishing one side of the porous gallium nitride thick film away from the non-porous gallium nitride thick film and/or grinding and polishing one side of the non-porous gallium nitride thick film away from the porous gallium nitride thick film, so that the gallium nitride substrate is thinned to a preset thickness.
The invention also provides a manufacturing method of the semiconductor device, which comprises the steps of manufacturing the gallium nitride substrate by using the manufacturing method of the gallium nitride substrate, growing a semiconductor epitaxial structure on one side of the gallium nitride substrate far away from the porous gallium nitride thick film, and grinding and polishing one side of the gallium nitride substrate far away from the semiconductor epitaxial structure to remove the porous gallium nitride thick film, so that the semiconductor device is manufactured.
Preferably, when the gallium nitride substrate is polished away from the side of the semiconductor epitaxial structure, the third low-temperature gallium nitride layer is also completely removed, so that the fourth high-temperature gallium nitride layer is independently used as a supporting substrate of the semiconductor device.
The invention also provides a gallium nitride substrate, which is manufactured by the manufacturing method of the gallium nitride substrate.
The invention also provides a gallium nitride substrate, which comprises a porous gallium nitride thick film and a nonporous gallium nitride thick film, wherein the porous gallium nitride thick film is formed by sequentially and alternately stacking N first low-temperature porous gallium nitride layers and second high-temperature gallium nitride layers from bottom to top, the first low-temperature porous gallium nitride layers are silicon-doped gallium nitride layers and form a hole structure in a silicon aggregation area, the nonporous gallium nitride thick film grows on the second high-temperature gallium nitride layer on the uppermost layer of the porous gallium nitride thick film, and comprises a third low-temperature gallium nitride layer and a fourth high-temperature gallium nitride layer from bottom to top, and N is an integer of 1 or more than or equal to 2.
Preferably, the thickness ratio of the second high-temperature gallium nitride layer to the first low-temperature gallium nitride layer is less than or equal to 1:15, and the thickness ratio of the third low-temperature gallium nitride layer to the fourth high-temperature gallium nitride layer is less than or equal to 1:30.
Specifically, the total thickness of the low-temperature porous gallium nitride layer is 250-350um, the total thickness of the second high-temperature gallium nitride layer is 10-20um, the thickness of the third low-temperature gallium nitride layer is 5-10um, and the thickness of the fourth high-temperature gallium nitride layer is 250-350um.
Preferably, N is 10 or more and 20 or less.
Preferably, the doping concentration of the silicon doping in the first low-temperature gallium nitride layer is 1E19-3E19cm -3.
Preferably, the fourth high temperature gallium nitride layer is a silicon doped gallium nitride layer, and the silicon doping concentration is 1E18-5E18cm -3.
Preferably, the fourth high temperature gallium nitride layer is a carbon doped gallium nitride layer, and the carbon doping concentration is 5E18-10E18cm -3.
Compared with the prior art, the invention can be used for a growth substrate structure of large-size gallium nitride homoepitaxy and a manufacturing method thereof, the gallium nitride substrate structure with the first low-temperature porous gallium nitride layer on one side of the back is prepared by means of twice epitaxy and one-time electrochemical corrosion, when the gallium nitride substrate with the special composite structure is epitaxially grown, the thermal expansion coefficient is reduced due to the existence of holes on the back, the problem that the back expansion is faster due to the fact that the back temperature of the gallium nitride substrate is higher than the front temperature can be solved, negative warping caused by the temperature difference between the upper surface and the lower surface of the gallium nitride substrate is further reduced, the flatness of the gallium nitride substrate can be improved, the spatial uniformity of the surface temperature during epitaxial growth of the large-size gallium nitride substrate is further improved, and the thickness of a film layer affected by the temperature and the uniformity of doping components (such as Al and In) of the film layer are further improved. In another aspect, the invention further forms a third low temperature gallium nitride layer grown at a low temperature between the porous gallium nitride thick film and the fourth high temperature gallium nitride layer to be self-supported, the oxygen content is high when the temperature is low, the porous gallium nitride thick film is n-type, and the porous gallium nitride thick film and the fourth high temperature gallium nitride layer can be better lattice matched, so that the dislocation density is reduced. In still another aspect, when N is greater than or equal to 2, the porous gallium nitride thick film of the invention is a porous/nonporous periodic structure, which can enable the porous gallium nitride thick film to achieve a thicker thickness, and at the same time, does not collapse so that the gallium nitride lattice becomes a disordered polycrystalline structure.
Drawings
Fig. 1 is a flow chart of the first half of the method of manufacturing a gallium nitride substrate according to the invention.
Fig. 2 is a flow chart of the latter half of the method of manufacturing a gallium nitride substrate according to the invention.
Fig. 3 is a partial flow chart of a method of fabricating a semiconductor device of the present invention.
Fig. 4 is a block diagram of a gallium nitride substrate in an embodiment of the invention.
Fig. 5 is a block diagram of a semiconductor device in an embodiment of the invention.
Fig. 6 is a block diagram of a gallium nitride substrate in another embodiment of the invention.
Detailed Description
In order to describe the technical content, the constructional features, the achieved objects and effects of the present invention in detail, the following description is made in connection with the embodiments and the accompanying drawings.
Referring to fig. 1 and 2, the invention discloses a manufacturing method of a gallium nitride substrate, which comprises steps S1 to S6.
Referring to fig. 1, a gallium nitride template 10 is provided, step S1.
The gallium nitride template 10 includes a growth substrate 11 and a buffer layer 12 grown on the growth substrate 11. In this embodiment, the buffer layer 12 is a gallium nitride layer, and the thickness of the buffer layer 12 is 4um. Among them, the thickness of the buffer layer 12 is preferably 3-5 um. Of course, the thickness of the buffer layer 12 is not limited to the above values, and may be set according to actual needs.
The step S1 of providing the gallium nitride template 10 specifically includes the step of growing a buffer layer 12 on the growth substrate 11. The growth substrate 11 may be a sapphire substrate or a growth substrate of other materials. Buffer layer 12 is an unintentionally doped gallium nitride layer (UGaN).
Referring to fig. 1, in step S2, N first low-temperature gallium nitride layers 21 and N second high-temperature gallium nitride layers 22 are alternately grown in sequence on a gallium nitride template 10, the first low-temperature gallium nitride layers 21 are silicon-doped gallium nitride films grown in a low-temperature range, the second high-temperature gallium nitride layers 22 are undoped gallium nitride films grown in a high-temperature range, so as to form a first epitaxial layer 20 formed by alternately growing N first low-temperature gallium nitride layers 21 and N second high-temperature gallium nitride layers 22 in sequence, wherein N is an integer of 1 or more than 2. Wherein the first epitaxial layer 20 is epitaxially grown using HVPE.
Wherein the first epitaxial layer 20 is grown on the side of the buffer layer 12 remote from the growth substrate 11.
In growing the first epitaxial layer 20, a silicon-doped first low-temperature gallium nitride layer 21 is grown in a low-temperature range and an undoped second high-temperature gallium nitride layer 22 is grown in a high-temperature range sequentially or cyclically. Referring to fig. 4 and 6, in the present embodiment, N is 10 or more and 20 or less. The low temperature range of the growth of the first low temperature gallium nitride layer 21 is 850-950 ℃, and the high temperature range of the growth of the second high temperature gallium nitride layer 22 is 1000-1100 ℃.
Wherein the thickness ratio of the first low-temperature gallium nitride layer 21 to the second high-temperature gallium nitride layer 22 is less than or equal to 1:15. Specifically, the total thickness of the first low-temperature gallium nitride layer 21 is 250-350um, and the total thickness of the second high-temperature gallium nitride layer 22 is 10-20um.
In this embodiment, when the first epitaxial layer 20 is grown, the time ratio of the off-silane to the on-silane is 1:3, when the first low-temperature gallium nitride layer 21 is grown, the off-silane is performed, and when the second high-temperature gallium nitride layer 22 is grown, the time ratio of the off-silane to the on-silane is 1:3. The doping concentration of silicon doping in the first low-temperature gallium nitride layer 21 is 1E19-3E19cm -3.
Referring to fig. 1, step S3, the growth substrate 11 of the gallium nitride template 10 is peeled off.
Step S3 specifically includes scanning a side of the heated gallium nitride template away from the first epitaxial layer 20 using an ultraviolet laser to strip the growth substrate 11.
Wherein the heating temperature of the ultraviolet laser scanning gallium nitride template 10 is 800-900 ℃.
Referring to fig. 1, in step S4, by electrochemically etching the first epitaxial layer 20, corrosion holes are formed where silicon impurities gather when current flows through a low temperature gallium nitride layer 21 doped with silicon, each of the first low temperature gallium nitride layers 21 is etched to form a hole structure into a low temperature porous gallium nitride layer 21a, so that the first epitaxial layer 20 is etched into a porous gallium nitride thick film 20a.
The purpose of the low-temperature silicon doped gallium nitride in the first low-temperature gallium nitride layer 21 is to be used for electrochemical corrosion, and corrosion holes are formed when current flows through the silicon doped gallium nitride, and the corrosion holes often exist where silicon impurities are relatively concentrated.
Preferably, the etching solution for electrochemical etching is oxalic acid, the voltage applied to the two ends of the first epitaxial layer 20 is 5-10V, and the current and the solution concentration for electrochemical etching are performed according to the electrochemical etching process commonly used in the prior art means. By matching proper voltage and Si impurity concentration, forming a porous in the silicon doped layer in the first gallium nitride thick film is realized, and the porous gallium nitride thick film 20a is prepared.
Referring to fig. 2, step S5 sequentially grows a third low temperature gallium nitride layer 31 and a fourth high temperature gallium nitride layer 32 on a side of the porous gallium nitride thick film 20a away from the buffer layer 12 to form a nonporous gallium nitride thick film 30 composed of the third low temperature gallium nitride layer 31 and the fourth high temperature gallium nitride layer 32, the third low temperature gallium nitride layer 31 being a gallium nitride film grown in a low temperature range, the fourth high temperature gallium nitride layer 32 being a doped gallium nitride film grown in a high temperature range.
The non-porous gallium nitride thick film 30 was prepared as a second epitaxial layer made using HVPE. Wherein the thickness ratio of the third low-temperature gallium nitride layer 31 to the fourth high-temperature gallium nitride layer 32 is less than or equal to 1:30. Specifically, the thickness of the third low-temperature gallium nitride layer 31 is 5-10um, and the thickness of the fourth high-temperature gallium nitride layer 32 is 250-350um.
The third low-temperature gan layer 31 is an unintentionally doped gan layer because the third low-temperature gan layer 31 is polished after the subsequent semiconductor device is grown. The third low-temperature gallium nitride layer 31 is used for reducing dislocation density under lattice mismatch, and the third low-temperature gallium nitride layer 31 is low in temperature and high in oxygen content when grown, and is n-type.
Wherein the low temperature range when the first epitaxial layer 20 is grown is consistent with the low temperature range when the second epitaxial layer is grown, and the high temperature range when the first epitaxial layer 20 is grown is consistent with the high temperature range when the second epitaxial layer is grown. When the second epitaxial layer grows, the temperature can be a fixed temperature value, and can also be changed gradually in a corresponding high temperature range and a low temperature range.
In this embodiment, the nonporous gallium nitride thick film 30 is composed of a third low temperature gallium nitride layer 31 and a fourth high temperature gallium nitride layer 32. Of course, without being limited thereto, in another embodiment, the non-porous gallium nitride thick film 30 may be formed by alternately forming a plurality of third low-temperature gallium nitride layers 31 and a plurality of fourth high-temperature gallium nitride layers 32 in sequence, wherein the lowest layer of the second high-temperature gallium nitride layer 21 grown on the porous gallium nitride thick film 20a in the non-porous gallium nitride thick film 30 is the third low-temperature gallium nitride layer 31, the uppermost layer of the non-porous gallium nitride thick film 30 far from the porous gallium nitride thick film 20a is the fourth high-temperature gallium nitride layer 32, and the thickness of the fourth high-temperature gallium nitride layer 32 is 250-350um.
When the third low-temperature gallium nitride layer 31 and the fourth high-temperature gallium nitride layer 32 have multiple layers, the temperature at which the multiple layers of the third low-temperature gallium nitride layer 31 are grown linearly increases from bottom to top. The temperature of the fourth high-temperature gallium nitride layer 32 is linearly increased from bottom to top, and the doping concentration of the fourth high-temperature gallium nitride layer 32 is gradually increased.
In one embodiment, the fourth high temperature gan layer 32 is doped with silicon, such that the manufactured gan substrate 100 is a silicon doped n-type gan substrate, which can be used for growing blue-green laser epitaxy to manufacture a blue-green laser device. The concentration of silicon doping is 1E18-5E18cm -3.
In another embodiment, the fourth high temperature gallium nitride layer 32 is carbon doped, and the resulting gallium nitride substrate 100 is a carbon doped high resistance gallium nitride layer that can be used to grow power or rf device epitaxy to produce power and rf devices. The carbon doping concentration is 5E18-10E18cm -3.
Referring to fig. 2, step S5 is followed by step S6 of polishing the side of the thick porous gallium nitride film 20a away from the thick non-porous gallium nitride film 30 and/or the side of the thick non-porous gallium nitride film 30 away from the thick porous gallium nitride film 20a to thin the gallium nitride substrate 100 to a predetermined thickness. The fourth high temperature gallium nitride layer 32 may be thinned to a predetermined thickness by polishing the side of the non-porous gallium nitride thick film 30 remote from the porous gallium nitride thick film 20 a.
Wherein, polishing the side of the non-porous gan thick film 30 away from the porous gan thick film 20a can reduce the thickness of the fourth high-temperature gan layer 32, and in this embodiment, the thickness of the fourth high-temperature gan layer 32 is reduced from 300um to 250um.
Referring to fig. 3, the present invention further provides a method for manufacturing a semiconductor device, which includes steps S1 to S8.
The gallium nitride substrate 100 is fabricated through steps S1 to S6.
And S7, growing a semiconductor epitaxial structure on the side of the gallium nitride substrate 100 away from the porous gallium nitride thick film 20a.
And S8, thinning the side, away from the semiconductor epitaxial structure, of the gallium nitride substrate 100 by using a grinding and polishing mode to remove the porous gallium nitride thick film 20a, so as to manufacture the semiconductor device.
When the side of the gan substrate 100 away from the semiconductor epitaxial structure is thinned, the third low-temperature gan layer 31 is removed by polishing, so that the fourth high-temperature gan layer 32 serves as the support substrate 11 of the semiconductor device.
The semiconductor device can be a blue-green laser device, a power and radio frequency device and the like.
Referring to fig. 2, the present invention also discloses a gallium nitride substrate 100 manufactured by the manufacturing method of the gallium nitride substrate.
Referring to fig. 5, the gallium nitride substrate 100 includes a porous gallium nitride thick film 20a and a non-porous gallium nitride thick film 30, the porous gallium nitride thick film 20a is formed by sequentially and alternately stacking N first low-temperature porous gallium nitride layers and second high-temperature gallium nitride layers 22 from bottom to top, the first low-temperature porous gallium nitride layers 20a are silicon-doped gallium nitride layers and form a hole structure in a region where silicon gathers, and the non-porous gallium nitride thick film 30 includes a third low-temperature gallium nitride layer 31 grown on the second high-temperature gallium nitride layer 22 and a fourth high-temperature gallium nitride layer 32 grown on the third low-temperature gallium nitride layer 31, N is 1.
Wherein the thickness ratio of the second high temperature gallium nitride layer 22 to the low temperature porous gallium nitride layer 21a is 1:15 or less, and the thickness ratio of the third low temperature gallium nitride layer 31 to the fourth high temperature gallium nitride layer 32 is 1:30 or less.
Specifically, the total thickness of the low-temperature porous gallium nitride layer 22 is 250-350um, the total thickness of the second high-temperature gallium nitride layer 22 is 10-20um, the thickness of the third low-temperature gallium nitride layer 31 is 5-10um, and the thickness of the fourth high-temperature gallium nitride layer 32 is 250-350um.
In one embodiment, the fourth high temperature gan layer 32 is doped with silicon, such that the manufactured gan substrate 100 is a silicon doped n-type gan substrate, which can be used for growing blue-green laser epitaxy to manufacture a blue-green laser device. The concentration of silicon doping is 1E18-5E18cm -3.
In another embodiment, the fourth high temperature gallium nitride layer 32 is carbon doped, and the resulting gallium nitride substrate 100 is a carbon doped high resistance gallium nitride layer that can be used to grow power or rf device epitaxy to produce power and rf devices. The carbon doping concentration is 5E18-10E18cm -3.
Referring to fig. 6, in another embodiment, N is an integer greater than or equal to 2. Specifically, N is 10 or more and 20 or less.
The foregoing description of the preferred embodiments of the present invention is not intended to limit the scope of the claims, which follow, as defined in the claims.

Claims (18)

1.一种氮化镓衬底的制作方法,其特征在于:包括:1. A method for manufacturing a gallium nitride substrate, comprising: 在氮化镓模板上从下至上依次交替生长N个第一低温氮化镓层和N个第二高温氮化镓层以形成第一外延层,所述氮化镓模板包括生长衬底,所述第一低温氮化镓层为在低温范围内生长的硅掺杂的氮化镓膜,所述第二高温氮化镓层为在高温范围内生长的非掺杂的氮化镓膜,N为1或者大于等于2的整数;Alternatingly growing N first low-temperature gallium nitride layers and N second high-temperature gallium nitride layers from bottom to top on a gallium nitride template to form a first epitaxial layer, the gallium nitride template comprising a growth substrate, the first low-temperature gallium nitride layer being a silicon-doped gallium nitride film grown in a low-temperature range, the second high-temperature gallium nitride layer being a non-doped gallium nitride film grown in a high-temperature range, and N being 1 or an integer greater than or equal to 2; 剥离所述氮化镓模板的生长衬底;peeling off the growth substrate of the gallium nitride template; 电化学刻蚀第一外延层,电流流过硅掺杂的第一低温氮化镓层时硅杂质聚集的地方会形成腐蚀孔,使得每一所述第一低温氮化镓层被刻蚀出孔洞结构,第一外延层被刻蚀为多孔氮化镓厚膜;Electrochemically etching the first epitaxial layer, when current flows through the silicon-doped first low-temperature gallium nitride layer, corrosion holes are formed where silicon impurities are gathered, so that each of the first low-temperature gallium nitride layers is etched with a hole structure, and the first epitaxial layer is etched into a porous gallium nitride thick film; 在所述多孔氮化镓厚膜中最上层的第二高温氮化镓层上依次生长第三低温氮化镓层和第四高温氮化镓层以形成无孔氮化镓厚膜,所述第三低温氮化镓层为低温范围内生长的氮化镓膜,所述第四高温氮化镓层为高温范围生长的掺杂的氮化镓膜。A third low-temperature gallium nitride layer and a fourth high-temperature gallium nitride layer are sequentially grown on the second high-temperature gallium nitride layer, which is the uppermost layer in the porous gallium nitride thick film, to form a non-porous gallium nitride thick film, wherein the third low-temperature gallium nitride layer is a gallium nitride film grown in a low-temperature range, and the fourth high-temperature gallium nitride layer is a doped gallium nitride film grown in a high-temperature range. 2.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:N大于等于10且小于等于20,生长第一外延层时,在生长第一低温氮化镓层和第二高温氮化镓层的每个周期中,不通硅烷的时间与通硅烷的时间比为1:3,所述第一低温氮化镓层中硅掺杂的掺杂浓度为1E19cm-3-3E19cm-32. The method for manufacturing a gallium nitride substrate according to claim 1, characterized in that: N is greater than or equal to 10 and less than or equal to 20, when growing the first epitaxial layer, in each cycle of growing the first low-temperature gallium nitride layer and the second high-temperature gallium nitride layer, the ratio of the time without silane flow to the time with silane flow is 1:3, and the doping concentration of silicon doping in the first low-temperature gallium nitride layer is 1E19cm -3 to 3E19cm -3 . 3.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:所述第一低温氮化镓层生长的低温范围为850-950℃,所述第二高温氮化镓层生长的高温范围为1000-1100℃。3. The method for manufacturing a gallium nitride substrate according to claim 1, wherein the low temperature range for growing the first low-temperature gallium nitride layer is 850-950°C, and the high temperature range for growing the second high-temperature gallium nitride layer is 1000-1100°C. 4.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:所述第二高温氮化镓层和所述第一低温氮化镓层的厚度比小于等于1:15;所述第三低温氮化镓层和第四高温氮化镓层的厚度比小于等于1:30。4. The method for manufacturing a gallium nitride substrate according to claim 1, wherein a thickness ratio of the second high temperature gallium nitride layer to the first low temperature gallium nitride layer is less than or equal to 1:15; and a thickness ratio of the third low temperature gallium nitride layer to the fourth high temperature gallium nitride layer is less than or equal to 1:30. 5.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:所述第一低温氮化镓层的总厚度为250um-350um,所述第二高温氮化镓层的总厚度为10-20um;所述第三低温氮化镓层的厚度为5-10um,所述第四高温氮化镓层的厚度为250um-350um。5. The method for manufacturing a gallium nitride substrate according to claim 1, characterized in that: the total thickness of the first low-temperature gallium nitride layer is 250um-350um, the total thickness of the second high-temperature gallium nitride layer is 10-20um; the thickness of the third low-temperature gallium nitride layer is 5-10um, and the thickness of the fourth high-temperature gallium nitride layer is 250um-350um. 6.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:所述氮化镓模板还包括生长于所述生长衬底上的缓冲层,所述第一外延层生长于所述缓冲层远离所述生长衬底的一侧上,所述缓冲层为氮化镓层,所述缓冲层的厚度为3-5um。6. The method for manufacturing a gallium nitride substrate according to claim 1, characterized in that: the gallium nitride template also includes a buffer layer grown on the growth substrate, the first epitaxial layer is grown on a side of the buffer layer away from the growth substrate, the buffer layer is a gallium nitride layer, and the thickness of the buffer layer is 3-5 um. 7.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:所述氮化镓模板还包括生长于所述生长衬底上的缓冲层,所述第一外延层生长于所述缓冲层远离所述生长衬底的一侧上,所述缓冲层为氮化镓层,将所述生长衬底从所述缓冲层上剥离具体包括:使用紫外激光扫描经过加热的所述氮化镓模板远离所述第一外延层的一侧,以将所述生长衬底剥离。7. The method for manufacturing a gallium nitride substrate according to claim 1, characterized in that: the gallium nitride template also includes a buffer layer grown on the growth substrate, the first epitaxial layer is grown on a side of the buffer layer away from the growth substrate, the buffer layer is a gallium nitride layer, and peeling the growth substrate from the buffer layer specifically includes: using an ultraviolet laser to scan a side of the heated gallium nitride template away from the first epitaxial layer to peel off the growth substrate. 8.如权利要求7所述的氮化镓衬底的制作方法,其特征在于:所述紫外激光扫描的氮化镓模板的加热温度为800摄氏度—900摄氏度。8. The method for manufacturing a gallium nitride substrate according to claim 7, wherein the heating temperature of the gallium nitride template scanned by the ultraviolet laser is 800 degrees Celsius to 900 degrees Celsius. 9.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:所述第四高温氮化镓层为硅掺杂的氮化镓层,且硅掺杂的浓度为1E18cm-3-5E18cm-3;或者,所述第四高温氮化镓层为碳掺杂的氮化镓层,且碳掺杂的浓度为5E18cm-3-10E18cm-39. The method for manufacturing a gallium nitride substrate according to claim 1, wherein the fourth high temperature gallium nitride layer is a silicon-doped gallium nitride layer, and the silicon doping concentration is 1E18cm - 3-5E18cm -3 ; or, the fourth high temperature gallium nitride layer is a carbon-doped gallium nitride layer, and the carbon doping concentration is 5E18cm - 3-10E18cm -3 . 10.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:在生长所述第二外延层之后还包括:研磨抛所述多孔氮化镓厚膜远离所述无孔氮化镓厚膜的一侧和/或研磨抛所述无孔氮化镓厚膜远离所述多孔氮化镓厚膜的一侧,以使所述氮化镓衬底减薄至预设厚度。10. The method for manufacturing a gallium nitride substrate according to claim 1, characterized in that: after growing the second epitaxial layer, it also includes: grinding and polishing a side of the porous gallium nitride thick film away from the non-porous gallium nitride thick film and/or grinding and polishing a side of the non-porous gallium nitride thick film away from the porous gallium nitride thick film, so as to thin the gallium nitride substrate to a preset thickness. 11.如权利要求1所述的氮化镓衬底的制作方法,其特征在于:电化学刻蚀第一外延层时,施加在第一外延层20两端的电压为5—10V。11. The method for manufacturing a gallium nitride substrate according to claim 1, wherein when the first epitaxial layer is electrochemically etched, the voltage applied to both ends of the first epitaxial layer 20 is 5-10V. 12.一种半导体器件的制作方法,其特征在于:12. A method for manufacturing a semiconductor device, characterized in that: 使用如权利要求1-11中任一项所述的氮化镓衬底的制作方法制作氮化镓衬底;Manufacturing a gallium nitride substrate using the method for manufacturing a gallium nitride substrate according to any one of claims 1 to 11; 在所述氮化镓衬底远离所述多孔氮化镓厚膜的一侧上生长半导体外延结构;growing a semiconductor epitaxial structure on a side of the gallium nitride substrate away from the porous gallium nitride thick film; 研磨抛所述氮化镓衬底远离所述半导体外延结构的一侧,以去除多孔氮化镓厚膜,从而制成半导体器件。The side of the gallium nitride substrate away from the semiconductor epitaxial structure is ground and polished to remove the porous gallium nitride thick film, thereby manufacturing a semiconductor device. 13.如权利要求12所述的半导体器件的制作方法,其特征在于:研磨抛所述氮化镓衬底远离所述半导体外延结构的一侧时,还完全去除了所述第三低温氮化镓层,以使所述第四高温氮化镓层单独作为所述半导体器件的支撑衬底。13. The method for manufacturing a semiconductor device according to claim 12, characterized in that: when grinding and polishing the side of the gallium nitride substrate away from the semiconductor epitaxial structure, the third low-temperature gallium nitride layer is also completely removed, so that the fourth high-temperature gallium nitride layer alone serves as a supporting substrate for the semiconductor device. 14.一种氮化镓衬底,其特征在于:包括多孔氮化镓厚膜和无孔氮化镓厚膜,所述多孔氮化镓厚膜从下至上由N个第一低温多孔氮化镓层和第二高温氮化镓层依次交替堆叠而成,所述第一低温多孔氮化镓层为硅掺杂的氮化镓层且在硅聚集的区域形成孔洞结构,所述无孔氮化镓厚膜生长于所述多孔氮化镓厚膜最上层的第二高温氮化镓层上,且从下至上包括第三低温氮化镓层和第四高温氮化镓层,N为1或者大于等于2的整数。14. A gallium nitride substrate, characterized in that it comprises a porous gallium nitride thick film and a non-porous gallium nitride thick film, wherein the porous gallium nitride thick film is formed by alternatingly stacking N first low-temperature porous gallium nitride layers and second high-temperature gallium nitride layers from bottom to top, wherein the first low-temperature porous gallium nitride layer is a silicon-doped gallium nitride layer and forms a hole structure in the silicon-aggregated area, and the non-porous gallium nitride thick film is grown on the second high-temperature gallium nitride layer which is the uppermost layer of the porous gallium nitride thick film, and comprises a third low-temperature gallium nitride layer and a fourth high-temperature gallium nitride layer from bottom to top, and N is 1 or an integer greater than or equal to 2. 15.如权利要求14所述的氮化镓衬底,其特征在于:所述第二高温氮化镓层和所述第一低温氮化镓层的厚度比小于等于1:15,所述第三低温氮化镓层和第四高温氮化镓层的厚度比小于等于1:30。15 . The gallium nitride substrate according to claim 14 , wherein a thickness ratio of the second high temperature gallium nitride layer to the first low temperature gallium nitride layer is less than or equal to 1:15, and a thickness ratio of the third low temperature gallium nitride layer to the fourth high temperature gallium nitride layer is less than or equal to 1:30. 16.如权利要求14所述的氮化镓衬底,其特征在于:所述低温多孔氮化镓层的总厚度为250um-350um,所述第二高温氮化镓层的总厚度为10-20um,所述第三低温氮化镓层的厚度为5-10um,所述第四高温氮化镓层的厚度为250um-350um。16. The gallium nitride substrate according to claim 14, characterized in that the total thickness of the low-temperature porous gallium nitride layer is 250um-350um, the total thickness of the second high-temperature gallium nitride layer is 10-20um, the thickness of the third low-temperature gallium nitride layer is 5-10um, and the thickness of the fourth high-temperature gallium nitride layer is 250um-350um. 17.如权利要求14所述的氮化镓衬底,其特征在于:N大于等于10且小于等于20,所述第一低温氮化镓层中硅掺杂的掺杂浓度为1E19cm-3-3E19cm-317 . The gallium nitride substrate according to claim 14 , wherein N is greater than or equal to 10 and less than or equal to 20, and the doping concentration of silicon doping in the first low-temperature gallium nitride layer is 1E19 cm −3 to 3E19 cm −3 . 18.如权利要求15所述的氮化镓衬底,其特征在于:所述第四高温氮化镓层为硅掺杂的氮化镓层,且硅掺杂的浓度为1E18cm-3-5E18cm-3;或者,所述第四高温氮化镓层为碳掺杂的氮化镓层,且碳掺杂的浓度为5E18cm-3-10E18cm-318. The gallium nitride substrate according to claim 15, wherein the fourth high temperature gallium nitride layer is a silicon-doped gallium nitride layer, and the silicon doping concentration is 1E18cm - 3-5E18cm -3 ; or the fourth high temperature gallium nitride layer is a carbon-doped gallium nitride layer, and the carbon doping concentration is 5E18cm - 3-10E18cm -3 .
CN202411761634.9A 2024-12-03 2024-12-03 Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device Pending CN119673763A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411761634.9A CN119673763A (en) 2024-12-03 2024-12-03 Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411761634.9A CN119673763A (en) 2024-12-03 2024-12-03 Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device

Publications (1)

Publication Number Publication Date
CN119673763A true CN119673763A (en) 2025-03-21

Family

ID=94995445

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202411761634.9A Pending CN119673763A (en) 2024-12-03 2024-12-03 Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device

Country Status (1)

Country Link
CN (1) CN119673763A (en)

Similar Documents

Publication Publication Date Title
CN111682061B (en) Nitride epitaxial wafer, preparation method thereof and semiconductor device
CN101896999B (en) Semiconductor substrate, method for producing semiconductor substrate, and electronic device
KR20100092931A (en) Semiconductor substrate, method for producing semiconductor substrate, and electronic device
CN114207825A (en) Substrate for electronic device and method for manufacturing the same
CA2059368C (en) Method of producing semiconductor substrate
US12112985B2 (en) Semiconductor substrate
CN119673763A (en) Gallium nitride substrate and method for manufacturing the same, and method for manufacturing a semiconductor device
CN101140865A (en) III nitride semi-conductor material and growing method thereof
KR20230056686A (en) Heteroepitaxial structure with diamond heat sink
WO2024056041A1 (en) Epitaxial chip structure
CN212991102U (en) Composite substrate structure
CN118251519A (en) Nitride semiconductor substrate and method for manufacturing the same
JP2003178977A (en) Semiconductor crystal and method for manufacturing it
CN112301422B (en) Substrate stripping method based on laminated mask substrate
WO2012065536A1 (en) Semiconductor structure and method for forming the same
CN118792738B (en) Stress control structure, preparation method and application in the preparation process of gallium nitride single crystal
CN106887495A (en) Epitaxial wafer of light emitting diode and preparation method thereof
US8026517B2 (en) Semiconductor structures
CN111584347A (en) GaN-Si heteroepitaxial structure and preparation method thereof
US20090220801A1 (en) Method and apparatus for growth of high purity 6h-sic single crystal
CN215680607U (en) Composite semiconductor substrate
JP2000164511A (en) Nitride semiconductor deposition substrate
CN101615564A (en) A Crack-Free Heteroepitaxial Growth Technology Based on Intermediate Grooving Process
CN117374183A (en) Method for preparing LED (light-emitting diode) by epitaxial growth of GaN (gallium nitride) based on high-temperature refractory metal substrate
JP2000150839A (en) Production of semiconductor substrate

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination