CN119603878A - FC bonding pad processing method and circuit substrate of non-solder mask windowing control type - Google Patents
FC bonding pad processing method and circuit substrate of non-solder mask windowing control type Download PDFInfo
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- CN119603878A CN119603878A CN202411795115.4A CN202411795115A CN119603878A CN 119603878 A CN119603878 A CN 119603878A CN 202411795115 A CN202411795115 A CN 202411795115A CN 119603878 A CN119603878 A CN 119603878A
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Abstract
The invention discloses a processing method of a non-solder mask windowing control type FC bonding pad and a circuit substrate, wherein the processing method comprises the steps of providing a working plate with a circuit pattern; the method comprises the steps of forming a solder resist pattern on a working plate, wherein the solder resist pattern does not cover a preset area on a circuit pattern, the preset area comprises an FC bonding pad forming area, conducting plating-resistant photosensitive film, exposure and development operation on the working plate to form a photosensitive film pattern with a film width of more than or equal to 5 mu m and a film distance of more than or equal to 25 mu m on the preset area, exposing the FC bonding pad forming area outside the photosensitive film pattern, conducting gold plating operation on the working plate to form an FC bonding pad with a diameter of more than or equal to 40 mu m on the FC bonding pad forming area, and then removing the film and coarsening the exposed part of the circuit pattern to finish the processing and manufacturing of the FC bonding pad. The processing method is simple and flexible, can realize the manufacturing of FC bonding pads with various sizes, can realize the manufacturing of FC bonding pads with small sizes, and meets the market demands of chips.
Description
Technical Field
The invention relates to the technical field of circuit boards, in particular to a non-solder mask windowing control type FC bonding pad processing method and a circuit substrate.
Background
The traditional circuit board processing technology generally comprises the steps of material cutting, drilling, copper deposition, electroplating, circuit manufacturing, solder resisting, circuit before electric gold plating, surface treatment, film removing and the like.
However, in the conventional circuit board processing technology, since the size of the FC bonding pad is controlled by the solder mask windowing, the following problems are caused that ① has extremely high requirements on processing operations such as solder mask and electric gold in order to ensure the height difference between the FC bonding pad and the solder mask ink layer, such as extremely high requirements on thickness uniformity of the solder mask ink layer and the electric gold coating, and requirements on thickness of the solder mask ink layer to be less than 15 mu m, and the like, and the processing difficulty is high, and false copper exposure and short circuit are extremely easy to be caused due to the thickness of the solder mask ink to be less than 15 mu m, so that the yield of circuit board products is seriously affected. ② Based on the existing solder mask windowing technology, the manufacturing of the small-size FC bonding pad cannot be realized, namely, the requirements of the chip market cannot be well met.
In view of this, the present invention has been made.
Disclosure of Invention
In order to overcome the defects, the invention provides a non-solder mask windowing control type FC bonding pad processing method and a circuit substrate, wherein the processing method is simple and flexible, can realize the manufacturing of FC bonding pads with various sizes and small-size FC bonding pads, and ensures that the obtained circuit substrate well meets the market demands of chips.
The technical scheme adopted by the invention for solving the technical problems is that the non-solder mask windowing control type FC bonding pad processing method comprises the following steps:
Providing a work board with a circuit pattern;
forming a solder resist pattern on the operation board according to operation data, wherein the solder resist pattern does not cover a preset area on the circuit pattern, and the preset area comprises an FC bonding pad forming area;
Sequentially carrying out plating-resistant photosensitive film coating, exposure and development on the operation plate to form a photosensitive film pattern with a film width of more than or equal to 5 mu m and a film distance of more than or equal to 25 mu m on the preset area, wherein the FC bonding pad forming area is exposed out of the photosensitive film pattern;
performing a gold plating operation on the operation plate to form an FC bonding pad with a diameter of more than or equal to 40 mu m on the FC bonding pad forming area; and then removing the film and coarsening the exposed part of the circuit pattern to finish the processing and manufacturing of the FC bonding pad.
The invention further improves the method, wherein a plating-resistant photosensitive wet film with the thickness of 38-42 mu m is coated on the surface of the operation board and the surface of the solder resist pattern through a wet film printing technology, and then the plating-resistant photosensitive wet film is subjected to exposure and development operation to form the photosensitive film pattern, wherein the specific processing parameters of the exposure operation are that a 21-grid exposure rule is adopted, the number of exposure grids is 7-9, the exposure energy is 120-200 mJ/cm 2, the exposure alignment precision is controlled within 30 mu m, the specific processing parameters of the development operation are that the development window opening precision is controlled within +/-30 mu m, the development point is controlled to be 35-45%, and the development linear speed is controlled within 60-120 m/min.
As a further improvement of the present invention, after the fabrication of the photosensitive film pattern is completed, the photosensitive film pattern is also subjected to a heat curing treatment and/or a UV light curing treatment.
As a further improvement of the invention, the specific processing parameters used in the gold plating operation are that the current is 0.1-0.3A, the electroplating time is 90-120 min, the thickness of the nickel plating layer is 3-15 mu m, and the thickness of the gold plating layer is more than or equal to 0.1 mu m.
As a further improvement of the invention, naOH solution with the temperature of 50+/-5 ℃ and the concentration of 4% -6% is adopted to remove the photosensitive film pattern.
As a further improvement of the invention, the surface roughness Ra of the roughened circuit pattern is more than or equal to 0.3 mu m.
As a further improvement of the present invention, a space is provided between the peripheral edge of the FC pad molding region and the edge of the predetermined region.
As a further improvement of the invention, the thickness of the solder resist pattern after curing is 15-25 mu m.
The invention also provides a circuit substrate, which comprises an insulating base layer, circuit patterns which are arranged on the opposite sides of the insulating base layer and are communicated with each other, a solder resist pattern which is coated on part of the surface of the circuit patterns, and an FC bonding pad which is plated on a preset position of the circuit patterns, wherein the FC bonding pad is manufactured by adopting the non-solder resist windowing control type FC bonding pad processing method.
As a further improvement of the invention, the thickness of the solder resist pattern is 15-25 mu m, and the diameter of the FC bonding pad is more than or equal to 40 mu m.
The manufacturing method has the beneficial effects that ① when the FC bonding pad is manufactured, the size of the FC bonding pad is controlled by the photosensitive film pattern instead of the solder mask windowing in the prior art, so that the processing method of the FC bonding pad is simpler and more flexible, not only can realize manufacturing of FC bonding pads with various sizes, but also can realize manufacturing of FC bonding pads with small sizes (such as 40 mu m), and well meets the use requirement of a chip market. ② The thickness of the solder resist ink layer can be designed to be thicker because the constraint influence of the solder resist ink layer is avoided when the FC bonding pad is manufactured, for example, the thickness of the solder resist pattern after solidification is 15-25 mu m, so that the phenomena of false copper exposure, short circuit and the like caused by thinner solder resist ink layer in the prior art can be effectively avoided, and the yield of circuit board products is effectively ensured.
Drawings
FIG. 1 is a flow chart of a method for processing FC bonding pads of non-solder mask windowing control type according to embodiment 1 of the present invention;
FIG. 2 is a schematic cross-sectional view of a work plate according to embodiment 1 of the present invention;
FIG. 3 is a schematic cross-sectional view of a first intermediate plate obtained after the completion of the solder resist operation on the work plate in example 1 of the present invention;
FIG. 4 is a schematic cross-sectional view of a second intermediate plate obtained after patterning the first intermediate plate according to example 1 of the present invention;
FIG. 5 is a schematic cross-sectional view of a third intermediate plate obtained after the second intermediate plate is subjected to the plating operation in example 1 of the present invention;
FIG. 6 is a schematic cross-sectional view of the third intermediate plate according to embodiment 1 of the present invention after film stripping;
Fig. 7 is a schematic cross-sectional view of a circuit board obtained after roughening the third intermediate plate in example 1 of the present invention.
The following description is made with reference to the accompanying drawings:
1. working plate, 10, circuit pattern, 100, FC bonding pad forming area, 11, insulation base layer, 2, solder resist pattern, 3, photosensitive film pattern, 4, FC bonding pad;
Detailed Description
The preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
Example 1:
referring to fig. 1 to 7, embodiment 1 provides a method for processing a non-solder mask windowing controlled FC pad, which mainly includes the following steps:
s1, providing the work board 1 with the circuit pattern 10.
Specifically, the processing method and specific structure of the work board 1 are not limited to this embodiment 1, and may be determined according to the product design requirements, and the following is given as an example for explanation.
The processing method of the operation board 1 comprises the steps of providing a double-sided copper-clad plate, and sequentially carrying out drilling, copper melting, film coating pretreatment, plating-resistant photosensitive film coating, exposure, development, electroplating and film removal treatment on the double-sided copper-clad plate to obtain the operation board 1. It will be appreciated that the working plate 1 has a specific structure as shown in fig. 2, and the working plate 1 includes an insulation base layer 11 and two circuit patterns 10 respectively disposed on opposite sides of the insulation base layer 11 and connected to each other.
The above-mentioned "drilling, copper melting,", electroplating and film removing treatment "processes all belong to common technical means in the technical field of circuit board processing, and are not described in detail herein.
S2, processing the two opposite sides of the operation board 1 according to operation data to form a solder resist pattern 2, wherein the solder resist pattern 2 does not cover a preset area on the circuit pattern 10, and the preset area comprises an FC bonding pad forming area 100, as shown in fig. 3.
Specifically, in embodiment 1, when the solder mask/resist operation is performed, a dry film of ink may be used as a solder mask medium, or alternatively, a wet film of ink may be used as a solder mask medium, wherein when the dry film of ink is used as a solder mask medium, the dry film of ink may be applied to a specified position on the surface of the work plate 1 by a vacuum film application process to form the solder mask pattern 2, and when the wet film of ink is used as a solder mask medium, the wet film of ink may be printed to a specified position on the surface of the work plate 1 by a screen printing process to form the solder mask pattern 2.
In addition, after the formation of the solder resist pattern 2, the predetermined area on the circuit pattern 10 including the FC pad forming area 100 is not covered by the solder resist pattern 2, and in order to better promote the formation of the FC pad, in this embodiment 1, there is a technical advantage that a space is provided between the peripheral edge of the FC pad forming area 100 and the edge of the predetermined area, that is, the peripheral edge of the FC pad forming area 100 does not overlap with the edge of the predetermined area, and the peripheral edge of the FC pad forming area 100 does not contact with the solder resist pattern 2 (see fig. 4), so as to avoid the influence of the solder resist pattern 2 on the formation of the FC pad.
In addition, after the solder resist pattern 2 is formed, the thermal curing treatment and/or UV light curing treatment is further required to be performed on the solder resist pattern 2 in this embodiment 1 to cure the solder resist pattern 2, so as to facilitate the development of subsequent processes. Furthermore, in embodiment 1, the UV light curing treatment is preferably performed on the solder resist pattern 2, where the light curing rate is greater than or equal to 85%, and the thickness of the solder resist pattern 2 after curing is 15-25 μm, so that the adverse phenomena of false copper exposure, short circuit and the like caused by the thinner thickness of the solder resist pattern in the prior art can be effectively avoided, and the yield of the circuit board product is effectively ensured.
In order to facilitate the description of the subsequent processes, the board obtained after the solder resist/resist operation is performed on the work board 1 is also defined as a first intermediate board in this embodiment 1 (the specific structure thereof is shown in fig. 3).
S3, sequentially performing plating-resistant photosensitive film coating, exposure and development on the operation board 1 to form a photosensitive film pattern 3 with a film width of more than or equal to 5 mu m and a film distance of more than or equal to 25 mu m on the preset area, wherein the FC bonding pad forming area 100 is exposed out of the photosensitive film pattern 3.
Specifically, based on the above definition of the first intermediate plate, the specific processing steps of the present S3 are:
And S31, printing a plating-resistant photosensitive wet film with the thickness of 38-42 mu m (preferably 40 mu m) on one surface of the first middle plate and preset with the preset area through a wet film printing technology (namely a screen printing technology), wherein if one surface of the working plate 1 and preset with the preset area is defined as a front surface, the front surface of the working plate 1 and the surface of the solder resist pattern 2 arranged on the front surface of the working plate 1 are covered by the plating-resistant photosensitive wet film.
And S32, performing exposure and development operation on the plating-resistant photosensitive wet film to process the plating-resistant photosensitive wet film into a photosensitive film pattern 3 in the preset area, wherein the specific processing parameters of the exposure operation are preferably controlled to be that a 21-grid exposure rule is adopted, the number of exposure grids is 7-9 grid, the exposure energy is 120-200 mJ/cm 2, the exposure alignment precision is controlled to be within 30 mu m, the specific processing parameters of the development operation are preferably controlled to be that the development windowing precision is controlled to be within +/-30 mu m, the development point is controlled to be 35% -45%, and the development linear speed is controlled to be 60-120 m/min.
Based on the above preferred exposure and development processing parameters, the photosensitive film pattern 3 with a film width of not less than 5 μm and a film distance of not less than 25 μm can be prepared in this embodiment 1, and the precision is high, which provides a very good technical guarantee for the accurate subsequent preparation of FC pads.
Furthermore, after the fabrication of the photosensitive film pattern 3 is completed, the photosensitive film pattern 3 in embodiment 1 is further subjected to a heat curing process and/or a UV light curing process to cure the photosensitive film pattern 3, which is beneficial to the development of the subsequent gold plating operation. Further, in this embodiment 1, the photosensitive film pattern 3 is preferably subjected to a heat curing treatment having a heat curing rate of 95% or more.
In order to facilitate the description of the subsequent process, the plate obtained after the first intermediate plate is subjected to the photosensitive film pattern formation is also defined as a second intermediate plate in embodiment 1 (the specific structure of which is shown in fig. 4).
S4, performing gold plating operation on the operation board 1 to process and form the FC bonding pad 4 with the diameter more than or equal to 40 mu m on the FC bonding pad forming area 100, and then removing the film and coarsening the exposed part of the circuit pattern 10 to finish the processing and manufacturing of the FC bonding pad 4.
Specifically, based on the above definition of the second intermediate plate, the specific processing steps of the present S4 are:
S41, performing gold plating operation on the FC bonding pad forming area 100 on the second intermediate plate, wherein the gold plating operation essentially comprises two steps of nickel plating and gold plating, which belong to the conventional technical means in the technical field of circuit board processing, and therefore, the details are not described herein, but in order to promote the uniformity of a nickel plating layer and a gold plating layer (namely, promote the uniformity of the FC bonding pad 4), the specific processing parameters of the gold plating operation are preferably controlled to be that the current is 0.1-0.3A, the electroplating time is 90-120 min, the thickness of the nickel plating layer is 3-15 mu m, and the thickness of the gold plating layer is more than or equal to 0.1 mu m.
Based on the above preferred plating parameters, the FC pad 4 having a diameter of 40 μm or more can be manufactured on the FC pad forming region 100 in example 1, as shown in fig. 5.
It can be understood that in this embodiment 1, the size of the FC pad 4 is controlled by the photosensitive film pattern 3, and compared with the prior art in which the size of the FC pad is controlled by solder mask windowing, the operation of this embodiment is simpler and more flexible, and the FC pad is not affected by the constraint of the solder mask ink layer, so that the present embodiment not only can realize the fabrication of FC pads with various sizes, but also can realize the fabrication of FC pads with small sizes (e.g., 40 μm), and well meets the use requirements of the chip market.
In order to facilitate the description of the subsequent process, the board obtained after the second intermediate board is subjected to the gold plating operation is also defined as a third intermediate board in embodiment 1 (the specific structure of which is shown in fig. 5).
S42, after the third intermediate plate is manufactured, naOH solution with the temperature of 50+/-5 ℃ and the concentration of 4% -6% is adopted in the embodiment 1 to remove the photosensitive film pattern 3 on the third intermediate plate. Reference is made in particular to fig. 6.
And S43, roughening the exposed part of the circuit pattern 10, which is close to the FC bonding pad 4, so that the surface roughness Ra of the exposed part is more than or equal to 0.3 mu m. It will be appreciated that by roughening the surface of the above-described exposed portion of the wiring pattern 10, subsequent tinning of the FC pad 4 surface can be facilitated.
And S44, performing surface treatment (namely tin plating), appearance inspection, electrical property test and the like on the FC bonding pad 4 according to the product design requirement, namely finishing the processing and manufacturing of the FC bonding pad 4 to prepare a circuit substrate, wherein the circuit substrate can be specifically shown in figure 7.
As can be seen from the above, ①, in the manufacturing process of the FC bonding pad, the size of the FC bonding pad is controlled by the photosensitive film pattern instead of the solder mask windowing in the prior art, so that the processing method of the FC bonding pad provided by the application is simpler and more flexible, not only can realize manufacturing of FC bonding pads with various sizes, but also can realize manufacturing of FC bonding pads with small sizes (such as 40 μm), and well meets the use requirements of the chip market. ② The thickness of the solder resist ink layer can be designed to be thicker because the constraint influence of the solder resist ink layer is avoided when the FC bonding pad is manufactured, for example, the thickness of the solder resist pattern after solidification is 15-25 mu m, so that the phenomena of false copper exposure, short circuit and the like caused by thinner solder resist ink layer in the prior art can be effectively avoided, and the yield of circuit board products is effectively ensured.
Example 2:
the present embodiment 2 provides a circuit substrate, which includes an insulation base layer 11, circuit patterns 10 disposed on opposite sides of the insulation base layer 11 and communicated with each other, a solder resist pattern 2 covering a part of the surface of the circuit patterns 10, and an FC pad 4 plated on a preset position of the circuit patterns 10, wherein the FC pad 4 is manufactured by the non-solder resist windowing control type FC pad processing method described in the above embodiment 1, and the specific reference may be made to fig. 7.
Further, the thickness of the solder resist pattern 2 is 15-25 μm, and the diameter of the FC bonding pad 4 is more than or equal to 40 μm.
As can be seen from the above, the thickness of the solder resist pattern 2 in the circuit substrate in embodiment 2 is relatively thick, and the size of the FC pad 4 is small, so that the use requirement of the chip market is well satisfied.
Finally, the "first", "second", etc. of the component names in the present specification (e.g., first intermediate plate, second intermediate plate, etc.) are for descriptive purposes only and are not intended to limit the scope of the application as applicable.
In the above description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The foregoing description is only of a preferred embodiment of the invention, which can be practiced in many other ways than as described herein, so that the invention is not limited to the specific implementations disclosed above. While the foregoing disclosure has been described with reference to certain embodiments, it will be understood by those skilled in the art that various changes and modifications may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. Any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention without departing from the technical solution of the present invention still falls within the scope of the technical solution of the present invention.
Claims (10)
1. A non-solder mask windowing control type FC bonding pad processing method is characterized by comprising the following steps:
providing a work board (1) with a circuit pattern (10);
forming a solder resist pattern (2) on the operation board (1) according to operation data, wherein the solder resist pattern (2) does not cover a preset area on the circuit pattern (10), and the preset area comprises an FC bonding pad forming area (100);
Coating a plating-resistant photosensitive film, exposing and developing the operation board (1) in sequence to form a photosensitive film pattern (3) with a film width of more than or equal to 5 mu m and a film distance of more than or equal to 25 mu m on the preset area, wherein the FC bonding pad forming area (100) is exposed outside the photosensitive film pattern (3);
And (3) carrying out gold plating operation on the operation plate (1) to process and form the FC bonding pad (4) with the diameter of more than or equal to 40 mu m on the FC bonding pad forming area (100), and then removing the film and coarsening the exposed part of the circuit pattern (10) to finish the processing and manufacturing of the FC bonding pad (4).
2. The method for processing the FC bonding pad without the solder mask windowing control according to claim 1, wherein a plating-resistant photosensitive wet film with the thickness of 38-42 mu m is coated on the surface of the operation board (1) and the surface of the solder mask pattern (2) through a wet film printing technology, and then the plating-resistant photosensitive wet film is subjected to exposure and development operation to form the photosensitive film pattern (3), wherein the specific processing parameters of the exposure operation are that a 21-grid exposure rule is adopted, the number of exposure grids is 7-9, the exposure energy is 120-200 mJ/cm 2, the exposure alignment precision is controlled within 30 mu m, the specific processing parameters of the development operation are that the development windowing precision is controlled within +/-30 mu m, the development point is controlled within 35% -45%, and the development linear speed is controlled within 60-120 m/min.
3. The method for manufacturing a non-solder mask windowing controlled FC pad according to claim 2, wherein after the completion of the formation of the photosensitive film pattern (3), the photosensitive film pattern (3) is further subjected to a heat curing treatment and/or a UV light curing treatment.
4. The method for manufacturing a non-solder mask windowing controlled FC pad according to claim 1, wherein the specific manufacturing parameters used in the gold plating operation are that the current is 0.1-0.3A, the plating time is 90-120 min, the thickness of the nickel plating layer is 3-15 μm, and the thickness of the gold plating layer is not less than 0.1 μm.
5. The method for manufacturing a non-solder mask windowing controlled FC pad according to claim 1, wherein the photosensitive film pattern (3) is removed by using a NaOH solution with a temperature of 50+ -5 ℃ and a concentration of 4% -6%.
6. The method for manufacturing a non-solder mask windowing controlled FC pad according to claim 1, wherein the roughened circuit pattern (10) has a surface roughness Ra of 0.3 μm or more.
7. The method for manufacturing a non-solder mask windowing controlled FC pad according to claim 1, wherein a space is provided between a peripheral edge of the FC pad molding region (100) and an edge of the predetermined region.
8. The method for manufacturing a non-solder mask windowing controlled FC pad according to claim 1, wherein the thickness of the solder mask pattern (2) after curing is 15-25 μm.
9. A circuit substrate, which is characterized by comprising an insulating base layer (11), circuit patterns (10) which are arranged on the opposite sides of the insulating base layer (11) and are communicated, a solder resist pattern (2) which is coated on a local part of the surface of the circuit patterns (10), and an FC bonding pad (4) which is plated on a preset position of the circuit patterns (10), wherein the FC bonding pad (4) is manufactured by adopting the non-solder resist windowing control type FC bonding pad processing method according to any one of claims 1-8.
10. The circuit board according to claim 9, wherein the thickness of the solder resist pattern (2) is 15-25 μm, and the diameter of the FC pad (4) is not less than 40. Mu.m.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411795115.4A CN119603878A (en) | 2024-12-09 | 2024-12-09 | FC bonding pad processing method and circuit substrate of non-solder mask windowing control type |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411795115.4A CN119603878A (en) | 2024-12-09 | 2024-12-09 | FC bonding pad processing method and circuit substrate of non-solder mask windowing control type |
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| Publication Number | Publication Date |
|---|---|
| CN119603878A true CN119603878A (en) | 2025-03-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202411795115.4A Pending CN119603878A (en) | 2024-12-09 | 2024-12-09 | FC bonding pad processing method and circuit substrate of non-solder mask windowing control type |
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| Country | Link |
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| CN (1) | CN119603878A (en) |
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- 2024-12-09 CN CN202411795115.4A patent/CN119603878A/en active Pending
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