[go: up one dir, main page]

CN119493463A - Electronic device, voltage management method and electronic equipment - Google Patents

Electronic device, voltage management method and electronic equipment Download PDF

Info

Publication number
CN119493463A
CN119493463A CN202311043629.XA CN202311043629A CN119493463A CN 119493463 A CN119493463 A CN 119493463A CN 202311043629 A CN202311043629 A CN 202311043629A CN 119493463 A CN119493463 A CN 119493463A
Authority
CN
China
Prior art keywords
voltage
module
working
pmu
target functional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311043629.XA
Other languages
Chinese (zh)
Inventor
李锐
王淑惠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CN202311043629.XA priority Critical patent/CN119493463A/en
Publication of CN119493463A publication Critical patent/CN119493463A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/324Power saving characterised by the action undertaken by lowering clock frequency

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

The embodiment of the application discloses an electronic device, a voltage management method and electronic equipment, wherein the electronic device can comprise a clock oscillator and a power management unit PMU, the clock oscillator and the PMU are respectively connected with a target functional module, the clock oscillator is used for providing a clock signal for the target functional module, the PMU is used for providing a first working voltage for the clock oscillator, and when the target functional module enters the first working state, the first working voltage is adjusted to a second working voltage which is smaller than the first working voltage. The application can reduce the power consumption of the electronic device in some application scenes.

Description

Electronic device, voltage management method and electronic equipment
Technical Field
The present application relates to the field of clock oscillators, and in particular, to an electronic device, a voltage management method, and an electronic apparatus.
Background
As mobile terminals are moving toward more intelligentization, higher integration and stronger functions, high power consumption of mobile terminals is becoming an increasingly prominent issue. As the service integration level of mobile terminal products is higher and higher, for example, smart phones integrate various functions such as audio and video call, short message, multimedia, internet surfing, video game, photographing, recording, calculation, file management and the like, the consumption of electric energy by mobile terminals is exponentially increased while more convenience is brought to users. The high energy consumption presents more serious challenges for the design of reliability such as the capacity of a battery, heat dissipation of products and the like, and the consumption of environmental resources is also becoming larger and larger. Therefore, in the general trend of advocating low-carbon life, protecting the earth and extremely popularizing mobile terminals, how to effectively manage the power consumption of the mobile terminals or design more energy-saving products is a serious problem in the industry.
For example, the standby scene is one of important scenes of the communication system, the standby power consumption directly affects the standby time of the system, and the duration of the communication system can be obviously improved by reducing the standby power consumption. How to further reduce the power consumption of the system is still a problem to be solved.
Disclosure of Invention
The embodiment of the application provides an electronic device, a voltage management method and electronic equipment, which are used for reducing the power consumption of the electronic device in some application scenes.
In a first aspect, an embodiment of the present application provides an electronic device, which is characterized by including a clock oscillator and a power management unit PMU, where the clock oscillator and the PMU are respectively connected to a target functional module, the clock oscillator is configured to provide a clock signal for the target functional module, the PMU is configured to provide a first working voltage for the clock oscillator, and when the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage, where the second working voltage is smaller than the first working voltage.
According to the embodiment of the application, the power supply voltage of the clock oscillator for providing the clock signal for the target functional module is adjusted, so that when the target functional module enters into some working states (such as standby, sleep, low power consumption modes and the like), the power consumption on the clock oscillator can be reduced by reducing the working voltage of the clock oscillator, and the power consumption of the electronic device is further reduced. That is, when the low power consumption requirement of the target functional module is greater than the working quality requirement in some situations, the working voltage of the clock oscillator can be properly lowered to preferentially meet the low power consumption requirement of the electronic device.
In one possible implementation, the clock signal quality of the clock oscillator at the first operating voltage is better than the clock signal quality at the second operating voltage. That is, in the embodiment of the present application, the first working voltage and the second working voltage have a relationship that the first working voltage is greater than the second working voltage, and further satisfy that the clock signal quality of the clock oscillator at the first working voltage is better than the clock signal quality at the second working voltage. In the embodiment of the application, after the working voltage of the clock oscillator is regulated down, although the quality of the clock signal provided by the clock oscillator is reduced, the requirement on the quality of the clock signal is not high (such as standby, sleep, dormancy, flying or low power consumption, and other scenes) due to the current working state of the target functional module, so that the requirement on the quality of the clock signal can be met by properly sacrificing the quality of the clock signal (such as phase noise, waveform, and the like) of some clock oscillators, and the power consumption of the electronic device can be reduced.
In one possible implementation, the PMU is further configured to adjust the second operating voltage to the first operating voltage when the target functional module enters a second operating state, where a clock signal quality requirement of the target functional module in the second operating state is higher than a clock signal quality requirement in the first operating state. In the embodiment of the application, when the target functional module reenters the second working state (such as the wake-up state, the normal working state and the like) with higher requirements on the clock signal quality, the voltage of the clock oscillator is required to be adjusted and recovered, so that the target functional module can work under better clock signal quality, and the working accuracy and precision of the target functional module are improved.
In one possible implementation, the PMU is further configured to receive first indication information sent by the target functional module, where the first indication information is used to indicate to the PMU that the target functional module enters the first working state, or receive second indication information sent by the target functional module, where the second indication information is used to indicate to the PMU that the target functional module enters the second working state. In the embodiment of the application, the PMU senses when the target functional module enters the first working state or when the target functional module enters the second working state by receiving the indication information sent by the target functional module, so that the working voltage on the clock oscillator is regulated after the state is sensed to reduce the system power consumption. Optionally, the PMU may not only learn the working state of the target functional module by passively receiving the indication information sent by the target functional module, but also learn the working state of the target functional module by actively sensing, for example, monitor the working state of the target functional module in real time, monitor a signal bit or a status bit of the working state of the target functional module, and so on.
In one possible implementation manner, the PMU includes a dc voltage module, where the dc voltage module is connected to the clock oscillator, and the PMU is specifically configured to provide the first working voltage to the clock oscillator through the dc voltage module, where an output voltage of the dc voltage module is the first working voltage. In the embodiment of the application, the power management module PMU may specifically include a dc voltage module for providing the first working voltage for the clock oscillator, where the dc voltage module may convert a higher input voltage into a stable output voltage in various applications, that is, in the embodiment of the application, the input voltage may be stabilized to a fixed output voltage by the dc voltage module so as to provide the stable working voltage for the clock oscillator, so that the clock oscillator may output a clock signal with high quality. For example, the dc voltage module is a low dropout linear regulator LDO or a high precision dc voltage output module.
In one possible implementation, the PMU is specifically configured to adjust the first operating voltage to the second operating voltage by lowering the output voltage of the DC voltage module, and is specifically configured to adjust the second operating voltage to the first operating voltage by raising the output voltage of the DC voltage module. In the embodiment of the application, the clock oscillator is powered by the output voltage of the direct-current voltage module. Therefore, the output voltage of the direct current voltage module can be regulated down when the working voltage on the clock oscillator needs to be reduced, and the output voltage of the direct current voltage module can be regulated up when the working voltage on the clock oscillator needs to be increased.
In one possible implementation manner, the input voltage of the direct current voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module, the voltage regulating module is connected with the direct current voltage module and used for providing the input voltage for the direct current voltage module, and when the target functional module enters the first working state, the PMU is further used for regulating the first working voltage to the second working voltage through regulating the output voltage of the direct current voltage module, and then regulating the input voltage through the voltage regulating module. Because the requirement on the quality of the clock signal is relatively low when the target functional module enters the first working state, in the embodiment of the application, the working voltage of the clock oscillator can be reduced by regulating the output voltage of the direct-current voltage module, so that the power consumption on the clock oscillator is reduced, but because the voltage difference between the input voltage and the output voltage on the direct-current voltage module is increased due to the reduction of the output voltage, the power consumption loss of the direct-current voltage module is possibly increased due to the increase of the voltage difference, the voltage value for providing the input voltage for the direct-current voltage module can be synchronously reduced, so that the voltage difference on the direct-current voltage module is reduced, and the power consumption loss of the direct-current voltage module is compensated. In the process of reducing the input voltage and the output voltage of the direct-current voltage module, the output voltage of the direct-current voltage module is reduced firstly, and then the input voltage is reduced further (namely, the power supply voltage is reduced after the corresponding voltage-regulating module) because the input voltage of the direct-current voltage module is higher than the output voltage, if the input voltage is reduced firstly at this moment, the voltage difference on the direct-current voltage module is reduced further, so that the quality and the stability of the power supply on the direct-current voltage output module are reduced, and when the output voltage is reduced firstly, the voltage difference of the direct-current voltage module is kept at a larger value, so that the quality and the stability of the power supply of the direct-current voltage module are improved, and in addition, when the target functional module needs to enter a first working state, namely, when the requirement on low power consumption is higher, the output voltage is reduced firstly, the working voltage on the clock oscillator is reduced rapidly, so that the effect of reducing the power consumption rapidly is achieved. In summary, in the embodiment of the application, by reducing the input voltage and the output voltage of the direct-current voltage module, the power consumption on the clock oscillator can be reduced, the power consumption of the direct-current voltage module can be further reduced, and the quality and the stability of voltage supply are ensured, so that the overall power consumption of the electronic device is greatly reduced.
In one possible implementation manner, the input voltage of the direct-current voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module, the voltage regulating module is connected with the direct-current voltage module and used for providing the input voltage for the direct-current voltage module, and when the target functional module enters the second working state, the PMU is further used for regulating the input voltage through the voltage regulating module before regulating the second working voltage to the first working voltage through regulating the output voltage of the direct-current voltage module. Since the requirement on the quality of the clock signal is relatively high when the target functional module enters the second working state, in the embodiment of the application, the working voltage of the clock oscillator can be improved by adjusting the output voltage of the direct-current voltage module, so that the clock signal quality of the clock oscillator is ensured, and the normal working state of the target functional module is ensured, but the voltage difference between the input voltage and the output voltage on the direct-current voltage module is reduced due to the improvement of the output voltage, and the power supply ripple rejection ratio (PSRR) of the direct-current voltage module is reduced due to the reduction of the voltage difference, namely the power supply quality and the stability are poor. Therefore, in the embodiment of the application, the voltage value for providing the input voltage for the direct-current voltage module is synchronously increased, so that the power supply ripple rejection ratio (PSRR) on the direct-current voltage module can be improved, and the quality and stability of the voltage supply of the direct-current voltage module are further improved. In summary, in the embodiment of the application, by improving the input voltage and the output voltage of the direct-current voltage module, the clock signal quality of the clock oscillator can be ensured, and the voltage supply quality of the direct-current voltage module can be further improved, so that the working accuracy and precision of the electronic device are greatly improved. In the process of increasing the input voltage and the output voltage of the dc voltage module, the input voltage is increased (i.e. the power supply voltage of the voltage-regulating module is increased correspondingly), and then the output voltage of the dc voltage module is increased further, because the dc voltage module is in a state that the output voltage is lower before entering the second working state, if the output voltage is increased firstly, the voltage difference on the dc voltage module is further reduced, so that the quality and stability of the power supply on the dc voltage module are reduced, and when the input voltage is increased firstly (i.e. the power supply voltage of the voltage-regulating module is increased correspondingly), the voltage difference of the dc voltage module is kept to be a smaller value, so that the quality and stability of the power supply of the dc voltage module are improved.
In one possible implementation, the direct current voltage module is a low dropout linear regulator (LDO) or a high-precision direct current voltage output module, and the voltage regulating module is an alternating current-direct current converter (AC-DC) or a direct current-direct current converter (DC-DC). In the embodiment of the application, the direct-current voltage module can be a high-precision or high-quality voltage stabilizer, and the voltage regulating module can be a direct-current converter such as BUCK, BOOST and the like.
In one possible implementation manner, the target functional module is one or more of a processor, a SoC chip, an on-board device chip, a customer premise equipment CPE chip, a Modem chip, a radio frequency chip and an accelerator. The embodiment of the application can be applied to various scenes, such as application scenes of chip-on-chip systems, vehicle-mounted client terminal equipment chips, modems, processors, various accelerators, sensors and the like.
In one possible implementation, the first operating state includes one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operating state includes one or more of a wake-up, light-up, normal operation, and normal power consumption state. In the embodiment of the present application, the first working state of the target functional module may include entering a standby state, sleeping, flying or some low-power consumption state in which a small part of the functions are powered up (such as payment or clock functions). That is, in these working states, the quality requirement of the target functional module on the clock signal is relatively low, and the normal function of the target functional module is not greatly affected.
In a second aspect, an embodiment of the present application provides a voltage management method, which may be applied to an electronic device, where the electronic device includes a clock oscillator and a power management unit PMU, where the clock oscillator and the PMU are respectively connected to a target functional module, where the method may include providing, by the PMU, a first operating voltage to the clock oscillator, providing, by the clock oscillator, a clock signal to the target functional module, and when the target functional module enters a first operating state, adjusting, by the PMU, the first operating voltage to a second operating voltage, where the second operating voltage is smaller than the first operating voltage.
In one possible implementation, the clock signal quality of the clock oscillator at the first operating voltage is better than the clock signal quality at the second operating voltage.
In one possible implementation, the method further includes adjusting, by the PMU, the second operating voltage to the first operating voltage when the target functional module enters a second operating state, wherein a clock signal quality requirement of the target functional module in the second operating state is higher than a clock signal quality requirement in the first operating state.
In one possible implementation manner, the method further comprises the steps of receiving, by the PMU, first indication information sent by the target functional module, where the first indication information is used to indicate to the PMU that the target functional module enters the first working state, or receiving, by the PMU, second indication information sent by the target functional module, where the second indication information is used to indicate to the PMU that the target functional module enters the second working state.
In one possible implementation, the PMU comprises a direct current voltage module connected with the clock oscillator, and the step of adjusting the first working voltage to a second working voltage through the PMU comprises the step of providing the first working voltage for the clock oscillator through the direct current voltage module by the PMU, wherein the output voltage of the direct current voltage module is the first working voltage.
In one possible implementation, the adjusting the first operating voltage to the second operating voltage by the PMU includes adjusting the first operating voltage to the second operating voltage by the PMU by adjusting down the output voltage of the DC voltage block, and the adjusting the second operating voltage to the first operating voltage by the PMU includes adjusting the second operating voltage to the first operating voltage by the PMU by adjusting up the output voltage of the DC voltage block.
In one possible implementation, the input voltage of the direct current voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module, the voltage regulating module is connected with the direct current voltage module and used for providing the input voltage for the direct current voltage module, and when the target functional module enters the first working state, the PMU regulates the first working voltage to the second working voltage through the voltage regulating module after regulating the output voltage of the direct current voltage module.
In one possible implementation, the input voltage of the direct current voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module, the voltage regulating module is connected with the direct current voltage module and used for providing the input voltage for the direct current voltage module, and when the target functional module enters the second working state, the PMU regulates the input voltage through the voltage regulating module before regulating the second working voltage to the first working voltage through regulating the output voltage of the direct current voltage module.
In one possible implementation manner, the direct current voltage module is a low dropout linear regulator (LDO) or a high-precision direct current voltage output module, and the voltage regulating module is an alternating current-direct current converter (AC-DC) or a direct current-direct current converter (DC-DC).
In one possible implementation manner, the target functional module is one or more of a processor, a SoC chip, an on-board device chip, a customer premise equipment CPE chip, a Modem chip, a radio frequency chip and an accelerator.
In one possible implementation, the first operating state includes one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operating state includes one or more of a wake-up, light-up, normal operation, and normal power consumption state.
In a third aspect, the embodiment of the application provides a chip, wherein the chip is connected with a clock oscillator, the chip and the clock oscillator are respectively connected with a target functional module, the clock oscillator is used for providing a clock signal for the target functional module, the chip can be used for providing a first working voltage for the clock oscillator, and when the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is smaller than the first working voltage.
In one possible implementation manner, the chip is further configured to adjust the second operating voltage to the first operating voltage when the target functional module enters a second operating state, where a clock signal quality requirement of the target functional module in the second operating state is higher than a clock signal quality requirement in the first operating state.
In one possible implementation manner, the chip is further configured to receive first indication information sent by the target functional module, where the first indication information is used to indicate to the chip that the target functional module enters the first working state, or receive second indication information sent by the target functional module, where the second indication information is used to indicate to the chip that the target functional module enters the second working state.
In one possible implementation manner, the chip comprises a direct-current voltage module, wherein the direct-current voltage module is connected with the clock oscillator, and the chip is specifically configured to provide the first working voltage for the clock oscillator through the direct-current voltage module, and the output voltage of the direct-current voltage module is the first working voltage.
In a possible implementation manner, the chip is specifically configured to adjust the first operating voltage to the second operating voltage by adjusting down the output voltage of the dc voltage module, and adjust the second operating voltage to the first operating voltage by adjusting up the output voltage of the dc voltage module.
In one possible implementation manner, the input voltage of the direct-current voltage module is greater than the output voltage, the chip further comprises a voltage regulating module, the voltage regulating module is connected with the direct-current voltage module and used for providing the input voltage for the direct-current voltage module, and when the target functional module enters the first working state, the chip is further used for regulating the first working voltage to the second working voltage through regulating the output voltage of the direct-current voltage module, and then regulating the input voltage through the voltage regulating module.
In one possible implementation manner, the input voltage of the direct-current voltage module is greater than the output voltage, the chip further comprises a voltage regulating module, the voltage regulating module is connected with the direct-current voltage module and used for providing the input voltage for the direct-current voltage module, and when the target functional module enters the second working state, the chip is further used for regulating the input voltage through the voltage regulating module before regulating the second working voltage to the first working voltage through regulating the output voltage of the direct-current voltage module.
In one possible implementation manner, the direct current voltage module is a low dropout linear regulator (LDO) or a high-precision direct current voltage output module, and the voltage regulating module is an alternating current-direct current converter (AC-DC) or a direct current-direct current converter (DC-DC).
In one possible implementation manner, the target functional module is one or more of a processor, a SoC chip, an on-board device chip, a customer premise equipment CPE chip, a Modem chip, a radio frequency chip and an accelerator.
In one possible implementation, the first operating state includes one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operating state includes one or more of a wake-up, light-up, normal operation, and normal power consumption state.
In a fourth aspect, an embodiment of the present application provides an electronic device, which may include the electronic apparatus provided in any one of the implementations of the first aspect, and a target functional module coupled to the electronic apparatus, where the target functional module is configured to operate under the clock signal.
In one possible implementation, the electronic device further includes a memory coupled to the target function module for storing instructions and data generated by the target function module during operation.
In a possible implementation manner, the target function module is further configured to send first indication information to the PMU, where the first indication information is used to indicate to the PMU that the target function module enters the first working state, or send second indication information to the PMU, where the second indication information is used to indicate to the PMU that the target function module enters the second working state.
In a fifth aspect, the present application provides a system on a chip SoC comprising an electronic device provided by any of the implementations of the first aspect above, optionally further comprising an internal memory or an external memory coupled to the electronic device. The SoC may be formed from a chip or may include a chip and other discrete devices.
In a sixth aspect, the present application provides a chip system, which may include the electronic device provided by any implementation manner of the first aspect. In one possible design, the system-on-chip further includes a memory for storing program instructions and data necessary or relevant to the operation of the electronic device. The chip system can be composed of chips, and can also comprise chips and other discrete devices.
In a seventh aspect, the present application provides an intelligent device having a function of implementing the voltage management method provided in any one of the implementation manners of the second aspect. The functions can be realized by hardware, and can also be realized by executing corresponding software by hardware. The hardware or software includes one or more modules corresponding to the functions described above.
In an eighth aspect, an embodiment of the present application provides a computer readable storage medium, where the computer readable storage medium is configured to store program code, where the program code when executed by a processor may implement a voltage management method provided by any one of the implementation manners of the second aspect.
In a ninth aspect, an embodiment of the present application provides a computer program comprising instructions which, when executed by a processor, cause the processor to perform the voltage management method provided by any one of the implementations of the second aspect described above.
Drawings
In order to more clearly describe the embodiments of the present application or the technical solutions in the background art, the following description will describe the drawings that are required to be used in the embodiments of the present application or the background art.
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Fig. 2A is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Fig. 2B is a schematic structural diagram of another electronic device according to an embodiment of the present application.
Fig. 2C is a schematic structural diagram of still another electronic device according to an embodiment of the present application.
Fig. 2D is a schematic diagram of a chip layout structure of an electronic device according to an embodiment of the present application.
Fig. 2E is a schematic diagram of a chip layout structure of another electronic device according to an embodiment of the present application.
Fig. 2F is a schematic diagram of a chip layout structure of another electronic device according to an embodiment of the present application.
Fig. 2G is a schematic structural diagram of another electronic device according to an embodiment of the present application.
Fig. 3A is an interface schematic diagram of some electronic devices entering a first working state according to an embodiment of the present application.
Fig. 3B is an interface schematic diagram of low power mode setting performed by some users according to an embodiment of the present application.
Fig. 4 is a voltage control timing chart of a target functional module in sleep and wake states according to an embodiment of the present application.
Fig. 5 is a flow chart of a voltage management method according to an embodiment of the present application.
Fig. 6 is a flowchart of another voltage management method according to an embodiment of the application.
Detailed Description
Embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
The terms "first," "second," "third," and "fourth" and the like in the description and in the claims and drawings are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
As used in this specification, the terms "component," "module," "system," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, or software in execution. For example, a component may be, but is not limited to being, a process running on a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of illustration, both an application running on a computing device and the computing device can be a component. One or more components may reside within a process and/or thread of execution and a component may be localized on one computer and/or distributed between 2 or more computers. Furthermore, these components can execute from various computer readable media having various data structures stored thereon. The components may communicate by way of local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from two components interacting with one another in a local system, distributed system, and/or across a network such as the internet with other systems by way of the signal).
First, some terms in the present application will be explained in order to be understood by those skilled in the art.
(1) The integrated circuit (INTEGRATED CIRCUIT) is a microelectronic device or component. The components such as transistors, resistors, capacitors, inductors and the like required in a circuit and wiring are interconnected by adopting a certain process, are manufactured on a small or a few small semiconductor wafers or dielectric substrates, and are then packaged in a tube shell to form the microstructure with the required circuit function.
(2) Customer-premises equipment (CPE) refers to a terminal device installed on a user side, such as a computer device, a gateway, or a wireless access point, that provides data transmission or access services for the user. CPE devices are typically devices located indoors including routers, switches, network cards, modems, wireless access devices, fiber optic terminal devices, television boxes, vehicle terminals, etc.
(3) A Modem (Modulator and Demodulator, modem) which implements an important device for remote communication via a public telecommunications network. Mainly for converting binary digital information into analog signals that can be transmitted through a common public information system, or for converting received analog signals into digital information.
(4) The power supply ripple rejection ratio (Power Supply Rejection Ratio, PSRR) represents the ratio of the two voltage gains obtained when the input and output power supplies are considered as two independent signal sources. Is the ratio of the input power supply variation (in volts) to the converter output variation (in volts), and is commonly expressed in decibels. In a high-quality D/a converter, when a power supply voltage for a switching circuit and an operational amplifier is required to be changed, an influence on an output voltage is extremely small. The ratio of the percent of change in the full scale voltage to the percent of change in the supply voltage is generally referred to as the supply ripple rejection ratio.
(5) A direct current-to-direct current (Direct current to Alternating current, DC to DC) converter, which is a circuit for converting electrical energy or an electromechanical device, can convert a Direct Current (DC) power supply into a direct current (or approximately direct current) power supply of different voltages. Its power can range from very small (small battery) to very large (high voltage power supply conversion).
(6) An alternating current-to-direct current (ALTERNATING CURRENT TO DIRECT CURRENT, AC-to-DC) converter is a device that converts alternating current into direct current, the power flow of which may be bi-directional, the power flow from the power source to the load being referred to as rectification, and the power flow from the load back to the power source being referred to as active inversion.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present application, the electronic device 10 may include a clock oscillator 101 and a Power Management Unit (PMU) 102, and the electronic device 10 may be a chip or a chipset or a circuit board with a chip or a chipset mounted thereon, where the chip or the chipset or the circuit board with a chip or a chipset mounted thereon may operate under the driving of necessary software. The electronic device 10 may be located in any electronic apparatus, such as a computer, a mobile phone, a tablet, a smart wearable apparatus, and the like. For example, referring to fig. 2A, fig. 2A is a schematic structural diagram of an electronic device according to an embodiment of the present application, and a clock oscillator 101 and a PMU 102 in the electronic device 10 are respectively connected to a target functional module 20 in the electronic device 30. Wherein,
The clock oscillator 101, which functions to generate a periodic electrical signal, i.e. an oscillating signal, can be used in many applications, for example in digital electronic systems as a clock signal for synchronizing the operation of various circuits, in radio communication systems as a radio frequency signal for transmitting information between a transmitter and a receiver, in sensors for driving sensors, such as pressure sensors, temperature sensors, acceleration sensors, etc., and in audio devices as audio signals, such as music players and electronic organs, etc. In the application, the oscillation signal is mainly used as a clock signal to be discussed, and the power consumption of the clock signal provided by the oscillation signal is optimized. In the embodiment of the present application, the clock oscillator 101 may generate a clock pulse with stable frequency and constant amplitude at a determined oscillation frequency, and provide the clock pulse to each unit or circuit inside the target functional module 20, so that each unit or circuit with different structures and different functions in the target functional module works in cooperation and in coordination with each other under the control of the clock signal according to a unified "beat" and a specified time sequence (time sequence), thereby completing the function of the target functional module in the system.
The power management unit PMU 102 may be configured to manage the conversion, distribution, detection, etc. of the electric energy in the electronic device 30 under the input of the power source such as the battery, the power adapter, or the inverter, and may also provide the operating voltage (e.g., the first operating voltage or the second operating voltage) to the clock oscillator 101 and regulate the operating voltage (e.g., adjust the first operating voltage to the second operating voltage, etc.). Optionally, PMU 102 may be further configured to supply power to target functional module 20, and further, when target functional module 20 is a System on Chip (SoC), may also supply corresponding voltages to other peripherals connected to the SoC (such as various sensors, memories, etc.). Optionally, PMU 102 may further include power protection functions, such as charge control, etc., with additional protection circuitry for over-voltage, under-voltage, over-temperature, etc., to enable proper operation of all units or modules. Optionally, PMU 102 may be connected to the SoC through a plurality of power pins and a system power management interface SPMI, where the plurality of power pins are used to power the SoC, SPMI is used to receive commands such as control of the SoC by the SoC, for example, the first indication information and the second indication information in the embodiment of the present application may be transmitted through SPMI.
Further, referring to fig. 2B, fig. 2B is a schematic structural diagram of another electronic device according to an embodiment of the present application, where the power management unit PMU102 may include a dc voltage module 1021, and optionally, a voltage regulation module 1022. The dc voltage module 1021 is capable of converting an input voltage into a stable output voltage for the clock oscillator 101, that is, providing a stable operating voltage for the clock oscillator 101 through the output voltage. The voltage regulation module 1022 is used to provide an input voltage to the dc voltage module 1021 and control the input voltage. In one possible implementation, the DC voltage module 1021 is a low dropout linear regulator LDO or a high-precision DC voltage output module, and the voltage regulating module 1022 is an alternating current-to-direct current (AC-DC) converter or a direct current-to-direct current (DC-DC) converter, where the DC-DC may be BUCK or Boost.
Alternatively, as shown in fig. 2B, the clock oscillator 101 may include a clock generating circuit 1011 and a peripheral device 1012. In some possible implementations, the clock oscillator 101 may be divided into two parts, namely, a peripheral device part including the crystal oscillator, and a clock generation circuit part that may be integrated inside the chip, since the crystal oscillator (i.e., crystal oscillator) in the clock oscillator 101 is typically made of a quartz crystal, and the chip is typically integrated through a silicon-based substrate. For example, the clock generating circuit 1011 of the clock oscillator 101 is integrated inside the chip, and the crystal is mounted outside the chip as the peripheral device 1012. Illustratively, the power management unit 102 and the clock generating circuit 1011 are integrated in a chip, and the peripheral device 1012 is mounted outside the chip, or the target function module 20 and the clock generating circuit 1011 are integrated in a chip, and the peripheral device 1012 is mounted outside the chip, it will be understood that other component arrangements are also possible, and the embodiment of the present application is not limited thereto.
For example, referring to fig. 2C, fig. 2C is a schematic structural diagram of another electronic device according to an embodiment of the present application, in fig. 2C, the DC voltage module 1021 is taken as a low dropout linear regulator (Low Dropout regulator, LDO), the voltage regulating module 1022 is taken as a Buck in a DC-DC converter (DC-DC), and the clock oscillator 101 is taken as a pierce crystal oscillator (negative resistance oscillator) for describing the electronic device. Wherein,
LDOs are capable of converting a high voltage input to a low voltage output, the principle of operation of which is achieved by reducing the input voltage to the desired output voltage. Specifically, a feedback circuit is arranged in the LDO, and can continuously detect the output voltage, and if the output voltage is lower than a set value, the feedback circuit can adjust the output voltage so as to keep the output voltage stable.
Buck circuits, also known as Buck circuits, are capable of converting a high voltage input to a low voltage output, the principle of operation of which is implemented by PWM (pulse Width modulation) techniques. Specifically, buck achieves stabilization of the output voltage by controlling the voltage duty cycle in each cycle. When the input voltage changes, the Buck automatically adjusts the duty cycle to keep the output voltage stable. Buck and LDO have different working principles, but can convert an input voltage into a stable output voltage for use by electronic equipment. In practical application, a suitable power IC may be selected according to specific requirements, so as to achieve an optimal power management effect.
The circuit of the clock oscillator 101 is generally composed of a crystal oscillator, a control chip, a capacitor, and the like. The clock oscillator in fig. 2C shows a circuit diagram of a pierce oscillator, as shown in fig. 2C, X1 is a crystal oscillator, R1 is a feedback resistor, U1 is an inverter, C1 and C2 are parallel capacitors, and the crystal oscillator X1, C1 and C2 are parallel capacitors, and operate in an inductance region. Optionally, the circuit may further include an in-phase device A1 and an in-phase device A2. The two capacitors of crystal oscillator X1, C1 and C2 form a pi-type network band-pass filter, and the 180-degree phase shift and the required voltage gain are provided at the resonance frequency of the crystal oscillator. R1 is a bias resistor, which makes the inverter U1 operate in a linear region to become a high-gain inverting amplifier, and ensures occurrence of oscillation. In addition, the in-phase devices A1 and A2 can be used to enhance driving capability, and the size of C1 and C2 can affect the output frequency. It will be appreciated that the above circuit configuration is only one possible implementation, and the embodiment of the present application is not particularly limited to the circuit configuration inside the clock oscillator.
For example, referring to fig. 2D, fig. 2D is a schematic diagram of a chip layout structure of an electronic device according to an embodiment of the present application, in fig. 2D, a clock oscillator 101 includes a clock generating circuit 1011 (including A1, A2, C1, C2, U1 and R1) and a peripheral device 1012 (i.e. a crystal oscillator X1), in fig. 2D, a power management unit 102 and the clock generating circuit 1011 in the clock oscillator 101 may be integrated on the same chip, i.e. the chip 1, while a target functional module 20 may be separately integrated on the chip 2, and the crystal oscillator X1 in the clock oscillator 101 may be mounted as the peripheral device 1012 outside the chip 1. For example, referring to fig. 2E, fig. 2E is a schematic diagram of a chip layout structure of another electronic device according to an embodiment of the present application, in fig. 2E, the power management unit 102 may be used as an independent chip 1, and the clock generating circuit 1011 in the clock oscillator 101 and the target functional module 20 may be integrated on the same chip, that is, on the chip 2, and the crystal oscillator X1 in the clock oscillator 101 is mounted as a peripheral device 1012 outside the chip 2. For another example, referring to fig. 2F, fig. 2F is a schematic diagram of a chip layout structure of another electronic device according to an embodiment of the present application, in fig. 2F, the power management unit 102, the clock generating circuit 1011 of the clock oscillator 101, and the target functional module 20 may be integrated on the same chip, i.e. the chip 1, and the crystal oscillator X1 in the clock oscillator 101 is mounted as a peripheral device outside the chip 1.
The structure illustrated in the above embodiment does not constitute a specific limitation on the clock oscillator 101. In other embodiments of the application, clock oscillator 101 may include more or fewer components than shown, or certain components may be combined, or certain components may be split, or different arrangements of components.
The target functional module 20 may be a processor, a SoC chip, a vehicle-mounted device chip, a customer premise equipment CPE chip, a Modem chip, a radio frequency chip, or an accelerator. Alternatively, the target functional module 20 may be some circuit module having a certain function, or the target functional module 20 may be some module or circuit inside the chip. When the target functional module 20 is a module or circuit in the chip, the clock generating circuit 1011 and/or the power management unit PMU102 in the clock oscillator 101 may be integrated in the same chip as the target functional module 20, and the description of the related embodiments in fig. 2D-2F will be omitted herein. Here, the configuration and functions of the SoC chip will be described taking the target functional module 20 as an SoC chip as an example.
The SoC chip may be an integrated circuit with a dedicated target that contains the complete system and has the entire contents of the embedded software. Illustratively, the SOC may include the following modules:
a processor (Central Processing Unit, CPU) is the core of the SoC, responsible for performing various computational and control tasks.
Graphics processor (Graphics Processing Unit, GPU) is responsible for processing graphics and image data in the device, providing high performance graphics rendering and image processing capabilities. For example, it can handle graphics-intensive tasks such as games, graphical interfaces, and high definition video, providing a smooth graphical experience.
Communication module-illustratively, when the electronic device is a mobile communication terminal, the communication module in the SoC may include a baseband processor, a modem, a radio frequency transceiver, and the like. The baseband processor is responsible for processing communication signals for the device, including mobile networks (e.g., 4G, 5G), wi-Fi, etc. The modem is responsible for encoding and decoding signals, and the radio frequency transceiver is responsible for receiving and transmitting wireless signals.
The multimedia module may include an image signal Processing unit (IMAGE SIGNAL Processing unit, ISP), a video codec, an audio processor, and the like. For example, ISPs are responsible for the processing and optimization of camera images, video codecs support the decoding and encoding of various video formats, and audio processors provide high quality audio processing and sound effects functions.
Memory controller the memory controller is used to manage the memory in the device, including flash memory and random access memory (Random Access Memory, RAM), etc. It is responsible for data reading and writing, memory allocation and management.
Sensor controller-sensor controller is used to manage various sensors in the device such as accelerometers, gyroscopes, magnetometers, and light sensors. The sensor is responsible for the acquisition, processing and transmission of sensor data and provides various sensing and positioning functions for equipment.
Memory, soC may also include some Memory for caching data, such as Static Random-Access Memory (SRAM), dynamic Random Access Memory (DRAM), double-rate synchronous dynamic Random Access Memory (Double DATA RATE SDRAM), flash Memory, and so on.
In addition to the above main functional modules, the SoC may further include other functional modules such as a security module, a power management unit, a touch controller, and various interface controllers. These modules cooperate to provide various functions and capabilities of the SoC, which are not listed here. It is to be understood that the internal structure and functions of the SoC in different application scenarios or in different electronic devices may be different, and the embodiment of the present application is not limited in particular.
Referring to fig. 2G, fig. 2G is a schematic structural diagram of another electronic device according to an embodiment of the present application, where the electronic device 30 may further include various memories, various sensors, and other peripherals. Wherein,
Various types of memory, such as universal flash memory (Universal Flash Storage, UFS), dynamic Random Access Memory (DRAM), nand flash memory (NAND FLASH), or Solid State Disk (SSD), among others.
Various types of sensors, such as gyroscopic sensors, acceleration sensors, displays, touch screens, or photographic sensors.
The peripheral devices may include various Communication modules, such as a Modem (Modem), a radio frequency integrated circuit (Radio Frequency Integrated Circuit, RFIC), a wireless network (WIFI) module, or a Near Field Communication (NFC) module.
It is understood that, in one possible implementation, the electronic device 10 of the present application may also form the SoC together with the target functional module 20 and the related devices.
The structure illustrated in the above embodiment does not constitute a specific limitation of the electronic apparatus 10 or the electronic device 30. In other embodiments of the application, the electronic device 10 or the electronic apparatus 30 may include more or fewer components than shown, or may combine certain components, or may split certain components, or may have a different arrangement of components. The components illustrated above may be implemented in hardware, software, or a combination of software and hardware.
Based on the above-mentioned hardware structure of any one of the electronic apparatus 10 or the electronic device 30 in fig. 1 to 2G, in the embodiment of the present application, the specific functions implemented by the electronic apparatus 10 may include the following:
The clock oscillator 101 is used for providing a clock signal for the target functional module 20, the PMU 102 is used for providing a first working voltage for the clock oscillator 101, and when the target functional module 20 enters a first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is smaller than the first working voltage. Optionally, the values of the first operating voltage and the second operating voltage are related to the specific type, function, performance requirement, etc. of the target functional module, which is not particularly limited in the embodiment of the present application, and the operating frequency of the clock oscillator at the first operating voltage or the second operating voltage may not change, but the clock signal quality may be affected only in some ways, that is, the quality of the clock signal may be sacrificed from a certain dimension (such as stability or precision, etc.) without affecting the operating frequency of the clock oscillator. Illustratively, the first operational state of the target functional module may include entering a standby, sleeping, hibernating, flying, or some low power state that maintains a small portion of the functionality powered up (e.g., payment or clock functions, etc.). That is, in these working states, the quality requirement of the target functional module on the clock signal is relatively low, and the normal function of the target functional module is not greatly affected. Optionally, a certain time difference may be set between the time when the target function module 20 enters the first operating state and the time when the PMU 102 adjusts the operating voltage (adjusts the first operating voltage to the second operating voltage), and the time difference may have a matching relationship with the operating state, for example, when the first operating state is the standby state, the time difference may be set to a larger value, because after the user stands by, the electronic device may be reused in a shorter time (i.e., the electronic device 30 in which the electronic device 10 is located, and will not be repeated later), if the voltage on the clock oscillator is already adjusted down at this time, then the voltage on the clock oscillator may need to be adjusted up again in a shorter time, so in the case that the intention of the user is not determined, the possibility of frequent voltage adjustment may be reduced by setting a larger time difference, so that better profit is obtained, and when the first operating state is the sleep or the sleep state, the time difference may be set to a smaller value, because the user may not use the electronic device in a shorter time, and thus the voltage on the clock oscillator may be controlled to be adjusted down in a shorter time, so that better power consumption is saved.
According to the embodiment of the application, the power supply voltage of the clock oscillator for providing the clock signal for the target functional module is adjusted, so that when the target functional module enters into some working states (such as standby, sleep, low power consumption modes and the like), the power consumption on the clock oscillator can be reduced by reducing the working voltage of the clock oscillator, and the power consumption of the electronic device is further reduced. That is, when the low power consumption requirement of the target functional module is greater than the working quality requirement in some situations, the working voltage of the clock oscillator can be properly lowered to preferentially meet the low power consumption requirement of the electronic device.
In one possible implementation, the clock signal quality of the clock oscillator 101 at the first operating voltage is better than the clock signal quality at the second operating voltage. That is, in the embodiment of the present application, the first working voltage and the second working voltage have a relationship that the first working voltage is greater than the second working voltage, and further satisfy that the clock signal quality of the clock oscillator at the first working voltage is better than the clock signal quality at the second working voltage. In the embodiment of the application, after the working voltage of the clock oscillator is regulated down, although the quality of the clock signal provided by the clock oscillator is reduced, the requirement on the quality of the clock signal is not high (such as standby, sleep, dormancy, flying or low power consumption, and other scenes) due to the current working state of the target functional module, so that the requirement on the quality of the clock signal can be met by properly sacrificing the quality of the clock signal (such as phase noise, waveform, and the like) of some clock oscillators, and the power consumption of the electronic device can be reduced.
In one possible implementation, PMU102 is also configured to adjust the second operating voltage to the first operating voltage when target functional module 20 enters a second operating state, where the clock signal quality requirement of target functional module 20 in the second operating state is higher than the clock signal quality requirement in the first operating state. In the embodiment of the application, when the second working state (such as the wake-up state, the normal working state and the like) with higher requirements on the clock signal quality is re-entered, the voltage of the clock oscillator is required to be adjusted and recovered, so that the target functional module can work under better clock signal quality, and the working accuracy and precision of the target functional module are improved.
In one possible implementation, PMU 102 is further configured to receive first indication information sent by the target functional module, where the first indication information is used to indicate to PMU 102 that the target functional module enters the first working state, or receive second indication information sent by the target functional module, where the second indication information is used to indicate to PMU 102 that the target functional module enters the second working state. Optionally, the first indication information or the second indication information may indicate before the target functional module has not entered the corresponding working state, or may indicate after the target functional module has entered the corresponding working state. That is, the first indication information received by the PMU may be indicative of the target functional module about to enter the first working state, or may be indicative of the target functional module having entered the first working state, and similarly, the second indication information has similar features and is not described herein. In the embodiment of the application, the PMU senses when the target functional module enters the first working state or when the target functional module enters the second working state by receiving the indication information sent by the target functional module, so that the working voltage on the clock oscillator is regulated after the state is sensed to reduce the system power consumption. Optionally, the PMU may not only learn the working state of the target functional module by passively receiving the indication information sent by the target functional module, but also learn the working state of the target functional module by actively sensing, for example, monitor the working state of the target functional module in real time, monitor a signal bit or a status bit of the working state of the target functional module, and so on.
In one possible implementation, PMU 102 includes a dc voltage module 1021, where dc voltage module 1021 is connected to clock oscillator 101, and PMU 102 is specifically configured to provide the first operating voltage to clock oscillator 101 through dc voltage module 1021, where an output voltage of dc voltage module 1021 is the first operating voltage. In an embodiment of the present application, the power management module PMU 102 may specifically include a dc voltage module for providing the first working voltage for the clock oscillator, where the dc voltage module may convert a higher input voltage into a stable output voltage in various applications, that is, in the embodiment of the present application, the dc voltage module may stabilize the input voltage to a fixed output voltage so as to provide the stable working voltage for the clock oscillator, so that the clock oscillator may output a clock signal with high quality. For example, the dc voltage module is a low dropout linear regulator LDO or a high precision dc voltage output module.
In one possible implementation, the PMU 102 is specifically configured to adjust the first operating voltage to the second operating voltage by stepping down the output voltage of the DC voltage module 1021, and is specifically configured to adjust the second operating voltage to the first operating voltage by stepping up the output voltage of the DC voltage module 1021. In the embodiment of the application, the output voltage of the direct-current voltage module is used for supplying power to the clock oscillator, so that when the working voltage on the clock oscillator needs to be reduced, the output voltage of the direct-current voltage module can be regulated down. In the embodiment of the application, the output voltage of the direct-current voltage module is used for supplying power to the clock oscillator, so that when the working voltage on the clock oscillator needs to be increased, the output voltage of the direct-current voltage module can be increased.
In one possible implementation, the input voltage of the dc voltage module 1021 is greater than the output voltage, the PMU further includes a voltage regulation module 1022, the voltage regulation module 1022 is connected to the dc voltage module 1021 and is used to provide the input voltage to the dc voltage module 1021, and when the target function module 20 enters the first operation state, the PMU 102 is further used to regulate the input voltage by the voltage regulation module after regulating the first operation voltage to the second operation voltage by regulating the output voltage of the dc voltage module 1021. Because the requirement on the quality of the clock signal is relatively low when the target functional module enters the first working state, in the embodiment of the application, the working voltage of the clock oscillator can be reduced by regulating the output voltage of the direct-current voltage module, so that the power consumption on the clock oscillator is reduced, but because the voltage difference between the input voltage and the output voltage on the direct-current voltage module is increased due to the reduction of the output voltage, the power consumption loss of the direct-current voltage module is possibly increased due to the increase of the voltage difference, the voltage value for providing the input voltage for the direct-current voltage module can be synchronously reduced, so that the voltage difference on the direct-current voltage module is reduced, and the power consumption loss of the direct-current voltage module is compensated. In the process of reducing the input voltage and the output voltage of the direct-current voltage module, the output voltage of the direct-current voltage module is reduced firstly, and then the input voltage is reduced further (namely, the power supply voltage is reduced after the corresponding voltage-regulating module) because the input voltage of the direct-current voltage module is higher than the output voltage, if the input voltage is reduced firstly at this moment, the voltage difference on the direct-current voltage module is reduced further, so that the quality and the stability of the power supply on the direct-current voltage output module are reduced, and when the output voltage is reduced firstly, the voltage difference of the direct-current voltage module is kept at a larger value, so that the quality and the stability of the power supply of the direct-current voltage module are improved, and in addition, when the target functional module needs to enter a first working state, namely, when the requirement on low power consumption is higher, the output voltage is reduced firstly, the working voltage on the clock oscillator is reduced rapidly, so that the effect of reducing the power consumption rapidly is achieved. In summary, in the embodiment of the application, by reducing the input voltage and the output voltage of the direct-current voltage module, the power consumption on the clock oscillator can be reduced, the power consumption of the direct-current voltage module can be further reduced, and the quality and the stability of voltage supply are ensured, so that the overall power consumption of the electronic device is greatly reduced. Optionally, the voltage regulating module 1022 is further connected to other modules (such as other LDOs), so that after the voltage is regulated by the voltage regulating module, the power consumption benefits of other LDO planes can be further obtained, i.e. the power consumption losses on other LDO planes are reduced.
In one possible implementation, the input voltage of the dc voltage module 1021 is greater than the output voltage, the PMU 102 further includes a voltage regulation module 1022, the voltage regulation module 1022 is connected to the dc voltage module 1021 to provide the input voltage to the dc voltage module 1021, and when the target function module 20 enters the second operation state, the PMU 102 is further configured to regulate the input voltage by the voltage regulation module 1022 before regulating the second operation voltage to the first operation voltage by regulating the output voltage of the dc voltage module 1021. Since the requirement on the quality of the clock signal is relatively high when the target functional module enters the second working state, in the embodiment of the application, the working voltage of the clock oscillator can be improved by adjusting the output voltage of the direct-current voltage module, so that the clock signal quality of the clock oscillator is ensured, and the normal working state of the target functional module is ensured, but the voltage difference between the input voltage and the output voltage on the direct-current voltage module is reduced due to the improvement of the output voltage, and the power supply ripple rejection ratio (PSRR) of the direct-current voltage module is reduced due to the reduction of the voltage difference, namely the power supply quality and the stability are poor. Therefore, in the embodiment of the application, the voltage value for providing the input voltage for the direct-current voltage module is synchronously increased, so that the power supply ripple rejection ratio (PSRR) on the direct-current voltage module can be improved, and the quality and stability of the voltage supply of the direct-current voltage module are further improved. In summary, in the embodiment of the application, by improving the input voltage and the output voltage of the direct-current voltage module, the clock signal quality of the clock oscillator can be ensured, and the voltage supply quality of the direct-current voltage module can be further improved, so that the working accuracy and precision of the electronic device are greatly improved. In the process of increasing the input voltage and the output voltage of the dc voltage module, the input voltage is increased (i.e. the power supply voltage of the voltage-regulating module is increased correspondingly), and then the output voltage of the dc voltage module is increased further, because the dc voltage module is in a state that the output voltage is lower before entering the second working state, if the output voltage is increased firstly, the voltage difference on the dc voltage module is further reduced, so that the quality and stability of the power supply on the dc voltage module are reduced, and when the input voltage is increased firstly (i.e. the power supply voltage of the voltage-regulating module is increased correspondingly), the voltage difference of the dc voltage module is kept to be a smaller value, so that the quality and stability of the power supply of the dc voltage module are improved.
In one possible implementation, the DC voltage module 1021 is a low dropout linear regulator LDO or a high precision DC voltage output module, and the voltage regulation module 1022 is an alternating current-to-direct current converter (AC-DC) or a direct current-to-direct current converter (DC-DC). In the embodiment of the application, the direct-current voltage module can be a high-precision or high-quality voltage stabilizer, and the voltage regulating module can be a direct-current converter such as Buck, BOOST and the like.
In one possible implementation, the target functional module 20 is one or more of a SoC chip, an on-board device chip, a customer premise equipment CPE chip, a Modem chip, and a radio frequency chip. The embodiment of the application can be applied to various scenes, such as application scenes of chip-on-chip systems, vehicle-mounted client terminal equipment chips, modems, microprocessors, sensors and the like.
In one possible implementation, the first operating state includes one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operating state includes one or more of a wake-up, light-up, normal operation, and normal power consumption state. In the embodiment of the present application, the first working state of the target functional module may include entering a standby state, sleeping, flying or some low-power consumption state in which a small part of the functions are powered up (such as payment or clock functions). That is, in these working states, the quality requirement of the target functional module on the clock signal is relatively low, and the normal function of the target functional module is not greatly affected.
Referring to fig. 3A, fig. 3A is an interface schematic diagram of some electronic devices entering a first working state according to an embodiment of the present application. As shown in fig. 3A, the user interface 40 may be an interface that is normally used by the user, that is, corresponds to a second working state (e.g., a wake-up state, a light-up state, a normal running state, etc.), and may include basic application icons such as functions of date, clock display, power display, etc. When the user triggers the electronic device to enter the first working state (such as standby, sleep or dormancy state) after some operations (such as screen locking, setting, etc.), the electronic device may present the state of the user interface 41, and the electronic device may implement the related functions of the electronic device 10 in the background, that is, the working voltage on the clock oscillation is adjusted from the first working voltage to the second working voltage, which may refer to the related adjustment scheme after the electronic device enters the first working state, which will not be described herein.
Referring to fig. 3B, fig. 3B is an interface schematic diagram of low power mode setting performed by some users according to an embodiment of the present application. As shown in fig. 3B, the user interface 50 may be an interface for unlocking an electronic device for a user, which may include basic application icons, clock displays, network displays, APP application displays, etc. functions, which will not be described in detail herein. The user interface 501 may be a user interface for a user to "setup" a shortcut function of the electronic device 30 by pulling down a pop-up, and may be used for a user to perform settings of related functions, such as a wireless network switch, a bluetooth switch, a flashlight switch, an electrical bell setting, a low energy mode setting, etc. When the electronic device 30 detects a touch operation (e.g., a click operation on the icon 502) on the icon 502 for the low power mode, the user interface 60 exemplarily shown in fig. 3B may be displayed in response to the operation. The user interface 60 may include specific items set in the low power mode (corresponding to the first operating state in the embodiment of the present application), that is, functions that may still be used in the low power mode, such as a clock function, an emergency call, a flashlight, or a screen unlocking function. After the user turns on the function, the function set by the user may still be turned on after the electronic apparatus 10 or the electronic device 30 in the present application enters the first working state. For example, after the user sets the related functions in the low power mode, the low power mode is triggered by some operations (such as the user manually turning on the related functions via the icon 601 or by long standby), and at this time, the related voltage adjusting functions of the electronic device 10 of the present application are performed in the low power mode, in which the user can still turn on some functions with low requirements on the quality of clock signals, such as the clock functions (manually turning on the related functions via the icon 602), the flashlight functions and the screen unlocking functions, which are set in the user interface 60. That is, if the user only uses the function in the low power consumption mode, the user is not triggered to enter the second working state, i.e. the user still stays in the first working state and does not exit, and the voltage regulating parameter in the first working state is maintained, so that the power consumption is reduced to a greater extent. The specific situation can be set by the user according to his own usage habit or requirement, for example, whether the above-mentioned low power mode function needs to be started and which functions in the mode need to be started are not listed here.
Referring to fig. 4, fig. 4 is a voltage control timing chart of a target functional module in a sleep and wake state according to an embodiment of the present application, based on the structure of any one of the electronic devices 10 or the electronic apparatuses 30 in fig. 1-2D, the following exemplary description describes a process of adjusting the target functional module control line, LDO output and BUCK plane in a time line dimension when the electronic device 10 or the electronic apparatus 30 enters different working states (such as a first working state and a second working state), which specifically includes the following procedures:
1. Before time t1, the system (hereinafter referred to as a system for convenience of description) corresponding to the electronic apparatus 10 or the electronic device 30 is currently in a normal operating state, i.e., a second operating state (for example, a normal operating state, a wake-up operating state, etc. operating state with relatively high requirements for quality of clock signals), and the clock oscillator that currently provides the clock signal for the target functional module operates at a first operating voltage (the first operating voltage value is larger than the second operating voltage). That is, the current output voltage of the LDO is the first operating voltage.
2. At time t1, the system needs to enter the second working state (e.g. sleep state) from the first working state (e.g. normal working state), and then the clock oscillator providing the clock signal for the target functional module can switch to the second working voltage (the second working voltage is smaller than the first working voltage) at a period of time after time t1, i.e. at time t2, that is, the current output voltage of the LDO is adjusted from the first working voltage to the second working voltage. In the embodiment of the application, the purpose of reducing the system power consumption is achieved by reducing the working voltage on the clock oscillator.
3. Further, after the working voltage on the clock oscillator drops after a period of time after the time t2, i.e. at the time t3, that is, after the output voltage of the LDO for providing the voltage to the clock oscillator is adjusted down, the previous stage BUCK plane for providing the input voltage to the clock oscillator can also drop, that is, the voltage regulating module BUCK for providing the input voltage to the LDO can also drop the voltage at the time t3, so as to reduce the voltage difference on the LDO, and further reduce the power consumption of the system.
4. After the voltage regulation process, namely after the time t3 and between the time t4, the system enters the ultra-low power consumption mode provided by the embodiment of the application, so that the power consumption of the system can be saved, and the time of the system in normal use can be prolonged.
5. When the system needs to recover from the second working state to the first working state at time t4, for example, the system is awakened from the sleep state to the normal state, the voltage of the BUCK plane, namely the input voltage of the LDO, can be pulled up at time t5 after t4 so as to avoid that the voltage difference on the LDO is too small to stably work in the subsequent voltage regulating process, and then the output voltage of the LDO, namely the working voltage on the clock oscillator, can be recovered from the second working voltage to the first working voltage at time t6 so as to enable the system to recover to normal work.
It should be noted that, specific time differences between t1 and t2, between t2 and t3, and between t4 and t5, and between t5 and t6 may be set according to the needs of the system, and the time differences corresponding to different systems, different application scenarios, or different functional and performance requirements may be different, which is not listed herein.
The voltage regulation process in the embodiment of the present application is illustrated below with reference to specific operating voltage values (including the first operating voltage and the second operating voltage) and voltage regulation values. For example, when the first operating voltage is 1.0V, the second operating voltage is 0.7V, that is, the output voltages of the corresponding dc voltage output modules are 1.0V and 0.7V, respectively, and the corresponding input voltages are 1.5V and 1.2V, respectively, then the following four modes can be referred to for specific processes and parameters under different voltage regulation modes:
the first mode is to enter a first working state (such as a standby state) to regulate down the output voltage of the LDO
After the target functional module or the electronic device in which the target functional module is located enters the first working state from the second working state, the embodiment mainly adjusts the output voltage of the LDO, and the working state, the input voltage of the LDO, the output voltage of the LDO, the differential pressure of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics related to the specific voltage adjusting process are shown in the following table 1:
TABLE 1
In the first mode, when the target functional module is in the second working state, the input voltage on the LDO is 1.5V, the output voltage is 1.0V, the differential pressure is 0.5V, the working voltage on the clock oscillator is the first working voltage, namely the output voltage of the LDO, and the magnitude is 1.0V, at this time, the output voltage of the LDO is in the normal state, the differential pressure is also in the normal state, and the power consumption on the clock oscillator is larger. When the target functional module enters the first working state, the input voltage of the LDO is unchanged, the output voltage of the LDO is regulated down from 1.0V to 0.7V, the pressure difference on the LDO is 0.8V, namely the pressure difference is increased, correspondingly, the working voltage on the clock oscillator is regulated to be the second working voltage, namely the output voltage of the LDO is 0.7V, at the moment, the power consumption on the clock oscillator is reduced due to the reduction of the working voltage, and the LDO has partial power consumption loss due to the increase of the pressure difference. However, since the input voltage of the LDO is unchanged, the output voltage becomes smaller, so that the output current becomes smaller, and the input current and the output current of the LDO are equal, so that the input current thereof becomes smaller, the value of the input voltage x the input current of the LDO becomes smaller according to the formula of power=voltage x current, i.e. the power received at the LDO decreases, so that the system power consumption is reduced, i.e. generally, there is a power consumption benefit on the electronic device after the voltage regulation.
The second mode is to enter a standby state to regulate down the output voltage of the LDO and regulate down the input voltage of the LDO
After the target functional module or the electronic device in which the target functional module is located enters the first working state from the second working state, the embodiment mainly adjusts the output voltage and the input voltage of the LDO, and the working state, the input voltage of the LDO, the output voltage of the LDO, the differential pressure of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics involved in the specific voltage adjusting process are shown in the following table 2:
TABLE 2
In the second mode, when the target functional module is in the second working state, the input voltage on the LDO is 1.5V, the output voltage is 1.0V, the differential pressure is 0.5V, the working voltage on the clock oscillator is the first working voltage, namely the output voltage of the LDO, and the magnitude is 1.0V, at this time, the output voltage of the LDO is in the normal state, the differential pressure is also in the normal state, and the power consumption on the clock oscillator is larger. When the target functional module enters the first working state, the output voltage of the LDO is firstly reduced from 1.0V to 0.7V, at the moment, the pressure difference on the LDO is 0.8V, namely the pressure difference is increased, correspondingly, the working voltage on the clock oscillator is adjusted to be the second working voltage, namely the output voltage of the LDO is 0.7V, at the moment, the power consumption on the clock oscillator is reduced due to the reduction of the working voltage, and the LDO has partial power consumption loss due to the increase of the pressure difference. Further, the input voltage of the LDO is reduced from 1.5V to 1.2V, at the moment, the pressure difference on the LDO is reduced to 0.5V, namely, the pressure difference is recovered to be normal, the voltage supply is more stable, the power consumption loss is also compensated, and in combination, the power consumption of the system is further reduced, and the performance of the system is further optimized.
In the third mode, the output voltage of the LDO is regulated down first and then the input voltage of the LDO is regulated down, so that the problems of poor power supply stability and poor power supply quality on the LDO caused by too small voltage difference on the LDO can be avoided.
Mode III, entering a standby state, regulating down the output voltage of the LDO and regulating down the input voltage of the LDO
After the target functional module or the electronic device in which the target functional module is located enters the second working state from the first working state, the embodiment mainly adjusts the output voltage of the LDO, and the working state, the input voltage of the LDO, the output voltage of the LDO, the differential pressure of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics related to the specific voltage adjusting process are shown in the following table 3:
TABLE 3 Table 3
In the third mode, when the target functional module is in the first working state, the input voltage on the LDO is 1.2V, the output voltage is 0.7V, the differential pressure is 0.5V, the working voltage on the clock oscillator is the second working voltage, namely the output voltage of the LDO, and the magnitude is 0.7V, at this time, the output voltage of the LDO is smaller, the differential pressure is in a normal state, and the power consumption on the clock oscillator is small. When the target functional module is restored to the second working state, the input voltage of the LDO is unchanged, the output voltage of the LDO is regulated to be 1.0V from 0.7V, the differential pressure on the LDO is 0.2V, namely the differential pressure is reduced, correspondingly, the working voltage on the clock oscillator is regulated to be the first working voltage, and the output voltage of the LDO is 1.0V, at the moment, the power consumption on the clock oscillator is increased due to the increase of the working voltage, so that the target functional module is supported to restore to the normal working state.
The fourth mode is to enter a normal working state and regulate the input voltage of the high LDO and the output voltage of the high LDO
After the target functional module or the electronic device in which the target functional module is located enters the second working state from the first working state, the embodiment mainly adjusts the output voltage and the input voltage of the LDO, and the working state, the input voltage of the LDO, the output voltage of the LDO, the differential pressure of the LDO, the working voltage on the clock oscillator, and the corresponding voltage characteristics and power consumption characteristics involved in the specific voltage adjusting process are shown in the following table 4:
TABLE 4 Table 4
In the fourth mode, when the target functional module is in the first working state, the input voltage on the LDO is 1.2V, the output voltage is 0.7V, the differential pressure is 0.5V, the working voltage on the clock oscillator is the second working voltage, namely the output voltage of the LDO, and the magnitude is 0.7V, at this time, the output voltage of the LDO is smaller, the differential pressure is in a normal state, and the power consumption on the clock oscillator is small. When the target functional module enters the second working state, the input voltage of the LDO is firstly increased from 1.2V to 1.5V, the pressure difference on the LDO is increased to 0.8V, namely the pressure difference is increased, further, the output voltage of the LDO is increased from 0.7V to 1.0V, the pressure difference on the LDO is 0.5V, namely the pressure difference is recovered to be normal, correspondingly, the working voltage on the clock oscillator is adjusted to be the second working voltage, the output voltage of the LDO is 1.0V, so that the target functional module is supported to be recovered to be in the normal working state, at the moment, the power consumption on the clock oscillator is increased due to the increase of the working voltage, and the power consumption on the LDO is recovered to be normal due to the pressure difference.
In the fourth mode, the input voltage of the LDO is first increased and then the output voltage of the LDO is decreased, so that the problems of poor power supply stability and poor power supply quality of the LDO caused by too small voltage difference of the LDO can be avoided.
In summary, the first mode and the second mode are two voltage regulation modes when the target functional module is switched from the second working state to the first working state, the third mode and the fourth mode are two voltage regulation modes when the target functional module is switched from the first working state to the second working state, and the modes of the first mode, the second mode, the third mode, the fourth mode, the second mode and the fourth mode can be implemented according to the mode of the target functional module in the different states.
It can be understood that the various voltage values and the voltage regulation values in the above embodiments are only exemplary descriptions, and the values of the first operating voltage, the second operating voltage, and the input voltage of the LDO are not limited, and the specific values thereof can be adaptively adjusted according to the actual application scenario, performance requirements, or power consumption requirements, and the specific values of the voltages in the embodiments of the present application are not limited.
Referring to fig. 5, fig. 5 is a schematic flow chart of a voltage management method according to an embodiment of the present application, where the method may be applied to the electronic device or the power supply apparatus described in fig. 1 or fig. 2D, and the electronic device may specifically include a clock oscillator and a power supply management unit PMU, where the clock oscillator and the PMU are respectively connected to a target functional module, and the voltage management method may include the following steps S501 to S503, and optionally may further include step S504.
In step S501, the PMU provides a first operating voltage for the clock oscillator.
And step S502, providing a clock signal for the target functional module through the clock oscillator.
And step S503, when the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage by the PMU, and the second working voltage is smaller than the first working voltage.
And step S504, when the target functional module enters a second working state, the second working voltage is regulated to the first working voltage through the PMU, wherein the clock signal quality requirement of the target functional module in the second working state is higher than that in the first working state.
In one possible implementation, the clock signal quality of the clock oscillator at the first operating voltage is better than the clock signal quality at the second operating voltage.
In one possible implementation manner, the method further comprises the steps of receiving, by the PMU, first indication information sent by the target functional module, where the first indication information is used to indicate to the PMU that the target functional module enters the first working state, or receiving, by the PMU, second indication information sent by the target functional module, where the second indication information is used to indicate to the PMU that the target functional module enters the second working state.
In one possible implementation, the PMU comprises a direct current voltage module connected with the clock oscillator, and the step of adjusting the first working voltage to a second working voltage through the PMU comprises the step of providing the first working voltage for the clock oscillator through the direct current voltage module by the PMU, wherein the output voltage of the direct current voltage module is the first working voltage.
In one possible implementation, the adjusting the first operating voltage to the second operating voltage by the PMU includes adjusting the first operating voltage to the second operating voltage by the PMU by adjusting down the output voltage of the DC voltage block, and the adjusting the second operating voltage to the first operating voltage by the PMU includes adjusting the second operating voltage to the first operating voltage by the PMU by adjusting up the output voltage of the DC voltage block.
In one possible implementation, the input voltage of the direct current voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module, the voltage regulating module is connected with the direct current voltage module and used for providing the input voltage for the direct current voltage module, and when the target functional module enters the first working state, the PMU regulates the first working voltage to the second working voltage through the voltage regulating module after regulating the output voltage of the direct current voltage module.
In one possible implementation, the input voltage of the direct current voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module, the voltage regulating module is connected with the direct current voltage module and used for providing the input voltage for the direct current voltage module, and when the target functional module enters the second working state, the PMU regulates the input voltage through the voltage regulating module before regulating the second working voltage to the first working voltage through regulating the output voltage of the direct current voltage module.
In one possible implementation manner, the direct current voltage module is a low dropout linear regulator (LDO) or a high-precision direct current voltage output module, and the voltage regulating module is an alternating current-direct current converter (AC-DC) or a direct current-direct current converter (DC-DC).
In one possible implementation manner, the target functional module is one or more of a SoC chip, an on-board device chip, a customer premise equipment CPE chip, a Modem chip and a radio frequency chip.
In one possible implementation, the first operating state includes one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operating state includes one or more of a wake-up, light-up, normal operation, and normal power consumption state.
It should be noted that, for the specific flow of the voltage management method described in the embodiment of the present application, reference may be made to the related description in the embodiment of the application described in fig. 1 to 4, and the description is omitted here.
Referring to fig. 6, fig. 6 is a schematic flow chart of another voltage management method according to an embodiment of the present application, where the method may be applied to the electronic device or the power supply apparatus described in fig. 1 or fig. 2G, and the electronic device may specifically include a clock oscillator and a power supply management unit PMU, where the clock oscillator and the PMU are respectively connected to a target functional module, and the voltage management method may include the following steps S601 to S608.
In step S601, the PMU provides a first operating voltage for the clock oscillator.
And step S602, providing a clock signal for the target functional module through the clock oscillator.
And step 603, when the target functional module enters a first working state, receiving first indication information sent by the target functional module through the PMU.
Step S604, the PMU adjusts the first working voltage to the second working voltage by reducing the output voltage of the DC voltage module.
Step S605, the PMU regulates down the input voltage through the voltage regulating module.
And step S606, when the target functional module enters a second working state, receiving second indication information sent by the target functional module through the PMU.
In step S607, the PMU regulates the input voltage through the voltage regulation module.
In step S608, the PMU adjusts the second operating voltage to the first operating voltage by raising the output voltage of the dc voltage module.
It should be noted that, for the specific flow of the voltage management method described in the embodiment of the present application, reference may be made to the related description in the embodiment of the application described in fig. 1 to 4, and the description is omitted here.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to the related descriptions of other embodiments.
It should be noted that, for simplicity of description, the foregoing method embodiments are all described as a series of acts, but it should be understood by those skilled in the art that the present application is not limited by the order of acts described, as some steps may be performed in other orders or concurrently in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily required for the present application.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, such as the above-described division of units, merely a division of logic functions, and there may be additional manners of dividing in actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units described above, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on this understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc., in particular may be a processor in the computer device) to perform all or part of the steps of the above-mentioned method of the various embodiments of the present application. The storage medium may include various media capable of storing program codes, such as a USB flash disk, a removable hard disk, a magnetic disk, an optical disk, a Read-Only Memory (ROM), or a random access Memory (Random Access Memory, RAM).
While the application has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that the foregoing embodiments may be modified or equivalents may be substituted for some of the features thereof, and that the modifications or substitutions do not depart from the spirit and scope of the embodiments of the application.

Claims (30)

1. An electronic device is characterized by comprising a clock oscillator and a power management unit PMU, wherein the clock oscillator and the PMU are respectively connected with a target functional module;
the clock oscillator is used for providing a clock signal for the target functional module;
the PMU is used for:
providing a first operating voltage for the clock oscillator;
When the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is smaller than the first working voltage.
2. The apparatus of claim 1, wherein the clock oscillator has a better clock signal quality at the first operating voltage than at the second operating voltage.
3. The apparatus of claim 1 or 2, wherein the PMU is further configured to:
And when the target functional module enters a second working state, adjusting the second working voltage to the first working voltage, wherein the clock signal quality requirement of the target functional module in the second working state is higher than that in the first working state.
4. The apparatus of claim 3, wherein the PMU is further configured to:
And receiving first indicating information sent by the target functional module, wherein the first indicating information is used for indicating the target functional module to enter the first working state to the PMU, or receiving second indicating information sent by the target functional module, and the second indicating information is used for indicating the target functional module to enter the second working state to the PMU.
5. The apparatus of claim 3 or 4, wherein the PMU comprises a dc voltage module, the dc voltage module being connected to the clock oscillator;
The PMU is specifically configured to provide the first working voltage for the clock oscillator through the direct current voltage module, where an output voltage of the direct current voltage module is the first working voltage.
6. The apparatus of claim 5, wherein the PMU is operable to regulate the first operating voltage to the second operating voltage by regulating the output voltage of the DC voltage block, and wherein the PMU is operable to regulate the second operating voltage to the first operating voltage by regulating the output voltage of the DC voltage block.
7. The apparatus of claim 6, wherein the input voltage of the DC voltage module is greater than the output voltage, the PMU further comprising a voltage regulation module coupled to the DC voltage module for providing the input voltage to the DC voltage module;
when the target functional module enters the first working state, the PMU is further configured to regulate the input voltage through the voltage regulating module after regulating the first working voltage to the second working voltage by regulating the output voltage of the direct current voltage module.
8. The device according to claim 6 or 7, wherein the input voltage of the DC voltage module is greater than the output voltage, the PMU further comprises a voltage regulating module connected with the DC voltage module for providing the input voltage to the DC voltage module;
When the target functional module enters the second working state, the PMU is further configured to adjust the input voltage through the voltage adjusting module before adjusting the second working voltage to the first working voltage by adjusting the output voltage of the direct current voltage module.
9. The apparatus of claim 7 or 8, wherein the DC voltage module is a low dropout linear regulator LDO or a high precision DC voltage output module, and the voltage regulating module is an alternating current-to-direct current converter (AC-DC) or a direct current-to-direct current converter (DC-DC).
10. The apparatus of any one of claims 1-9, wherein the target functional module is one or more of a processor, a SoC chip, an on-board device chip, a customer premise equipment CPE chip, a Modem chip, a radio frequency chip, and an accelerator.
11. The apparatus of any of claims 1-10, wherein the first operational state comprises one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operational state comprises one or more of a wake-up, lit state, normal running state, and normal power consumption state.
12. The voltage management method is characterized by being applied to an electronic device, wherein the electronic device comprises a clock oscillator and a power supply management unit PMU, the clock oscillator and the PMU are respectively connected with a target functional module, and the method comprises the following steps:
providing a first operating voltage for the clock oscillator by the PMU;
providing a clock signal to the target functional module through the clock oscillator;
when the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage through the PMU, and the second working voltage is smaller than the first working voltage.
13. The method according to claim 12, wherein the method further comprises:
And when the target functional module enters a second working state, adjusting the second working voltage to the first working voltage through the PMU, wherein the clock signal quality requirement of the target functional module in the second working state is higher than that in the first working state.
14. The method of claim 13, wherein the method further comprises:
And receiving first indicating information sent by the target functional module through the PMU, wherein the first indicating information is used for indicating the target functional module to enter the first working state to the PMU, or receiving second indicating information sent by the target functional module through the PMU, and the second indicating information is used for indicating the target functional module to enter the second working state to the PMU.
15. The method of claim 13 or 14, wherein the PMU includes a dc voltage module coupled to the clock oscillator, wherein the adjusting the first operating voltage to the second operating voltage by the PMU includes:
And the PMU provides the first working voltage for the clock oscillator through the direct-current voltage module, wherein the output voltage of the direct-current voltage module is the first working voltage.
16. The method of claim 15, wherein the adjusting the first operating voltage to the second operating voltage by the PMU comprises:
Adjusting the first operating voltage to the second operating voltage by the PMU by reducing the output voltage of the dc voltage block;
the PMU, for adjusting, by the PMU, the second operating voltage to the first operating voltage, includes:
and adjusting the second working voltage to the first working voltage by the PMU through adjusting the output voltage of the direct-current voltage module.
17. The method of claim 16, wherein the input voltage of the DC voltage module is greater than the output voltage, wherein the PMU further comprises a voltage regulation module coupled to the DC voltage module for providing the input voltage to the DC voltage module, and wherein the method further comprises:
When the target functional module enters the first working state, the PMU regulates the first working voltage to the second working voltage by regulating the output voltage of the direct-current voltage module, and then regulates the input voltage by the voltage regulating module.
18. The method of claim 16 or 17, wherein the input voltage of the dc voltage module is greater than the output voltage, wherein the PMU further comprises a voltage regulation module coupled to the dc voltage module for providing the input voltage to the dc voltage module, and wherein the method further comprises:
When the target functional module enters the second working state, the PMU adjusts the second working voltage to the first working voltage by adjusting the output voltage of the direct-current voltage module, and then the input voltage is adjusted to be higher by the voltage adjusting module.
19. The method of any of claims 12-18, wherein the first operational state comprises one or more of a standby, sleep, hibernate, flight mode, and low power consumption state, or the second operational state comprises one or more of a wake-up, lit state, normal running state, and normal power consumption state.
20. The chip is characterized in that the chip is connected with a clock oscillator, and the chip and the clock oscillator are respectively connected with a target functional module;
The chip is used for:
providing a first operating voltage for the clock oscillator;
When the target functional module enters a first working state, the first working voltage is adjusted to a second working voltage, and the second working voltage is smaller than the first working voltage.
21. The chip of claim 20, wherein the chip is further configured to:
And when the target functional module enters a second working state, adjusting the second working voltage to the first working voltage, wherein the clock signal quality requirement of the target functional module in the second working state is higher than that in the first working state.
22. The chip of claim 21, wherein the chip is further configured to:
The method comprises the steps of receiving first indication information sent by the target functional module, wherein the first indication information is used for indicating the target functional module to enter the first working state to the chip, or receiving second indication information sent by the target functional module, and the second indication information is used for indicating the target functional module to enter the second working state to the chip.
23. The chip of claim 21 or 22, wherein the chip comprises a direct voltage module, the direct voltage module being connected to the clock oscillator;
The chip is specifically configured to provide the first working voltage for the clock oscillator through the dc voltage module, where an output voltage of the dc voltage module is the first working voltage.
24. The chip according to claim 23, wherein the chip is configured to adjust the first operating voltage to the second operating voltage by decreasing the output voltage of the dc voltage module, and to adjust the second operating voltage to the first operating voltage by increasing the output voltage of the dc voltage module.
25. The chip of claim 24, wherein the input voltage of the DC voltage module is greater than the output voltage, the chip further comprising a voltage regulation module coupled to the DC voltage module for providing the input voltage to the DC voltage module;
When the target functional module enters the first working state, the chip is further configured to adjust the input voltage through the voltage adjusting module after the first working voltage is adjusted to the second working voltage by adjusting the output voltage of the direct current voltage module.
26. The chip of claim 24 or 25, wherein the input voltage of the direct current voltage module is greater than the output voltage, the chip further comprising a voltage regulation module connected to the direct current voltage module for providing the input voltage to the direct current voltage module;
When the target functional module enters the second working state, the chip is further used for adjusting the input voltage through the voltage adjusting module before adjusting the second working voltage to the first working voltage through adjusting the output voltage of the direct current voltage module.
27. An electronic device, comprising:
the electronic device of any one of claims 1-11, a target function module coupled to the electronic device;
The target function module is used for operating under the clock signal.
28. The device of claim 27, wherein the electronic device further comprises a memory;
The memory is coupled with the target functional module and is used for storing instructions and data generated by the target functional module during working and running.
29. A computer readable storage medium, characterized in that the computer readable medium is adapted to store a program code which, when executed by an electronic device, implements the method of any of the preceding claims 12-19.
30. A computer program comprising instructions which, when executed by an electronic device, cause the electronic device to perform the method of any of claims 12-19.
CN202311043629.XA 2023-08-17 2023-08-17 Electronic device, voltage management method and electronic equipment Pending CN119493463A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311043629.XA CN119493463A (en) 2023-08-17 2023-08-17 Electronic device, voltage management method and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311043629.XA CN119493463A (en) 2023-08-17 2023-08-17 Electronic device, voltage management method and electronic equipment

Publications (1)

Publication Number Publication Date
CN119493463A true CN119493463A (en) 2025-02-21

Family

ID=94625827

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311043629.XA Pending CN119493463A (en) 2023-08-17 2023-08-17 Electronic device, voltage management method and electronic equipment

Country Status (1)

Country Link
CN (1) CN119493463A (en)

Similar Documents

Publication Publication Date Title
US12045114B2 (en) Throttling of components using priority ordering
CN1319169C (en) Semiconductor integrated circuit having controllable internal power source and voltage
KR101927096B1 (en) Application processor, mobile device having the same, and method of selecting a clock signal for an application processor
KR102169384B1 (en) Switching regulator, power management device and system comprising the same
TW202125976A (en) Non-linear clamp strength tuning method and apparatus
CN114647296A (en) Multilevel memory system power management apparatus and method
KR20220051159A (en) Digitally adjusted dynamically adaptable clock and voltage supply and method
KR101263579B1 (en) METHOD TO REDUCE SYSTEM IDLE POWER THROUGH SYSTEM VR OUTPUT ADJUSTMENTS DURING S0ix STATES
KR20140111896A (en) Application process and driving method thereof
US20110320835A1 (en) System and method for dynamically managing power in an electronic device
US11177844B2 (en) Apparatus for improving the effective performance of a power source and associated methods
CN115441867A (en) Phase-locked loop assisted fast start apparatus and method
EP3930137B1 (en) Power negotiation sequence to improve user experience and battery life
CN119493463A (en) Electronic device, voltage management method and electronic equipment
US10404172B1 (en) Transient booster for zero static loadline switching regulator
CN111580636A (en) Voltage regulating circuit and electronic device
US11050462B2 (en) Combined RFID and power management architecture
US20080172568A1 (en) Apparatus for power control of electronic device
US12093196B2 (en) Power supply communications via a shared channel for performance management
CN118778761B (en) Voltage regulation circuit, electronic device and voltage regulation method
JP4787114B2 (en) Real-time clock device, semiconductor device using the real-time clock device, and electronic equipment
KR102836535B1 (en) Throttling of components using priority ordering
US11194384B2 (en) Circuit and method for improved battery life during suspend mode
CN118777681A (en) Digital Current Sensor System for High Switching Frequency Voltage Regulators
CN118381138A (en) Charging circuit control method, device, terminal equipment and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication