CN119480787B - A method for manufacturing a shallow trench isolation structure - Google Patents
A method for manufacturing a shallow trench isolation structure Download PDFInfo
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- CN119480787B CN119480787B CN202510053282.XA CN202510053282A CN119480787B CN 119480787 B CN119480787 B CN 119480787B CN 202510053282 A CN202510053282 A CN 202510053282A CN 119480787 B CN119480787 B CN 119480787B
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Abstract
本发明涉及一种浅沟槽隔离结构的制作方法，具体涉及半导体技术领域。所述浅沟槽隔离结构的制作方法包括：提供基底，所述基底包括衬底、垫氧化层、垫氮化层和至少一个沟槽，所述垫氧化层形成于所述衬底的表面，所述垫氮化层形成于所述垫氧化层的表面，所述沟槽设置于所述衬底内，且上部贯穿所述垫氧化层、所述垫氮化层形成开口；对所述垫氮化层进行平坦化处理；于所述沟槽内形成隔离氧化层，所述隔离氧化层覆盖所述沟槽和所述垫氮化层；对所述隔离氧化层进行平坦化处理，获得所述浅沟槽隔离结构。采用本发明的浅沟槽隔离结构的制作方法可以减少沟槽隔离结构表面的刮伤，提高浅沟槽隔离结构的良品率。
The present invention relates to a method for manufacturing a shallow trench isolation structure, and in particular to the field of semiconductor technology. The method for manufacturing the shallow trench isolation structure comprises: providing a substrate, the substrate comprising a substrate, a pad oxide layer, a pad nitride layer and at least one trench, the pad oxide layer being formed on the surface of the substrate, the pad nitride layer being formed on the surface of the pad oxide layer, the trench being arranged in the substrate, and the upper portion penetrating the pad oxide layer and the pad nitride layer to form an opening; flattening the pad nitride layer; forming an isolation oxide layer in the trench, the isolation oxide layer covering the trench and the pad nitride layer; flattening the isolation oxide layer to obtain the shallow trench isolation structure. The method for manufacturing the shallow trench isolation structure of the present invention can reduce scratches on the surface of the trench isolation structure and improve the yield rate of the shallow trench isolation structure.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a manufacturing method of a shallow trench isolation structure.
Background
In integrated circuit fabrication, methods of forming shallow trench isolation (Shallow Trench Isolation, STI) are often employed for isolation between individual devices, e.g., different memory cells, fabricated on a substrate. In the prior art, after a pad nitride layer and a pad oxide layer are sequentially formed on a substrate, then the pad nitride layer, the pad oxide layer and the substrate are sequentially etched in a selected area to form a shallow trench, further an isolation oxide layer is filled in the trench until the isolation oxide layer covers the pad nitride layer, and then chemical mechanical polishing is performed on the filled isolation oxide layer until the isolation oxide layer is flush with the pad nitride layer, so that a shallow trench isolation structure is formed in the shallow trench. The yield of the shallow trench isolation structure manufactured by the traditional method is low. Therefore, a method for manufacturing a shallow trench isolation structure is needed to improve the yield of the shallow trench isolation structure.
Disclosure of Invention
In view of the above drawbacks of the prior art, the present invention provides a method for manufacturing a shallow trench isolation structure, so as to improve the problem of low yield of the shallow trench isolation structure.
To achieve the above and other related objects, the present invention provides a method for fabricating a shallow trench isolation structure, the method comprising:
Providing a base, wherein the base comprises a substrate, a pad oxide layer, a pad nitride layer and at least one groove, the pad oxide layer is formed on the surface of the substrate, the pad nitride layer is formed on the surface of the pad oxide layer, the groove is arranged in the substrate, and the upper part of the groove penetrates through the pad oxide layer and the pad nitride layer to form an opening;
Flattening the pad nitride layer;
forming an isolation oxide layer in the groove, wherein the isolation oxide layer covers the groove and the pad nitride layer;
and carrying out planarization treatment on the isolation oxide layer to obtain the shallow trench isolation structure.
In an example of the present invention, after the planarization process is performed on the pad nitride layer, the manufacturing method further includes a process of performing a first cleaning process on the substrate.
In an example of the present invention, the planarization of the isolation oxide layer includes a first cmp process using a non-selective polishing slurry and a second cmp process using a highly selective polishing slurry.
In an example of the present invention, after the planarization process is performed on the pad nitride layer, the manufacturing method further includes a process of performing a back etching process on the pad oxide layer and the pad nitride layer to expose an edge corner of the substrate.
In an example of the present invention, after exposing the edge corner of the substrate, the manufacturing method further includes a process of performing a second cleaning process on the base.
In an example of the present invention, after the second cleaning treatment is performed on the substrate, the manufacturing method further includes a process of rounding the edge corner.
In one example of the present invention, the fillet treatment includes the steps of:
Etching the edge corner;
A line oxide layer is formed on the exposed edge corners and the bottom surface and sidewalls of the trench.
In one example of the invention, the providing a base includes providing the substrate, depositing the pad oxide layer on the substrate, depositing the pad nitride layer on a surface of the pad oxide layer, and forming the trench on the substrate.
In one example of the present invention, chemical mechanical polishing is selected for planarization of the pad nitride layer, and the polishing pad has a hardness of 30 to 40ha.
In an example of the present invention, the thickness of the pad nitride layer before the planarization process is 2-3 times the thickness of the pad nitride layer after the planarization process.
In summary, the present application provides a method for fabricating a shallow trench isolation structure, which comprises planarizing a pad nitride layer, forming an isolation oxide layer in a trench, covering the trench and the pad nitride layer with the isolation oxide layer, and planarizing the isolation oxide layer. The application has the unexpected technical effects that the pad nitride layer is flattened, the defect of the interface between the pad nitride layer and the isolation oxide layer can be improved, the problem that particles scratch the isolation oxide layer easily when the isolation oxide layer is flattened is solved, the surface flatness of the shallow trench isolation structure is improved, and the yield of the shallow trench isolation structure is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a process for fabricating a shallow trench isolation structure according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of forming a pad oxide layer on a substrate according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a pad nitride layer formed on a substrate according to an embodiment of the invention;
FIG. 4 is a schematic diagram illustrating formation of a photoresist layer according to an embodiment of the invention;
FIG. 5 is a schematic illustration of forming a trench in an embodiment of the invention;
FIG. 6 is a schematic diagram illustrating a planarization process for a pad nitride layer according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of pad nitride and pad nitride back-etching in accordance with an embodiment of the present invention;
FIG. 8 is a schematic view of edge corner rounding according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of depositing an isolation oxide layer according to an embodiment of the invention;
FIG. 10 is a schematic diagram illustrating a planarization process for an isolation oxide layer according to an embodiment of the present invention;
FIG. 11 is a schematic diagram illustrating the removal of pad oxide and pad nitride according to an embodiment of the present invention;
FIG. 12 is a schematic diagram of a micro-scale view of the pad nitride layer and pad oxide layer removed according to an embodiment of the present invention;
FIG. 13 is a schematic diagram showing a height distribution diagram of a shallow trench isolation structure according to an embodiment of the present invention;
FIG. 14 is a schematic diagram of a comparative example of the present invention after removal of the pad nitride and pad oxide;
FIG. 15 is a graph showing the height distribution of the shallow trench isolation structure according to the comparative example.
Description of element numbers:
10. Base 100, substrate 110, edge corner 200, pad oxide layer 300, pad nitride layer 400, trench 410, line oxide layer 420, shallow trench isolation structure 500, photoresist layer 510, trench region 600, isolation oxide layer.
Detailed Description
Other advantages and effects of the present invention will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present invention with reference to specific examples. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention.
It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
In the present application, it should be noted that, as terms such as "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., appear, the indicated orientation or positional relationship is based on that shown in the drawings, only for convenience of description and simplification of the description, and does not indicate or imply that the apparatus or element in question must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the application. Furthermore, the terms "first," "second," and the like, as used herein, are used for descriptive and distinguishing purposes only and are not to be construed as indicating or implying a relative importance.
Reference herein to a range of values is to be construed as continuous and includes two endpoints (i.e., a minimum value and a maximum value) of the range of values and each value between the two endpoints of the range of values unless otherwise indicated. When multiple numerical ranges are provided to describe a feature or characteristic, the numerical ranges may be combined.
Based on the problems in the background art, the inventor finds that, under the limitation of the preparation process, particles are easy to form in the formation process of the pad nitride layer, if particles are generated near the interface of the pad nitride layer and the isolation oxide layer, the particles on the pad nitride layer are easily scraped in the planarization process of the isolation oxide layer, and the dropped particles easily scratch the isolation oxide layer, so that scratches exist on the surface of the prepared shallow trench isolation structure, and the yield of the shallow trench isolation structure is affected. Therefore, the application provides a manufacturing method of a shallow trench isolation structure, which is used for reducing scratches during planarization treatment of an isolation oxide layer and improving the yield of the shallow trench isolation structure.
Referring to fig. 1 to 10, the method for fabricating a shallow trench isolation structure according to the present invention includes the following steps:
S1, providing a base 10 as shown in FIG. 5, wherein the base 10 comprises a substrate 100, a pad oxide layer 200, a pad nitride layer 300 and at least one groove 400, the pad oxide layer 200 is formed on the surface of the substrate 100, the pad nitride layer 300 is formed on the surface of the pad oxide layer 200, the groove 400 is arranged in the substrate 100, and the upper part of the groove 400 penetrates through the pad oxide layer 200 and the pad nitride layer 300 to form an opening;
s2, carrying out planarization treatment on the pad nitride layer 300 to form a structure shown in FIG. 6;
s3, as shown in FIG. 9, forming an isolation oxide layer 600 in the trench 400, wherein the isolation oxide layer 600 covers the trench 400 and the pad nitride layer 300;
S4, flattening the isolation oxide layer 600 to obtain the shallow trench isolation structure 420 shown in FIG. 10.
Referring to fig. 5, in step S1 of the present invention, the substrate 100 may be any material suitable for forming a semiconductor structure, such as undoped monocrystalline silicon, doped monocrystalline silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-on-insulator (S-SiGeOI), silicon-on-insulator (SiGeOI), germanium-on-insulator (GeOI), and the like. The specific material and thickness of the substrate 100 are not limited, and the substrate 100 may be a P-doped semiconductor substrate or an N-doped semiconductor substrate, and the doping type of the impurities may be flexibly set according to the semiconductor structure to be formed. In this embodiment, the substrate 100 is, for example, a silicon substrate. The number of grooves 400 may be one or a plurality, and the number of grooves 400 is a plurality.
It should be noted that, the substrate 10 may be a semi-product purchased from an outsource or may be prepared by itself, and in one embodiment, the substrate 10 is prepared by itself on the basis of the substrate 100.
Referring to fig. 2 to 5, the method for preparing the substrate 10 is as follows:
Referring to fig. 2, in an embodiment of the present invention, a pad oxide layer 200 is formed on a surface of a substrate 100, and the pad oxide layer 200 can be used as a protection layer of the substrate 100 to protect the substrate 100 covered by the pad oxide layer in a subsequent process, so as to avoid unnecessary damage to the substrate 100. Moreover, since the stress of the pad nitride layer 300 formed later is large, dislocation is easily caused on the surface of the substrate 100 when the pad nitride layer 300 is formed on the substrate 100, and the pad oxide layer 200 can be used to provide a buffer when the pad nitride layer 300 is formed, so that the dislocation of the pad nitride layer 300 on the substrate 100 is prevented. The material of the pad oxide layer 200 may be silicon dioxide or the like, and the pad oxide layer 200 may be formed by any one of a dry oxygen oxidation method, a wet oxygen oxidation method, an In-situ vapor growth method (In-Situ Steam Generation, ISSG) or the like. In this embodiment, the pad oxide layer 200 is formed, for example, by a dry oxygen oxidation method, and the substrate 100 is illustratively placed in a furnace tube, oxygen is introduced, and the surface of the substrate 100 reacts with oxygen at a high temperature to form a dense pad oxide layer 200. The preparation process of the base 10 may further include cleaning the substrate 100 before the pad oxide layer 200 is formed on the substrate 100, and impurities existing on the surface of the substrate 100 may be removed by cleaning the substrate 100, so as to avoid the influence of the impurities on the subsequent process, and further ensure the performance of the device. Illustratively, the cleaning of the substrate 100 may be accomplished by cleaning the substrate 100 with a cleaning liquid, or the substrate 100 may be accomplished by purging the substrate 100 with a gas such as nitrogen.
Referring to fig. 3, in one embodiment of the present invention, after forming the pad oxide layer 200, a pad nitride layer 300 is formed on the pad oxide layer 200. The material of the pad nitride layer 300 may be silicon nitride, oxynitride, and in this embodiment, the pad nitride layer 300 is, for example, silicon nitride. Pad nitride layer 300 may be formed by any one of low pressure chemical vapor deposition, sub-atmospheric pressure chemical vapor deposition, ion-enhanced chemical vapor deposition, or high density plasma chemical vapor deposition. Illustratively, in preparing the pad nitride layer 300 using a low pressure chemical vapor deposition process, silicon nitride may be generated by reacting ammonia gas with dichlorosilane. By providing the pad nitride layer 300, not only can the substrate 100 be protected from damage during the subsequent formation of the trench 400 and etching of the substrate 100, but also the substrate 100 can be protected from planarization processes such as Chemical Mechanical Polishing (CMP) involved in the fabrication of the shallow trench isolation structure 420.
Referring to fig. 4 and 5, in an embodiment of the present invention, after forming the pad nitride layer 300, a photoresist layer 500 is formed by coating a photoresist on the pad nitride layer 300, and the type of the photoresist material is not limited, and may be a common positive photoresist material or a negative photoresist material, and after coating the photoresist, the coated photoresist is patterned by a photolithography process such as mask exposure, development, etc., so as to expose the trench region 510. The pad nitride layer 300, the pad oxide layer 200, and the substrate 100 are sequentially etched using the patterned photoresist layer 500 as a mask layer to form the trench 400. The number, position, depth, width, etc. of the grooves 400 are set according to actual needs, and are not limited herein. In this embodiment, the trench 400 extends from the pad nitride layer 300 into the substrate 100, and the trench 400 has a rectangular shape. The pad nitride layer 300, the pad oxide layer 200, and a portion of the substrate 100 may be sequentially removed by dry etching to form the trench 400, and an etching gas including, for example, one or more of chlorine (Cl 2), trifluoromethane (CHF 3), difluoromethane (CH 2F2), nitrogen trifluoride (NF 3), sulfur hexafluoride (SF 6), hydrogen bromide (HBr), etc., or a combination thereof with oxygen (O 2), and the photoresist layer 500 is removed by wet cleaning or ashing treatment after the etching is completed.
Referring to fig. 6, in step S2 of the present invention, the planarization process is performed on the pad nitride layer 300, so as to reduce particles on the surface of the pad nitride layer 300, and to improve the problem that particles are easily scratched on the surface of the shallow trench isolation structure 420 when the subsequent shallow trench isolation structure 420 is formed. In the present invention, the thickness of the pad nitride layer 300 before the planarization treatment is 2 to 3 times, for example, 2 to 3 times, 2.5 times, 3 times, or any one of 2 to 3 times the thickness after the planarization treatment. The pad nitride 300 is planarized, for example, by chemical mechanical polishing. In the semiconductor manufacturing process, the main working principle of the chemical mechanical polishing technology is that the surface to be polished and a polishing pad are relatively moved under a certain pressure and in the presence of polishing slurry, and the surface to be polished is highly planarized, low in surface roughness and low in defects by means of the mechanical polishing effect of the nano abrasive and the chemical effect between various chemical reagents. In this embodiment, when polishing the pad nitride layer 300, the substrate 10 is clamped on the polishing head, and a certain pressure is applied to the substrate 10 by the polishing head, so that the substrate 10 is driven by the polishing head to rotate on the polishing pad for polishing. The polishing pad may be a polishing pad disposed above the pad nitride layer 300 or a polishing pad disposed below the pad nitride layer 300. In this embodiment, the present invention is described in a manner that a polishing pad is disposed below the pad nitride layer 300, specifically, a platen is used to adsorb the polishing pad to be disposed below the surface to be polished of the pad nitride layer 300, a polishing head is used to adsorb the substrate 10 to be fixed above the polishing pad for polishing, and the pad nitride layer 300 faces the polishing pad. In this embodiment, the hardness of the polishing pad is 30 to 40HA (shore a), and may be any value between 30 to 40HA such as 30HA, 33HA, 35HA, 38HA, or 40 HA. The use of a less hard polishing pad facilitates removal of particles from the surface of pad nitride layer 300 and maintains surface integrity and flatness.
In general, the pad nitride layer 300 has the problem that the thickness of the edge area is greater than that of the center area in the forming process, a plurality of areas can be arranged on the polishing head, different pressures are respectively arranged on the plurality of areas, and different pressures are applied to the substrate 10 through the polishing head, so that different polishing speeds of different areas of the pad nitride layer 300 are realized, and the surface flatness of the pad nitride layer 300 after polishing is better. Specifically, since the thickness of the center region of the pad nitride layer 300 is smaller than the thickness of the edge thereof, the polishing head applies a greater pressure to the edge region of the pad nitride layer 300 than to the center thereof when performing chemical mechanical polishing on the pad nitride layer 300. Taking a grinding head with a radius of 150mm as an example, five areas are arranged on the grinding head, the circle center of the grinding head is 0 point, the areas with the diameters of 0-40 mm are sequentially outwards from the center point, the areas with the diameters of 40-100 mm are the first area, the areas with the diameters of 100-130 mm are the second area, the areas with the diameters of 100-130 mm are the third area, the areas with the diameters of 130-145 mm are the fourth area, the areas with the diameters of 145-150 mm are the fifth area, the first area is a circle with the radius of 40mm, and the second area, the third area, the fourth area and the fifth area are all annular which are coaxially arranged with the first area. The standard of the polishing head is not limited herein, and in other embodiments, the area range of the polishing head can be adaptively adjusted according to the actual requirement, and the pressure of each area can also be adjusted according to the thickness difference of the pad nitride layer 300. Illustratively, the pressure in the first zone is set to 1-2 psi, the pressure in the second zone is set to 1-2 psi, the pressure in the third zone is set to 1-2 psi, the pressure in the fourth zone is set to 2-3 psi, and the pressure in the fifth zone is set to 4-5 psi. Applying a larger pressure to the thicker edge region of the pad nitride layer 300 can increase the polishing rate of the edge region of the pad nitride layer 300, reduce the difference between the edge thickness and the center thickness of the pad nitride layer 300, and reduce the height difference of the subsequently formed shallow trench isolation structure 420 exposed to the substrate 100, which is beneficial to the subsequent process. The lower pressure of the grinding head can improve the problem of particle falling in the grinding process, and once particles fall off in the grinding process, the scratch of the particles to the pad nitride layer 300 can be reduced due to the lower pressure of the grinding head, the flatness of the surface of the pad nitride layer 300 is maintained, and the influence on the subsequent process is prevented. In the pressure range, particles on the surface of the pad nitride layer 300 can be removed, the surface flatness of the pad nitride layer can be ensured, stress and defects can be reduced, and correction and adjustment required in the subsequent process are reduced, so that the production efficiency and the yield are improved. Here, the pad nitride layer 300 is subjected to chemical mechanical polishing, and since only one material of the pad nitride layer 300 is polished, a non-selective polishing slurry, such as a polishing slurry including silicon dioxide polishing particles, may be selected. In other embodiments, selective polishing slurries may be selected and adjusted according to the actual situation. The first cleaning treatment is performed on the surface of the substrate 10 after the planarization treatment of the pad nitride layer 300 to remove impurities and residual polishing slurry generated during the polishing process, so as to prevent the impurities or polishing slurry from affecting the isolation oxide layer 600 during the subsequent planarization treatment of the isolation oxide layer 600, and prevent the impurities or polishing slurry from falling into the trench 400 to affect the deposition effect of the subsequent isolation oxide layer 600. In this embodiment, the cleaning solution for the first cleaning treatment may be, for example, hydrofluoric acid, the concentration of which may be any one of 0.5 to 5%, for example, 0.5%, 2%, 3%, or 5%, and the cleaning time may be any one of 90 to 130s, for example, 90 to 130s, 100s, 120s, or 130s, or the cleaning solution for the first cleaning treatment may be, for example, APM solution (mixed solution of ammonium hydroxide, hydrogen peroxide, and deionized water), the cleaning temperature may be, for example, 30 to 50 ℃, for example, any one of 30 to 50 ℃, for example, 30 to 40 ℃, or 50 ℃, and the cleaning time may be, for example, 40 to 70s, for example, 40s, The cleaning solution may be an HPM solution (a mixed solution of hydrochloric acid, hydrogen peroxide and deionized water) or a cleaning solution with a cleaning time of 20-40 s, for example, 30s or 40s, for example.
Referring to fig. 7, in an embodiment of the present invention, the method for fabricating the shallow trench isolation structure 420 further includes performing a post-etch (pull back) process on the pad nitride layer 300 and the pad oxide layer 200 after performing the planarization process on the pad nitride layer 300, so as to expose the edge corner 110 of the substrate 100. For example, the pad nitride 300 may be etched back with phosphoric acid followed by etching back the pad oxide 200 with hydrofluoric acid, or the pad oxide 200 may be etched back with hydrofluoric acid followed by etching back the pad nitride 300 with phosphoric acid. Specifically, taking the example of etching the pad nitride layer 300 and then etching the pad oxide layer 200, the substrate 10 may be first placed in a phosphoric acid tank and then placed in a hydrofluoric acid tank, and the phosphoric acid and hydrofluoric acid solution hardly corrodes the substrate 100. Alternatively, the pad nitride layer 300 and the pad oxide layer 200 may be sequentially etched back by dry etching. The dry etching comprises physical etching, chemical etching and physical and chemical etching, wherein the physical etching is realized by utilizing a sputtering effect generated by ion collision on the surface of the etched structure, the chemical etching is realized by generating volatile compounds through the chemical action of activated etching gas and the etched structure, and the physical and chemical etching is realized by physical and chemical interaction between ions or active radicals in plasma and the etched structure. The back etching process can expand the sidewalls of the pad nitride layer 300 and the pad oxide layer 200 along the direction of expanding the opening of the trench 400, so that the opening of the trench 400 is expanded, which is helpful for improving the filling quality of the trench 400. In some embodiments, after performing the etching back process on the pad nitride layer 300 and the pad oxide layer 200, the second cleaning process is further performed on the substrate 10, so as to prevent byproducts generated in the etching back process from falling into the trench 400 and affecting the deposition of the subsequent isolation oxide layer 600. The second cleaning treatment may be performed at normal temperature by using, for example, hydrofluoric acid or HPM as a cleaning solution, or at 30-50 ℃ by using, for example, APM as a cleaning solution, wherein the concentration of hydrofluoric acid is, for example, 0.5-5%, for example, 0.5%, 2%, 3%, or 5%, the cleaning time is, for example, 90-130 s, 100s, 120s, or 130s, or the cleaning time of HPM is, for example, 20-40 s, for example, 30s, or 40s, or any one of 20-40 s, and the cleaning time of APM is, for example, 40-70 s, for example, 40s, 60s, or 70s, or any one of 40-70 s.
Referring to fig. 7 and 8, since the edge corners 110 formed by the etching back process are generally sharp, in one embodiment of the present invention, the edge corners 110 are rounded after the second cleaning process is performed on the substrate 10. Illustratively, the edge corners 110 are rounded by wet etching the edge corners 110 with a mixed solution of ammonium hydroxide, hydrogen peroxide, and water to roughen the edge corners 110 to obtain rounded corners. In the mixed solution, the substrate 100 at the edge corner 110 is mainly corroded by hydrogen peroxide, so the roughening of the edge corner 110 can be accelerated by increasing the concentration of hydrogen peroxide in the mixed solution, and the roughening of the edge corner 110 can also be accelerated by increasing the temperature of the mixed solution, but the temperature cannot be too high, and the hydrogen peroxide can be decomposed due to the too high temperature, so that the roughening effect and speed are deteriorated. The fillets with different degrees of circular arc can be obtained by adjusting the concentration of the mixed solution, the temperature of the mixed solution and the etching time. After the corner angles are roughened to obtain rounded corners, when current is introduced into the semiconductor device, a high electric field is not concentrated at the rounded corner positions, thereby reducing leakage current. In addition, the mixed solution makes the top corners rounded, and at the same time, particles and natural oxides on the bottom surface and the sidewall surface of the trench 400 are removed, which is beneficial to the formation of the subsequent line oxide (liner oxide) 410.
To further round the edge corners 110, a line oxide layer 410 is formed on the exposed edge corners 110 and the bottom surface and sidewalls of the trench 400. The material of the line oxide layer 410 may be silicon dioxide. The line oxide layer 410 has good compactness and can repair substrate damage caused in the trench etching process, such as lattice damage, roughness and the like. Illustratively, the line oxide layer 410 may be an oxide layer formed by a high temperature furnace tube. In order to reduce stress between the line oxide layer 410 and the isolation oxide layer 600 formed later, a line nitride layer may be formed on the surfaces of the trench 400 and the pad nitride layer 300 before the line oxide layer 410 is formed, and the material of the line nitride layer may be silicon nitride. Illustratively, a wire nitride layer is deposited on the surfaces of trench 400 and pad nitride layer 300 using a furnace approach. The stress of the shallow trench isolation structure 420 can be balanced by depositing the line nitride layer, so that no gap can occur after the shallow trench isolation structure 420 is formed by depositing the isolation oxide layer 600 later, and the carrier mobility of the device is improved.
Referring to fig. 9, in step S3 of the present invention, an isolation oxide layer 600 is formed in the trench 400, and the isolation oxide layer 600 covers the trench 400 and the pad nitride layer 300. The present invention is not limited to the deposition method of the isolation oxide layer 600, and the isolation oxide layer 600 formed in the trench 400 may be formed by, for example, chemical vapor deposition (Chemical Vapor Deposition, CVD) or high aspect Ratio chemical vapor deposition (HIGH ASPECT Ratio Process CVD, HARP CVD). In this embodiment, the isolation oxide layer 600 is obtained, for example, by depositing tetraethyl orthosilicate (TETRAETHYL ORTHOSILICATE, TEOS), specifically, by introducing tetraethyl orthosilicate and an oxygen-containing precursor, for example, one of O 2 or O 3, etc., and controlling the deposition time to obtain the isolation oxide layer 600. The deposited isolation oxide layer 600 has good hole filling capability, and is not easy to cause problems such as gaps and the like. After the isolation oxide layer 600 is deposited, a high temperature anneal process may be performed to increase the density and stress profile of the isolation oxide layer 600.
Referring to fig. 10, in step S4 of the present invention, after forming the isolation oxide layer 600, a planarization process is performed on the isolation oxide layer 600, for example, chemical mechanical polishing is performed on the isolation oxide layer 600, and a portion of the isolation oxide layer 600 is removed by chemical mechanical polishing, so as to obtain the shallow trench isolation structure 420. The present invention is not limited to the planarization of the isolation oxide layer 600 to a specific position, and may be disposed at any position according to the design requirements of the semiconductor device, for example, the isolation oxide layer 600 in a portion of the trench 400 is planarized to be level with the pad nitride layer 300 on both sides. In this embodiment, the planarization process of the isolation oxide layer 600 includes a first chemical mechanical polishing and a second chemical polishing, and the polishing pad has a hardness of 50 to 60HD (shore D), for example, any value of 50 to 60HD such as 50HD, 53HD, 55HD, 58HD or 60 HD. In the first cmp process for the isolation oxide layer 600, the isolation oxide layer 600 may be polished with a non-selective polishing slurry, for example, a polishing slurry including silicon dioxide polishing particles. In this embodiment, the thickness of the remaining isolation oxide layer 600 after the first cmp can be adaptively adjusted according to the actual requirements. Illustratively, the thickness of the isolation oxide layer 600 on the surface of the pad nitride layer 300 is polished to any value from 1200 a to 1500 a, such as 1200 a, 1300 a, 1400 a, or 1500 a, etc., by controlling the polishing time. In this embodiment, during the first chemical mechanical polishing, the pressure in the first region is set to 3-4 psi, the pressure in the second region is set to 3-4 psi, the pressure in the third region is set to 3-4 psi, the pressure in the fourth region is set to 2-3 psi, and the pressure in the fifth region is set to 6-7 psi. When the isolation oxide layer 600 is polished by the second chemical mechanical polishing, a polishing slurry with higher selectivity is selected, for example, a polishing slurry including ceria particles is selected for polishing, and a polishing rate of the isolation oxide layer 600 is higher and a polishing rate of the pad nitride layer 300 is slower by the polishing slurry with higher selectivity, so the pad nitride layer 300 can be used as a stop layer for the second chemical mechanical polishing. In this embodiment, during the second chemical mechanical polishing, the pressure in the first region is set to 3-4 psi, the pressure in the second region is set to 3-4 psi, the pressure in the third region is set to 3-4 psi, the pressure in the fourth region is set to 3-4 psi, and the pressure in the fifth region is set to 7-8 psi. In the two-time chemical mechanical polishing, the edge pressure of the polishing head is set to be greater than the center pressure, so that the height difference of the shallow trench isolation structure 420 exposed to the substrate 100 can be further reduced, that is, the difference between the height difference of the active region and the shallow trench isolation structure 420 in the edge region and the center region is reduced. The surface of the substrate 10 is cleaned after each chemical mechanical polishing to remove impurities and residual polishing slurry generated during the polishing process, thereby preventing the influence on the subsequent production.
Referring to fig. 11, in an embodiment of the present invention, after the isolation oxide layer 600 is planarized, the pad oxide layer 200 and the pad nitride layer 300 on the surface of the substrate 100 are removed. The present invention is not limited to the removal method of the pad oxide layer 200 and the pad nitride layer 300, for example, the removal method using dry etching, wet etching, or a combination of dry etching and wet etching. In this embodiment, for example, the pad nitride layer 300 is etched using phosphoric acid, and the pad oxide layer 200 is removed using hydrofluoric acid.
In an embodiment of the present application, the shallow trench isolation structure 420 is prepared by the method of the present application, the surface micro-topography is shown in fig. 12 after removing the pad oxide layer 200 and the pad nitride layer 300, and the height profile before removing the pad oxide layer 200 and the pad nitride layer 300 is shown in fig. 13. In contrast, the planarization process is not performed on the pad nitride layer 300, and other preparation conditions are kept the same, the surface micro-topography after removing the pad oxide layer 200 and the pad nitride layer 300 is shown in fig. 14, and the height profile before removing the pad oxide layer 200 and the pad nitride layer 300 is shown in fig. 15. As can be seen from comparing fig. 12 and fig. 14, the surface of the shallow trench isolation structure 420 manufactured by the manufacturing method according to the present application has no obvious scratch, and the surface of the shallow trench isolation structure 420 manufactured by the comparative example has a obvious scratch. As can be seen from comparing fig. 13 and fig. 15, the shallow trench isolation structure 420 manufactured by the manufacturing method of the present application has a relatively flat surface and a relatively small height difference, and the shallow trench isolation structure 420 manufactured by the comparative example has a relatively large height difference. Further, the difference in height of the semiconductor surface can also be evaluated by a specific numerical value, where the formula is U% = (maximum height-minimum height)/(average height×2).
In summary, the present application provides a method for fabricating a shallow trench isolation structure, which comprises planarizing a pad nitride layer, forming an isolation oxide layer in a trench, covering the trench and the pad nitride layer with the isolation oxide layer, and planarizing the isolation oxide layer. The application has the unexpected technical effects that the pad nitride layer is flattened, the defect of the interface between the pad nitride layer and the isolation oxide layer can be improved, the problem that particles scratch the isolation oxide layer easily when the isolation oxide layer is flattened is solved, the surface flatness of the shallow trench isolation structure is improved, and the yield of the shallow trench isolation structure is improved.
The above embodiments are merely illustrative of the principles of the present invention and its effectiveness, and are not intended to limit the invention. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the invention. Accordingly, it is intended that all equivalent modifications and variations of the invention be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.
Claims (8)
1. The manufacturing method of the shallow trench isolation structure is characterized by comprising the following steps:
Providing a base, wherein the base comprises a substrate, a pad oxide layer, a pad nitride layer and at least one groove, the pad oxide layer is formed on the surface of the substrate, the pad nitride layer is formed on the surface of the pad oxide layer, the groove is arranged in the substrate, and the upper part of the groove penetrates through the pad oxide layer and the pad nitride layer to form an opening;
carrying out planarization treatment on the pad nitride layer, wherein the thickness of the pad nitride layer before the planarization treatment is 2-3 times of the thickness of the pad nitride layer after the planarization treatment;
forming an isolation oxide layer in the groove, wherein the isolation oxide layer covers the groove and the pad nitride layer;
flattening the isolation oxide layer until the isolation oxide layer in the groove is flush with the pad nitride layers at two sides, so as to obtain the shallow groove isolation structure;
and in the process of flattening the pad nitride layer, the pressure applied to the edge area of the pad nitride layer by the grinding head for adsorbing the substrate is larger than the pressure applied to the center of the pad nitride layer, and the hardness of the grinding pad for grinding the pad nitride layer is 30-40 HA.
2. The method of claim 1, further comprising a step of performing a first cleaning process on the substrate after the planarization process is performed on the pad nitride layer.
3. The method of claim 1, wherein planarizing the isolation oxide layer comprises a first cmp process and a second cmp process, wherein the first cmp process is performed with a non-selective polishing slurry, and the second cmp process is performed with a highly selective polishing slurry.
4. The method of claim 1, further comprising etching back the pad oxide layer and the pad nitride layer to expose edge corners of the substrate after planarizing the pad nitride layer.
5. The method of claim 4, further comprising a second cleaning process of the base after exposing the edge corners of the substrate.
6. The method of manufacturing a shallow trench isolation structure according to claim 5, wherein, after the second cleaning treatment is performed on the substrate, the manufacturing method further comprises a process of rounding the edge corner.
7. The method of fabricating a shallow trench isolation structure according to claim 6, wherein the fillet treatment comprises the steps of:
Etching the edge corner;
A line oxide layer is formed on the exposed edge corners and the bottom surface and sidewalls of the trench.
8. The method of manufacturing a shallow trench isolation structure according to claim 1, wherein the providing a substrate comprises:
providing the substrate;
Depositing the pad oxide layer on the substrate;
Depositing the pad nitride layer on the surface of the pad oxide layer;
and forming the groove on the substrate.
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| CN102569159A (en) * | 2010-12-21 | 2012-07-11 | 无锡华润上华半导体有限公司 | Method for manufacturing high-voltage semiconductor device |
| CN111354675A (en) * | 2018-12-21 | 2020-06-30 | 上海新微技术研发中心有限公司 | Shallow trench isolation structure and forming method thereof |
| CN118366920A (en) * | 2024-06-06 | 2024-07-19 | 合肥晶合集成电路股份有限公司 | A semiconductor structure and a method for manufacturing the same |
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| US6664190B2 (en) * | 2001-09-14 | 2003-12-16 | Chartered Semiconductor Manufacturing Ltd. | Pre STI-CMP planarization scheme |
| KR100871375B1 (en) * | 2002-12-26 | 2008-12-02 | 주식회사 하이닉스반도체 | Method for forming an element isolation film of a semiconductor element |
| CN104835775B (en) * | 2014-02-08 | 2018-01-30 | 中芯国际集成电路制造(上海)有限公司 | A kind of preparation method of isolation structure of shallow trench |
| CN114156176A (en) * | 2022-02-10 | 2022-03-08 | 晶芯成(北京)科技有限公司 | Method for manufacturing semiconductor structure |
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| CN102569159A (en) * | 2010-12-21 | 2012-07-11 | 无锡华润上华半导体有限公司 | Method for manufacturing high-voltage semiconductor device |
| CN111354675A (en) * | 2018-12-21 | 2020-06-30 | 上海新微技术研发中心有限公司 | Shallow trench isolation structure and forming method thereof |
| CN118366920A (en) * | 2024-06-06 | 2024-07-19 | 合肥晶合集成电路股份有限公司 | A semiconductor structure and a method for manufacturing the same |
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