CN1194293C - Device and method for automatically generating test program of test machine - Google Patents
Device and method for automatically generating test program of test machine Download PDFInfo
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- CN1194293C CN1194293C CNB011197528A CN01119752A CN1194293C CN 1194293 C CN1194293 C CN 1194293C CN B011197528 A CNB011197528 A CN B011197528A CN 01119752 A CN01119752 A CN 01119752A CN 1194293 C CN1194293 C CN 1194293C
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Abstract
The invention relates to a device for automatically generating a test program of a test machine, which comprises: the testing machine comprises a testing machine program library, a plurality of testing machine tools and a plurality of testing modules, wherein the testing machine program library comprises a plurality of testing program modules of the testing machine tools, and the testing program modules are generated according to a testing strategy of the testing machine tools; and the operation platform corresponds to a test requirement of a test machine and automatically converts and generates a test program of the test machine according to the test strategy of the test machine program library.
Description
The present invention is the device and method that a kind of test procedure of tester table produces automatically.
The pattern of current chip exploitation has been partial to system on chip (SOC) (System on chip) development, the side makes the function more powerful (Powerful) of chip, bring the complexity in the test to improve thereupon, development and testing procedure time lengthening, the conversion of different platform program, problems such as the maintenance modification of program make it improve greatly at manpower and cost that back segment spent, have influence on the first market opportunities (Time to market) of entire product.
System on chip (SOC) (System onchip) is all moved towards in current most chip design (chip design), and research and development are set up intelligent characteristic (IP) (Intellectual Property) or are adopted its people's intelligent characteristic (IP) voluntarily, be used as the integration of chip (Chip) and the time of accelerate development (Cycle Time), reach the layout of correctly finding out customer demand, under the mutual compatibility fully of its IP, the output (Throughput) of its chip design (Chip Design) increases widely, so this method can be imported the exploitation of test procedure, at the different IP that sets up of different test machines (Tester).Produce the form (Format) of different platform from same analog sample (Simulation pattern), at different test events, and produce the source code (Source Code) of different Tester test procedures, like this as long as be ready to analog form (Simulation Pattern) earlier, pinout (Pin-define), the test item project choice, the specification condition, board kind or the like input, IP program by a software, just can produce source code (Source code) and the sample archives (pattern file) of test machine (Tester), make the development time of its control program faster, realize the function of carryover preface simultaneously.
The automatic devices and methods therefor that produces of test procedure that the purpose of this invention is to provide a kind of tester table, the test procedure that makes tester table is output expeditiously, the test procedure of different tester tables also can be changed mutually simultaneously, the utilization factor again of test procedure is greatly improved, thereby save the development and testing procedure time.
For reaching above-mentioned purpose of the present invention, the device that the test procedure of tester table of the present invention produces automatically is characterized in comprising:
One test machine routine library contains the test procedure module of several tester tables, and described test procedure module is that the Test Strategy according to described tester table produces; And
One operating platform, a testing requirement of a corresponding tester table, and according to the Test Strategy of described test machine routine library, conversion produces a test procedure of described tester table automatically.
The device that the test procedure of tester table as described produces automatically, wherein said tester table comprises a digital test board.
The device that the test procedure of tester table as described produces automatically, wherein said tester table comprises a simulation test board.
The device that the test procedure of tester table as described produces automatically, wherein said tester table comprises a Trillium tester table, a Schlumberger ITS serier tester table, a HP 9491 tester tables, an Advantester T7315 tester table, a VTT V7100 tester table.
The device that the test procedure of tester table as described produces automatically, wherein said Test Strategy is to comprise the test event of a logic product and the test event of an analog equipment.
The device that the test procedure of tester table as described produces automatically, the test event of wherein said logic product are to comprise a continuity (Continutity) test, a driving/ABSORPTION CURRENT (Drive/Sink Current) test, a power consumption (Power Dissiapation) test, an iddq test, an input leakage current test, a function sample (Function Pattern) test, AC characteristic test.
The device that the test procedure of tester table as described produces automatically, wherein said analog equipment test is to comprise an ADC/DAC ' s SNR, THD, Gain_Var test, Jitter/Skew test, cross-talk test, eye pattern test, frequency response test.
For reaching above-mentioned purpose of the present invention, the method that the test procedure of tester table of the present invention produces automatically is characterized in comprising the following steps:
Set up the test procedure module of several tester tables, described test procedure module is the Test Strategy that contains described several tester tables; And
According to a testing requirement and described Test Strategy, conversion produces the test procedure source code of a tester table automatically.
Adopt such scheme of the present invention, the generation of test procedure is by the test machine routine library of integrating, utilize the test specification of each test machine to be changed, the easier exploitation of test procedure like this, thereby the development and testing procedure time is shortened, with the first market opportunities (Time to market) of expedite product.
Be clearer understanding purpose of the present invention, characteristics and advantage, below in conjunction with accompanying drawing to of the present invention preferable
Embodiment is elaborated.
Fig. 1 is the synoptic diagram of the database of setting up various boards of a preferred embodiment of the present invention;
Fig. 2 is that the board of a preferred embodiment of the present invention is installed configuration and electrically limited synoptic diagram;
Fig. 3 is the normal Test Strategy synoptic diagram of a preferred embodiment of the present invention;
Fig. 4 is the integration project synoptic diagram of a preferred embodiment of the present invention.
Finish the IP of this software, at first to understand the layout of each tester table source code (Tester Source Code), definition based on C or Pascal language and model format (Pattern Format), with Fig. 1 is example, enumerate the classification of five kinds of boards, tester table routine library 11 has comprised Trillium tester table 12, Schlumberger ITS serier tester table 13, HP 9491 tester tables 14, Advantester T7315 tester table 15, the test procedure module of VTT V7100 tester table 16 boards such as grade, wherein the sample File Format of the test procedure of each tester table and source code embryo are to produce according to testing requirement, and, then can be converted to the test procedure of different tester tables mutually at the test procedure of same testing requirement.
The resource and the specification limit according to tester table own, with Fig. 2 is example, define board combination and electrical specification limits are installed, and then the initial conditions of good this software I P of definition planning, produce required test procedure and the Pattern File of user (User) according to condition, wherein test installation configuration 21 has comprised precise electronic specification 22 (Precision Electronics (PE) spec.﹠amp; Max.Channels), precision measurement unit specification 23 (Precision measurement Unit (PMU) Spec.), device power supply (DPS) specifications for delivery 24 (DevicePower Supplies (DPS) Spec.), time measuring unit specification 25 (Time Measurement Unit (TMU) Spec.), vector memory size 26 (Vector Memory Size), system sequence ratio 27 (System ClockRate Spec.), analog channel specification 28 (Analog Channels Spec.).
As shown in Figure 3, the test event of an arm's length standard logic product shown in the figure.Wherein, Test Strategy 31 has comprised positive constant project (logic product) 33 and extra items (analog equipment) 32.Positive constant project (logic product) 33 comprises continuity test 331 (Continuity), driving/ABSORPTION CURRENT test 332 (drive/SinkCurrent), power consumption test 333 (Power dissiaption), iddq test 334, input leakage current test 335 (Input Leakage Current), function test sample 336 (Function Pattern), AC characteristic test 337 (Accharacteristic).In addition, 32 of extraneous term projects have comprised ADC/DAC ' sSNR, THD test 321, Jitter/Skew test 322, crosstalk measuring 323 (Crosstalk), eye pattern test 324 (Eye Diagram), frequency response test 325 (Frequency Response).
This software I P can finish with C language or C Shell Script, and above-mentioned mentioned database is integrated, and as shown in Figure 4, can carry out the time of accelerated test program development on PC and workstation platform.This software I P must make inside the software object of various Tester, it possess have alternately compatible completely, when different Tester will increase or during update routine, as long as change its relevant software object, can simply fast revise.The embryo 41 (Test Program source code Prototype) of wherein pointing out the test procedure source code is by test machine routine library 42 (Tester Library), test machine is installed configuration 43 (Tester ResourceInstallation Configuration), the program transformation rule is checked 44 (Program transfer Rulecheck), error code tabulation 45 (Error Codes List), the specification 46 (ProductTarget Spec.) of the sign indicating number of product item, Test Strategy 47 (Testing Strategy) produces.
In sum, the generation of test procedure of the present invention is by the test machine routine library of integrating, and utilizes the test specification of each test machine to be changed, and makes to test the easier exploitation of measuring program, the development and testing procedure time is shortened, with the first market opportunities (Time to market) of expedite product.
Claims (14)
1. the device that automatically produces of the test procedure of a tester table, is characterized in that it comprises to adapt to multiple tester table:
One test machine routine library contains a test procedure module of several tester tables, and described test procedure module is that the Test Strategy according to described tester table produces, and this test machine routine library comprises the embryo of several source codes of several tester tables; And
One operating platform, corresponding one carries out a testing requirement of tester table, and according to the Test Strategy of described test machine routine library, automatically the preceding embryo of once carrying out source code is changed by this test procedure module, with the embryo of a source code of a test procedure of this testing requirement of producing described execution tester table, and several databases of these several tester tables can be carried out on PC and workstation platform.
2. the automatic device that produces of the test procedure of tester table as claimed in claim 1 is characterized in that described tester table comprises a digital test board.
3. the automatic device that produces of the test procedure of tester table as claimed in claim 1 is characterized in that described tester table comprises a simulation test board.
4. the device that automatically produces of the test procedure of tester table as claimed in claim 1, it is characterized in that described several tester tables comprise a Trillium tester table, a Schlumberger ITS serier tester table, a HP 9491 tester tables, an Advantester T7315 tester table and a VTT V7100 tester table.
5. the device that test procedure as claimed in claim 1 produces automatically is characterized in that described Test Strategy is to comprise the test event of a logic product and the test event of an analog equipment.
6. the device that automatically produces of the test procedure of tester table as claimed in claim 1, it is characterized in that the test event of described logic product is to comprise a continuity (Continutity) test, a driving/ABSORPTION CURRENT (Drive/Sink Current) test, a power consumption (Power Dissiapation) test, an iddq test, an input leakage current test, a function sample (Function Pattern) test, AC characteristic test.
7. the device that automatically produces of the test procedure of tester table as claimed in claim 5, it is characterized in that, described analog equipment test is to comprise an ADC/DAC ' s SNR, THD, Gain_Var test, Jitter/Skew test, cross-talk test, eye pattern test, frequency response test.
8. the automatic method that produces of the test procedure of a tester table to adapt to several tester tables, is characterized in that, comprises the following steps:
Set up a test procedure module of several tester tables, this test procedure module is contained in a test machine routine library, described test procedure module comprises the Test Strategy of described several tester tables, and this test machine routine library comprises the embryo of the source code of described several tester tables; And
Testing requirement and described Test Strategy according to an execution tester table, automatically once carry out the embryo of source code before will being somebody's turn to do changes by this test procedure module, with the embryo of a test procedure source code of this testing requirement of producing this execution tester table, and several databases of these several tester tables can be carried out on PC and workstation platform.
9. the automatic method that produces of the test procedure of tester table as claimed in claim 8 is characterized in that described tester table comprises a digital test board.
10. the automatic method that produces of the test procedure of tester table as claimed in claim 8 is characterized in that described tester table comprises a simulation test board.
11. the method that the test procedure of tester table as claimed in claim 8 produces automatically, it is characterized in that described several tester tables comprise a Trillium tester table, a Schlumberger ITS serier tester table, a HP 9491 tester tables, an Advantester T7315 tester table and a VTT V7100 tester table.
12. the method that the test procedure of tester table as claimed in claim 8 produces automatically is characterized in that described Test Strategy is to comprise the test event of a logic product and the test event of an analog equipment.
13. the method that the test procedure of tester table as claimed in claim 8 produces automatically, it is characterized in that the test event of described logic product is to comprise a continuity (Continutity) test, a driving/ABSORPTION CURRENT (Drive/Sink Current) test, a power consumption (Power Dissiapation) test, an iddq test, an input leakage current test, a function sample (Function Pattern) test, AC characteristic test.
14. the method that the test procedure of tester table as claimed in claim 8 produces automatically, it is characterized in that, described analog equipment test is to comprise an ADC/DAC ' s SNR, THD, Gain_Var test, Jitter/Skew test, cross-talk test, eye pattern test, frequency response test.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011197528A CN1194293C (en) | 2001-05-23 | 2001-05-23 | Device and method for automatically generating test program of test machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011197528A CN1194293C (en) | 2001-05-23 | 2001-05-23 | Device and method for automatically generating test program of test machine |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1387120A CN1387120A (en) | 2002-12-25 |
| CN1194293C true CN1194293C (en) | 2005-03-23 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB011197528A Expired - Fee Related CN1194293C (en) | 2001-05-23 | 2001-05-23 | Device and method for automatically generating test program of test machine |
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| Country | Link |
|---|---|
| CN (1) | CN1194293C (en) |
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2001
- 2001-05-23 CN CNB011197528A patent/CN1194293C/en not_active Expired - Fee Related
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| Publication number | Publication date |
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| CN1387120A (en) | 2002-12-25 |
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Granted publication date: 20050323 |