CN119414638A - Display substrate and manufacturing method thereof, and display device - Google Patents
Display substrate and manufacturing method thereof, and display device Download PDFInfo
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- CN119414638A CN119414638A CN202411746705.8A CN202411746705A CN119414638A CN 119414638 A CN119414638 A CN 119414638A CN 202411746705 A CN202411746705 A CN 202411746705A CN 119414638 A CN119414638 A CN 119414638A
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Abstract
本发明提供一种显示基板及其制作方法、显示装置，属于显示技术领域，该显示基板包括显示区域和非显示区域，所述非显示区域设置有多个栅极驱动单元、多个数据驱动单元和走线，所述走线包括用于连接所述栅极驱动单元和所述数据驱动单元的第一走线，和，用于连接不同的所述数据驱动单元的第二走线；所述非显示区域包括多个非拼接曝光区和位于所述非拼接曝光区之间的拼接曝光区，所述非拼接曝光区的所述走线通过一次曝光形成，所述拼接曝光区的所述走线通过多次曝光形成，所述拼接曝光区内的所述第二走线的图形与所述第一走线的图形相同。本发明的拼接曝光方式灵活，可以实现多种类型的显示产品的拼接曝光。
The present invention provides a display substrate and a manufacturing method thereof, and a display device, belonging to the field of display technology. The display substrate includes a display area and a non-display area, wherein the non-display area is provided with a plurality of gate drive units, a plurality of data drive units and wiring, wherein the wiring includes a first wiring for connecting the gate drive unit and the data drive unit, and a second wiring for connecting different data drive units; the non-display area includes a plurality of non-splicing exposure areas and a splicing exposure area located between the non-splicing exposure areas, wherein the wiring of the non-splicing exposure area is formed by one exposure, and the wiring of the splicing exposure area is formed by multiple exposures, and the pattern of the second wiring in the splicing exposure area is the same as the pattern of the first wiring. The splicing exposure method of the present invention is flexible, and splicing exposure of various types of display products can be realized.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display substrate, a manufacturing method thereof and a display device.
Background
A wide variety of display devices have become an integral part of our daily lives. The thin film transistor liquid crystal display (Thin Film Transistor Liquid CRYSTAL DISPLAY, TFT-LCD) is widely applied due to the characteristics of mature production technology, various product forms, strong product reliability and the like. Today, the requirements of consumers on high-definition and large-size display devices are becoming stronger at the high-speed development of display technology, however, in terms of G8.5, the effective area of a conventional Mask (Mask) is only 1320 x 1108mm, and in order to realize a large-size (more than or equal to 65 inches) TFT-LCD display device, a splicing exposure mode is required.
Currently, the mainstream splicing exposure means has a mode of shielding (Variable Field Stop, VFS) of a field diaphragm edge (FIELD DIAPHRAGM EDGE, FDE) +a variable area, and a VFS baffle can move within a certain range to control the position of a splicing exposure area. However, the coverage area of the VFS is limited, and the splicing exposure requirement of all large-size products cannot be met.
Disclosure of Invention
The embodiment of the invention provides a display substrate, a manufacturing method thereof and a display device, which are used for solving the problem that the existing splicing exposure mode is difficult to meet the splicing exposure requirement of all large-size products.
In order to solve the technical problems, the invention is realized as follows:
In a first aspect, an embodiment of the present invention provides a display substrate, including a display area and a non-display area, where the non-display area is provided with a plurality of gate driving units, a plurality of data driving units, and wirings, the wirings include a first wiring for connecting the gate driving units and the data driving units, and a second wiring for connecting different data driving units, the non-display area includes a plurality of non-stitching exposure areas and stitching exposure areas located between the non-stitching exposure areas, the wirings of the non-stitching exposure areas are formed by one exposure, the wirings of the stitching exposure areas are formed by multiple exposures, and a pattern of the second wiring in the stitching exposure areas is the same as a pattern of the first wiring.
Optionally, the second trace of the non-spliced exposure area is a monolithic film layer.
Optionally, the second trace of the spliced exposure area is connected with the second trace of the non-spliced exposure area.
Optionally, the first wiring includes at least one of a clock signal CLK line, a frame start signal STV line, and a power supply VDD line;
And/or
The second wiring is a common electrode COM wiring.
In a second aspect, an embodiment of the present invention provides a display device, including a display substrate as described in the first aspect.
In a third aspect, an embodiment of the present invention provides a method for manufacturing a display substrate, where the display substrate includes a display area and a non-display area, the non-display area includes a plurality of non-stitching exposure areas and stitching exposure areas located between the non-stitching exposure areas, and the manufacturing method includes:
Forming a plurality of gate driving units, a plurality of data driving units and wirings in the non-display area, wherein the wirings comprise first wirings for connecting the gate driving units and the data driving units and second wirings for connecting different data driving units;
wherein the trace of the non-spliced exposure area is formed by one exposure, the trace of the spliced exposure area is formed by multiple exposures, and the pattern of the second wiring in the spliced exposure area is the same as the pattern of the first wiring.
Optionally, forming the trace in the non-display area includes:
Forming a metal film layer;
forming a photoresist layer on the metal film layer;
Exposing the photoresist layer by adopting a splicing exposure machine and a mask plate, wherein the photoresist layer is subjected to splicing exposure by moving the mask plate, the photoresist layer in the non-splicing exposure area is subjected to one-time exposure, and the photoresist layer in the splicing exposure area is subjected to multiple exposure;
developing the photoresist layer after exposure to form a photoresist layer pattern;
And etching the metal film layer which is not covered by the photoresist layer graph to form the second wiring.
Optionally, the spliced exposure machine adopts a field stop edge FDE and a variable region shielding VFS structure, and the spliced exposure area corresponds to the VFS.
Optionally, the second trace of the non-spliced exposure area is a monolithic film layer.
Optionally, the second trace of the spliced exposure area is connected with the second trace of the non-spliced exposure area.
In the embodiment of the invention, the patterns of the second wirings for connecting different Data driving units in the spliced exposure area are set to be the same as the patterns of the first wirings for connecting the Gate driving units (Gate COF/GOA) and the Data driving units (Data COF), so that the spliced exposure area can be arranged in the COF area at the left side and the right side of the non-display area and in the middle COF area, the flexibility of spliced exposure is improved, and the spliced exposure method is suitable for more display products.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to designate like parts throughout the figures. In the drawings:
FIG. 1 is a schematic diagram of a splice exposure machine according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an exposure principle of a Mask (Mask) according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a method for performing a tiled exposure of a display substrate according to an embodiment of the invention;
FIG. 4 is a schematic circuit diagram of a non-display area of a display substrate according to a related art;
FIG. 5 is a schematic diagram of a method for fabricating a display substrate according to a related aspect;
FIG. 6 is a flow chart of a method for fabricating a display substrate according to an embodiment of the invention;
FIG. 7 is a schematic diagram of a display substrate according to an embodiment of the invention;
FIG. 8 is a schematic diagram of a display substrate according to another embodiment of the invention;
fig. 9 is a schematic diagram of a manufacturing method of a display substrate according to an embodiment of the invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The principle of the splice exposure machine will be described first.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a splice exposure machine according to an embodiment of the invention, and several concepts related to the splice exposure machine are described below:
The Lens (Lens), also called Projection Lens, the splice exposure machine comprises a plurality of lenses which are arranged in an array, and referring to fig. 1, the exposure machine comprises 11 lenses (M1-M11), wherein the 11 lenses are arranged in 2 rows, adjacent lenses in the same row are arranged at intervals, and the center of one Lens and the center of a gap between two adjacent lenses in the other row are on the same straight line in the lenses in the different rows.
The field stop edge (FDE, field Diaphragm Edge), as shown in fig. 1, gradually changes the light intensity of the lens edge energy transition gray area from 100% -0% from the lens center to the outside, and when different lens energy transition gray areas are overlapped together, the light intensity at all positions is consistent with the lens center.
The variable area shielding (Variable Field Stop, VFS) is that the VFS is arranged on a baffle (Blind) and the movable shielding area is positioned in a certain range (the effective moving range of the VFS is 80 mm) near the center of M2 and M10, the light intensity of the VFS shielding area gradually changes from 0% to 100% outwards from the center of the baffle, and the spliced exposure mode of the VFS+FDE or the VFS+VFS can realize that the light intensity of the two exposures is consistent with the center of the lens after the light intensity of the two exposures are overlapped.
Baffles (Blind), i.e., X Blind and Y Blind in FIG. 1, are used to control the exposure area.
Fig. 2 is a schematic view of an exposure principle of a Mask (Mask) according to an embodiment of the present invention, and as can be seen from fig. 2, when the device exposes, the Mask, the Lens, and a substrate (plate, such as a glass substrate) are respectively disposed from top to bottom, and exposure light is emitted by the device and then projected onto the substrate through the Mask and the Lens. As can be seen from fig. 2, the pattern on the substrate base plate is formed through four splice exposures.
Referring to fig. 3, fig. 3 is a schematic diagram of a method for performing stitching exposure on a display substrate according to an embodiment of the present invention, wherein the left side of fig. 3 is a stitching exposure machine, the middle is a mask, and the right side is a pattern formed by exposure on the display substrate. As shown in fig. 3, the stitching line of the stitching exposure in the embodiment of the present invention is not a line, that is, is not a seamless stitching in a geometric sense, and is actually a region (the region where 1 and 2 in fig. 3 are located), which is also referred to as a stitching exposure region, or a stitching gray region in the embodiment of the present invention.
The spliced exposure area in the embodiment of the invention needs to meet the following conditions:
1. the Pattern (Pattern) at the lower end of the region a is identical to the Pattern at the upper end of the region B, that is, the Pattern of each region 1 in the figure is identical, and the Pattern of each region 2 is identical.
2. After the lower end of the area A is spliced with the corresponding area of the upper end of the area B, the light intensity passing through the spliced exposure area is identical with that of the non-spliced exposure area, so that uniformity of an effective Pattern (Pattern) is realized.
The design of a Mask plate (Mask) for splicing exposure needs to meet the following requirements:
1. Considering the display area (AA), the area C must set an integer multiple of the area for the Pixel (Pixel).
2. Considering the GOA (Gate On Array) region, the region C must be an integer multiple of the minimum period of GOA.
3. Considering OLB (Outer Lead Bonding) Pad and sector Pattern (Fanout Pattern) On the data DP side, the area C must be an integer multiple of COF (Chip On Flex, or, chip On Film). The DP side can also be described as the Data Pad side, i.e., the Data line crimping region side.
As shown in fig. 4, which is a schematic circuit design diagram of a non-display area of a display substrate in a related scheme, COF signal lines (i.e., PLG (PATTEN LINE on Glass) traces in the figure) of a left/right area of a lower non-display area of the display substrate are related to communication signals of a Data COF unit and a Gate COF/GOA unit, so that the Pattern design is complex. The wiring between COFs in the middle area of the non-display area below the display substrate only relates to communication signals (generally COM signal lines) between Data COFs, and the Pattern design is simpler (the COM signal lines are generally of a whole metal, so that the peripheral COM resistance can be reduced, and the uniformity of the COM voltage in the display area can be ensured). Thus, considering that patterns of left/right regions are not identical to patterns of middle region, the conventional manner of splice exposure requires that the splice exposure region be located in the middle region, i.e., patterns of lower end of region A and upper end of region B are identical. The splicing exposure mode has low flexibility and can not realize the splicing exposure of all products. For example, if the VFS is located in the left region and the middle region, respectively, then the splice exposure cannot be performed. In addition, based on the limitation of the above-mentioned spliced exposure area, the number of times of spliced exposure is relatively large, and as shown in fig. 5, taking the B10 86 inch product as an example, four times of exposure are required vertically to form a complete 86 inch display substrate. In fig. 5, the left side is a mask, and the right side is a pattern of the display substrate formed after four exposures.
In order to solve the above-mentioned problems, please refer to fig. 6, an embodiment of the present invention provides a method for manufacturing a display substrate, wherein the display substrate includes a display area and a non-display area (please refer to fig. 7, the display substrate includes a display area 10 and a non-display area 20), the non-display area includes a plurality of non-stitching exposure areas and stitching exposure areas located between the non-stitching exposure areas, and referring to fig. 3, in which an area where an area 1 and an area 2 are located is a stitching exposure area, and other areas are non-stitching exposure areas, the method for manufacturing the display substrate includes:
and S1, forming a plurality of grid driving units, a plurality of data driving units and wires in the non-display area, wherein the wires comprise first wires for connecting the grid driving units and the data driving units and second wires for connecting different data driving units, the wires in the non-spliced exposure area are formed through one exposure, the wires in the spliced exposure area are formed through multiple exposures, and the pattern of the second wires in the spliced exposure area is identical with that of the first wires.
The Gate driving unit may be Gate COF/GOA and the Data driving unit may be Data COF.
The first trace may refer to 31 in fig. 7, optionally including at least one of a clock signal (CLK) line, a start of frame Signal (STV) line, and a power supply (VDD) line.
Alternatively, the second trace may be a common electrode (COM) trace.
In the embodiment of the invention, the pattern of the second wiring in the spliced exposure area is the same as the pattern of the first wiring, and the pattern of the second wiring in the spliced exposure area comprises the same line width, line interval and line number of the second wiring in the spliced exposure area as those of the first wiring.
In the embodiment of the invention, the patterns of the second wirings for connecting different Data driving units in the spliced exposure area are set to be the same as the patterns of the first wirings for connecting the Gate driving units (Gate COF/GOA) and the Data driving units (Data COF), so that the spliced exposure area can be arranged in the COF area at the left side and the right side of the non-display area and in the middle COF area, the flexibility of spliced exposure is improved, and the spliced exposure method is suitable for more display products.
For example, taking a display product of B10 inch as an example, the specification of the display substrate is provided for a customer, and the spliced exposure area is located at the COF area on the left/right side, and the conventional spliced exposure means cannot be adopted to realize the exposure scheme because the Pattern of the wiring of the COF area is inconsistent with the Pattern of the wiring of the middle COF area. In the embodiment of the invention, the Pattern of the wiring of the COF area is consistent with the Pattern of the wiring of the middle COF area, so that the spliced exposure area can be arranged in the COF area at the left and right sides of the non-display area and in the middle COF area, the compatibility of display products can be improved, and the diversity of spliced products is realized.
In addition, the splicing exposure area of the conventional splicing exposure mode is limited to the middle COF part, so that the splicing area is smaller, and the required splicing exposure times are more under the same size; in the splicing exposure mode in the embodiment of the invention, the splicing exposure area is not limited by the COF, the effective Pattern can be paved with the Mask effective exposure area, the splicing area is large, the required splicing exposure times of products with the same size are small, and the factory productivity is improved. Taking the display product of B10 inch as an example, the display product can be realized by only 6 times of exposure, and the production capacity is saved by 25% by adopting the conventional splicing exposure mode and 8 times of exposure.
In an embodiment of the present invention, optionally, forming the trace in the non-display area includes:
Step S11, forming a metal film layer;
Step S12, forming a photoresist layer on the metal film layer;
step S13, exposing the photoresist layer by adopting a splicing exposure machine and a mask, wherein the photoresist layer is subjected to splicing exposure by moving the mask, the photoresist layer in the non-splicing exposure area is subjected to one-time exposure, and the photoresist layer in the splicing exposure area is subjected to multiple-time exposure;
step S14, developing the photoresist layer after exposure to form a photoresist layer pattern;
and S15, etching the metal film layer which is not covered by the photoresist layer graph to form the second wiring.
In the embodiment of the present invention, optionally, the first trace and the second trace may be formed by using the same metal film layer, and in step S15, the metal film layer that is not covered by the photoresist layer pattern is etched to form the first trace and the second trace.
In an embodiment of the present invention, optionally, the stitching exposure machine adopts a field stop edge (FDE) and variable area occlusion (VFS) structure, and the stitching exposure area corresponds to the VFS.
In an embodiment of the present invention, optionally, the second trace of the non-spliced exposure area is a monolithic film layer, so as to ensure that the resistance of the second trace is minimized. That is, in the embodiment of the present invention, only the second trace of the spliced exposure area is subjected to the grooving process, and the second trace of the non-spliced exposure area is not subjected to the grooving process, so that the second trace of the non-spliced exposure area remains as a monolithic film layer.
In the embodiment of the invention, the second wires of the spliced exposure areas are optionally connected with the second wires of the non-spliced exposure areas, so that the second wires of the spliced exposure areas are all short-circuited in the non-spliced exposure areas and connected with the same COM signals, and when the second wires are COM wires, the compensation effect of COM electrodes in a display area is effectively increased, the uniformity of COM voltages in the display area is ensured, and the occurrence probability of defects caused by uneven COM voltages is reduced.
Referring to fig. 7 and 8, an embodiment of the present invention further provides a display substrate, including a display area 10 and a non-display area 20, where the non-display area 20 is provided with a plurality of gate driving units (see GOA in fig. 8), a plurality of data driving units (see COF in fig. 8), and wirings including a first wiring 31 for connecting the gate driving units and the data driving units, and a second wiring 32 for connecting different data driving units, the non-display area 20 includes a plurality of non-stitching exposure areas 21 and a stitching exposure area 22 located between the non-stitching exposure areas 21, the wirings of the non-stitching exposure areas 21 are formed by one exposure, the wirings of the stitching exposure areas 22 are formed by multiple exposures, and the pattern of the second wiring 32 in the stitching exposure area 22 is the same as the pattern of the first wiring 31.
It should be noted that, in the embodiment of the present invention, the display panel in fig. 7 and 8 is spliced in a direction from left to right or from left to right.
In the embodiment of the invention, the patterns of the second wirings for connecting different Data driving units in the spliced exposure area are set to be the same as the patterns of the first wirings for connecting the Gate driving units (Gate COF/GOA) and the Data driving units (Data COF), so that the spliced exposure area can be arranged in the COF area at the left side and the right side of the non-display area and in the middle COF area, the flexibility of spliced exposure is improved, and the spliced exposure method is suitable for more display products.
In this embodiment, optionally, the second trace 32 of the non-spliced exposed area 21 is a monolithic film layer, so as to ensure that the resistance of the second trace 32 is minimized.
In the embodiment of the present invention, optionally, the second trace 32 of the spliced exposure area 22 is connected with the second trace 32 of the non-spliced exposure area 21, so that the second traces of the spliced exposure area are all shorted in the non-spliced exposure area and connected with the same COM signal, and when the second trace is a COM trace, the compensation effect of the COM electrode in the display area can be effectively increased, the uniformity of the COM voltage in the display area is ensured, and the occurrence probability of defects caused by uneven COM voltage is reduced.
In an embodiment of the present invention, optionally, the first trace includes at least one of a clock signal (CLK) line, a start of frame Signal (STV) line, and a power supply (VDD) line.
In an embodiment of the present invention, optionally, the second trace may be a common electrode (COM) trace.
In the embodiment of the invention, optionally, the width of the gray area of the lens of the device is generally 16.8mm (+ -8.4 mm), and the width of the spliced exposure area is generally set to be 30mm (+ -15 mm) in consideration of the fluctuation of the device.
The embodiment of the invention also provides a display device, which comprises the display substrate in any embodiment. The display device may be a display panel (panel) or a display device including a display panel, such as a liquid crystal display device or an electronic paper display product.
The display substrate, the manufacturing method and the display device provided by the embodiment of the invention have the following beneficial effects:
1. The second wiring between the intermediate COFs in the splicing exposure area is subjected to slotting design, so that the splicing exposure area is not limited to the area where the intermediate COFs are located, the splicing exposure frequency of large-size products can be effectively reduced, the factory productivity is improved, and a complete 75-inch display substrate can be formed by taking a B10-inch product as an example, only two exposures are needed (as shown in fig. 9, the left side of fig. 9 is a mask, the right side is a pattern formed by splicing exposure of the display substrate, a finished pattern can be formed by scan1 and scan2, and scan3 in fig. 9 is only a Mark (Mark) for forming the display substrate).
2. For some special products, exposure cannot be realized by adopting a conventional design mode, but by adopting the method disclosed by the embodiment of the invention, the compatibility of the products can be increased, and the diversity of spliced products can be realized. Taking B10 inch as an example, the specification of the display substrate is provided for customers, the spliced exposure area is positioned at the COF on the left side/right side, and the exposure scheme cannot be realized by adopting a conventional splicing means.
3. In the design scheme of the embodiment of the invention, the second wirings in the spliced exposure area are all used for the COM signals, and the second wirings are short-circuited at the positions outside the spliced exposure area, so that the compensation effect of the COM electrodes in the display area can be effectively increased, and the occurrence probability of defects caused by uneven COM voltages is reduced.
The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present invention and the scope of the claims, which are to be protected by the present invention.
Claims (10)
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| CN202411746705.8A CN119414638A (en) | 2024-11-29 | 2024-11-29 | Display substrate and manufacturing method thereof, and display device |
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| CN202411746705.8A CN119414638A (en) | 2024-11-29 | 2024-11-29 | Display substrate and manufacturing method thereof, and display device |
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