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CN1193240A - Detection-digital-signal processor in digital videl-disk reproducing device - Google Patents

Detection-digital-signal processor in digital videl-disk reproducing device Download PDF

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CN1193240A
CN1193240A CN98104373A CN98104373A CN1193240A CN 1193240 A CN1193240 A CN 1193240A CN 98104373 A CN98104373 A CN 98104373A CN 98104373 A CN98104373 A CN 98104373A CN 1193240 A CN1193240 A CN 1193240A
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signal processor
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test
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CN1139251C (en
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郑宗植
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Samsung Electronics Co Ltd
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31728—Optical aspects, e.g. opto-electronics used for testing, optical signal transmission for testing electronic circuits, electro-optic components to be tested in combination with electronic circuits, measuring light emission of digital circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns
    • G01R31/31921—Storing and outputting test patterns using compression techniques, e.g. patterns sequencer

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  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Signal Processing (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)

Abstract

一种用于测试数字视盘(DVD)重放装置中的数字信号处理器的装置,包括:一计算机,它产生用于测试数字信号处理器的测试数据,并在其屏幕上显示测试结果;一寻迹缓冲器,用于存储该数字信号处理器处理的数据和数字信号处理器的测试结果;和一接口,用于把计算机输出的数据传送到数字信号处理器,并从寻迹缓冲器读取测试结果,以便将读取的测试结果传送到计算机,此外,测试装置还包括一开关,以允许接口和数字信号处理器读取存储在寻迹缓冲器中的测试结果。

A device for testing a digital signal processor in a digital video disc (DVD) playback device, comprising: a computer that generates test data for testing the digital signal processor and displays test results on its screen; a tracking buffer for storing data processed by the digital signal processor and test results of the digital signal processor; and an interface for transferring data output by the computer to the digital signal processor and reading from the tracking buffer The test result is fetched so as to transmit the read test result to the computer. In addition, the test device also includes a switch to allow the interface and the digital signal processor to read the test result stored in the trace buffer.

Description

数字视盘重放装置中的测试数字 信号处理器装置Test digital signal processor unit in digital video disc playback unit

本发明涉及数字视频(或多用)盘(DVD)重放装置，特别是DVD重放装置中的用于测试数字信号处理器的装置，适于用户观测其数据逐步处理的状态。The present invention relates to a digital video (or versatile) disk (DVD) playback device, especially a device for testing a digital signal processor in a DVD playback device, which is suitable for users to observe the status of its data step-by-step processing.

在八十年代初期，CD(密集盘)播放机得到了发展，在记录/重放技术以及数据存储容量方面取得了显著的进步。例如，最近开发出的可记录的光学装置如CD-WO(Write Once)和CD-MO(Magneto Once)表明光学装置不再是只读装置。但是，由于有限的盘大小和数据记录规范，存储容量受到限制。顺便地说，适于数据压缩技术和数据缓冲技术的小盘机(mini disc player)的光盘具有一个增加了的存储容量。尤其是，最近开发的用于数字移动图象的记录介质-数字视盘(DVD)适用于具有前景的多媒体记录装置，多媒体记录装置能够记录超过2个小时的MPEG2(移动图象专家组2)数字影像。In the early 1980's, CD (Compact Disc) players were developed, and significant advances were made in recording/playback technology and data storage capacity. For example, recently developed recordable optical devices such as CD-WO (Write Once) and CD-MO (Magneto Once) indicate that optical devices are no longer read-only devices. However, storage capacity is limited due to limited disk size and data recording specifications. By the way, an optical disc of a mini disc player adapted to data compression technology and data buffering technology has an increased storage capacity. In particular, a recently developed recording medium for digital moving images - digital video disc (DVD) is suitable for a promising multimedia recording device capable of recording more than 2 hours of MPEG2 (Moving Pictures Experts Group 2) digital image.

图1示出了普通DVD重放装置的示意性方框图，参考图1，盘马达16以恒定的速度旋转盘10，光头(head)12向盘10发射一束激光来读取记录在其表面的数据。托运器马达(sled motor)14驱动一个其上安装有光头12的光传感器(pick-up)13，从而相关于旋转的盘10前后移动光传感器13。信号重放装置21放大一个从光传感器13输出的RF(射频)信号，除去其噪声，并执行同步检测，从而重放记录在盘10上的信号。伺服控制器27控制盘马达16的旋转，并控制光头12的聚焦和寻迹(tracking)。系统控制器24控制DVD重放装置的全部操作。基于16-8解调，数字信号处理器23解调从信号重放装置21输出的信号，并包括了一同步检测器，它具有数字P11(锁相环)、解扰、错误检测、和寻迹缓冲器(rtack buffer)控制功能。特别是，预制在数字信号处理器23中的16-8解调器(未图示)从接收的数据中检测一个同步信号，并解调数据以将其存储在存储器(如寻迹缓冲器)22中。预制在数字信号处理器23中的错误检测器读取存储在寻迹缓冲器22中的数据以校正其错误并再次将结果存储在存储器22中。而且，数字信号处理器23的检测器从存储在寻迹缓冲器22中的数据检测表示盘位置的ID(识别)数据，并将其传送给系统控制器24，并解扰该数据，从而将其再存储到寻迹缓冲器22中。根据数据请求，存储在寻迹缓冲器22中的数据将被传送给数字视频解码部分。一个键盘输入部分25，一个用户接口包括多个用于输入数据或命令的键。一个显示器26显示DVD重放装置的各种操作状态。视频解码器32把从数字信号处理器23输出的压缩视频数据解码成数字视频数据。一个子视频解码器33把子视频信息解码成数字视频数据形式的静止视频信息。视频消隐(blanking)信息(以下称为短VBI)解码器34和图象闪亮点(highlight)信息(HLI)解码器35解码静止视频数据。声频解码器36将从数字信号处理器23输出的声频数据解码。视频混合器29混合视频解码器32、子视频解码器33、VBI解码器34和HLI解码器35的输出。视频输出电路30把视频混合器29输出的数字视频数据转换成一个模拟视频信号，并将其提供给监视器(未图示)。声频输出电路31把从声频解码器36输出的数字声频数据转换成一个模拟声频信号，并将其提供给扬声器(未图示)。这里，视频解码器32、子视频解码器33、VBI解码器34、HLI解码器35和声频解码器36构成一个公知的视频/声频解码器(或MPEG2解码器)40。在系统控制器24的控制下，多路分解器28把从数字信号处理器23输出的数据多路分解，以分别提供位流型(bit streamtype)信息、视频数据、声频数据和子视频数据给MPEG2解码器40。Fig. 1 has shown the schematic block diagram of common DVD replaying apparatus, with reference to Fig. data. A sled motor 14 drives a pick-up 13 on which an optical head 12 is mounted, thereby moving the pick-up 13 back and forth with respect to the rotating disc 10. The signal reproducing means 21 amplifies an RF (Radio Frequency) signal output from the photosensor 13, removes its noise, and performs synchronization detection, thereby reproducing the signal recorded on the disc 10. The servo controller 27 controls the rotation of the disk motor 16 and controls the focusing and tracking of the optical head 12 . A system controller 24 controls the overall operation of the DVD playback device. Based on 16-8 demodulation, the digital signal processor 23 demodulates the signal output from the signal playback device 21, and includes a sync detector with digital P11 (phase-locked loop), descrambling, error detection, and homing Trace buffer (rtack buffer) control function. Specifically, a 16-8 demodulator (not shown) prefabricated in the digital signal processor 23 detects a sync signal from received data, and demodulates the data to store it in a memory (such as a trace buffer) 22 in. An error detector prefabricated in the digital signal processor 23 reads the data stored in the tracking buffer 22 to correct its errors and stores the result in the memory 22 again. Also, the detector of the digital signal processor 23 detects ID (identification) data representing the disc position from the data stored in the tracking buffer 22, and transmits it to the system controller 24, and descrambles the data, thereby It is then stored into the trace buffer 22 . According to the data request, the data stored in the tracking buffer 22 will be transferred to the digital video decoding section. A keyboard input section 25, a user interface includes a plurality of keys for inputting data or commands. A display 26 shows various operating states of the DVD playback device. The video decoder 32 decodes the compressed video data output from the digital signal processor 23 into digital video data. A sub-video decoder 33 decodes the sub-video information into still video information in the form of digital video data. A video blanking information (hereinafter referred to as short VBI) decoder 34 and image highlight information (HLI) decoder 35 decode still video data. The audio decoder 36 decodes the audio data output from the digital signal processor 23 . Video mixer 29 mixes the outputs of video decoder 32 , sub video decoder 33 , VBI decoder 34 and HLI decoder 35 . The video output circuit 30 converts the digital video data output from the video mixer 29 into an analog video signal, and supplies it to a monitor (not shown). The audio output circuit 31 converts the digital audio data output from the audio decoder 36 into an analog audio signal, and supplies it to a speaker (not shown). Here, the video decoder 32, the sub-video decoder 33, the VBI decoder 34, the HLI decoder 35, and the audio decoder 36 constitute a known video/audio decoder (or MPEG2 decoder) 40. Under the control of the system controller 24, the demultiplexer 28 demultiplexes the data output from the digital signal processor 23 to provide bit stream type (bit streamtype) information, video data, audio data and sub-video data to MPEG2 respectively. decoder 40.

图2示出了根据现有技术用于测试图1所示的数字信号处理器23的装置。在附图中，计算机70产生一个测试数据，并在其屏幕上显示测试结果，从而计算机用户可以监视测试结果。数字信号处理器23与图1所示的相同。微型计算机52控制数字信号处理器23的全部操作。接口电路61在计算机70和数字信号处理器23之间接口，从而从计算机70传送测试数据到数字信号处理器23。一个SRAM(静态随机存取存储器)63通过16个扇区(即32Kbytes)存储8-16调制的数据。一个SRAM控制器62产生一个地址信号和一个控制信号，用于读取并传送16个扇区的8-16调制的数据到数字信号处理器23。一个串行接口53把从SRAM63读取的数据以串行数据的形式传送到数字信号处理器23。DRAM(动态RAM)构成的寻迹缓冲器54存储从数字信号处理器23输出的数据，并存储数字信号处理器23的测试结果。一个测量装置80分析寻迹缓冲器54的内容。FIG. 2 shows a device for testing the digital signal processor 23 shown in FIG. 1 according to the prior art. In the drawing, a computer 70 generates a test data and displays the test result on its screen so that a computer user can monitor the test result. The digital signal processor 23 is the same as that shown in FIG. 1 . The microcomputer 52 controls the overall operation of the digital signal processor 23 . The interface circuit 61 interfaces between the computer 70 and the digital signal processor 23 to transfer test data from the computer 70 to the digital signal processor 23 . A SRAM (Static Random Access Memory) 63 stores 8-16 modulated data through 16 sectors (ie 32Kbytes). An SRAM controller 62 generates an address signal and a control signal for reading and transferring 8-16 modulated data of 16 sectors to the digital signal processor 23 . A serial interface 53 transfers the data read from the SRAM 63 to the digital signal processor 23 in the form of serial data. A trace buffer 54 constituted by DRAM (Dynamic RAM) stores data output from the digital signal processor 23 and stores test results of the digital signal processor 23 . A measurement device 80 analyzes the content of the trace buffer 54 .

根据通常测试装置的结构，为了测试数字信号处理器23，具有与从盘10接收的数据的格式相同格式的数据应当从外部被提供到测试装置。因此，测试装置应当预先具有数据值。输入数据在数字信号处理器23中被进行16-8解调，然后，存储在寻迹缓冲器54中。为了检查输入数据值是否正确，需要通过使用外部设备读取寻迹缓冲器54的内容。此外，为了检查一个错误校正电路的一个操作状态，需要执行在行的方向上的错误校正以检查寻迹缓冲器54的内容，和然后执行列方向的错误校正以再次检查寻迹缓冲器54的内容。而且，为了检查被传送到MPEG2解码器40的数据，需要检查解扰的数据。对于这样一种测试操作，测试装置需要包括一个接口装置，用于把8-16调制的数据从计算机70传送到数字信号处理器23，和另一个接口装置，用于为数字信号处理器23的每一操作步骤检查连接到数字信号处理器23的寻迹缓冲器54的内容。接口电路61对应于前者，测量装置80对应于后者。虽然包括了计算机70，但通常的测试装置需通过使用分离的测量装置80读取寻迹缓冲器54的内容，因此效率低并导致难于分析寻迹缓冲器54的内容。According to the structure of a general test device, in order to test the digital signal processor 23, data having the same format as that of the data received from the disc 10 should be supplied to the test device from the outside. Therefore, the test device should have data values in advance. The input data is 16-8 demodulated in the digital signal processor 23 and then stored in the tracking buffer 54 . In order to check whether the input data value is correct, it is necessary to read the contents of the trace buffer 54 by using an external device. In addition, in order to check an operation state of an error correction circuit, it is necessary to perform error correction in the row direction to check the contents of the tracking buffer 54, and then perform error correction in the column direction to check the tracking buffer 54 again. content. Also, in order to check the data transmitted to the MPEG2 decoder 40, it is necessary to check the descrambled data. For such a test operation, the test device needs to include an interface device for transferring the 8-16 modulated data from the computer 70 to the digital signal processor 23, and another interface device for the digital signal processor 23. The content of the trace buffer 54 connected to the digital signal processor 23 is checked at each operation step. The interface circuit 61 corresponds to the former, and the measuring device 80 corresponds to the latter. Although the computer 70 is included, the conventional testing device needs to read the contents of the trace buffer 54 by using a separate measurement device 80 , which is inefficient and makes it difficult to analyze the contents of the trace buffer 54 .

因此本发明的一个目的在于提供一种装置，用于有效地测试数字信号处理器并允许使用者容易地观测数字信号处理器的数据逐步处理状态。It is therefore an object of the present invention to provide an apparatus for effectively testing a digital signal processor and allowing a user to easily observe the step-by-step data processing status of the digital signal processor.

为了达到上述和其他目的，提供了一种装置，用于测试DVD重放装置中的数字信号处理器。该测试装置包括一个计算机，它产生用于测试数字信号处理器的测试数据并在其屏幕上显示测试结果；一个寻迹缓冲器，用于存储在数字信号处理器中已处理的数据和存储数字信号处理器的测试结果；和一个接口，用于把从计算机输出的测试数据传送到数字信号处理器，并从寻迹缓冲器读出测试结果，以传送该读取的测试结果到计算机，而且，测试装置包括一个开关，用于根据时间分割将寻迹缓冲器切换到接口和数字信号处理器，从而允许接口和数字信号处理器读取存储在寻迹缓冲器中的测试结果。To achieve the above and other objects, an apparatus is provided for testing a digital signal processor in a DVD playback apparatus. The test setup includes a computer that generates test data for testing the digital signal processor and displays test results on its screen; a trace buffer for storing processed data and storing digital signal processors in the digital signal processor. a test result of the signal processor; and an interface for transmitting the test data output from the computer to the digital signal processor, and reading the test result from the trace buffer to transmit the read test result to the computer, and , the test device includes a switch for switching the trace buffer to the interface and the digital signal processor according to time division, thereby allowing the interface and the digital signal processor to read test results stored in the trace buffer.

通过下面结合附图对优选实施例的详细描述，本发明的上述和其他目的、特征和优点将变得更加清楚，在附图中：The above-mentioned and other purposes, features and advantages of the present invention will become more apparent through the following detailed description of preferred embodiments in conjunction with the accompanying drawings, in which:

图1是普通DVD重放装置的示意性方框图；Fig. 1 is a schematic block diagram of a common DVD playback device;

图2是根据现有技术用于测试DVD重放装置中数字信号处理器的装置的示意性方框图；Figure 2 is a schematic block diagram of a device for testing a digital signal processor in a DVD playback device according to the prior art;

图3是根据本发明的一个优选实施例用于测试DVD重放装置中数字信号处理器的装置示意性方框图。FIG. 3 is a schematic block diagram of an apparatus for testing a digital signal processor in a DVD playback apparatus according to a preferred embodiment of the present invention.

结合附图，本发明的一个优选实施例将被详细描述，在附图中，为了便于理解，相同的标号代表附图中的相同元件。虽然特定实施例将被作为典型详细描述，从而可明确本发明的主题，本领域的技术人员甚至无须详细描述能够实施本发明。此外，省略了广泛公知功能和结构的不必要的描述。A preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings. In the accompanying drawings, for easy understanding, the same reference numerals represent the same elements in the accompanying drawings. While certain embodiments will be described in typical detail so that the subject matter of the invention can be clarified, those skilled in the art can practice the invention without even the detailed description. Also, unnecessary descriptions of widely known functions and constructions are omitted.

图3是根据本发明的一个优选实施例用于测试DVD重放装置中数字信号处理器的装置的示意性方框图。如图中所示，计算机70产生用于测试数字信号处理器23的测试数据，并在其屏幕上显示测试结果，从而允许使用者监视测试结果。数字信号处理器23具有如图1和2所示的相同结构和功能。微型计算机52控制数字信号处理器23的全部操作。接口61把从计算机70输出的测试数据传送到数字信号处理器23，并从寻迹缓冲器54读取数字信号处理器23的测试结果，以将其传送到计算机70。一个SRAM63通过16个扇区(即32Kbytes)存储8-16调制的数据。一个SRAM控制器62产生一个地址信号和一个控制信号，用于从SRAM63读取16个扇区的8-16调制的数据并将其传送到数字信号处理器23。一个串行接口53串行地把从SRAM63读取的数据传送到数字信号处理器23。DRAM构成的寻迹缓冲器(trackbuffer)54存储从数字信号处理器23输出的数据并存储数字信号处理器23的测试结果。寻迹缓冲器控制器55产生访问寻迹缓冲器54的地址、RAS(行地址选通)、和CAS(列地址选通)信号。根据时间分割，开关SW1切换接口61到SRAM控制器62和寻迹缓冲器控制器55。根据时间分割，开关SW2切换寻迹缓冲器54到寻迹缓冲器控制器55和数字信号处理器23。FIG. 3 is a schematic block diagram of an apparatus for testing a digital signal processor in a DVD playback apparatus according to a preferred embodiment of the present invention. As shown in the figure, the computer 70 generates test data for testing the digital signal processor 23 and displays the test results on its screen, thereby allowing the user to monitor the test results. The digital signal processor 23 has the same structure and function as shown in FIGS. 1 and 2 . The microcomputer 52 controls the overall operation of the digital signal processor 23 . The interface 61 transmits the test data output from the computer 70 to the digital signal processor 23 and reads the test result of the digital signal processor 23 from the trace buffer 54 to transmit it to the computer 70 . A SRAM63 stores 8-16 modulated data through 16 sectors (ie 32Kbytes). An SRAM controller 62 generates an address signal and a control signal for reading 16 sectors of 8-16 modulated data from SRAM 63 and transferring it to digital signal processor 23 . A serial interface 53 transfers data read from the SRAM 63 to the digital signal processor 23 serially. A track buffer (trackbuffer) 54 constituted by DRAM stores data output from the digital signal processor 23 and stores test results of the digital signal processor 23 . The tracking buffer controller 55 generates address, RAS (row address strobe), and CAS (column address strobe) signals for accessing the tracking buffer 54 . The switch SW1 switches the interface 61 to the SRAM controller 62 and the trace buffer controller 55 according to time division. The switch SW2 switches the tracking buffer 54 to the tracking buffer controller 55 and the digital signal processor 23 according to time division.

根据本发明，计算机70通过ASCII数据显示测试结果，从而使用者能够容易地监视该测试结果。这里，测试结果是指代表数字信号处理器23是否已经正确地执行解调和差错校正。而且，寻迹缓冲器54存储差错校正的数据，从而计算机70可以通过接口61和寻迹缓冲器控制器55检查差错校正状态。According to the present invention, the computer 70 displays the test result by ASCII data, so that the user can easily monitor the test result. Here, the test result means representing whether or not the digital signal processor 23 has correctly performed demodulation and error correction. Also, the tracking buffer 54 stores error-corrected data so that the computer 70 can check the error correction status through the interface 61 and the tracking buffer controller 55 .

从上述可知，根据本发明的装置能够有效地测试数字信号处理器并允许使用者容易地观测数字信号处理器23的数据逐步处理状态。As can be seen from the above, the device according to the present invention can effectively test the digital signal processor and allow the user to easily observe the step-by-step data processing status of the digital signal processor 23 .

虽然上面已经详细描述了本发明的优选实施例，应当清楚地理解，这里所教导的基本发明原理的很多变形和/或修改对本领域的技术人员来说是显而易见的，他们都被包括在本发明权利要求规定的本发明的精神和保护范围内。Although the preferred embodiment of the present invention has been described in detail above, it should be clearly understood that many variations and/or modifications of the basic inventive principles taught herein will be apparent to those skilled in the art, and they are included in the present invention. Within the spirit and protection scope of the present invention defined by the claims.

Claims (2)

1.一种用于测试数字视盘(DVD)重放装置中的数字信号处理器的装置，包括：1. An apparatus for testing a digital signal processor in a digital video disc (DVD) playback device, comprising: 一个计算机，它产生用于测试所说数字信号处理器的测试数据，并在其屏幕上显示测试结果；a computer that generates test data for testing said digital signal processor and displays test results on its screen; 一个寻迹缓冲器，用于存储在所说数字信号处理器中已处理的数据和存储数字信号处理器的测试结果，以及a trace buffer for storing processed data in said digital signal processor and storing digital signal processor test results, and 一个接口，用于把由所说计算机输出的测试数据传送到所说的数字信号处理器，并从所说的寻迹缓冲器读取该测试结果，以便将所说读取的测试结果传送到所说的计算机。An interface is used to transmit the test data output by said computer to said digital signal processor, and reads this test result from said trace buffer, so that said read test result is transmitted to Said computer. 2.根据权利要求1的用于测试数字视盘(DVD)重放装置中的数字信号处理器的装置，其中，进一步包括一个开关，用于根据时间分割将所说的寻迹缓冲器切换到所说的接口和所说的数字信号处理器，从而允许接口和数字信号处理器读取存储在寻迹缓冲器中的测试结果。2. The apparatus for testing a digital signal processor in a digital video disc (DVD) playback device according to claim 1, further comprising a switch for switching said trace buffer to said trace buffer according to time division. said interface and said digital signal processor, thereby allowing the interface and digital signal processor to read test results stored in the trace buffer.
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