[go: up one dir, main page]

CN119312764A - Automated physical implementation method and system for four-level structured low-skew clock tree - Google Patents

Automated physical implementation method and system for four-level structured low-skew clock tree Download PDF

Info

Publication number
CN119312764A
CN119312764A CN202411855949.XA CN202411855949A CN119312764A CN 119312764 A CN119312764 A CN 119312764A CN 202411855949 A CN202411855949 A CN 202411855949A CN 119312764 A CN119312764 A CN 119312764A
Authority
CN
China
Prior art keywords
point
clock
points
valve
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202411855949.XA
Other languages
Chinese (zh)
Other versions
CN119312764B (en
Inventor
黄鹏程
何小威
赵振宇
乐大珩
冯超超
马驰远
赵学谦
王永文
杨乾明
邓林
张剑锋
冯权友
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National University of Defense Technology
Original Assignee
National University of Defense Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National University of Defense Technology filed Critical National University of Defense Technology
Priority to CN202411855949.XA priority Critical patent/CN119312764B/en
Publication of CN119312764A publication Critical patent/CN119312764A/en
Application granted granted Critical
Publication of CN119312764B publication Critical patent/CN119312764B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/392Floor-planning or layout, e.g. partitioning or placement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/394Routing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/396Clock trees

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

The invention discloses an automatic physical realization method and system of a four-level structured low-skew clock tree, which are applied to the technical fields of chip design and EDA, and the method comprises the steps that S101, preliminary positions and quantity of valve points at the tail end of a synchronous clock are determined; the method comprises the steps of S102, configuring basic constraint of a clock tree, S103, symmetrically growing a first-stage clock trunk, S104, symmetrically growing a second-stage clock trunk, S105, symmetrically growing a third-stage clock trunk, S106, and generating a multi-valve point balance sub-tree, so that balanced connection of terminal valve points to clock leaf nodes and global time sequence satisfaction are realized. The invention can greatly reduce the designed clock skew under the oversized condition.

Description

Automated physical realization method and system for four-stage structured low-skew clock tree
Technical Field
The invention mainly relates to the technical field of clock trees, in particular to an automatic physical realization method and system of a four-level structured low-skew clock tree.
Background
In the physical design of integrated circuit modules or full chips, a Clock tree is grown between Clock input signals and each sequential logic Clock end to drive and realize sequential convergence, and the process of growing the Clock tree is commonly called Clock tree synthesis (Clock TREE SYNTHESIS, CTS). In early clock tree synthesis, the clock tree structure is relatively easy to achieve zero clock skew due to the small circuit scale, simple clock structure and clear hierarchy. Along with the continuous increase of design complexity, circuit functions are diversified, clock structures are more and more complex, clock tree synthesis is difficult to achieve zero clock skew, and the current clock tree synthesis algorithm mainly comprises three steps of cluster analysis and realization, global delay balance and actual physical wiring of clock lines in the actual implementation process, so that the wiring delay and clock skew targets constrained by global delay are realized.
In the existing clock tree comprehensive algorithm, the clock tree structure has a plurality of types such as balanced tree, H-tree, mesh and the like. The balanced tree is the most basic clock structure, and has the defects of larger clock deflection under large-scale design, mesh design is favorable for obtaining smaller clock deflection, a large amount of manual design and simulation work are often needed, the degree of automation is low, and the flexibility and the structural characteristics of the H-tree are moderate and are widely used. However, for oversized designs with short side dimensions up to thousands or even twenty-thousand microns, the H-tree may also exhibit clock skew exceeding 50ps, with larger clock skew potentially resulting in settling time and hold timing being difficult to converge.
Disclosure of Invention
Aiming at the technical problems in the prior art, the invention provides an automatic physical realization method and system for a four-stage structured low-skew clock tree for reducing clock skew.
In order to solve the technical problems, the technical scheme provided by the invention is as follows:
an automated physical implementation method of a four-level structured low-skew clock tree, comprising the steps of:
S101, determining preliminary positions and the number of the valve points at the tail end of the synchronous clock, namely determining the preliminary positions and the number N of the valve points at the tail end of the synchronous clock according to the layout shape and the macro module position and the rule of row and column regularity;
S102, configuring basic constraint of a clock tree, namely selecting a pre-designed strong driving inverter or buffer as a clock unit of a first-second-stage valve point and a first-third-stage symmetrical structure clock trunk, selecting the inverter/buffer as a clock unit of a tail-end valve point, selecting the clock inverter and the clock buffer as clock units of a multi-valve point balance sub-tree, selecting the uppermost two layers of metals in a target process as long-distance interconnection lines of the first-third-stage symmetrical structure clock trunk, selecting the rest metals as interconnection lines of the multi-valve point balance sub-tree, configuring a value range of clock jump, calculating and configuring the maximum driving distance L_max of the strong driving clock unit through simulation according to the clock jump requirement, and configuring the maximum fan-out fanout _max of the multi-valve point balance sub-tree;
S103, symmetrically growing a first-stage clock trunk, namely calculating the accurate positions of all the tail end valve tap3rd points according to the initial positions of all the tail end valve tap3rd points and combining the characteristics of a power grid structure, calculating the accurate positions of the left and right first-stage valve tap1st points, symmetrically growing the first-stage clock trunk by taking clock input as a starting point, and symmetrically connecting the clock input with the two first-stage valve tap1st points;
S104, symmetrically growing a second-stage clock trunk, namely calculating the accurate position of a second-stage valve tap2nd point corresponding to each row by combining the structural characteristics of a power grid aiming at the tap3rd point of each row of end valves, symmetrically growing the second-stage clock trunk by taking the tap1st point on the left as a starting point, so that all the tap2nd points on the left are respectively and symmetrically connected with the tap1st point on the left;
S105, symmetrically growing a third-stage clock trunk, namely, for a first column of tail end valve tap3rd points, starting from a corresponding tap2nd point, symmetrically growing the third-stage clock trunk up and down so as to connect the first column of tail end valve tap3rd points with the corresponding tap2nd point, and then, for each other column of tail end valve points, copying the third-stage clock trunk of the first column and translating the third-stage clock trunk to a corresponding position, and after modifying a unit name and a line name, connecting the tail end valve point of the corresponding column with the corresponding tap2nd point up and down symmetrically;
And S106, generating a multi-valve point balance sub-tree, namely completing automatic balance sub-tree generation by taking the tail end valve tap3rd point as a final valve point, so as to realize balance connection of the tail end valve point to a clock leaf node and global time sequence satisfaction.
Preferably, in step S103, calculating the accurate positions of all the end valve tap3rd points according to the initial positions of all the end valve tap3rd points and in combination with the power grid structure characteristics includes the steps of:
s1031a, obtaining a space_top of the two layers of the highest metals of the power grid, wherein the starting point of the two layers of the highest metals of the power grid in the horizontal direction is x0_top, and the starting point of the two layers of the power grid in the vertical direction is y0_top;
S1032a, for the i-th end valve point, its initial coordinates are (x3rd_i_init, y3rd_i_init), and its exact position is calculated as follows:
x3rd_i_ic=round((x3rd_i_init–x0_top)/(2×Space_top))×2×Space_top+x0_top;
y3rd_i_ic=round((y3rd_i_init–y0_top)/(2×Space_top))×2×Space_top+y0_top;
Wherein the method comprises the steps of ;
S1033a, for the accurate position (x3rd_i_ic, y3rd_i_ic) of the ith end valve point, judging whether to overlap with the macro module positions nearby each other, if so, searching the final accurate position (x3rd_i_c, y3rd_i_c) in the diagonal mode according to the sequence of (1, 1), (1, -1), (-1, -1) and (-1, 1);
s1034a, if i is less than N, i is increased by 1, and the process returns to S1032a, and if i is equal to N, the final accurate position calculation of all end valve points is completed, ending the current step.
Preferably, in step S103, the accurate positions of the points of the left and right first-stage valves tap1st are calculated, and then the first-stage clock trunk is grown symmetrically with the clock input as the starting point, and the clock input and the two first-stage valves tap1st are connected in a point-symmetrical manner, which includes the steps of:
s1301b, obtaining the barycentric coordinates of the layout, namely obtaining barycentric coordinates (x_fp, y_fp) of the layout according to the shape of the layout;
S1302b, calculating the x initial coordinate of the 1st point of the first-stage valve tap at the left, wherein the column number of the end valve points is Nc, if Nc is a multiple of 2, namely Nc=2k is satisfied, and the center of gravity of the end valve points in the x direction is calculated by 1~k columns at the left As the x-coordinate of the left tap1st point, if nc=2k—1, the center of gravity x1st_c { k } -fp of the kth column end valve point in the x-direction is calculated first, and if x1st_c { k } -fp < = x_fp, the center of gravity of the k column end valve point in the x-direction is calculated as the left column end valve point in the x-directionAs the x-coordinate of the left tap1st, if nc=2k-1 and x1st_c { k } -fp > x_fp, the center of gravity in the x-direction at the end valve point of the left k-1 columnX-coordinate as left tap1 st;
S1303b, calculating an x initial coordinate of a first-stage valve tap1st point on the right, wherein if Nc=2k, the center of gravity x1st_r_fp of the tail end valve point of the k+1-2k column on the right in the x direction is taken as the x coordinate of the tap1st point on the right; if a dummy end valve point is supplemented between a kth column and a k+1th column, and the right k column and the left k column can be in a translation relation, the dummy valve point of the column is called a ky column, and the barycenter x1st_r_fp of the right ky column and the k+1th-2k-1 column in the x direction is taken as the x coordinate of the right tap1st point, if a dummy end valve point is supplemented after 2k-1, and the right k column and the left k column can be in a left-right mirror image relation, the dummy valve point of the column is called a ny column, and the barycenter x1_r_fp of the right k+1th column and the k-2th column in the x direction is taken as the x coordinate of the right tap1st point, and the barycenter x1st_r_fp of the k+2k-1 st in the x direction is taken as the x coordinate of the right tap1st point, and the left tap1 st_fp is updated at the same time;
S1304b, determining the y initial coordinates of the two tap1st points, wherein the number of the tail end valve point lines is Nr, and if Nr is a multiple of 2, the method meets the following conditions Y_fp is taken as the y coordinate y1st_fp of the two tap1st ifThen by the firstAdding an offset delta y to the y coordinate value of the row end valve point to serve as y coordinates y1st_fp of the two tap1st, wherein the offset delta y is even times of the space_top of the two layers of metal at the highest of the power grid;
s1305b, calculating to obtain the accurate coordinates of the tap1st points of the two first-stage valves according to the characteristics of the power grid, wherein the calculation formula is as follows:
y1st_fp_c=round((y1st_fp_c–y0_top)/(2×Space_top)-6)×2×Space_top+y0_top;
;
x1st_r_fp_c=round((x1st_r_fp–x0_top)/(2×Space_top))×2×Space_top+x0_top;
Wherein round function represents rounding;
S1306b, calculating the actual Manhattan distance L1st of the clock input to the two first-stage valve points, wherein the position of the clock input is recorded as (x_ckin, y_ckin), and the x coordinate x1st_mean of the center points of the left tap1st and the right tap1st is calculated first; Calculating Manhattan distance L0 of clock input to two tap1st central points, wherein L0= |x1st_mean-x_ckin|+|y1st_fp-y_ckin|, the distances from the two tap1st central points to the respective central points are equal, the distances are recorded as L1, and the requirements are met Finally, obtaining the actual Manhattan distance L1st=L0+L1 of the clock input to the two first-stage valve points;
s1307b, calculating the number of clock units required by the first-stage clock backbone, namely firstly rounding L_max to space_top to obtain L_max_std= rounddown (L_max/space_top) multiplied by space_top; then calculate num1 st_0= rounddown (L0/l_max_std), then clock input to place num1st_0 clock units between two tap1st center points, then manhattan distance between the num1st_0 clock units from two tap1st center points is L0 end=l 0-num1st_0×l_max_std, then calculate num1 st_1= rounddown (L1- (l_max_std-l0_end)/2), if L1< num1st_1×l_max_std, then distance between the center point and left/right tap1st clock units is rounddown (L1/(num 1st_1×space_top)) ×space_top, otherwise the distance is still l_max_std, where roundup represents rounding up and rounddown represents rounding down;
S1308b, the growth of the first-stage clock trunk is completed, namely the number num1st of all clock units of the first-stage clock trunk is calculated, num1 st=num 1st_0+2×num1st_1 is met, num1st clock units are placed according to the calculated distance relation and connected with the highest two-layer metal according to the logic relation, and the wound highest two-layer metal is set to be fixed and unchanged in attribute.
Preferably, in step S1303b, the x-coordinate of the left tap1st is updated by observing the symmetry of the left and right sides, if a dummy end valve point is added before the 1st row to make the left k row end valve point and the right k row in a translational relationship, the dummy valve point is called the 0y row, and the center of gravity of the left 0y row and 1~k-1 row end valve point in the x-direction is usedAs the x coordinate of the left tap1st point, if a dummy end valve point is added between the k-1 th column and the k-th column to enable the left k-th column and the right k-th column to present a left-right mirror image relationship, the dummy valve point of the column is called the ky column, and the center of gravity of the dummy end valve point of the left column 1~k-1 and the ky column in the x direction is adoptedAs the x-coordinate of the left tap1st point.
Preferably, in step S104, for each column of end valve tap3rd points, in combination with the power grid structure characteristics, calculating the precise position of one second stage valve tap2nd point corresponding to each column includes the steps of:
s1041a, calculating the y coordinates of all tap2nd according to the y coordinates of the tap1st point, if Nr is a multiple of 2, namely, the requirement is satisfied Then by the firstLine and thThe y-coordinate mean of the end-of-line valve points is taken as the y-coordinates of all tanp nd, and the calculation formula is y2nd_fp_c=If Nr is not a multiple of 2, thenThen by the firstThe y-coordinate mean value of the end-of-line valve point plus an offset deltay 2 is calculated as y-coordinates of all tanp nd, with the formula y2nd_fp_c =+Δy2, wherein Δy2 is an even multiple of the space_top of the two layers of metal at the top of the power grid;
S1042a, for the j-th column of end valve tap3rd points, calculating the x initial coordinate x2nd_j_ic of the tap2nd point corresponding to the column, where x2nd_j_ic=x3rd_j_c+6x2xSpace_top; ;
S1043a, for the jth tap2nd point, searching for a final accurate position in a manner of double space_top to the left/right if its initial position overlaps with the macroblock position in its vicinity, denoted as (x2nd_j_c, y2nd_j_c);
S1044a, if j is less than Nc, j is incremented by 1 and returns to step S1042b, if j is equal to Nc, the calculation of the exact position of all second stage end valve points is complete, ending the present step.
Preferably, in step S104, the second stage clock trunk is grown symmetrically with the tap1st point on the left side as a starting point, so that the step of symmetrically connecting all the tap2nd points on the left side with the tap1st point on the left side includes the steps of:
S1041b, the number of the second-stage valve tap2nd points on the left is recorded as If (3)Cannot be expressed as a power of 2, then the least number of dummy valve points are added to the leftmost side so that;
S1042b, the number of points of the left second stage valve tap2nd is as followsOr (b)Then the center point of the n, n+1 th clock from left to right is selected as the bifurcation point of the left branch of the second-stage clock trunk, and the left side of the bifurcation point is recorded asWherein,;
S1043b, calculating the left first stage valve point to the leftThe furthest distance L2nd_max of the second stage valve points, wherein;
S1044b, estimating left first stage valve point to first stage valve pointThe number of clock units between the second stage valve points num2nd_0, satisfying num2 nd_0= roundup (l2nd_max/l_max_std+m/2);
s1045b according to left side The positions of the common clock unit and other clock units between the left first-stage valve point and the left second-stage valve point are calculated by the position relation of the second-stage valve points and the symmetry constraint of the second-stage clock trunk, the clock units are symmetrically arranged and connected by the highest two-layer metal according to the logic relation, and the wound highest two-layer metal is set as fixed and unchanged attribute.
Preferably, in step S105, for the first column end valve tap3rd point, the third stage clock trunk is grown up and down symmetrically with its corresponding tap2nd point as a starting point, so as to connect the first column end valve tap3rd point with its corresponding tap2nd point, which includes the steps of:
S1051, dividing a first row of end valves tap3rd with total number of Nr into an upper part and a lower part according to the position of a first tap2nd, wherein the number of the lower part is Nr_dn;
S1052, if nr_dn satisfies nr_dn=2nr or nr_dn=2nr+1, then selecting the center point of both of the Nr, nr+1 end valve points from bottom to top as the branching point of the lower branch of the third-stage clock trunk, where the left side of the branching point is denoted as (x3rd_nb_0, y3rd_nb_0), x3rd_nb_0=x2nd_1_c, y3rd_nb_0= (x3rd_ { Nr } c+x3rd_ { nr+1 }/-c)/2;
S1053, calculating the furthest distance L3rd_max from the 1 st second stage valve tap2nd point to the end valve point at the lowest side of column 1, l3rd_max= |y2nd_ 1_c-y3rd_nb_0|+|y3rd/u y3rd_nb_0 i++ y3rd u;
S1054, estimating the number of clock units num3rd_0 between the 1 st second stage valve point and the lowest end valve point in the 1 st column, satisfying num3 rd_0= roundup (l3 rd_max/l_max_std+mr/2);
s1055, calculating the positions of a public clock unit and other clock units between the 1 st second-stage valve tap2nd point and each lower end valve point according to the position relation of all the lower end valve tap3rd points of the 1 st column and the symmetry constraint of a third-stage clock trunk, wherein the clock units are symmetrically arranged and connected by the highest two-layer metal according to the logic relation, and the wound highest two-layer metal is set as fixed and unchanged attribute;
S1056, for all terminal tap3rd points on the 1 st column, according to the up-down symmetrical relation, the position of the upper corresponding clock unit is obtained in a mirror image mode according to the position of the 1 st column third-stage clock unit, the clock unit is placed, then according to the logical connection relation between the 1 st tap2nd point and all terminal tap3rd points on the 1 st column, the highest two layers of metals are connected, and the wound highest two layers of metals are set to be fixed and unchanged in attribute.
The invention also discloses an automatic physical implementation system of the four-level structured low-skew clock tree, which comprises a memory and a processor which are connected with each other, wherein the memory is stored with a computer program which executes the steps of the method when being executed by the processor.
Compared with the prior art, the invention has the advantages that:
The invention intervenes for the synthesis of the clock tree in the process of layout and wiring of the oversized design, and realizes the automatic generation of the highly symmetrical clock trunk layout and winding and multi-valve point clock subtrees facing the oversized design, thereby reducing the clock deflection under the oversized design to below 20ps through a non-mesh structure.
Drawings
FIG. 1 is a flow chart of an embodiment of a physical implementation method of the present invention.
FIG. 2 is a schematic diagram of the distribution of the first stage, second stage valve points and end valve points in an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a first stage clock trunk according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a second-stage clock trunk grown under tap1stA according to an embodiment of the present invention.
Fig. 5 is a schematic diagram of a third stage clock trunk grown under tap2nd1 according to an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the drawings and specific examples.
As shown in fig. 1, the method for automatically and physically implementing the four-stage structured low-skew clock tree according to the embodiment of the invention includes the following steps:
S101, determining initial positions and the number of the end valve points of the synchronous clock according to the shape of a layout floorplan and the positions of macro modules and the relative regularity of rows and columns after completing layout floorplan and power supply planning for oversized design, and determining the number of the initial positions of the end valve points of the synchronous clock to be 20 as shown in figure 2;
S102, configuring basic constraint of a clock tree, namely selecting a pre-designed strong driving buffer CKBUFFXX under a target process as a clock unit of a first-second-stage valve point and a first-third-stage symmetrical structure clock trunk, selecting a certain buffer CKBUFFX as a clock unit of a tail end valve point, selecting a clock inverter and a clock buffer in a commercial library of the target process as clock units of a multi-valve point balance subtree, selecting the two uppermost layers of metals in the target process as long-distance interconnection lines of the first-third-stage symmetrical structure clock trunk, selecting the rest of metal layers as interconnection lines of the multi-valve point balance subtree, configuring a value range of clock jump (slow), performing simulation calculation through a simulation under the target process according to the slow requirement, configuring the maximum driving distance L_max of the strong driving clock unit to be 1000um so as to ensure that the slow requirement is met, and configuring the maximum fan-out fanout _max of the multi-valve point balance subtree to be 32;
S103, symmetrically growing a first-stage clock trunk, namely calculating the accurate positions of all 20 tail end valve tap3rd points according to the initial positions of all tail end valve tap3rd points and combining the characteristics of a power grid structure, calculating the accurate positions of tap1st points tap1st A and tap1stB of left and right first-stage valves, symmetrically growing the first-stage clock trunk by taking clock input as a starting point, and symmetrically connecting the clock input with tap1st A and tap1 stB;
S104, symmetrically growing a second-stage clock trunk, namely, calculating the accurate position of a second-stage valve tap2nd point corresponding to each column by combining the structural characteristics of a power grid aiming at the tap3rd point of each column, symmetrically growing the second-stage clock trunk by taking the tap1st point tap1st A on the left as a starting point, so that all the tap2nd points on the left are respectively and symmetrically connected with the tap1st point tap1st A on the left;
S105, symmetrically growing a third-stage clock trunk, namely, for a first column of tail end valve tap3rd points, starting from a corresponding tap2nd point, symmetrically growing the third-stage clock trunk up and down so as to connect the first column of tail end valve tap3rd points with the corresponding tap2nd point, and then, for each other column of tail end valve points, copying the third-stage clock trunk of the first column and translating the third-stage clock trunk to a corresponding position, and after modifying a unit name and a line name, connecting the tail end valve point of the corresponding column with the corresponding tap2nd point up and down symmetrically;
and S106, generating a multi-valve point balance sub-tree, namely using a terminal valve tap3rd point as a final valve point, and completing automatic balance sub-tree generation by using a commercial/open-source layout and wiring tool, so as to realize balance connection of the terminal valve point to a clock leaf node and global time sequence satisfaction.
The method is applied to the technical fields of chip design and EDA, and comprises the steps of determining preliminary positions and quantity of end valve points, configuring basic constraint of a clock tree, symmetrically growing a first-stage clock trunk, symmetrically growing a second-stage clock trunk, symmetrically growing a third-stage clock trunk, and finally finishing generation of a balance subtree of multiple valve points, so that clock deflection of the design is greatly reduced under oversized size.
In this embodiment, in step S103, according to the preliminary positions of all the end valve tap3rd points and in combination with the power grid structure characteristics, calculating the accurate positions of all the 20 end valve tap3rd points includes the steps of:
S1031a, obtaining the interval between the highest two layers of metal of the power grid, namely space_top, and obtaining the starting point of the M9 metal in the horizontal (or x) direction of the highest two layers of metal of the power grid as x0_top and the starting point of the M9 metal in the vertical (or y) direction as y0_top;
S1032a, for the i-th end valve point (i e [1,20 ]), its initial coordinates are (x3rd_i_init, y3rd_i_init), and its preliminary accurate position is calculated as follows:
x3rd_i_ic=round((x3rd_i_init–x0_top)/(2×Space_top))×2×Space_top+x0_top;
y3rd_i_ic=round((y3rd_i_init–y0_top)/(2×Space_top))×2×Space_top+y0_top;
S1033a, judging whether the accurate positions (x3rd_i_ic, y3rd_i_ic) of the ith end valve point overlap with the positions of macro blocks nearby each other, if so, searching the final accurate positions (x3rd_i_c, y3rd_i_c) according to the (1, 1), (1, -1), (-1, -1) and (1, 1) in a diagonal mode, wherein the final accurate positions are marked as (x3rd_i_c, y3rd_i_c), and in the embodiment, the overlapping condition does not occur, so that the position of the ith end valve point is unchanged after the step is implemented;
S1034 a, if i is less than 20, i is increased by 1, and the process returns to S1032, and if i is equal to 20, the calculation of the accurate positions of all the end valve points is completed, ending the present step.
In this embodiment, in step S103, the accurate positions of the left and right first-stage valves tap1st points tap1stA and tap1stB are calculated, then the first-stage clock trunk is grown symmetrically with the clock input as the starting point, and the clock input and tap1stA and tap1stB are connected symmetrically, which specifically includes the steps of:
S1031b, obtaining barycentric coordinates (x_fp, y_fp) of the layout floorplan according to the shape of the layout floorplan;
S1032b, calculating the x initial coordinates of the first stage valve tap1st point tap1st A on the left, wherein the number of columns of end valve points is Nc=5, as shown in FIG. 2, satisfying Nc=2k-1, wherein k=3, then calculating the center of gravity x1st_c3_fp of the end valve point on the 3 rd column in the x direction first, and if the center of gravity x1st_c3_fp < = x_fp is satisfied, then calculating the center of gravity of the end valve point on the 3 left column in the x direction first The x-coordinate as the left tap1st point tap1 stA;
S1033b, calculating an x initial coordinate of a first-stage valve tap1st point tap1stB on the right, wherein since Nc=2k-1, k=3, and x1st_c3_fp < =x_fp, by observing symmetry on the left and right sides, finding that a dummy end valve point is supplemented between the 3 rd column and the 4 th column (the dummy valve point is a clock unit which is not driven by any load and is only used for balancing), and enabling the 3 rd column end valve point on the right to be in a translation relationship with the 3 rd column, the dummy valve point on the right is called ky column, and a center of gravity x1st_r_fp of the 3 rd column end valve point on the right and the 4 th to 5 th column end valve point in the x direction is taken as an x coordinate of a tap1st point tap1stB on the right;
s1034b, determining the y initial coordinates of two tap1st points tap1st A and tap1stB, wherein the number of terminal valve point lines in the embodiment is Nr=4 as shown in FIG. 2, so as to satisfy the following conditions WhereinThen taking y_fp as the y coordinates y1st_fp of the two tap1st points tap1st A and tap1 stB;
S1035b, calculating to obtain the accurate coordinates of the tap1st point tap1st A and tap1stB of the two first-stage valves according to the characteristics of the power grid, wherein the calculation formula is as follows:
y1st_fp_c=round((y1st_fp_c–y0_top)/(2×Space_top)-6)×2×Space_top+y0_top;
;
x1st_r_fp_c=round((x1st_r_fp–x0_top)/(2×Space_top))×2×Space_top+x0_top;
Wherein round function represents rounding;
S1036b, calculating the actual Manhattan distance L1st of the clock input to the two first stage valve points, wherein the position of the clock input is recorded as (x_ckin, y_ckin), and the x coordinate x1st_mean of the center points of the left and right tap1st points tap1st A and tap1stB is calculated first Calculating Manhattan distance L0 of clock input to two tap1st central points, wherein L0= |x1st_mean-x_ckin|+|y1st_fp-y_ckin|, the distances from the two tap1st central points to the respective central points are equal, the distances are recorded as L1, and the requirements are metFinally, obtaining the actual Manhattan distance L1st=L0+L1 of the clock input to the two first-stage valve points;
S1037b, calculating the number of clock units required by the first-stage clock backbone, namely, firstly rounding L_max to space_top to obtain L_max_std= rounddown (L_max/space_top) multiplied by space_top;
Then, calculating num1 st_0= rounddown (L0/L_max_std), and inputting the clock to a position between two tap1st center points, wherein num1st_0 clock units need to be placed, and the Manhattan distance between the number of the clock units of num1st_0 and the two tap1st center points is L0 end=L0-num 1st_0 multiplied by L_max_std;
Then calculate num1 st_1= rounddown (l1- (l_max_std-l0_end)/2), if l1< num1st_1×l_max_std, then the distance between the center point and the left/right tap1st between num1st_1 clock units is rounddown (L1/(num 1st_1×space_top)) ×space_top, otherwise the distance is still l_max_std, where roundup represents an upward rounding and rounddown represents a downward rounding;
S1038b, completing the growth of the first-stage clock trunk, namely calculating the total number of clock units num1st of the first-stage clock trunk, satisfying num1 st=num 1st_0+2×num1st_1, in the embodiment, num1st_0 is equal to 5, and num1st_1 is equal to 3, so that the total number of clock units num1st of the first-stage clock trunk is equal to 11, placing the num1st clock units according to the calculated distance relation, connecting the two layers of metal at the highest, as shown in FIG. 3, and setting the wound two layers of metal at the highest as fixed and unchanged attributes.
In this embodiment, in step S104, for each row of end valve tap3rd points, in combination with the power grid structure feature, calculating the accurate position of one second stage valve tap2nd point corresponding to each row includes the steps of:
s1041a, calculating y coordinates of all tap2nd based on y coordinates of tap1st point as shown in FIG. 2, since Nr satisfies Then by the firstLine and thThe y-coordinate mean of the end-of-line valve points is taken as the y-coordinates of all tanp nd, and the calculation formula is y2nd_fp_c=;
S1042a, for the j-th row of end valve tap3rd points (j E [1, nc ]), calculating the x initial coordinate x2nd_j_ic of the tap2nd point corresponding to the row, wherein x2nd_j_ic=x3rd_j_c+6x2xSpace_top;
S1043a, for the jth tap2nd point, searching for a final accurate position in a manner of double space_top to the left/right if its initial position overlaps with the macroblock position in its vicinity, denoted as (x2nd_j_c, y2nd_j_c);
s1044a, if j is less than Nc, j is increased by 1, and the process returns to S1042a, and if j is equal to Nc, the calculation of the accurate positions of all second-stage end valve points is completed, ending the current step.
In this embodiment, in step S104, the second-stage clock trunk is grown symmetrically with the tap1st point tap1stA on the left as the starting point, so that symmetrically connecting all the tap2nd points on the left with the tap1st point tap1stA on the left includes:
S1041b, the number of the second-stage valve tap2nd points on the left is recorded as As shown in fig. 2, the present invention,Cannot be expressed as a power of 2, then the least number of dummy valve points (dummy valve points refer to clock units which are not driven by any load and are only used for balancing) are added to the leftmost side, so thatWhere m=2;
s1042b, the number of points of the left second stage valve tap2nd is as follows Then the center point of the n, n+1 th clock from left to right is selected as the bifurcation point of the left branch of the second-stage clock trunk, and the left side of the bifurcation point is recorded asWherein,;
S1043b, calculating the left first stage valve point to the leftThe furthest distance L2nd_max of the second stage valve points, wherein;
S1044b, estimating left first stage valve point to first stage valve pointThe number of clock units between the second stage valve points num2nd_0, satisfying num2 nd_0= roundup (l2nd_max/l_max_std+m/2);
s1045b according to left side The positions of the common clock unit and other clock units between the left first-stage valve point and the left second-stage valve points are calculated by the position relation of the second-stage valve points and the symmetry constraint of the second-stage clock trunk, the clock units are symmetrically arranged and connected by the highest two-layer metal according to the logic relation, the connection effect is as shown in figure 4, and finally the wound highest two-layer metal is set as fixed and unchanged attribute.
In this embodiment, in step S105, for the first row of end valve tap3rd points, the third stage clock trunk is grown up and down symmetrically with the corresponding tap2nd point as the starting point, so as to connect the first row of end valve tap3rd points with the corresponding tap2nd point, which includes the steps of:
S1051, dividing the first row of end valves tap3rd with total number of Nr into an upper part and a lower part according to the position of the first tap2nd, wherein the number of the lower part is Nr_dn;
S1052, if nr_dn satisfies nr_dn=2nr or nr_dn=2nr+1, where nr=1, then selecting the center point of both Nr and nr+1 end valve points from bottom to top as the bifurcation point of the lower branch of the third stage clock trunk, where the left side of the bifurcation point is denoted as (x3 rd_nb_0, y3rd_nb_0), x3 rd_nb_0=x2nd_1_c, y3rd_nb_0= (x3 rd_ { Nr } c+x3rd_ { nr+1 }/c)/2;
S1053, calculating the furthest distance L3rd_max from the 1 st second stage valve tap2nd point to the end valve point at the lowest side of column 1, l3rd_max= |y2nd_ 1_c-y3rd_nb_0|+|y3rd/u y3rd_nb_0 i++ y3rd u;
S1054, estimating the number of clock units num3rd_0 between the 1 st second stage valve point and the lowest end valve point in the 1 st column, satisfying num3 rd_0= roundup (l3 rd_max/l_max_std+mr/2);
S1055, calculating the positions of a common clock unit and other clock units between the 1 st second-stage valve tap2nd point and each lower end valve point according to the position relation of all the lower end valve tap3rd points of the 1 st column and the symmetry constraint of a third-stage clock trunk, symmetrically placing the clock units, connecting the highest two layers of metals according to the logic relation, and setting the wound highest two layers of metals as fixed and unchanged attributes;
S1056, for all the tail end tap3rd points on the 1 st column, according to the up-down symmetrical relation, the positions of the corresponding clock units on the 1 st column are obtained in a mirror image mode according to the positions of the third-stage clock units on the 1 st column, the clock units are placed, then the 1 st tap2nd point and all the tail end tap3rd points on the 1 st column are connected through the highest two layers of metals according to the logic connection relation between the 1 st tap2nd point and all the tail end tap3rd points on the 1 st column, as shown in fig. 5, and the wound highest two layers of metals are set to be fixed and unchanged in attribute.
The invention intervenes for the synthesis of the clock tree in the process of layout and wiring of the oversized design, and realizes the automatic generation of the highly symmetrical clock trunk layout and winding and multi-valve point clock subtrees facing the oversized design, thereby reducing the clock deflection under the oversized design to below 20ps through a non-mesh structure.
The embodiment of the invention also provides an automated physical realization system of the four-level structured low-skew clock tree, which comprises a memory and a processor which are connected with each other, wherein the memory is stored with a computer program which, when being executed by the processor, executes the steps of the method.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the invention without departing from the principles thereof are intended to be within the scope of the invention as set forth in the following claims.

Claims (8)

1.一种四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,包括步骤:1. A method for automated physical implementation of a four-level structured low-skew clock tree, comprising the steps of: S101,确定同步时钟末端阀门点初步位置和数量:根据布图形状以及宏模块位置,依照行列规整的原则,确定同步时钟末端阀门点初步位置和数量N;S101, determining the initial position and number of the synchronous clock terminal valve points: according to the layout shape and the macro module position, in accordance with the principle of row and column regularity, determining the initial position and number N of the synchronous clock terminal valve points; S102,配置时钟树基本约束:选择预先设计好的强驱动反相器或缓冲器作为第一至第二级阀门点以及第一至第三级对称结构时钟主干的时钟单元,选择反相器/缓冲器作为末端阀门点的时钟单元,选择时钟反相器与时钟缓冲器作为多阀门点平衡子树的时钟单元;选择目标工艺中最上面两层金属作为第一至第三级对称结构时钟主干的长距离互连线;选择其余金属作为多阀门点平衡子树的互联线;配置时钟跳变的取值范围;根据时钟跳变需求,通过仿真模拟计算并配置强驱动时钟单元的最大驱动距离L_max;配置多阀门点平衡子树的最大扇出fanout_max;S102, configure the basic constraints of the clock tree: select the pre-designed strong drive inverter or buffer as the clock unit of the first to second level valve points and the first to third level symmetrical structure clock trunk, select the inverter/buffer as the clock unit of the end valve point, select the clock inverter and the clock buffer as the clock unit of the multi-valve point balancing subtree; select the top two layers of metal in the target process as the long-distance interconnection line of the first to third level symmetrical structure clock trunk; select the remaining metal as the interconnection line of the multi-valve point balancing subtree; configure the value range of the clock jump; according to the clock jump requirements, calculate and configure the maximum driving distance L_max of the strong drive clock unit through simulation; configure the maximum fanout fanout_max of the multi-valve point balancing subtree; S103,对称生长第一级时钟主干:根据全部末端阀门tap3rd点初步位置,结合电源网格结构特点,计算出全部末端阀门tap3rd点的精确位置;计算出左右两个第一级阀门tap1st点的精确位置,然后以时钟输入为起点对称生长第一级时钟主干,将时钟输入与两个第一级阀门tap1st点对称地连接起来;S103, symmetrically growing the first-level clock trunk: according to the preliminary positions of the tap3rd points of all the terminal valves and the structural characteristics of the power grid, calculating the precise positions of the tap3rd points of all the terminal valves; calculating the precise positions of the tap1st points of the two first-level valves on the left and right, and then symmetrically growing the first-level clock trunk with the clock input as the starting point, symmetrically connecting the clock input with the tap1st points of the two first-level valves; S104,对称生长第二级时钟主干:针对每列末端阀门tap3rd点,结合电源网格结构特点,计算出每列各自对应的一个第二级阀门tap2nd点的精确位置;先以左边tap1st点为起点对称生长第二级时钟主干,从而将左边的全部tap2nd点分别与左边的tap1st点对称的连接起来;然后将左边的第二级时钟主干复制一份并镜像到右边对应位置,修改单元名和线名后,将右边的tap2nd点分别与右边的tap1st点连接起来;S104, symmetrically grow the second-level clock trunk: for each column end valve tap3rd point, combined with the power grid structure characteristics, calculate the precise position of a second-level valve tap2nd point corresponding to each column; first, symmetrically grow the second-level clock trunk with the left tap1st point as the starting point, so that all the tap2nd points on the left are symmetrically connected to the tap1st point on the left; then copy the second-level clock trunk on the left and mirror it to the corresponding position on the right, modify the unit name and line name, and then connect the tap2nd point on the right with the tap1st point on the right; S105,对称生长第三级时钟主干:针对第一列末端阀门tap3rd点,以其对应的tap2nd点为起点,上下对称地生长出第三级时钟主干,从而将第一列末端阀门tap3rd点与其对应的tap2nd点连接起来;然后针对其余每一列末端阀门点,复制第一列的第三级时钟主干并平移到对应位置,修改单元名和线名后,将相应列的末端阀门点与其对应的tap2nd点上下对称的连接起来;S105, symmetrically grow the third-level clock trunk: for the tap3rd point of the end valve of the first column, take its corresponding tap2nd point as the starting point, and grow the third-level clock trunk symmetrically up and down, so as to connect the tap3rd point of the end valve of the first column with its corresponding tap2nd point; then for each of the remaining columns of end valve points, copy the third-level clock trunk of the first column and translate it to the corresponding position, modify the unit name and line name, and then connect the end valve point of the corresponding column with its corresponding tap2nd point symmetrically up and down; S106,多阀门点平衡子树生成:以末端阀门tap3rd点为最终的阀门点,完成自动化的平衡子树生成,从而实现末端阀门点至于时钟叶节点的平衡连接以及全局时序满足。S106, generation of a multi-valve point balanced subtree: taking the end valve tap3rd point as the final valve point, complete the automatic generation of a balanced subtree, thereby achieving a balanced connection between the end valve point and the clock leaf node and satisfying the global timing. 2.根据权利要求1所述的四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,在步骤S103中,根据全部末端阀门tap3rd点初始位置,结合电源网格结构特点,计算出全部末端阀门tap3rd点的精确位置包括步骤:2. The method for realizing the automated physical implementation of a four-level structured low-skew clock tree according to claim 1, characterized in that in step S103, according to the initial positions of the tap3rd points of all the terminal valves and in combination with the structural characteristics of the power grid, calculating the precise positions of the tap3rd points of all the terminal valves comprises the following steps: S1031a,获取电源网格最高两层金属的间隔Space_top,获取电源网格最高层两层金属水平方向的起点为x0_top、垂直方向的起点为y0_top;S1031a, obtaining the interval Space_top between the top two metal layers of the power grid, obtaining the starting point of the top two metal layers of the power grid in the horizontal direction as x0_top and the starting point in the vertical direction as y0_top; S1032a,对于第i个末端阀门点,其初始坐标为(x3rd_i_init,y3rd_i_init),其精确位置以如下公式计算:S1032a, for the i-th end valve point, its initial coordinates are (x3rd_i_init, y3rd_i_init), and its precise position is calculated using the following formula: x3rd_i_ic=round((x3rd_i_init–x0_top)/(2×Space_top))×2×Space_top+x0_top;x3rd_i_ic=round((x3rd_i_init–x0_top)/(2×Space_top))×2×Space_top+x0_top; y3rd_i_ic=round((y3rd_i_init–y0_top)/(2×Space_top))×2×Space_top+y0_top;y3rd_i_ic=round((y3rd_i_init–y0_top)/(2×Space_top))×2×Space_top+y0_top; 其中in ; S1033a,对于第i个末端阀门点的精确位置(x3rd_i_ic,y3rd_i_ic),判断是否与各自附近的宏模块位置重叠;如果重叠,以斜对角的方式按(1,1)、(1、-1)、(-1,-1)、(-1,1)的顺序搜索最终的精确位置,记为(x3rd_i_c,y3rd_i_c);S1033a, for the precise position (x3rd_i_ic, y3rd_i_ic) of the i-th terminal valve point, determine whether it overlaps with the respective nearby macromodule positions; if so, search for the final precise position in the order of (1, 1), (1, -1), (-1, -1), (-1, 1) in a diagonal manner, recorded as (x3rd_i_c, y3rd_i_c); S1034a,如果i小于N,i增加1,并回到S1032a步骤;如果i等于N,则全部末端阀门点的最终精确位置计算完成,结束当前步骤。S1034a, if i is less than N, i is increased by 1 and returns to step S1032a; if i is equal to N, the final precise position calculation of all end valve points is completed and the current step ends. 3.根据权利要求2所述的四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,在步骤S103中,计算出左右两个第一级阀门tap1st点的精确位置,然后以时钟输入为起点对称生长第一级时钟主干,将时钟输入与两个第一级阀门tap1st点对称地连接起来包括步骤:3. The method for realizing the automated physical implementation of the four-level structured low-skew clock tree according to claim 2, characterized in that in step S103, the precise positions of the left and right first-level valve tap1st points are calculated, and then the first-level clock trunk is symmetrically grown with the clock input as the starting point, and the clock input is symmetrically connected to the two first-level valve tap1st points, including the steps of: S1301b,获得布图重心坐标:根据布图的形状,得到布图的重心坐标(x_fp,y_fp);S1301b, obtaining the coordinates of the center of gravity of the layout: according to the shape of the layout, obtaining the coordinates of the center of gravity of the layout (x_fp, y_fp); S1302b,计算左边第一级阀门tap1st点的x初始坐标:末端阀门点的列数为Nc,如果Nc是2的倍数,即满足Nc=2k,以左边1~k列末端阀门点在x方向的重心作为左边tap1st点的x坐标;如果Nc=2k-1,则先计算第k列末端阀门点在x方向的重心x1st_c{k}_fp,如果x1st_c{k}_fp<=x_fp,则以左边k列末端阀门点在x方向的重心作为左边tap1st的x坐标;如果Nc=2k-1,且x1st_c{k}_fp>x_fp,则以左边k-1列末端阀门点在x方向的重心作为左边tap1st的x坐标;S1302b, calculate the initial x coordinate of the tap1st point of the first-stage valve on the left: the number of columns of the end valve points is Nc. If Nc is a multiple of 2, that is, Nc=2k, the center of gravity of the end valve points of the 1st to kth columns on the left in the x direction is As the x coordinate of the tap1st point on the left; if Nc=2k-1, first calculate the centroid x1st_c{k}_fp of the end valve point of the kth column in the x direction. If x1st_c{k}_fp<=x_fp, then use the centroid of the end valve point of the kth column on the left in the x direction As the x coordinate of the tap1st on the left; if Nc=2k-1, and x1st_c{k}_fp>x_fp, then the center of gravity of the valve point at the end of the k-1 column on the left in the x direction As the x coordinate of tap1st on the left; S1303b,计算右边第一级阀门tap1st点的x初始坐标:如果Nc=2k,则以右边k+1~2k列末端阀门点在x方向的重心x1st_r_fp作为右边tap1st点的x坐标;如果Nc=2k-1,且x1st_c{k}_fp<=x_fp,先观察左右两边的对称性,如果在第k列和第k+1列之间补充一列哑的末端阀门点,而能使得右边k列末端阀门点与左边k列呈现平移关系,则该列哑的阀门点称为第ky列,且以右边ky列及第k+1~2k-1列末端阀门点在x方向的重心x1st_r_fp作为右边tap1st点的x坐标;如果在2k-1之后补充一列哑的末端阀门点,而能使得右边k列与左边k列呈现左右镜像关系,则该列哑的阀门点称为第ny列,且以右边第k+1~2k-1列及第ny列末端阀门点在x方向的重心x1st_r_fp作为右边tap1st点的x坐标;如果Nc=2k-1,且x1st_c{k}_fp>x_fp,则以右边第k~2k-1列末端阀门点在x方向的重心x1st_r_fp作为右边tap1st的x坐标,同时更新左边tap1st的x坐标;S1303b, calculate the initial x coordinate of the tap1st point of the first-level valve on the right: if Nc=2k, then the centroid x1st_r_fp of the end valve points of the k+1~2k columns on the right in the x direction is used as the x coordinate of the tap1st point on the right; if Nc=2k-1, and x1st_c{k}_fp<=x_fp, first observe the symmetry of the left and right sides. If a column of dummy end valve points is added between the kth column and the k+1th column, so that the end valve points of the kth column on the right and the kth column on the left are in a translation relationship, then the dummy valve points of this column are called the kyth column, and the centroid x1st of the end valve points of the k+1~2k-1 columns on the right in the x direction is used. _r_fp is used as the x-coordinate of the tap1st point on the right; if a column of dummy end valve points is added after 2k-1, so that the k columns on the right and the k columns on the left can be in a left-right mirror relationship, then the column of dummy valve points is called the nyth column, and the centroid x1st_r_fp of the end valve points of the k+1th to 2k-1th columns and the nyth columns on the right in the x-direction is used as the x-coordinate of the tap1st point on the right; if Nc=2k-1, and x1st_c{k}_fp>x_fp, then the centroid x1st_r_fp of the end valve points of the kth to 2k-1th columns on the right in the x-direction is used as the x-coordinate of the tap1st on the right, and the x-coordinate of the tap1st on the left is updated at the same time; S1304b,确定两个tap1st点的y初始坐标:末端阀门点行数为Nr,如果Nr是2的倍数,即满足,则以y_fp为两个tap1st的y坐标y1st_fp;如果,则以第行末端阀门点的y坐标值加上一个偏移量Δy作为两个tap1st的y坐标y1st_fp;其中偏移量Δy为电源网格最高两层金属间隔Space_top的偶数倍;S1304b, determine the initial y coordinates of the two tap1st points: the number of rows of the end valve points is Nr. If Nr is a multiple of 2, it satisfies , then y_fp is the y coordinate of the two tap1sts y1st_fp; if , then take The y coordinate value of the valve point at the end of the row plus an offset Δy is used as the y coordinate y1st_fp of the two tap1sts; the offset Δy is an even multiple of the metal spacing Space_top between the top two layers of the power grid; S1305b,根据电源网格特点计算得到两个第一级阀门tap1st点的精确坐标:计算公式如下所示:S1305b, calculate the precise coordinates of the tap1st points of the two first-stage valves according to the characteristics of the power grid: the calculation formula is as follows: y1st_fp_c=round((y1st_fp_c–y0_top)/(2×Space_top)-6)×2×Space_top+y0_top;y1st_fp_c=round((y1st_fp_c–y0_top)/(2×Space_top)-6)×2×Space_top+y0_top; ; x1st_r_fp_c=round((x1st_r_fp–x0_top)/(2×Space_top))×2×Space_top+x0_top;x1st_r_fp_c=round((x1st_r_fp–x0_top)/(2×Space_top))×2×Space_top+x0_top; 其中round函数表示四舍五入;The round function indicates rounding; S1306b,计算时钟输入到两个第一级阀门点的实际曼哈顿距离L1st:时钟输入的位置记为(x_ckin,y_ckin),先计算出左右两个tap1st中心点的x坐标x1st_mean;;计算出时钟输入到两个tap1st中心点的曼哈顿距离L0,其中L0=|x1st_mean–x_ckin|+|y1st_fp–y_ckin|,两个tap1st中心点到各自的距离相等,记录为L1,满足;最终得到时钟输入到两个第一级阀门点的实际曼哈顿距离L1st=L0+L1;S1306b, calculate the actual Manhattan distance L1st from the clock input to the two first-level valve points: the position of the clock input is recorded as (x_ckin, y_ckin), first calculate the x coordinates x1st_mean of the left and right tap1st center points; ; Calculate the Manhattan distance L0 from the clock input to the two tap1st center points, where L0=|x1st_mean–x_ckin|+|y1st_fp–y_ckin|, the distances from the two tap1st center points to each other are equal, recorded as L1, satisfying ; Finally, the actual Manhattan distance from the clock input to the two first-stage valve points is obtained as L1st=L0+L1; S1307b,计算第一级时钟主干所需的时钟单元数量:首先将L_max对Space_top取整,得到L_max_std=rounddown(L_max/Space_top)×Space_top;然后计算num1st_0=rounddown(L0/L_max_std),那么时钟输入至两个tap1st中心点之间放置num1st_0个时钟单元;于是第num1st_0个时钟单元离两个tap1st中心点之间的曼哈顿距离为L0_end=L0–num1st_0×L_max_std;然后计算num1st_1=rounddown(L1–(L_max_std–L0_end)/2);如果L1<num1st_1×L_max_std,那么中心点到左/右边的tap1st之间的num1st_1个时钟单元之间的距离为rounddown(L1/(num1st_1×Space_top))×Space_top;否则该距离仍为L_max_std;其中roundup表示向上取整,而rounddown表示向下取整;S1307b, calculate the number of clock units required for the first-level clock trunk: first round L_max to the integer of Space_top, and obtain L_max_std=rounddown(L_max/Space_top)×Space_top; then calculate num1st_0=rounddown(L0/L_max_std), so the clock input places num1st_0 clock units between the two tap1st center points; therefore, the Manhattan distance between the num1st_0th clock unit and the two tap1st center points is L0_end=L0–num1 st_0×L_max_std; then calculate num1st_1=rounddown(L1–(L_max_std–L0_end)/2); if L1<num1st_1×L_max_std, then the distance between the center point and the num1st_1 clock units between the left/right tap1st is rounddown(L1/(num1st_1×Space_top))×Space_top; otherwise, the distance is still L_max_std; where roundup means rounding up, and rounddown means rounding down; S1308b,完成第一级时钟主干的生长:计算第一级时钟主干的全部时钟单元数量num1st,满足num1st=num1st_0+2×num1st_1;依照计算出的距离关系放置num1st个时钟单元,并按逻辑关系以最高两层金属连接起来,并将绕好的最高两层金属设置为固定与不改变属性。S1308b, complete the growth of the first-level clock trunk: calculate the total number of clock units num1st of the first-level clock trunk, satisfying num1st=num1st_0+2×num1st_1; place num1st clock units according to the calculated distance relationship, and connect them with the top two layers of metal according to the logical relationship, and set the wound top two layers of metal to fixed and unchanged properties. 4.根据权利要求3所述的四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,在步骤S1303b中,更新左边tap1st的x坐标的步骤为:先观察左右两边的对称性,如果在第1列之前补充一列哑的末端阀门点,而能使得左边k列末端阀门点与右边k列呈现平移关系,则该列哑的阀门点称为第0y列,且以左边0y列及第1~k-1列末端阀门点在x方向的重心作为左边tap1st点的x坐标;如果在第k-1列和第k列之间补充一列哑的末端阀门点,而能使得左边k列与右边k列呈现左右镜像关系,则该列哑的阀门点称为第ky列,且以左边第1~k-1列及第ky列末端阀门点在x方向的重心作为左边tap1st点的x坐标。4. The automated physical implementation method of the four-level structured low-skew clock tree according to claim 3 is characterized in that in step S1303b, the step of updating the x coordinate of the left tap1st is: first observe the symmetry of the left and right sides, if a column of dummy end valve points is added before the first column, so that the end valve points of the left k columns and the right k columns can present a translation relationship, then the dummy valve points of the column are called the 0y column, and the center of gravity of the end valve points of the left 0y column and the 1st to k-1 columns in the x direction is As the x-coordinate of the tap1st point on the left; if a column of dummy end valve points is added between the k-1th column and the kth column, so that the left k column and the right k column can present a left-right mirror relationship, then the column of dummy valve points is called the kyth column, and the center of gravity of the end valve points of the left 1st to k-1th columns and the kyth column in the x direction As the x coordinate of the tap1st point on the left. 5.根据权利要求3或4所述的四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,在步骤S104中,针对每列末端阀门tap3rd点,结合电源网格结构特点,计算出每列各自对应的一个第二级阀门tap2nd点的精确位置包括步骤:5. The method for realizing the automated physical implementation of the four-level structured low-skew clock tree according to claim 3 or 4, characterized in that in step S104, for each column end valve tap3rd point, combined with the power grid structure characteristics, calculating the precise position of a second-level valve tap2nd point corresponding to each column comprises the steps of: S1041a,根据tap1st点的y坐标计算出所有tap2nd的y坐标:如果Nr是2的倍数,即满足,则以第行和第行末端阀门点的y坐标均值作为所有tanp2nd的y坐标,计算公式为y2nd_fp_c=;如果Nr不是2的倍数,即满足,则以第行末端阀门点的y坐标均值再加上一个偏移量Δy2作为所有tanp2nd的y坐标,计算公式为:y2nd_fp_c=+Δy2;其中Δy2为电源网格最高两层金属间隔Space_top的偶数倍;S1041a, calculate the y coordinates of all tap2nd points based on the y coordinate of tap1st point: if Nr is a multiple of 2, that is, , then take Row and The mean y coordinate of the valve point at the end of the row is used as the y coordinate of all tanp2nd, and the calculation formula is y2nd_fp_c= ; If Nr is not a multiple of 2, then , then take The mean y coordinate of the valve point at the end of the row plus an offset Δy2 is used as the y coordinate of all tanp2nd. The calculation formula is: y2nd_fp_c= +Δy2; Δy2 is an even multiple of Space_top, the metal spacing between the top two layers of the power grid; S1042a,对于第j列末端阀门tap3rd点,计算出该列对应的tap2nd点的x初始坐标x2nd_j_ic,其中x2nd_j_ic=x3rd_j_c+6×2×Space_top;S1042a, for the tap3rd point of the end valve of the jth column, calculate the x initial coordinate x2nd_j_ic of the tap2nd point corresponding to the column, where x2nd_j_ic=x3rd_j_c+6×2×Space_top; ; S1043a,对于第j个tap2nd点,如果它的初始位置与其附近的宏模块位置重叠,则以向左/右间隔两倍Space_top的方式搜索最终的精确位置,记为(x2nd_j_c,y2nd_j_c);S1043a, for the j-th tap2nd point, if its initial position overlaps with the macroblock position nearby, search for the final precise position in a manner of spacing twice Space_top to the left/right, recorded as (x2nd_j_c, y2nd_j_c); S1044a,如果j小于Nc,j增加1,并回到步骤S1042b;如果j等于Nc,则全部第二级末端阀门点的精确位置计算完成,结束当前步骤。S1044a, if j is less than Nc, j is increased by 1 and returns to step S1042b; if j is equal to Nc, the precise position calculation of all second-stage terminal valve points is completed and the current step ends. 6.根据权利要求5所述的四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,在步骤S104中,先以左边这个tap1st点为起点对称生长第二级时钟主干,从而将左边的全部tap2nd点分别与左边的tap1st点对称的连接起来包括步骤:6. The method for automated physical implementation of a four-level structured low-skew clock tree according to claim 5, characterized in that in step S104, the second-level clock trunk is first symmetrically grown with the tap1st point on the left as the starting point, thereby symmetrically connecting all the tap2nd points on the left to the tap1st point on the left, respectively, including the steps of: S1041b,将左边的第二级阀门tap2nd点的个数记为;如果无法表示为2的幂,则在最左边补上最少个数的哑阀门点,使得S1041b, record the number of tap2nd points of the second-stage valve on the left as ;if If it cannot be expressed as a power of 2, add the minimum number of dummy valve points on the left, so that ; S1042b,左边第二级阀门tap2nd点的数量满足,那么选取从左往右数的第n、n+1个两者的中心点作为第二级时钟主干左支的分叉点,该分叉点左边记为,其中S1042b, the number of tap2nd points of the second-stage valve on the left satisfies or , then select the center point of the nth and n+1th from left to right as the bifurcation point of the left branch of the second-level clock trunk, and the left side of the bifurcation point is recorded as ,in , ; S1043b,计算左边第一级阀门点到左边个第二级阀门点的最远距离L2nd_max,其中S1043b, calculate the first-stage valve point on the left to the left The maximum distance L2nd_max of the second-level valve points, where ; S1044b,估算左边第一级阀门点到第个第二级阀门点之间的时钟单元个数num2nd_0,满足num2nd_0=roundup(L2nd_max/L_max_std+m/2);S1044b, estimate the left first stage valve point to the The number of clock units num2nd_0 between the second-level valve points satisfies num2nd_0=roundup(L2nd_max/L_max_std+m/2); S1045b,根据左边个第二级阀门点的位置关系以及第二级时钟主干的对称性约束,计算出左边第一级阀门点到左边各第二级阀门点之间的公共时钟单元、其它时钟单元的位置;对称地放置好时钟单元,并按逻辑关系以最高两层金属连接起来,并将绕好的最高两层金属设置为固定与不改变属性。S1045b, according to the left Based on the positional relationship of the second-level valve points and the symmetry constraints of the second-level clock trunk, calculate the positions of the common clock unit and other clock units between the first-level valve point on the left and the second-level valve points on the left; place the clock units symmetrically and connect them with the top two layers of metal according to the logical relationship, and set the wound top two layers of metal to fixed and unchanging properties. 7.根据权利要求3或4所述的四级结构化低偏斜时钟树的自动化物理实现方法,其特征在于,在步骤S105中,针对第一列末端阀门tap3rd点,以其对应的tap2nd点为起点,上下对称地生长出第三级时钟主干,从而将第一列末端阀门tap3rd点与其对应的tap2nd点连接起来包括步骤:7. The method for realizing the automated physical implementation of the four-level structured low-skew clock tree according to claim 3 or 4, characterized in that, in step S105, for the tap3rd point of the first column end valve, the tap2nd point corresponding to the tap3rd point is used as the starting point, and the third-level clock trunk is grown symmetrically up and down, thereby connecting the tap3rd point of the first column end valve and the tap2nd point corresponding to the tap3rd point, comprising the steps of: S1051,将总数为Nr的第一列末端阀门tap3rd根据第一个tap2nd的位置分为上下两部分,下面部分的个数记为Nr_dn;如果Nr_dn无法表示为2的幂,则在最下边补上最少个数的哑阀门点,使得Nr_dn_new=2^mr;S1051, divide the first column of end valves tap3rd, which has a total number of Nr, into two parts, upper and lower, according to the position of the first tap2nd. The number of the lower part is recorded as Nr_dn. If Nr_dn cannot be expressed as a power of 2, add the minimum number of dummy valve points at the bottom, so that Nr_dn_new = 2^mr. S1052,如果Nr_dn满足Nr_dn =2nr或Nr_dn=2nr+1,那么选取从下往上数的第nr、nr+1个末端阀门点两者的中心点作为第三级时钟主干下支的分叉点,该分叉点左边记为(x3rd_nb_0,y3rd_nb_0),x3rd_nb_0=x2nd_1_c,y3rd_nb_0=(x3rd_{nr}_c+x3rd_{nr+1}_c)/2;S1052, if Nr_dn satisfies Nr_dn = 2nr or Nr_dn = 2nr+1, then the center point between the nrth and nr+1th terminal valve points from the bottom up is selected as the bifurcation point of the lower branch of the third-level clock trunk, and the left side of the bifurcation point is recorded as (x3rd_nb_0, y3rd_nb_0), x3rd_nb_0=x2nd_1_c, y3rd_nb_0=(x3rd_{nr}_c+x3rd_{nr+1}_c)/2; S1053,计算第1个第二级阀门tap2nd点到第1列最下边那个末端阀门点的最远距离L3rd_max,L3rd_max=|y2nd_1_c–y3rd_nb_0|+|y3rd_nb_0–y3rd_1_c|+|x3rd_nb_0–x3rd_1_c|;S1053, calculate the maximum distance L3rd_max from the first second-stage valve tap2nd point to the end valve point at the bottom of the first column, L3rd_max=|y2nd_1_c–y3rd_nb_0|+|y3rd_nb_0–y3rd_1_c|+|x3rd_nb_0–x3rd_1_c|; S1054,估算第1个第二级阀门点到第1列最下方那个末端阀门点之间的时钟单元个数num3rd_0,满足num3rd_0=roundup(L3rd_max/L_max_std+mr/2);S1054, estimate the number of clock units num3rd_0 between the first second-level valve point and the end valve point at the bottom of the first column, satisfying num3rd_0=roundup(L3rd_max/L_max_std+mr/2); S1055,根据第1列下边全部末端阀门tap3rd点的位置关系以及第三级时钟主干的对称性约束,计算出第1个第二级阀门tap2nd点到下边各末端阀门点之间的公共时钟单元、其它时钟单元的位置;对称地放置好时钟单元,并按逻辑关系以最高两层金属连接起来,并将绕好的最高两层金属设置为固定与不改变属性;S1055, according to the position relationship of all the terminal valves tap3rd points at the bottom of the first column and the symmetry constraint of the third-level clock trunk, calculate the positions of the common clock unit and other clock units between the first second-level valve tap2nd point and the terminal valve points at the bottom; symmetrically place the clock units, and connect them with the top two layers of metal according to the logical relationship, and set the wound top two layers of metal to be fixed and unchanged; S1056,对于第1列上边全部末端tap3rd点,按照上下对称的关系,根据第1列第三级时钟单元的位置镜像地获得上边对应时钟单位的位置,并放置好时钟单元,然后按照第1个tap2nd点与第1列上边全部末端tap3rd点之间的逻辑连接关系,以最高两层金属连接起来,并将绕好的最高两层金属设置为固定与不改变属性。S1056, for all the terminal tap3rd points on the top of the 1st column, according to the upper and lower symmetrical relationship, the position of the corresponding clock unit on the top is obtained by mirroring according to the position of the third-level clock unit in the 1st column, and the clock unit is placed. Then, according to the logical connection relationship between the first tap2nd point and all the terminal tap3rd points on the top of the 1st column, they are connected with the top two layers of metal, and the wound top two layers of metal are set to fixed and unchanging properties. 8.一种四级结构化低偏斜时钟树的自动化物理实现系统,包括相互连接的存储器和处理器,所述存储器上存储有计算机程序,其特征在于,所述计算机程序在被处理器运行时执行如权利要求1-7中任意一项所述方法的步骤。8. An automated physical implementation system for a four-level structured low-skew clock tree, comprising a memory and a processor connected to each other, wherein a computer program is stored on the memory, wherein the computer program executes the steps of the method as claimed in any one of claims 1 to 7 when executed by the processor.
CN202411855949.XA 2024-12-17 2024-12-17 Automated physical realization method and system for four-stage structured low-skew clock tree Active CN119312764B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411855949.XA CN119312764B (en) 2024-12-17 2024-12-17 Automated physical realization method and system for four-stage structured low-skew clock tree

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411855949.XA CN119312764B (en) 2024-12-17 2024-12-17 Automated physical realization method and system for four-stage structured low-skew clock tree

Publications (2)

Publication Number Publication Date
CN119312764A true CN119312764A (en) 2025-01-14
CN119312764B CN119312764B (en) 2025-03-07

Family

ID=94179189

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202411855949.XA Active CN119312764B (en) 2024-12-17 2024-12-17 Automated physical realization method and system for four-stage structured low-skew clock tree

Country Status (1)

Country Link
CN (1) CN119312764B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726596A (en) * 1996-03-01 1998-03-10 Hewlett-Packard Company High-performance, low-skew clocking scheme for single-phase, high-frequency global VLSI processor
US20120110538A1 (en) * 2010-10-28 2012-05-03 National Taiwan University Clock-tree structure and method for synthesizing the same
CN116306471A (en) * 2023-03-27 2023-06-23 上海亿家芯集成电路设计有限公司 Clock tree structure and implementation method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5726596A (en) * 1996-03-01 1998-03-10 Hewlett-Packard Company High-performance, low-skew clocking scheme for single-phase, high-frequency global VLSI processor
US20120110538A1 (en) * 2010-10-28 2012-05-03 National Taiwan University Clock-tree structure and method for synthesizing the same
CN116306471A (en) * 2023-03-27 2023-06-23 上海亿家芯集成电路设计有限公司 Clock tree structure and implementation method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
韩静: "定制大驱动单元时钟树设计及应用", 《硕士电子期刊》, vol. 2024, no. 11, 15 November 2024 (2024-11-15) *

Also Published As

Publication number Publication date
CN119312764B (en) 2025-03-07

Similar Documents

Publication Publication Date Title
Dolgov et al. 2019 cad contest: Lef/def based global routing
US8745565B2 (en) Satisfying routing rules during circuit design
US8887117B1 (en) Register clustering for clock network topology generation
CN101187958B (en) Method and system for generating integrated electronic circuit layout pattern
US7795943B2 (en) Integrated circuit device and layout design method therefor
CN104063559A (en) Layout legalization method and system for distributed computing of large-scale integrated circuit
US5187784A (en) Integrated circuit placement method using netlist and predetermined ordering constraints to produce a human readable integrated circuit schematic diagram
CN117556758B (en) A FPGA layout and routing method for optimizing timing
US6651237B2 (en) System and method for H-Tree clocking layout
CN113095033B (en) Superconducting RSFQ Circuit Layout Method for Dual Clock Architecture
CN107967372A (en) A kind of FPGA total arrangements legalize method
CN119312764B (en) Automated physical realization method and system for four-stage structured low-skew clock tree
US10354037B1 (en) Methods, systems, and computer program product for implementing an electronic design by manipulating a hierarchical structure of the electronic design
Li et al. iPD: An Open-source intelligent Physical Design Toolchain
CN104992032A (en) Modification method for holding time in multi-voltage domain design
JP5515255B2 (en) Automatic wiring device, automatic wiring method and automatic wiring program
US6449756B1 (en) Method for accurate and efficient updates of timing information logic synthesis, placement and routing for integrated circuit design
JP5326471B2 (en) Clock signal supply circuit design method, information processing apparatus, and program
CN120106007B (en) Clock tree synthesis method and system based on clustering
CN109271132B (en) A sorting method based on machine learning model
US20030074643A1 (en) Unified database system to store, combine, and manipulate clock related data for grid-based clock distribution design
JP4966838B2 (en) Clock wiring processing apparatus, clock wiring processing method, and program
JP3433025B2 (en) Module placement method
CN119886040B (en) Clock tree comprehensive optimization method and system based on hierarchical region division and buffer insertion
US20240394453A1 (en) Global placement of circuit designs using a calibrated simple timer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant