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CN119276090A - A driving circuit for signal power composite isolation transmission - Google Patents

A driving circuit for signal power composite isolation transmission Download PDF

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Publication number
CN119276090A
CN119276090A CN202411384012.9A CN202411384012A CN119276090A CN 119276090 A CN119276090 A CN 119276090A CN 202411384012 A CN202411384012 A CN 202411384012A CN 119276090 A CN119276090 A CN 119276090A
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CN
China
Prior art keywords
circuit
signal
driving
diode
time slot
Prior art date
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Application number
CN202411384012.9A
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Chinese (zh)
Inventor
彭晗
宋世杰
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Huazhong University of Science and Technology
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Huazhong University of Science and Technology
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Publication date
Application filed by Huazhong University of Science and Technology filed Critical Huazhong University of Science and Technology
Priority to CN202411384012.9A priority Critical patent/CN119276090A/en
Publication of CN119276090A publication Critical patent/CN119276090A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/38Means for preventing simultaneous conduction of switches
    • H02M1/385Means for preventing simultaneous conduction of switches with means for correcting output voltage deviations introduced by the dead time
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/01Resonant DC/DC converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/22Conversion of DC power input into DC power output with intermediate conversion into AC
    • H02M3/24Conversion of DC power input into DC power output with intermediate conversion into AC by static converters
    • H02M3/28Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC
    • H02M3/325Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of DC power input into DC power output with intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate AC using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/017545Coupling arrangements; Impedance matching circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)

Abstract

本发明公开了一种信号功率复合隔离传输的驱动电路,属于电力电子领域。该驱动电路包括主传输电路和与之连接的正向时隙分配电路、反向时隙分配电路、正向信号电路、反向信号电路;主传输电路的两端分别连接主控单元和功率器件,主传输电路接受主控单元的输入功率和正向信号电路的驱动信号,输出驱动电压控制功率器件的开通与关断;主传输电路根据接收的反馈信号调节运行状态;正向时隙分配电路与正向信号电路和主控单元连接,反向时隙分配电路与反向信号电路和功率器件连接;主控单元根据接收的故障信号进行预警;正向时隙分配电路和反向时隙分配电路根据不同信号控制主传输电路的工作状态。实现通过单隔离通道同时传输驱动信号和驱动功率。

The present invention discloses a driving circuit for composite isolation transmission of signal power, belonging to the field of power electronics. The driving circuit includes a main transmission circuit and a forward time slot allocation circuit, a reverse time slot allocation circuit, a forward signal circuit, and a reverse signal circuit connected thereto; the two ends of the main transmission circuit are respectively connected to a main control unit and a power device, the main transmission circuit receives the input power of the main control unit and the driving signal of the forward signal circuit, and outputs a driving voltage to control the opening and closing of the power device; the main transmission circuit adjusts the operating state according to the received feedback signal; the forward time slot allocation circuit is connected to the forward signal circuit and the main control unit, and the reverse time slot allocation circuit is connected to the reverse signal circuit and the power device; the main control unit issues an early warning according to the received fault signal; the forward time slot allocation circuit and the reverse time slot allocation circuit control the working state of the main transmission circuit according to different signals. The driving signal and the driving power are transmitted simultaneously through a single isolation channel.

Description

Drive circuit for signal power composite isolation transmission
Technical Field
The invention belongs to the field of power electronics, and particularly relates to a driving circuit for signal power composite isolation transmission.
Background
The improvement of the withstand voltage level of the power device obviously improves the size, the efficiency and the cost of a medium-high voltage converter system, and promotes the rapid development of medium-high voltage application markets of solid-state transformers, medium-voltage drives, medium-voltage converters and the like. These developments, however, present specific challenges to the converter design, with the isolated gate drive design being a major issue. Conventional isolated gate drives use digital isolators to transmit the drive signals, but the operating voltage level is not higher than 1.7kV.3.3kV and above, an optical fiber or an optical coupler is required to transmit an isolation signal, but the cost is high, the volume is large, the isolation signal is sensitive to high temperature (-40 ℃ to 85 ℃), and the isolation signal is difficult to integrate. The composite transmission of drive signals and power will form a more integrated drive technology and will also facilitate the integration of isolated gate drives into chip and power device module packages, improving reliability and optimizing switching characteristics.
In the existing single-isolation channel composite transmission method, a driving signal is directly used as a control signal of driving power or is modulated by a high-frequency carrier wave and then used as the control signal of the driving power, so that a power flow with signal characteristic information is formed. However, the driving signal and the power share the same modulation mode, the power switching frequency is the signal carrier frequency, the modulation freedom degree is low, the transmission rate of the driving signal is low, the frequency and duty ratio range is small, and the transmission efficiency, the output voltage stabilization, the power density and the like of the driving power are also affected.
Disclosure of Invention
Aiming at the defects of the related art, the invention aims to provide a driving circuit for signal power composite isolation transmission, which aims to solve the problems of low modulation freedom and low transmission efficiency of driving signals and power sharing one path of modulation.
In order to achieve the above purpose, the invention provides a driving circuit for signal power composite isolation transmission, which comprises a main transmission circuit, a forward time slot distribution circuit, a reverse time slot distribution circuit, a forward signal circuit and a reverse signal circuit, wherein the forward time slot distribution circuit, the reverse time slot distribution circuit, the forward signal circuit and the reverse signal circuit are connected with the main transmission circuit;
The input end of the main transmission circuit is connected with the main control unit, and the output end of the main transmission circuit is connected with the power device;
The system comprises a main control unit, a forward time slot distribution circuit, a main control unit, a main transmission circuit, a reverse time slot distribution circuit, a control unit and a control unit, wherein the forward time slot distribution circuit is connected with the forward signal circuit and the main control unit, the forward signal circuit is used for modulating a driving signal output by the main control unit and demodulating a fault signal and a feedback signal modulated by the reverse signal circuit;
The main transmission circuit is also used for outputting driving voltage to control the on and off of the power device according to the demodulated driving signal, and the reverse time slot distribution circuit is used for detecting the feedback signal, the fault signal and the driving signal, and controlling the main transmission circuit to transmit the modulated feedback signal and the fault signal from the secondary side to the primary side in an isolated manner when the feedback signal and the fault signal exist and the driving signal does not exist;
The main transmission circuit is also used for transmitting the input power of the main control unit from the primary side to the secondary side when no driving signal, feedback signal and fault signal exist.
Optionally, the reverse signal circuit is further configured to modulate the recovered driving signal obtained by demodulation, and the main transmission circuit is further configured to transmit the modulated recovered driving signal from the secondary side to the primary side in an isolated manner;
the forward signal circuit is also used for demodulating the modulated restored driving signal and comparing the modulated restored driving signal with the driving signal, and if the modulated restored driving signal is different from the driving signal, the driving signal is modulated and transmitted again.
Optionally, the main transmission circuit comprises a DC-DC circuit, a voltage dividing circuit and an output circuit;
the DC-DC circuit is used for driving a transmission channel of power and bidirectional signals;
The voltage dividing circuit is used for generating a source reference potential so as to drive the power device in a negative pressure mode;
The output circuit is used for realizing signal amplification and providing a current driving power device.
Optionally, the DC-DC circuit is an LLC circuit and comprises a first MOS transistor Q 1, a second MOS transistor Q 2, a first inductor L 1, a first capacitor C 1, a transformer TF, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6 and a second capacitor C 2;
The input voltage VIN is input to the drain electrode of the first MOS tube Q 1, the source electrode of the first MOS tube Q 1 is connected with the drain electrode of the second MOS tube Q 2 and one end of the first inductor L 1 and is marked as a first connection point;
The source electrode of the second MOS tube Q 2 is grounded and connected with one end of the first capacitor C 1, the other end of the first capacitor C 1 is connected with one end of a primary winding of a transformer TF, the other end of the primary winding of the transformer TF is connected with the other end of the first inductor L 1, two ends of a secondary winding of the transformer TF are respectively connected with the input ends of a full-bridge rectifying circuit formed by a third diode D 3, a fourth diode D 4, a fifth diode D 5 and a sixth diode D 6 and are marked as a second connecting point and a third connecting point, and the output end of the full-bridge rectifying circuit is connected to two ends of the second capacitor C 2 and is marked as a fourth connecting point and a fifth connecting point.
Optionally, the voltage dividing circuit includes a second resistor R 2 and a zener diode Z;
The second resistor R 2 and the zener diode Z are connected in series and then connected in parallel to two ends of the second capacitor C 2.
Optionally, the output circuit comprises a sixth MOS tube Q 6 and a seventh MOS tube Q 7;
The connection point is connected with the drain electrode of the sixth MOS tube Q 6, the source electrode of the sixth MOS tube Q 6 is connected with the source electrode of the seventh MOS tube Q 7, and the connection point is a driving output end;
The gate electrodes of the sixth MOS transistor Q 6 and the seventh MOS transistor Q 7 are in short circuit, and the connection point is connected with a reverse signal circuit.
Optionally, the forward time slot distribution circuit comprises a first MOS tube Q 1, a second MOS tube Q 2, a third MOS tube Q 3 and a first resistor R 1;
the first MOS tube Q 1, the second MOS tube Q 2 and the LLC circuit share, the source electrode of the third MOS tube Q 3 is grounded, the drain electrode is connected with one end of the first resistor R 1, the other end of the first resistor R 1 is connected with the first capacitor C 1, and the other end of the first resistor R 1 is connected to one end of the primary winding of the transformer TF.
Optionally, the reverse time slot distribution circuit comprises a fourth MOS transistor Q 4, a fifth MOS transistor Q 5, a first diode D 1 and a second diode D 2;
The source electrode of the fourth MOS tube Q 4 is connected to the driving output end, the drain electrode is connected with the anode of the first diode D 1, and the cathode of the first diode D 1 is connected with one end of the secondary winding of the transformer TF;
The source electrode of the fifth MOS tube Q 5 is connected to the fifth connection point, the drain electrode is connected with the cathode of the second diode D 2, and the anode of the second diode D 2 is connected with the other end of the secondary winding of the transformer TF.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
1. The invention provides a drive circuit for signal power composite isolation transmission, which simultaneously transmits a drive signal and drive power through a single isolation channel, switches the transmission of a main transmission circuit to the signal or the power according to whether signals exist in different time slots through a time slot distribution circuit, adopts independent branches to respectively transmit signal streams and power streams in different time slots, so that the drive signal and the drive power control signal are mutually independent in time, the time slot occupied by the signal transmission is far smaller than the time slot occupied by the power transmission, thereby constructing a decoupling transmission architecture, and the circuit can be respectively and flexibly designed to meet the requirements of signal and power transmission, thereby solving the problems of common same-path modulation of the drive signal and the power, low modulation degree of freedom and low transmission efficiency. High fidelity of the driving signal and high efficiency transmission of driving power are realized. Compared with the traditional driving architecture, the device does not need an additional isolation power supply module or a signal isolation unit, a digital processor and a special chip, and has the advantages of less components, low cost and small volume.
2. The invention provides a drive circuit for signal power composite isolation transmission, which is characterized in that a forward signal circuit, a forward time slot distribution circuit, a reverse signal circuit and a reverse time slot distribution circuit are respectively designed, so that the problem that signals for monitoring the power side state in real time need to be transmitted independently is solved, the reverse signal transmission function is supported, the device fault signal (device overcurrent, overvoltage and overheat signals), a recovered drive signal and a drive power supply feedback signal (power supply output voltage or current information) are included, and the efficient and reliable operation of the drive and the device is ensured.
3. The invention provides a driving circuit for signal power composite isolation transmission, which realizes the rapid switching of signal and power states by maximizing the switching device of a multiplexing main transmission circuit, has the advantages of small number and volume of extra devices, no need of floating driving, simple and efficient control circuit and remarkable improvement of system integration level and cost benefit.
Drawings
FIG. 1 is a conceptual diagram of the operation of the signal power time-sharing composite isolation drive provided by the invention;
FIG. 2 is a circuit diagram of a signal power time-sharing composite isolation driver according to the present invention;
FIG. 3 is a circuit diagram of a signal power time-sharing composite isolation driver according to an embodiment of the present invention;
FIG. 4 is a diagram of the overall transmission waveform of the signal power time-sharing composite isolation driving according to the embodiment of the present invention;
FIG. 5 is a diagram of the operational effects of a signal power time-sharing composite isolation drive according to an embodiment of the present invention;
FIG. 6 illustrates a multi-pulse test circuit for signal power time-sharing composite isolation driving applications in accordance with an embodiment of the present invention;
Fig. 7 is a waveform diagram of a power device switch for a signal power time-sharing composite isolation driving application according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention. In addition, the technical features of the embodiments of the present invention described below may be combined with each other as long as they do not collide with each other.
The description of the contents of the above embodiment will be given below in connection with a preferred embodiment.
As shown in fig. 2, a driving circuit for signal power composite isolation transmission comprises a main transmission circuit, and a forward time slot distribution circuit, a reverse time slot distribution circuit, a forward signal circuit and a reverse signal circuit which are connected with the main transmission circuit;
The input end of the main transmission circuit is connected with the main control unit, and the output end of the main transmission circuit is connected with the power device;
The system comprises a main control unit, a forward time slot distribution circuit, a main control unit, a main transmission circuit, a reverse time slot distribution circuit, a control unit and a control unit, wherein the forward time slot distribution circuit is connected with the forward signal circuit and the main control unit, the forward signal circuit is used for modulating a driving signal output by the main control unit and demodulating a fault signal and a feedback signal modulated by the reverse signal circuit;
The main transmission circuit is also used for outputting driving voltage to control the on and off of the power device according to the demodulated driving signal, and the reverse time slot distribution circuit is used for detecting the feedback signal, the fault signal and the driving signal, and controlling the main transmission circuit to transmit the modulated feedback signal and the fault signal from the secondary side to the primary side in an isolated manner when the feedback signal and the fault signal exist and the driving signal does not exist;
The main transmission circuit is also used for transmitting the input power of the main control unit from the primary side to the secondary side when no driving signal, feedback signal and fault signal exist.
Optionally, the reverse signal circuit demodulates the driving signal transmitted by the main transmission circuit to obtain a recovered driving signal;
the reverse signal circuit is also used for modulating the restored driving signal, and the main transmission circuit is also used for isolating and transmitting the modulated restored driving signal from the secondary side to the primary side;
the forward signal circuit is also used for demodulating the modulated restored driving signal and comparing the modulated restored driving signal with the driving signal, and if the modulated restored driving signal is different from the driving signal, the driving signal is modulated and transmitted again.
As shown in fig. 1, in the scheme, a time division multiplexing technology is adopted, power and a bidirectional signal including a driving signal, a fault signal, a recovered driving signal and a feedback signal are respectively modulated and then transmitted through a single isolation channel in different time slots, the time slot occupied by signal transmission is far less than the time slot occupied by power transmission, and the signal and the power transmission do not conflict with each other.
As shown in FIG. 2, the input power of the main control unit is connected with the primary side of the main transmission circuit, the secondary side of the main transmission circuit outputs driving voltage, the secondary side of the main transmission circuit is connected with the gate source of the power device to control the on and off of the power device, the input ends of the forward time slot distribution circuit and the forward signal circuit are connected with the main control unit, receive driving signals and output fault signals, the output ends of the forward time slot distribution circuit and the forward signal circuit are connected with the main transmission circuit, the fault signals are connected with the input ends of the reverse time slot distribution circuit and the reverse signal circuit, and the output ends of the reverse time slot distribution circuit and the reverse signal circuit are connected with the main transmission circuit.
The driving circuit for signal power composite isolation transmission provided by the scheme comprises a signal transmission working state and a power transmission working state, wherein the signal transmission working state is divided into a forward transmission state and a reverse transmission state.
When in forward transmission, the main control unit transmits the driving signal to the forward signal circuit for modulation, the forward time slot distribution circuit controls the main transmission circuit to switch to a signal transmission working state, the main transmission circuit transmits the modulated driving signal in an isolated manner from the primary side to the secondary side, the modulated driving signal is demodulated through the reverse signal circuit, the demodulated driving signal is output through the main transmission circuit, and the power device is controlled to be turned on and off.
During reverse transmission:
The fault signal generated by the power device and the recovered driving signal are transmitted to a reverse signal circuit, the reverse signal circuit modulates the fault signal, the reverse time slot distribution circuit controls the main transmission circuit to switch to a signal transmission working state, the main transmission circuit isolates the modulated fault signal and transmits the modulated fault signal from a secondary side to a primary side, the modulated fault signal is demodulated through a forward signal circuit, the demodulated fault signal is output to a main control unit through the forward signal circuit, the main control unit performs early warning according to the fault signal, the demodulated recovered driving signal is compared with the driving signal input by the main control unit, and if the difference exists, the driving signal input by the main control unit is transmitted forward again. The feedback signal is the output voltage and current information of the main transmission circuit, and the main transmission circuit samples and feeds back the output voltage and current information to the primary side of the isolation transformer in the operation process, so that the operation state of the main transmission circuit is controlled according to the feedback signal, and the output closed loop is realized. For example, if the output voltage is greater than the set voltage (for example, the sampled voltage is 22V, the set voltage is 20V), the primary side switching tube is turned off, so that the main transmission circuit stops running, the output voltage gradually drops, and when the output voltage drops to be less than the set voltage, the switching tube is turned on, the output voltage gradually rises, and output closed loop is realized. Specifically, the reverse signal circuit acquires a feedback signal from the inside of the main transmission circuit and performs preprocessing, the signal is reversely transmitted to the secondary side of the main transmission circuit through the reverse time slot distribution circuit after being modulated, the signal is transmitted from the secondary side of the main transmission circuit to the primary side, the feedback signal is demodulated through the forward time slot distribution circuit and the forward signal circuit which are connected with the primary side, and closed-loop control is performed after the feedback signal is transmitted to the main transmission circuit.
When no signal is transmitted, the time slot distribution circuit switches the circuit to a power transmission mode, and when a forward signal (driving signal) or a reverse signal (fault signal/recovered driving signal/feedback signal) is used, the circuit is switched to a signal transmission state.
Optionally, the main transmission circuit comprises a DC-DC circuit, a voltage dividing circuit and an output circuit;
the DC-DC circuit is used for driving a transmission channel of power and bidirectional signals;
The voltage dividing circuit is used for generating a source reference potential so as to drive the power device in a negative pressure mode;
The output circuit is used for realizing signal amplification and providing a current driving power device.
The output power of the DC-DC circuit is 1.5W, and the resonant frequency and the switching frequency are both set to 20MHz, so that the driving of high power density and low signal transmission delay are realized.
As shown in fig. 3, the DC-DC circuit is an LLC circuit, and includes a first MOS transistor Q 1, a second MOS transistor Q 2, a first inductor L 1, a first capacitor C 1, a transformer TF, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, and a second capacitor C 2;
The input voltage VIN is input to the drain electrode of the first MOS tube Q 1, the source electrode of the first MOS tube Q 1 is connected with the drain electrode of the second MOS tube Q 2 and one end of the first inductor L 1 and is marked as a first connection point;
The source electrode of the second MOS tube Q 2 is grounded and connected with one end of the first capacitor C 1, the other end of the first capacitor C 1 is connected with one end of a primary winding of a transformer TF, the other end of the primary winding of the transformer TF is connected with the other end of the first inductor L 1, two ends of a secondary winding of the transformer TF are respectively connected with the input ends of a full-bridge rectifying circuit formed by a third diode D 3, a fourth diode D 4, a fifth diode D 5 and a sixth diode D 6 and are marked as a second connecting point and a third connecting point, and the output end of the full-bridge rectifying circuit is connected to two ends of the second capacitor C 2 and is marked as a fourth connecting point and a fifth connecting point.
The voltage of the first connection point is V SW, the voltage of the second connection point is V A, the voltage of the third connection point is V B, the second connection point and the third connection point are two midpoint voltages of the rectifier bridge, the voltage of the fourth connection point is V O, the voltage of the fifth connection point is gnd_s, the fourth connection point and the fifth connection point are the secondary side of the transformer TF and are grounded, and the primary side and the secondary side are grounded differently.
Optionally, the voltage dividing circuit includes a second resistor R 2 and a zener diode Z;
The second resistor R 2 and the zener diode Z are connected in series and then connected in parallel to two ends of the second capacitor C 2.
The voltage dividing circuit is used for generating a 5V reference voltage, providing a driving negative reference potential and providing an auxiliary power supply for the secondary side. The voltage at the series connection point of the second resistor R 2 and the zener diode Z in series is 5v_s.
Optionally, the output circuit comprises a sixth MOS tube Q 6 and a seventh MOS tube Q 7;
The connection point is connected with the drain electrode of the sixth MOS tube Q 6, the source electrode of the sixth MOS tube Q 6 is connected with the source electrode of the seventh MOS tube Q 7, and the connection point is a driving output end;
The gate electrodes of the sixth MOS transistor Q 6 and the seventh MOS transistor Q 7 are in short circuit, and the connection point is connected with a reverse signal circuit.
The connection point of the source electrode of the sixth MOS transistor Q 6 and the source electrode of the seventh MOS transistor Q 7 is denoted as a sixth connection point, the voltage of the driving output end is v G, the connection point of the gate electrode of the sixth MOS transistor Q 6 and the gate electrode of the seventh MOS transistor Q 7, which are in short circuit, is denoted as a seventh connection point, the seventh connection point is an input end of a push-pull circuit, and the voltage is v drive.
Optionally, the forward time slot distribution circuit comprises a first MOS tube Q 1, a second MOS tube Q 2, a third MOS tube Q 3 and a first resistor R 1;
the first MOS tube Q 1, the second MOS tube Q 2 and the LLC circuit share, the source electrode of the third MOS tube Q 3 is grounded, the drain electrode is connected with one end of the first resistor R 1, the other end of the first resistor R 1 is connected with the first capacitor C 1, and the other end of the first resistor R 1 is connected to one end of the primary winding of the transformer TF.
The third MOS transistor Q 3 and the first resistor R 1 are configured to accelerate the discharge speed of the first capacitor C 1, thereby accelerating the transient response speed of the LLC circuit.
The forward time slot distribution circuit is used for switching the working state of the main transmission circuit in different time slots according to the driving signals, and the main transmission circuit isolates and transmits the modulated driving signals, so that the cutting-off or transmission of signals and power is realized, and the time slot distribution function is realized.
Optionally, the reverse time slot distribution circuit comprises a fourth MOS transistor Q 4, a fifth MOS transistor Q 5, a first diode D 1 and a second diode D 2;
The source electrode of the fourth MOS tube Q 4 is connected to the driving output end, the drain electrode is connected with the anode of the first diode D 1, and the cathode of the first diode D 1 is connected with one end of the secondary winding of the transformer TF;
The source electrode of the fifth MOS tube Q 5 is connected to the fifth connection point, the drain electrode is connected with the cathode of the second diode D 2, and the anode of the second diode D 2 is connected with the other end of the secondary winding of the transformer TF.
The reverse signal circuit is used for switching the working state of the main transmission circuit in different time slots according to the feedback signal and the fault signal, and realizing the demodulation function of the forward signal and the modulation function of the reverse signal.
Specifically, fig. 4 is a waveform diagram of overall transmission of a signal power time-sharing composite isolation driving provided by an embodiment of the present invention, in the drawing, SIG GD is a driving signal, SIG FB is a feedback signal, SIG Fault is a fault signal, and v clock is a 20MHz oscillating signal voltage.
As shown in fig. 4, at time t 0, the drive signal SIG GD transitions from a low level to a high level, and a channel slot is allocated to the drive signal rising edge transmission. S 1-S5 is a control signal of a switching device on the primary side in the main transmission circuit, and specifically referring to S 1-S5 in FIG. 4, the first MOS transistor Q 1 to the fifth MOS transistor Q 5 are correspondingly controlled. Specifically, at time t 00, the driving power stops transmitting, that is, S 1~S2 resets, S 3 sets, and v sw、vC and v A damp oscillations and then decay to zero. at time t 01, S 1 is modulated into three short pulses at a time interval, and three short pulses are generated on v sw and v A, respectively, so that at time t 02, recovery of the drive signal, i.e., transition of SIG Re-GD from low to high, is achieved. At time t 03, the drive power is normally power delivered, S 3 is turned off, and S 1 and S 2 are restored to a 20MHz complementary square wave signal with dead time. when the driving signal is transmitted along the falling edge, see the time t 2, the working principle is similar. In contrast, S 1 is modulated into two short pulses at a certain time interval, and two short pulses are generated on v sw and v A accordingly, so that at time t 22, the recovery of the falling edge of the driving signal is realized.
At time t 1, feedback signal SIG FB transitions from a low level to a high level, and channel slots are allocated for feedback signal rising edge transmissions. Specifically, at time t 10, S 5 first sets for a certain time, and at time t 11, primary side v C falls, and the set signal of S 3 is triggered, S 1~S2 resets, and power transmission is turned off. next, at time t 12, S 4 and S 5 are modulated into three short pulses at a certain time interval according to the three signal states at this time, and three short pulses are generated on v sw and v A, respectively, so that a restored feedback signal is obtained by signal demodulation at time t 13. At time t 14, the drive power is normally power transmitted, and S 1~S3 is restored to the previous state. When the feedback signal is transmitted along the falling edge, see the time t 3, the working principle is similar. Differently, the modulation waveforms of S 4 and S 5 are different due to the different signal states. For example, at time t 32, based on the three signal states at this time, S 4 and S 5 are modulated into a short pulse, which is correspondingly generated on v sw and v A, to obtain a recovered feedback signal by signal demodulation at time t 33. similarly, when the rising edge of the fault signal SIG Fault comes, only the waveforms modulated by S 4 and S 5 need to be changed. for example, at time t 42, the recovered driving signal and the feedback signal are both at high level, and S 4 and S 5 are modulated into four short pulses with a certain time interval, so that at time t 43, the recovered fault signal is obtained by signal demodulation.
Fig. 5 is a diagram showing an operation effect of a driving circuit for signal power composite isolation transmission according to an embodiment of the present invention (where V O is set to 20V). As shown in FIG. 6, the feedback signal is successfully transmitted to the primary side, and the output voltage is stabilized at 20V by controlling the LLC switching tube of the primary side, the voltage ripple is smaller than 0.3V, and the closed loop effect is good. The driving signal is successfully recovered at the secondary side, the transmission delay is only 70ns, and meanwhile, the fault signal is accurately responded to the primary side to realize the alarm effect.
The composite isolation driving circuit provided by the embodiment of the invention can be applied to high-speed driving of the power semiconductor device in the upper bridge arm circuit and the lower bridge arm circuit. Fig. 6 shows a multi-pulse test circuit for signal power time-sharing composite isolation driving application, in which the driven power switching transistors T 1 and T 2 have four connection terminals, i.e. the power switching transistors with four pins are used, and the power switching transistors include a gate G, a drain D, a source S and a kelvin source KS.
The driven power switch tube T 1 can adopt a Si MOSFET, an IGBT, a SiC MOSFET or a GaN HEMT device. When the driven power switch T 1 employs a three-terminal device, the Kelvin source KS and the source S can be considered to be the same point.
Fig. 7 is a waveform diagram of a power device switch applied to a driving circuit for signal power composite isolation transmission according to an embodiment of the present invention. As shown in fig. 7, V GS is the gate-source voltage of the driven power switch tube T 1, the switching frequency is 100kHz, the driving signal is well followed, and the on and off voltages of V GS are respectively stabilized at +15v/-5V, which indicates that the driving circuit can also ensure the stability of the driving power and the voltage while transmitting the signal. v DS is the drain-source voltage of the driven power switch tube T 1, i D is the drain current of the driven power switch tube T 1, and v DS and i D can normally switch the switch state before and after the on and off pulses of the driving signal come, which indicates that the isolation driver has the capability of driving the power switch tube at high speed. i L is load inductance current, when the current reaches 125A, overcurrent protection and fault signals are triggered, and after the power switch tube is turned off, the alarm is successfully given to the primary side, so that the reliability of the isolation driver is shown.
According to the embodiment of the invention, the drive signal and the drive power are transmitted simultaneously through the single isolation channel, the working states of the main transmission circuit are switched in different time slots through the time slot distribution circuit, so that the drive signal and the drive power control signal are mutually independent in time, the time slot occupied by signal transmission is far smaller than the power transmission time slot, a decoupling transmission architecture is constructed, the circuits can be respectively and flexibly designed to meet the requirements of signal and power transmission, and the problems of common modulation of the drive signal and the power, low modulation freedom and low transmission efficiency are solved. The high-fidelity and high-efficiency transmission of the driving signals and the driving power are realized, the number of components required by the driving circuit is reduced, and the advantages of low cost and small volume are realized.
It will be readily appreciated by those skilled in the art that the foregoing description is merely a preferred embodiment of the invention and is not intended to limit the invention, but any modifications, equivalents, improvements or alternatives falling within the spirit and principles of the invention are intended to be included within the scope of the invention.

Claims (8)

1. The driving circuit for signal power composite isolation transmission is characterized by comprising a main transmission circuit, and a forward time slot distribution circuit, a reverse time slot distribution circuit, a forward signal circuit and a reverse signal circuit which are connected with the main transmission circuit;
The input end of the main transmission circuit is connected with the main control unit, and the output end of the main transmission circuit is connected with the power device;
The system comprises a main control unit, a forward time slot distribution circuit, a main control unit, a main transmission circuit, a reverse time slot distribution circuit, a control unit and a control unit, wherein the forward time slot distribution circuit is connected with the forward signal circuit and the main control unit, the forward signal circuit is used for modulating a driving signal output by the main control unit and demodulating a fault signal and a feedback signal modulated by the reverse signal circuit;
The main transmission circuit is also used for outputting driving voltage to control the on and off of the power device according to the demodulated driving signal, and the reverse time slot distribution circuit is used for detecting the feedback signal, the fault signal and the driving signal, and controlling the main transmission circuit to transmit the modulated feedback signal and the fault signal from the secondary side to the primary side in an isolated manner when the feedback signal and the fault signal exist and the driving signal does not exist;
The main transmission circuit is also used for transmitting the input power of the main control unit from the primary side to the secondary side when no driving signal, feedback signal and fault signal exist.
2. The drive circuit of claim 1, wherein the inverse signal circuit is further configured to modulate the demodulated recovered drive signal, and wherein the primary transmission circuit is further configured to transmit the modulated recovered drive signal from the secondary side to the primary side in isolation;
the forward signal circuit is also used for demodulating the modulated restored driving signal and comparing the modulated restored driving signal with the driving signal, and if the modulated restored driving signal is different from the driving signal, the driving signal is modulated and transmitted again.
3. The drive circuit according to claim 1, wherein the main transmission circuit includes a DC-DC circuit, a voltage dividing circuit, and an output circuit;
the DC-DC circuit is used for driving a transmission channel of power and bidirectional signals;
The voltage dividing circuit is used for generating a source reference potential so as to drive the power device in a negative pressure mode;
The output circuit is used for realizing signal amplification and providing a current driving power device.
4. The driving circuit of claim 3, wherein the DC-DC circuit is an LLC circuit comprising a first MOS transistor Q 1, a second MOS transistor Q 2, a first inductor L 1, a first capacitor C 1, a transformer TF, a third diode D 3, a fourth diode D 4, a fifth diode D 5, a sixth diode D 6, and a second capacitor C 2;
The input voltage VIN is input to the drain electrode of the first MOS tube Q 1, the source electrode of the first MOS tube Q 1 is connected with the drain electrode of the second MOS tube Q 2 and one end of the first inductor L 1 and is marked as a first connection point;
The source electrode of the second MOS tube Q 2 is grounded and connected with one end of the first capacitor C 1, the other end of the first capacitor C 1 is connected with one end of a primary winding of a transformer TF, the other end of the primary winding of the transformer TF is connected with the other end of the first inductor L 1, two ends of a secondary winding of the transformer TF are respectively connected with the input ends of a full-bridge rectifying circuit formed by a third diode D 3, a fourth diode D 4, a fifth diode D 5 and a sixth diode D 6 and are marked as a second connecting point and a third connecting point, and the output end of the full-bridge rectifying circuit is connected to two ends of the second capacitor C 2 and is marked as a fourth connecting point and a fifth connecting point.
5. The driving circuit as claimed in claim 4, wherein the voltage dividing circuit comprises a second resistor R 2 and a zener diode Z;
The second resistor R 2 and the zener diode Z are connected in series and then connected in parallel to two ends of the second capacitor C 2.
6. The driving circuit according to claim 4, wherein the output circuit comprises a sixth MOS transistor Q 6 and a seventh MOS transistor Q 7;
The connection point is connected with the drain electrode of the sixth MOS tube Q 6, the source electrode of the sixth MOS tube Q 6 is connected with the source electrode of the seventh MOS tube Q 7, and the connection point is a driving output end;
The gate electrodes of the sixth MOS transistor Q 6 and the seventh MOS transistor Q 7 are in short circuit, and the connection point is connected with a reverse signal circuit.
7. The driving circuit of claim 4, wherein the forward time slot allocation circuit comprises a first MOS transistor Q 1, a second MOS transistor Q 2, a third MOS transistor Q 3 and a first resistor R 1;
the first MOS tube Q 1, the second MOS tube Q 2 and the LLC circuit share, the source electrode of the third MOS tube Q 3 is grounded, the drain electrode is connected with one end of the first resistor R 1, the other end of the first resistor R 1 is connected with the first capacitor C 1, and the other end of the first resistor R 1 is connected to one end of the primary winding of the transformer TF.
8. The driving circuit of claim 4, wherein the reverse slot allocation circuit comprises a fourth MOS transistor Q 4, a fifth MOS transistor Q 5, a first diode D 1 and a second diode D 2;
The source electrode of the fourth MOS tube Q 4 is connected to the driving output end, the drain electrode is connected with the anode of the first diode D 1, and the cathode of the first diode D 1 is connected with one end of the secondary winding of the transformer TF;
The source electrode of the fifth MOS tube Q 5 is connected to the fifth connection point, the drain electrode is connected with the cathode of the second diode D 2, and the anode of the second diode D 2 is connected with the other end of the secondary winding of the transformer TF.
CN202411384012.9A 2024-09-30 2024-09-30 A driving circuit for signal power composite isolation transmission Pending CN119276090A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411384012.9A CN119276090A (en) 2024-09-30 2024-09-30 A driving circuit for signal power composite isolation transmission

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411384012.9A CN119276090A (en) 2024-09-30 2024-09-30 A driving circuit for signal power composite isolation transmission

Publications (1)

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CN119276090A true CN119276090A (en) 2025-01-07

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CN202411384012.9A Pending CN119276090A (en) 2024-09-30 2024-09-30 A driving circuit for signal power composite isolation transmission

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