CN119275199A - Packaging structure, method for preparing packaging structure, and electronic device - Google Patents
Packaging structure, method for preparing packaging structure, and electronic device Download PDFInfo
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- CN119275199A CN119275199A CN202411224454.7A CN202411224454A CN119275199A CN 119275199 A CN119275199 A CN 119275199A CN 202411224454 A CN202411224454 A CN 202411224454A CN 119275199 A CN119275199 A CN 119275199A
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- packaging
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
本公开实施例公开了一种封装结构、封装结构的制备方法及电子设备，所述封装结构包括基底、第一芯片和连接板，所述第一芯片的一侧具有至少一个锡球，所述连接板设于所述基底上，所述连接板在所述第一芯片上的投影面积不大于所述第一芯片的表面积；沿所述封装结构的堆叠方向，所述连接板上开设有至少一个通孔，每个所述锡球穿设于对应的所述通孔内，以将所述第一芯片密封连接至所述连接板，且所述锡球与所述基底电连接。连接板的设置，也避免了底部填胶产生的边缘溢胶问题，无需保证第一芯片与相邻的电子元件之间较大的安全距离，便于降低封装结构的尺寸，从而便于封装结构的小型化发展。
The disclosed embodiments disclose a packaging structure, a method for preparing the packaging structure, and an electronic device, wherein the packaging structure includes a substrate, a first chip, and a connecting plate, wherein one side of the first chip has at least one solder ball, the connecting plate is disposed on the substrate, and the projection area of the connecting plate on the first chip is not greater than the surface area of the first chip; along the stacking direction of the packaging structure, at least one through hole is provided on the connecting plate, and each of the solder balls is passed through the corresponding through hole to seal and connect the first chip to the connecting plate, and the solder balls are electrically connected to the substrate. The provision of the connecting plate also avoids the problem of edge overflow caused by the bottom glue filling, and there is no need to ensure a large safety distance between the first chip and adjacent electronic components, which is convenient for reducing the size of the packaging structure, thereby facilitating the miniaturization of the packaging structure.
Description
Technical Field
The present invention relates to the field of semiconductor packaging technology, and more particularly, to a packaging structure, a method for manufacturing the packaging structure, and an electronic device.
Background
The rapid development of electronic products is a main driving force for improving packaging technology nowadays, and miniaturization, high density, high performance, high reliability and low cost of electronic products are main stream development directions of advanced packaging. SiP packaging (SYSTEMIN PACKAGE ) is one of the most important and potentially most promising technologies for such high density system integration.
In the existing SiP packaging process, it is generally required to fill the IC chip with underfill, and then bake and cure the IC chip to perform integral plastic packaging. In the process of filling the underfill, the underfill overflows from the edge of the IC chip, so that a larger safety distance needs to be kept between the IC chip and other adjacent electronic components, which is not beneficial to the miniaturization development of the packaging structure.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a packaging structure, a method for manufacturing the packaging structure, and a new technical solution of an electronic device.
According to one aspect of the present invention, a package structure is provided.
The package structure includes:
A substrate;
The device comprises a first chip and a connecting plate, wherein one side of the first chip is provided with at least one tin ball, the connecting plate is arranged on the substrate, and the projection area of the connecting plate on the first chip is not larger than the surface area of the first chip;
Along the stacking direction of the packaging structure, at least one through hole is formed in the connecting plate, each tin ball penetrates through the corresponding through hole, so that the first chip is connected to the connecting plate in a sealing mode, and the tin balls are electrically connected with the substrate.
Optionally, the connection plate is detachably connected to the base.
Optionally, at least one solder ball is penetrated in the through hole.
Optionally, a plurality of solder balls are disposed on a side of the first chip, which is close to the substrate, and a plurality of through holes are formed in the connecting plate, wherein the number of the through holes is greater than or equal to that of the solder balls.
Optionally, each solder ball is located opposite one of the through holes.
Optionally, a plurality of the through holes are distributed in an array.
Optionally, at least part of the distances between two adjacent through holes are equal.
Optionally, the connection plate is a film, and the film is adhered to the substrate.
Optionally, the packaging structure further comprises a plastic package piece, wherein the plastic package piece is arranged on the substrate, and the plastic package piece coats the first chip and the connecting plate.
Optionally, the substrate further comprises a second chip, the substrate comprises a first area and a second area, the connecting plate is located in the first area, the second chip is located in the second area, and the plastic package piece covers the first chip, the second chip and the connecting plate.
According to another aspect of the present invention, there is provided a method for manufacturing a package structure, including:
Manufacturing a substrate;
Manufacturing a connecting plate and a first chip, wherein at least one through hole is formed in the connecting plate along the stacking direction of the packaging structure, one side of the first chip is provided with at least one tin ball, and the projection area of the connecting plate on the first chip is not larger than the surface area of the first chip;
and firstly arranging the connecting plates on the substrate, and then penetrating each tin ball into the corresponding through hole so that the first chip is connected to the connecting plates in a sealing way, and the tin balls are electrically connected with the substrate.
Optionally, after the connecting plate is disposed on the substrate, the method further includes:
and manufacturing a second chip and arranging the second chip on the substrate.
Optionally, after each solder ball is inserted into the corresponding through hole, so that the first chip is detachably connected to the connecting board, the method further includes:
and performing plastic packaging and forming a plastic packaging part, wherein the plastic packaging part can cover the first chip, the second chip and the connecting plate.
According to still another aspect of the present invention, there is provided an electronic device including the above-described package structure.
One technical effect of the embodiments of the present disclosure is:
The packaging structure comprises a substrate, a first chip and a connecting plate, wherein at least one solder ball is arranged on one side of the first chip, the connecting plate is arranged on the substrate, the projection area of the connecting plate on the first chip is not larger than the surface area of the first chip, at least one through hole is formed in the connecting plate along the stacking direction of the packaging structure, each solder ball penetrates through the corresponding through hole, so that the first chip is connected to the connecting plate in a sealing mode, and the solder balls are electrically connected with the substrate.
Therefore, the fixing and sealing of the first chip can be realized by utilizing the cooperation of the connecting plate and the first chip. Compared with the traditional bottom glue filling process, the glue curing waiting time is saved, the process flow is greatly shortened, and the production efficiency is improved. And, the setting of connecting plate has also avoided the edge glue overflow problem that the bottom was filled with glue and has produced, need not to guarantee great safe distance between first chip and the adjacent electronic component, is convenient for reduce packaging structure's size to the miniaturized development of packaging structure of being convenient for.
Other features of the present invention and its advantages will become apparent from the following detailed description of exemplary embodiments of the invention, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a schematic illustration of a package structure of an embodiment of the present disclosure;
FIG. 2 is another schematic illustration of a package structure of an embodiment of the present disclosure;
FIG. 3 is yet another schematic illustration of a package structure of an embodiment of the present disclosure;
fig. 4 is yet another schematic diagram of a package structure of an embodiment of the present disclosure.
Reference numerals illustrate:
1. The chip comprises a substrate, a first chip, a connecting plate, a through hole, a plastic package and a second chip.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of the components and steps, numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.
The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the invention, its application, or uses.
Techniques and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but should be considered part of the specification where appropriate.
In all examples shown and discussed herein, any specific values should be construed as merely illustrative, and not a limitation. Thus, other examples of exemplary embodiments may have different values.
It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once an item is defined in one figure, no further discussion thereof is necessary in subsequent figures.
The invention provides a packaging structure.
As shown in fig. 1 to 4, the package structure provided in the embodiment of the present invention includes:
A substrate 1;
The chip comprises a first chip 2 and a connecting plate 3, wherein one side of the first chip 2 is provided with at least one tin ball, the connecting plate 3 is arranged on a substrate 1, and the projection area of the connecting plate 3 on the first chip 2 is not larger than the surface area of the first chip 2;
Along the stacking direction of the package structure, the connection board 3 is provided with at least one through hole 31, each solder ball is inserted into the corresponding through hole 31, so as to connect the first chip 2 to the connection board 3 in a sealing manner, and the solder balls are electrically connected with the substrate 1.
Specifically, the substrate 1 may be a PCB (Printed Circuit Board ) so that the substrate 1 can serve as a support carrier and a connection carrier for electronic components. The substrate 1 may comprise opposite first and second surfaces, i.e. upper and lower surfaces, the first surface being the upper surface of the substrate 1 and the second surface being the lower surface of the substrate 1. Different electronic components can be arranged on the first surface and the second surface of the substrate 1 respectively so as to meet the requirements of corresponding packaging structures. Wherein the substrate 1 is a generally rectangular plate, which can facilitate the arrangement of electronic components thereon.
The substrate 1, which serves as a supporting and heat dissipating base for the package structure, may be made of a material having high thermal conductivity and good mechanical strength, such as ceramic, metal (e.g., copper, aluminum) or a composite material having high thermal conductivity. The surface of the substrate 1 may be designed with a circuit wiring layer for connection with an external circuit and transmission of internal signals as needed. Meanwhile, a heat dissipation structure, such as a heat dissipation fin or a micro-channel cooling structure, can be further arranged on the substrate 1 to enhance the overall heat dissipation performance.
Specifically, the first chip 2 may be disposed on the first surface of the substrate 1, so that electrical connection between the first chip 2 and an external device on the upper surface side of the substrate 1 is facilitated. The first chip 2 may be an IC chip (INTEGRATED CIRCUIT CHIP, microelectronic device). And moreover, the first chip 2 and the substrate 1 can be electrically connected through a lead wire, and can also be directly electrically connected through a tin ball at the bottom of the first chip 2, so that the signal transmission between the first chip 2 and the substrate 1 can be realized, and the data transmission requirements of high speed and high reliability are also met.
As shown in fig. 2 and 3, one side of the first chip 2 has at least one solder ball, also called solder ball, which acts as a medium for the electrical connection and mechanical fixing of the first chip 2. The number and layout of the solder balls can be flexibly designed according to the pin distribution and packaging requirements of the first chip 2.
The connection board 3 is usually plate-like, sheet-like, etc. structure, and the thickness can be adjusted to reduce the height of the package structure. The connection board 3 may be made of a material compatible with the substrate 1 and the first chip 2, and the connection board 3 has good mechanical strength and temperature resistance, for example, may be made of high temperature resistant plastic, ceramic, resin, metal alloy, or the like. The thickness of the web 3 may also be between 100 micrometers and 200 micrometers.
As shown in fig. 1 to 4, the connection board 3 is provided with at least one through hole 31 in the stacking direction of the package structure, i.e., the height direction of the package structure. Wherein the diameter and depth of the through hole 31 are matched with those of the solder ball, so that precise penetration and fixation of the solder ball can be ensured. The positions of the through holes 31 may be in one-to-one correspondence with solder balls on the first chip 2 to facilitate rapid assembly.
As shown in fig. 1 to 3, in the packaging process, the connection board 3 is fixed on the substrate 1 by means of bonding, soldering, etc., and then a plurality of solder balls of the first chip 2 are aligned with the through holes 31 of the connection board 3, and pressure is applied to make the solder balls penetrate into the corresponding through holes 31 so as to connect the first chip 2 and the connection board 3 in a sealing manner. Therefore, the connecting plate 3 can be used for sealing and protecting a plurality of solder balls of the first chip 2, gaps between the first chip 2 and the substrate 1 can be filled through the connecting plate 3, the influence of a subsequent plastic packaging process on the first chip 2 is avoided, and therefore the reliability of the packaging structure is improved.
The solder balls and the through holes 31 may be in one-to-one fit, that is, each solder ball is inserted into a corresponding through hole 31, or the solder balls and the through holes 31 may be in many-to-one fit, that is, some adjacent solder balls are inserted into a corresponding through hole 31, so as to adapt to different assembly requirements. Moreover, the close fit of the solder balls and the through holes 31 also reduces the thermal resistance, so that the heat generated by the first chip 2 can be more quickly conducted to the substrate 1 and emitted, thereby ensuring the stable operation of the first chip 2 and prolonging the service life.
In the embodiment of the invention, the connecting plate 3 is arranged on the substrate 1, then the first chip 2 is assembled on the connecting plate 3, and the fixing and sealing of the first chip 2 can be realized by utilizing the cooperation of the connecting plate 3 and the first chip 2. Compared with the traditional bottom glue filling process, the glue curing waiting time is saved, the process flow is greatly shortened, and the production efficiency is improved. Moreover, the proper connecting plate 3 can be matched according to the specific structure of the first chip 2, the glue filling space is not required to be reserved, the internal space of the packaging structure is also convenient to save, more electronic elements are convenient to accommodate in the limited volume of the packaging structure, and the requirements of the electronic equipment applying the packaging structure on miniaturization and high integration level are also met.
In addition, the arrangement of the connecting plate 3 also avoids the problem of edge glue overflow generated by the traditional bottom glue filling process, and the distance between the first chip 2 and the adjacent electronic element can be shortened according to the requirement without ensuring a larger safety distance between the first chip and the adjacent electronic element. And, along the length and/or width direction of the connecting plate 3, the size of the connecting plate 3 may be smaller than or equal to the size of the first chip 2, which is also convenient for shortening the interval between the first chip 2 and the adjacent electronic element, and is convenient for reducing the size of the packaging structure, thereby being convenient for the miniaturization development of the packaging structure.
Optionally, the connection board 3 may be detachably connected to the substrate 1, for example, the connection board 3 may be detachably connected to the surface of the substrate 1 by means of bonding, clamping, or the like, so that it is convenient to match different connection boards 3 according to the first chip 2, and also convenient to repair and replace the connection board 3, thereby improving the assembly efficiency and the repair efficiency of the package structure.
Optionally, at least one solder ball is disposed in the through hole 31.
Specifically, the solder balls and the through holes 31 may be in one-to-one fit, i.e. each solder ball is inserted into a corresponding through hole 31, or the solder balls and the through holes 31 may be in many-to-one fit, i.e. part of adjacent solder balls are inserted into a corresponding through hole 31, so as to adapt to different assembly requirements.
Optionally, the size of the through hole 31 is adapted to the size of the solder ball.
Specifically, the through holes 31 can be matched with the solder balls in size, on one hand, the assembly of the first chip 2 can be facilitated, gaps between the first chip 2 and the substrate 1 can be filled through the connecting plates 3, the influence of the subsequent plastic packaging process on the first chip 2 is avoided, and therefore the reliability of a packaging structure is improved, and on the other hand, the thermal resistance can be reduced, so that heat generated by the first chip 2 can be conducted to the substrate 1 more quickly and emitted, stable operation of the first chip 2 is guaranteed, and the service life of the first chip 2 is prolonged.
Optionally, a plurality of solder balls are disposed on a side of the first chip 2 near the substrate 1, and a plurality of through holes 31 are formed in the connecting board 3, where the number of the through holes 31 is greater than or equal to the number of the solder balls.
As shown in fig. 4, the connecting plate 3 may be provided with a plurality of through holes 31, and the arrangement positions of the plurality of through holes 31 are adapted to the positions of the plurality of solder balls on the first chip 2, so as to facilitate reliable assembly of the first chip 2. In addition, the first chip 2 is provided with a plurality of solder balls on the side close to the substrate 1, and the reliability of the connection of the first chip 2 can be enhanced by the cooperation of the plurality of solder balls and the plurality of through holes 31, so that the reliability of the packaging structure can be improved.
Wherein, the number of the through holes 31 is equal to the number of the solder balls, so that each solder ball on the first chip 2 has a corresponding assembly position, thereby facilitating rapid assembly. The number of through holes 31 can be larger than the number of solder balls, so that the connecting plate 3 can be conveniently matched with different first chips 2, and the process time brought by replacing the connecting plate 3 is saved.
Optionally, each solder ball is located opposite one of the through holes 31, so that each solder ball on the first chip 2 has a corresponding mounting position, which facilitates quick assembly. The shape of the through hole 31 is adapted to the solder ball, that is, the through hole 31 is mostly circular, so that the solder ball can be sealed and protected from the circumferential direction.
Optionally, a plurality of the through holes 31 are distributed in an array.
In particular, the distribution of the plurality of through holes 31 is adapted to the plurality of solder ball positions on the first chip 2, so that reliable assembly of the first chip 2 can be facilitated. For example, the distribution of the plurality of through holes 31 includes, but is not limited to, array, discrete, and radial.
Alternatively, at least part of the intervals between adjacent two of the through holes 31 are equal.
Specifically, according to the specific distribution condition of the plurality of through holes 31 on the connecting plate 3, the intervals between the two adjacent through holes 31 can be set to be equal, and the intervals between the two adjacent through holes 31 can be set to be equal, so that the processing and forming of the plurality of through holes 31 on the connecting plate 3 can be simplified to a certain extent, the production difficulty of the packaging structure can be reduced, and the production efficiency can be improved.
Optionally, the connecting plate 3 is a film, and the film is adhered to the substrate 1, so that the mounting process of the connecting plate 3 can be simplified, the production difficulty of the packaging structure can be reduced, and the production efficiency can be improved.
Optionally, the packaging device further comprises a plastic package 4, wherein the plastic package 4 is arranged on the substrate 1, and the plastic package 4 coats the first chip 2 and the connecting plate 3. As shown in fig. 3, after the first chip 2 is mounted, plastic packaging is performed, so that the first chip 2 can be protected in an omnibearing manner. The connecting plate 3 is clamped between the first chip 2 and the substrate 1, compared with the traditional bottom glue filling process, the influence of glue overflow on the plastic packaging process can be avoided, and the overall size of the packaging structure is also reduced conveniently.
Optionally, the substrate 1 further comprises a second chip 5, the substrate 1 comprises a first area and a second area, the connecting plate 3 is located in the first area, the second chip 5 is located in the second area, and the plastic package 4 wraps the first chip 2, the second chip 5 and the connecting plate 3, so that the first chip 2 and the second chip 5 can be protected in an omnibearing and reliable manner through the plastic package 4. The second chip 5 may be a resistor, an inductor, or other chips.
The embodiment of the invention also provides a preparation method of the packaging structure, which comprises the following steps:
Manufacturing a substrate 1;
Manufacturing a connecting plate 3 and a first chip 2, wherein at least one through hole 31 is formed in the connecting plate 3 along the stacking direction of the packaging structure, at least one tin ball is arranged on one side of the first chip 2, and the projection area of the connecting plate 3 on the first chip 2 is not larger than the surface area of the first chip 2;
the connection board 3 is first disposed on the substrate 1, and then each solder ball is inserted into the corresponding through hole 31, so that the first chip 2 is connected to the connection board 3 in a sealing manner, and the solder balls are electrically connected to the substrate 1.
In the packaging process, the connecting plate 3 is fixed on the substrate 1 by bonding, welding and other modes, then a plurality of solder balls of the first chip 2 are aligned with the through holes 31 of the connecting plate 3, and pressure is applied to enable the solder balls to penetrate through the corresponding through holes 31 so as to connect the first chip 2 with the connecting plate 3. Therefore, the connecting plate 3 can be used for sealing and protecting a plurality of solder balls of the first chip 2, gaps between the first chip 2 and the substrate 1 can be filled through the connecting plate 3, the influence of a subsequent plastic packaging process on the first chip 2 is avoided, and therefore the reliability of the packaging structure is improved.
In the embodiment of the invention, the connecting plate 3 is arranged on the substrate 1, then the first chip 2 is arranged on the connecting plate 3, and the fixing and sealing of the first chip 2 are realized by utilizing the cooperation of the connecting plate 3 and the first chip 2. Compared with the traditional bottom glue filling process, the glue curing waiting time is saved, the process flow is greatly shortened, and the production efficiency is improved. Moreover, the proper connecting plate 3 can be matched according to the specific structure of the first chip 2, the glue filling space is not required to be reserved, the internal space of the packaging structure is also convenient to save, more electronic elements are convenient to accommodate in the limited volume of the packaging structure, and the requirements of the electronic equipment applying the packaging structure on miniaturization and high integration level are also met.
In addition, the arrangement of the connecting plate 3 also avoids the problem of edge glue overflow generated by the traditional bottom glue filling process, and the distance between the first chip 2 and the adjacent electronic element can be shortened according to the requirement without ensuring a larger safety distance between the first chip and the adjacent electronic element. And, along the length and/or width direction of the connecting plate 3, the size of the connecting plate 3 may be smaller than or equal to the size of the first chip 2, which is also convenient for shortening the interval between the first chip 2 and the adjacent electronic element, and is convenient for reducing the size of the packaging structure, thereby being convenient for the miniaturization development of the packaging structure.
Optionally, after the connecting plate 3 is disposed on the substrate 1, the method further includes:
A second chip 5 is fabricated and the second chip 5 is disposed on the substrate 1.
Specifically, the mounting of the connection board 3 and the mounting of the second chip 5 can be performed simultaneously, so that the processing efficiency of the package structure can be improved.
Optionally, after each solder ball is inserted into the corresponding through hole 31 to detachably connect the first chip 2 to the connection board 3, the method further includes:
And performing plastic packaging and forming a plastic packaging part 4, wherein the plastic packaging part 4 can cover the first chip 2, the second chip 5 and the connecting plate 3 so as to form omnibearing reliable protection for the first chip 2 and the second chip 5 through the plastic packaging part 4.
In addition, the arrangement of the connecting plate 3 can avoid the influence of the edge glue overflow problem generated by the traditional bottom glue filling process on the subsequent plastic packaging process, the larger safety distance between the first chip 2 and the adjacent electronic element is not required to be ensured, the distance can be shortened as required, and the whole size of the packaging structure is also convenient to reduce.
The invention also provides electronic equipment, which comprises the packaging structure. Electronic devices include, but are not limited to, cell phones, tablets, and computers.
The foregoing embodiments mainly describe differences between the embodiments, and as long as there is no contradiction between different optimization features of the embodiments, the embodiments may be combined to form a better embodiment, and in consideration of brevity of line text, no further description is given here.
While certain specific embodiments of the invention have been described in detail by way of example, it will be appreciated by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (14)
1. A package structure, comprising:
a substrate (1);
The chip comprises a first chip (2) and a connecting plate (3), wherein one side of the first chip (2) is provided with at least one tin ball, the connecting plate (3) is arranged on a substrate (1), and the projection area of the connecting plate (3) on the first chip (2) is not larger than the surface area of the first chip (2);
Along the stacking direction of the packaging structure, at least one through hole (31) is formed in the connecting plate (3), each solder ball penetrates through the corresponding through hole (31), so that the first chip (2) is connected to the connecting plate (3) in a sealing mode, and the solder balls are electrically connected with the substrate (1).
2. The packaging structure according to claim 1, characterized in that the connection plate (3) is detachably connected to the base (1).
3. The packaging structure according to claim 1, wherein at least one solder ball is provided in the through hole (31).
4. The packaging structure according to claim 1, wherein a plurality of solder balls are provided on a side of the first chip (2) close to the substrate (1), a plurality of through holes (31) are provided on the connecting board (3), and the number of the through holes (31) is greater than or equal to the number of the solder balls.
5. The package structure according to claim 4, wherein each of the solder balls is located opposite one of the through holes (31).
6. The packaging structure according to claim 4, wherein a plurality of the through holes (31) are distributed in an array.
7. The packaging structure according to claim 4, characterized in that the spacing between at least part of two adjacent through holes (31) is equal.
8. The packaging structure according to claim 1, characterized in that the connection plate (3) is a film, which is glued to the substrate (1).
9. The packaging structure according to claim 1, further comprising a plastic package (4), wherein the plastic package (4) is disposed on the substrate (1), and the plastic package (4) encapsulates the first chip (2) and the connection board (3).
10. The package structure of claim 98, further comprising a second chip (5), wherein the substrate (1) comprises a first area and a second area, the connection board (3) is located in the first area, the second chip (5) is located in the second area, and the plastic package (4) encapsulates the first chip (2), the second chip (5) and the connection board (3).
11. A method of manufacturing the package structure according to any one of claims 1 to 10, comprising:
Manufacturing a substrate;
Manufacturing a connecting plate and a first chip, wherein at least one through hole is formed in the connecting plate along the stacking direction of the packaging structure, one side of the first chip is provided with at least one tin ball, and the projection area of the connecting plate on the first chip is not larger than the surface area of the first chip;
and firstly arranging the connecting plates on the substrate, and then penetrating each tin ball into the corresponding through hole so that the first chip is connected to the connecting plates in a sealing way, and the tin balls are electrically connected with the substrate.
12. The method of manufacturing according to claim 11, further comprising, after the connecting plate is previously provided on the substrate:
and manufacturing a second chip and arranging the second chip on the substrate.
13. The method of manufacturing according to claim 12, further comprising, after each of the solder balls is inserted into the corresponding through hole to detachably connect the first chip to the connection board:
and performing plastic packaging and forming a plastic packaging part, wherein the plastic packaging part can cover the first chip, the second chip and the connecting plate.
14. An electronic device comprising the package structure of any one of claims 1 to 10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411224454.7A CN119275199A (en) | 2024-09-02 | 2024-09-02 | Packaging structure, method for preparing packaging structure, and electronic device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202411224454.7A CN119275199A (en) | 2024-09-02 | 2024-09-02 | Packaging structure, method for preparing packaging structure, and electronic device |
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| CN119275199A true CN119275199A (en) | 2025-01-07 |
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| CN202411224454.7A Pending CN119275199A (en) | 2024-09-02 | 2024-09-02 | Packaging structure, method for preparing packaging structure, and electronic device |
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| Country | Link |
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| CN (1) | CN119275199A (en) |
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