CN119233527A - Printed circuit board, solid state disk and electronic equipment - Google Patents

Abstract

A printed circuit board, a solid state disk and an electronic device. The printed circuit board comprises a plurality of stacked conductive layers, the plurality of conductive layers comprise a top conductive layer and a bottom conductive layer which are positioned at the outermost side in the direction perpendicular to the printed circuit board, the printed circuit board comprises a top golden finger arranged on the top surface and a bottom golden finger arranged on the bottom surface respectively, the distance between the opposite side surfaces of the top conductive layer and the bottom conductive layer is a first distance in the direction perpendicular to the printed circuit board, the distance between the opposite side surfaces of the top golden finger and the bottom golden finger is a second distance, and the first distance is larger than the second distance.

Description

Printed circuit board, solid state disk and electronic equipment

Technical Field

The present disclosure relates to printed circuit board technology, and more particularly to a printed circuit board, a solid state disk, and an electronic device.

Background

The Solid state disk (Solid STATE DISK or Solid STATE DRIVE, SSD) comprises a printed circuit board (Printed Circuit Board, PCB), a main control chip, flash memory particles, a cache chip and other structures which are arranged on the printed circuit board, and the structures are connected through wires on the PCB. With the increase of SSD application scenes, the SSD working environment is getting worse, and the demands of people on the storage capacity and the robustness of the SSD are getting higher.

However, the PCB is easily deformed, so that the solid state disk is easily damaged.

Disclosure of Invention

The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

The embodiment of the application provides a printed circuit board, a solid state disk and electronic equipment, which can solve the problem that a PCB is easy to deform.

In a first aspect, an embodiment of the present application provides a printed circuit board, including a plurality of stacked conductive layers, where in a direction perpendicular to the printed circuit board, the plurality of conductive layers includes a top conductive layer and a bottom conductive layer that are located at outermost sides, the printed circuit board includes a top gold finger and a bottom gold finger that are respectively disposed on a top surface and a bottom surface, and in a direction perpendicular to the printed circuit board, a distance between opposite side surfaces of the top conductive layer and the bottom conductive layer is a first distance, and a distance between opposite side surfaces of the top gold finger and the bottom gold finger is a second distance, where the first distance is greater than the second distance.

In an exemplary embodiment, the plurality of conductive layers further includes a plurality of intermediate conductive layers between the top conductive layer and the bottom conductive layer, wherein the top gold finger is located in one of the intermediate conductive layers and the bottom gold finger is located in the bottom conductive layer, or the top gold finger is located in the top conductive layer and the bottom gold finger is located in one of the intermediate conductive layers, or the top gold finger and the bottom gold finger are respectively located in different ones of the intermediate conductive layers.

In an exemplary embodiment, the plurality of conductive layers further includes a first laminate layer, a plurality of the intermediate conductive layers are sandwiched between two sides of the first laminate layer, the first laminate layer includes at least two stacked signal layers or at least two stacked plane layers, wherein the signal layers are used for transmitting signals, and the plane layers are configured to provide power or ground.

In an exemplary embodiment, the first laminate includes two planar layers stacked, and the plurality of conductive layers includes the signal layers and the planar layers alternately arranged in order in a direction away from the first laminate, and at least one of the planar layers has a thickness greater than a thickness of the signal layer in a direction perpendicular to the printed circuit board.

In an exemplary embodiment, the first stack includes two signal layers stacked, and the plurality of conductive layers includes the planar layers and the signal layers alternately arranged in order in a direction away from the first stack, and a thickness of at least one of the planar layers is greater than a thickness of the signal layer in a direction perpendicular to the printed circuit board.

In an exemplary embodiment, the first stack includes a first planar layer and a second planar layer, the thickness of the first planar layer and the thickness of the second planar layer being greater than the thickness of the signal layer.

In an exemplary embodiment, the first planar layer has a thickness of greater than or equal to 60 microns and less than or equal to 80 microns and the second planar layer has a thickness of greater than or equal to 60 microns and less than or equal to 80 microns in a direction perpendicular to the printed circuit board.

In an exemplary embodiment, the first planar layer and the second planar layer are configured to provide a power source, or one of the first planar layer and the second planar layer is configured to provide a power source and the other is configured to be grounded.

In a second aspect, an embodiment of the present application further provides a solid state hard disk, including the printed circuit board as described above.

In a third aspect, an embodiment of the present application further provides an electronic device, including the printed circuit board as described above.

According to the printed circuit board provided by the embodiment of the application, the first distance between the opposite side surfaces of the top conducting layer and the bottom conducting layer is larger than the second distance between the opposite side surfaces of the top golden finger and the bottom golden finger, so that the maximum thickness of the printed circuit board is larger than the standard thickness of the printed circuit board in PCI-SIG (peripheral component interconnect-signal) association specifications, the rigidity of the printed circuit board is increased, and the deformation resistance of the printed circuit board is stronger and is not easy to warp. The printed circuit board can bear cold and hot alternation in a larger temperature range on the premise of not replacing materials with better thermal expansion coefficients, ensures long-term stable work of the printed circuit board in a severe working environment, can save cost and is suitable for popularization and use. The problem that the PCB is easy to deform is solved.

Additional features and advantages of the application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application. Other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and drawings.

Drawings

The accompanying drawings are included to provide an understanding of the principles of the application, and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain, without limitation, the principles of the application.

FIG. 1 is a top view of a solid state disk;

FIG. 2 is a cross-sectional view of a printed circuit board in the solid state disk of FIG. 1;

FIG. 3 is a cross-sectional view of a printed circuit board in an exemplary embodiment;

Fig. 4 is a cross-sectional view of a printed circuit board in yet another exemplary embodiment;

fig. 5 is a cross-sectional view of a printed circuit board in yet another exemplary embodiment.

Detailed Description

The present application has been described in terms of several embodiments, but the description is illustrative and not restrictive, and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the described embodiments. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are possible. Any feature or element of any embodiment may be used in combination with or in place of any other feature or element of any other embodiment unless specifically limited.

The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The disclosed embodiments, features and elements of the present application may also be combined with any conventional features or elements to form a unique inventive arrangement. Any feature or element of any embodiment may also be combined with features or elements from other inventive arrangements to form another unique inventive arrangement. It is therefore to be understood that any of the features shown and/or discussed in the present application may be implemented alone or in any suitable combination. Accordingly, the embodiments are not to be restricted except in light of the attached claims and their equivalents. Further, various modifications and changes may be made within the scope of the appended claims.

Furthermore, in describing representative embodiments, the specification may have presented the method and/or process as a particular sequence of steps. However, to the extent that the method or process does not rely on the particular order of steps set forth herein, the method or process should not be limited to the particular sequence of steps described. Other sequences of steps are possible as will be appreciated by those of ordinary skill in the art. Accordingly, the particular order of the steps set forth in the specification should not be construed as limitations on the claims. Furthermore, the claims directed to the method and/or process should not be limited to the performance of their steps in the order written, and one skilled in the art can readily appreciate that the sequences may be varied and still remain within the spirit and scope of the embodiments of the present application.

With the development of storage technology, the solid state disk can be applied to various fields, such as industrial production, automobiles and the like, in the application scenes, the capacity requirement on the solid state disk is larger and larger, the working environment of the solid state disk is worse and higher requirements are put on the performance of the solid state disk.

Fig. 1 is a top view of a solid state disk, illustrating a top surface of an m.2 2280 solid state disk. As shown in fig. 1, the solid state disk 100 includes a printed circuit board 101 and a plurality of components 102 disposed on the printed circuit board 101, where the components 102 may be connected by wires on a PCB to form different signal links. A golden finger area is provided at one side edge of the top surface of the printed circuit board 101, a plurality of golden fingers 103 are included in the golden finger area, the golden finger area and the plurality of golden fingers 103 can be symmetrically provided at the same side edge of the bottom surface of the printed circuit board 101, and the solid state disk 100 can be connected with other devices through the plurality of golden fingers 103, for example, can be connected to a motherboard of a computer. As shown in fig. 1, according to the specifications of the peripheral component interconnect (PERIPHERAL COMPONENT INTERCONNECT SPECIAL INTEREST Group, PCI-SIG) association, the meaning of "2280" in the solid state disk 2280 is that the width D of the solid state disk 100 is 22mm, the length L of the solid state disk 100 is 80mm, and the overall shape of the m.2 2280 solid state disk is in a strip shape, as shown in fig. 1, a plurality of components 102 are disposed on the surface of the m.2 2280 solid state disk, which is limited by the size requirement of the m.2 2280 solid state disk, and the plurality of components 102 are closely arranged and very close to each other. The solid state disk in the strip shape also comprises 22110 solid state disk, and according to the specification of the PCI-SIG society, the meaning of 22110 is that the width D of the solid state disk is 22mm, the length L of the solid state disk is 110mm, and the shape of the 22110 solid state disk is more long and narrow. In fig. 1, only the top view structure of the m.2 2280 solid state disk is illustrated, and the structures of the other types of solid state disks are similar to those of the m.2 2280 solid state disk, which is not described herein again.

Fig. 2 is a cross-sectional view of a printed circuit board in the solid state disk of fig. 1. As shown in fig. 2, the printed circuit board 101 includes a plurality of conductive layers 11, and insulating layers 10 disposed between adjacent conductive layers 11, the conductive layers 11 and the insulating layers 10 being alternately stacked in order. The thickness of the plurality of conductive layers 11 is substantially the same in a direction perpendicular to the printed circuit board 101. The plurality of conductive layers 11 may include a top conductive layer 11-1 and a bottom conductive layer 11-2, the top conductive layer 11-1 and the bottom conductive layer 11-2 sandwiching the remaining conductive layers 11 and the insulating layer 10. According to the specifications of the PCI-SIG association, the thickness H of the 2280 solid state disk, which is the distance between opposite side surfaces of the gold fingers 103 disposed on the top and bottom surfaces of the printed circuit board 101, may be referred to as a top gold finger, and the gold fingers disposed on the bottom surface of the printed circuit board 101 may be referred to as a bottom gold finger, is 0.8 mm. As shown in connection with fig. 2, a plurality of gold fingers 103 may be respectively located at the same side edges of the top conductive layer 11-1 and the bottom conductive layer 11-2, and the material of the conductive layer 11 may include copper.

Taking the solid state disk m.2 2280 shown in fig. 1 as an example, in the case that the size of the solid state disk is a fixed parameter, the higher density of flash memory particles, such as NAND flash memory particles, must be arranged on the printed circuit board 101, and the more the number of flash memory particles, the denser the components 102 and wires that need to be arranged on the printed circuit board 101. The inventor of the present application has found through research that, in the process of assembling the component 102 and the printed circuit board 101 by using the surface assembly technology (Surface Mount Technology, SMT), the printed circuit board 101 is easy to generate warp deformation after reflow soldering, such as the warp degree of the printed circuit board 101 in a strip shape in fig. 1 is particularly obvious, and in the case that the component 102 and the wires arranged on the printed circuit board 101 are dense, the warp deformation easily damages physical structures on the signal link, such as tin balls, bonding pads, hole copper, etc., so that the solid state disk 100 is damaged to lose functions, and signal crosstalk between adjacent wires on the printed circuit board 101 is easy to generate influence on the operation of the solid state disk 100. In addition, in the subsequent process of performing reliability test on the solid state disk 100, the thermal expansion and contraction at high and low temperatures can increase the internal stress of the printed circuit board 101, aggravate the severity of warpage, and further increase the probability of damage or signal crosstalk of the solid state disk. When the solid state disk 100 is applied to an application scene with a large temperature change, the service life of the solid state disk 100 is short.

The embodiment of the application provides a printed circuit board, which comprises a plurality of stacked conductive layers, wherein the conductive layers comprise a top conductive layer and a bottom conductive layer which are positioned at the outermost side in the direction perpendicular to the printed circuit board, the printed circuit board comprises a top golden finger and a bottom golden finger which are respectively arranged on the top surface, and the distance between the opposite side surfaces of the top conductive layer and the bottom conductive layer in the direction perpendicular to the printed circuit board is a first distance, and the distance between the opposite side surfaces of the top golden finger and the bottom golden finger is a second distance, and the first distance is larger than the second distance.

According to the printed circuit board provided by the embodiment of the application, the first distance between the opposite side surfaces of the top conducting layer and the bottom conducting layer is larger than the second distance between the opposite side surfaces of the top golden finger and the bottom golden finger, so that the maximum thickness of the printed circuit board is larger than the standard thickness of the printed circuit board in the specification of the PCI-SIG society, the rigidity of the printed circuit board is increased, and the deformation resistance of the printed circuit board is stronger and is not easy to warp. The printed circuit board can bear cold and hot alternation in a larger temperature range on the premise of not replacing materials with better thermal expansion coefficients, ensures long-term stable work of the printed circuit board in a severe working environment, can save cost and is suitable for popularization and use.

Fig. 3 is a cross-sectional view of a printed circuit board in an exemplary embodiment. As shown in fig. 3, the printed circuit board 101 includes a plurality of stacked conductive layers 11, and an insulating layer 10 disposed between adjacent conductive layers 11, and in fig. 3, the printed circuit board 101 is illustrated as including ten stacked conductive layers 11, and the printed circuit board 101 may include more or less conductive layers 11 as needed, which is not limited in this regard. The plurality of conductive layers 11 include a signal layer and a plane layer, which may be a power layer or a ground layer, and the power layer can provide power and the ground layer can have a ground effect. The printed circuit board 101 includes a first laminate 12, and signal layers and plane layers alternately arranged in this order on both sides of the first laminate 12, and the first laminate 12 includes at least two signal layers or at least two plane layers. As shown in fig. 3, the first laminate 12 includes adjacent first and second planar layers 21-1 and 21-2, and the first and second planar layers 21-1 and 21-2 may each be a power plane, or the first and second planar layers 21-1 and 21-2 may include a power plane and a ground plane, which is not limited in this regard by the present application. In the case where the first laminate 12 is a planar layer, the signal layers and the planar layers may be sequentially and alternately disposed on both sides of the first laminate 12, for example, the first signal layer 22-1, the third planar layer 21-3, the third signal layer 22-3, the fifth planar layer 21-5, the fifth signal layer 22-5, and the seventh planar layer 21-7 may be sequentially disposed above the first laminate 12, the seventh planar layer 21-7 may be a top conductive layer, the second signal layer 22-2, the fourth planar layer 21-4, the fourth signal layer 22-4, the sixth planar layer 21-6, the sixth signal layer 22-6, and the eighth planar layer 21-8 may be a bottom conductive layer, and the components may be subsequently disposed on at least one of the top conductive layer and the bottom conductive layer. The film layer between the top conductive layer and the first stack 12, and the film layer between the first stack 12 and the bottom conductive layer may be referred to as an intermediate conductive layer, the number of intermediate conductive layers may be set as needed, and the plurality of planar layers may be set as a power layer or a ground layer as needed, which is not limited in this application.

As shown in fig. 3, in a direction perpendicular to the printed circuit board 101, a distance between opposite side surfaces of the top conductive layer and the bottom conductive layer of the printed circuit board 101 is H1, the first distance H1 is a maximum thickness of the printed circuit board 101, a distance between opposite side surfaces of the gold finger 103 disposed on the top surface and the bottom surface of the printed circuit board 101 is a second distance H2, the second distance H2 is a standard thickness of the PCI-SIG association specification, and the first distance H1 is greater than the second distance H2. By setting the first distance H1 to be greater than the second distance H2, the thickness of the printed circuit board 101 and the number of the included film layers can be increased under the condition that the printed circuit board 101 meets the standard thickness of the PCI-SIG association, so that the rigidity of the printed circuit board 101 is increased, the deformation resistance of the printed circuit board 101 is stronger, warpage is not easy to occur, the number of the film layers for arranging wires in the printed circuit board 101 is increased, the wiring space of the printed circuit board 101 is more sufficient, the flexible adjustment of the spacing between the wires is facilitated, the probability of signal crosstalk between the wires is reduced, the integrity of transmission signals can be ensured, more possibilities are provided for the layout design of the wires, and normal and stable operation can be ensured even under the condition that the printed circuit board 101 is warped to a certain extent. In addition, the printed circuit board 101 provided in this embodiment can be prepared from the existing material, and has small modification to the existing process, and the material with better thermal expansion coefficient does not need to be replaced, so that the cost can be saved, and the printed circuit board is suitable for popularization and use.

In an exemplary embodiment, as shown in fig. 3, the gold finger 103 on the top surface of the printed circuit board 101 may be disposed on the third plane layer 21-3, the gold finger 103 on the bottom surface of the printed circuit board 101 may be disposed on the bottom conductive layer, and in a direction perpendicular to the printed circuit board 101, the orthographic projection of the plurality of film layers on the printed circuit board 101 in the direction of the third plane layer 21-3 away from the first stack 12 and the orthographic projection of the gold finger 103 do not overlap, and the plurality of film layers on the direction of the third plane layer 21-3 away from the first stack 12 may be disposed outside the gold finger region on the top surface of the printed circuit board 101. The number and thickness of the film layers included in the printed circuit board 101 and the film layer where the gold finger 103 is located may be set according to the need, which is not limited in the present application.

In other embodiments, the first stack 12 may include two adjacent signal layers, where in the case of the first stack 12 being a signal layer, two sides of the first stack 12 may be alternately provided with a plane layer and a signal layer in turn, and the top conductive layer and the bottom conductive layer may also be signal layers.

In an exemplary embodiment, when the printed circuit board 101 shown in fig. 3 is applied to a solid state disk, the second distance H2 of the printed circuit board 101 in fig. 3 is the thickness H of the solid state disk, and when the PCI-SIG association specification is satisfied, the printed circuit board 101 has better rigidity and stronger bending resistance, so that a solid state disk with better stability and reliability can be obtained, and the damage risk of the solid state disk is reduced.

Fig. 4is a cross-sectional view of a printed circuit board in yet another exemplary embodiment. Fig. 4 differs from fig. 3 in that the thickness of the first planar layer 21-1 and the second planar layer 21-2 is greater than that of the signal layer, and the remainder of the description of fig. 3 is omitted herein.

In an exemplary embodiment, as shown in FIG. 4, the thickness H3 of the first planar layer 21-1 may be greater than or equal to 60 microns and less than or equal to 80 microns, e.g., the thickness H3 of the first planar layer 21-1 may be about 70 microns, and in preparation, the thickness H3 of the first planar layer 21-1 may be about 2oz,1oz representing the thickness achieved by a 1 ounce (oz) weight of copper uniformly tiled over a 1 square foot (FT ²) area. The thickness H4 of the second planar layer 21-2 may refer to the thickness H3 of the first planar layer 21-1, which will not be described herein, and the thickness H3 of the first planar layer 21-1 and the thickness H4 of the second planar layer 21-2 may be set as required, for example, the thickness H3 of the first planar layer 21-1 and the thickness H4 of the second planar layer 21-2 may be substantially equal, which is not limited in the present application.

In this embodiment, since the first planar layer 21-1 and the second planar layer 21-2 are located in the middle of the plurality of conductive layers, the rigidity of the printed circuit board 101 can be significantly improved by setting the thicknesses of the first planar layer 21-1 and the second planar layer 21-2 to be greater than those of the remaining conductive layers, so that the deformation resistance of the printed circuit board 101 is stronger, and since the first planar layer 21-1 and the second planar layer 21-2 include the power supply layer, the current passing capability and the heat dissipation capability of the power supply can be increased by increasing the thicknesses of the power supply layers, and the performance of the printed circuit board 101 is improved, thereby helping to ensure long-term stable operation of the printed circuit board 101.

In an exemplary embodiment, since different conductive layers are electrically connected through the through holes, the thickness of the first planar layer 21-1 may be set according to the "thickness-to-diameter ratio" requirement of the through holes disposed in the first planar layer 21-1, and other conditions may be used to set the thickness of the first planar layer 21-1, which is not limited in the present application. The thickness design principle of the second planar layer 21-2 may be similar to that of the first planar layer 21-1, and will not be described herein.

In other embodiments, any of the remaining planar layers of the printed circuit board 101 may be provided with a greater thickness than the signal layer, which may help to further increase the resistance to deformation of the printed circuit board 101, as the application is not limited in this regard. Through tests, the solid state disk formed by the printed circuit board 101 with the structure shown in fig. 4 can withstand cold and hot impact at-40 ℃ to 125 ℃, can continuously and stably work in the temperature range, and greatly improves the working reliability of the solid state disk.

Fig. 5 is a cross-sectional view of a printed circuit board in yet another exemplary embodiment. Fig. 5 differs from fig. 4 in that the location of the gold finger 103 on the bottom surface of the printed circuit board 101 is different, and the rest of the disclosure may refer to the foregoing description of fig. 4, which is not repeated herein.

In an exemplary embodiment, as shown in fig. 5, the gold finger 103 on the bottom surface of the printed circuit board 101 may be disposed on the fourth plane layer 21-4, and the front projection of the gold finger 103 and the front projection of the film layers on the printed circuit board 101 in the direction of the fourth plane layer 21-4 away from the first stack 12 may not overlap, and the film layers on the fourth plane layer 21-4 in the direction of the first stack 12 may be disposed outside the gold finger region on the top surface of the printed circuit board 101. The number and thickness of the film layers included in the printed circuit board 101 and the film layer where the gold finger 103 is located may be set according to the need, which is not limited in the present application.

In this embodiment, by disposing the gold finger 103 on the top surface of the printed circuit board 101 on the film layer of the top conductive layer near the first stack 12 and disposing the gold finger 103 on the bottom surface of the printed circuit board 101 on the film layer of the bottom conductive layer near the first stack 12, when the printed circuit board 101 meets the standard thickness of the PCI-SIG association, the thickness of the printed circuit board 101 itself and the number of the included film layers can be further increased, and parameters such as the number of the film layers included in the printed circuit board 101, the film layers where the gold finger 103 on the top surface and the gold finger 103 on the bottom surface of the printed circuit board 101 are located, and the thickness of each film layer can be set according to the requirement.

The process of forming the printed circuit board 101 shown in fig. 4 is briefly described below, and an inexhaustible description may be made with reference to the existing manufacturing technology.

S1, cutting the core plate into a proper size.

In this step, the core plate may be cut to an appropriate size as needed.

And S2, forming a circuit pattern of the first laminated layer 12.

In this step, the wiring patterns of the first and second planar layers 21-1 and 21-2 may be formed by electroplating or the like, respectively, and the thicknesses of the first and second planar layers 21-1 and 21-2 may be adjusted by controlling the electroplating process.

And S3, laminating the first signal layer 22-1, the second signal layer 22-2 and the first laminated layer 12 by using the prepreg to form a four-layer board.

In this step, the prepreg may be PP film, and the first signal layer 22-1 and the second signal layer 22-2 may be sandwiched between the outer sides of the first laminate 12, and after lamination, a four-layer board is formed.

S4, forming a circuit pattern of the third plane layer 21-3 and a circuit pattern of the fourth plane layer 21-4.

In this step, the wiring pattern of the third planar layer 21-3 and the wiring pattern of the fourth planar layer 21-4 may be formed by plating or the like, and the thickness of the third planar layer 21-3 and the thickness of the fourth planar layer 21-4 may be set as necessary.

And S5, laminating the third plane layer 21-3, the fourth plane layer 21-4 and the four layers obtained in the step S3 by using prepregs to form six layers.

In this step, the third and fourth flat layers 21-3 and 21-4 may be sandwiched outside the aforementioned four layers, and after lamination, six layers may be formed.

S6, manufacturing a solder resist on the third plane layer 21-3, and attaching an adhesive tape.

In this step, a window may be formed on the third planar layer 21-3 on a side far from the first laminate 12 by solder resist, a plurality of plating baths may be formed in the gold finger area, and an adhesive tape may be attached to the gold finger area to protect the gold finger area. The golden finger 103 may be subsequently formed in a plating bath, and the size of the plating bath may be larger than the size of the golden finger 103.

And S7, repeating the steps S4 and S5, sequentially forming a third signal layer 22-3 and a fourth signal layer 22-4, a fifth plane layer 21-5 and a sixth plane layer 21-6, a fifth signal layer 22-5 and a sixth signal layer 22-6, a seventh plane layer 21-7 and an eighth plane layer 21-8 on two sides of the six-layer board by lamination, and forming the multi-layer board.

And S8, drilling and electroplating the multilayer board obtained in the step S7, and forming electrical connection between different conductive layers.

And S9, forming a circuit pattern of the top conductive layer and a circuit pattern of the bottom conductive layer.

And S10, manufacturing a solder resist on the bottom conductive layer to form a gold finger area at the bottom.

And S11, carrying out surface treatment on the areas except the golden finger areas of the top conductive layer and the bottom conductive layer.

S12, performing depth-control electric milling on the surface layer of the golden finger region, and milling out the golden finger of the third plane layer 21-3.

In this step, the third signal layer 22-3, the fifth plane layer 21-5, the fifth signal layer 22-5, and the seventh plane layer 21-7 located in the gold finger area may be removed in a direction perpendicular to the multilayer board, exposing the adhesive tape attached in step S6. In the foregoing lamination process, the third signal layer 22-3, the fifth plane layer 21-5, the fifth signal layer 22-5 and the seventh plane layer 21-7 maintain the whole structure, so that the pressure from the upper and lower sides in the lamination process can be ensured to be uniform, and the lamination effect can be ensured.

And S13, tearing off the adhesive film attached to the golden finger area, and performing chemical cleaning.

And S14, forming the golden finger 103 in the golden finger area through electroplating.

Thus, the preparation of the printed circuit board 101 with the structure shown in fig. 4 is completed, and then components can be welded on the surface of the top conductive layer and the surface of the bottom conductive layer to form a solid state disk, and other electronic products can also be formed by using the printed circuit board 101.

The embodiment of the application also provides a solid state disk, which comprises the printed circuit board.

The embodiment of the application also provides electronic equipment, which comprises the printed circuit board. For example, the electronic device may include a storage device, which may include a solid state disk as described above, or the electronic device may directly include a printed circuit board as described above, which is not limited by the present application.

In the description of the present application, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "first," "second," etc. can include at least one such feature, either explicitly or implicitly.

In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.

In the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and for example, "connected" may be either permanently connected or removably connected or integrally formed, mechanically connected or electrically connected, directly connected or indirectly connected via an intervening medium, or may be in communication between two elements or in an interaction relationship between two elements, unless otherwise explicitly specified. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.

In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.

While embodiments of the present application have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the application, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the application.

Claims (10)

1. A printed circuit board, comprising a plurality of stacked conductive layers, wherein in a direction perpendicular to the printed circuit board, the plurality of conductive layers include a top conductive layer and a bottom conductive layer located at the outermost sides, and the printed circuit board includes a top gold finger arranged on a top surface and a bottom gold finger arranged on a bottom surface, respectively; characterized in that in a direction perpendicular to the printed circuit board, a distance between opposite side surfaces of the top conductive layer and the bottom conductive layer is a first distance, a distance between opposite side surfaces of the top gold finger and the bottom gold finger is a second distance, and the first distance is greater than the second distance. 2. The printed circuit board according to claim 1, wherein the plurality of conductive layers further comprises a plurality of intermediate conductive layers located between the top conductive layer and the bottom conductive layer; wherein The top gold finger is located in one of the middle conductive layers, and the bottom gold finger is located in the bottom conductive layer; or, the top gold finger is located in the top conductive layer, and the bottom gold finger is located in one of the middle conductive layers; or, the top gold finger and the bottom gold finger are respectively located in different middle conductive layers. 3. The printed circuit board according to claim 2 is characterized in that the multiple conductive layers also include a first stack, and the multiple intermediate conductive layers are sandwiched on both sides of the first stack, and the first stack includes at least two stacked signal layers or at least two stacked plane layers; wherein the signal layer is used to transmit signals, and the plane layer is configured to provide power supply or grounding. 4. The printed circuit board according to claim 3 is characterized in that the first stack includes two stacked plane layers; in the direction away from the first stack, the multiple conductive layers include the signal layers and the plane layers alternately arranged in sequence, and in the direction perpendicular to the printed circuit board, the thickness of at least one of the plane layers is greater than the thickness of the signal layer. 5. The printed circuit board according to claim 3 is characterized in that the first stack includes two stacked signal layers, in the direction away from the first stack, the multiple conductive layers include the planar layers and the signal layers alternately arranged in sequence, and in the direction perpendicular to the printed circuit board, the thickness of at least one of the planar layers is greater than the thickness of the signal layer. 6 . The printed circuit board according to claim 4 , wherein the first stack comprises a first plane layer and a second plane layer, and the thickness of the first plane layer and the thickness of the second plane layer are both greater than the thickness of the signal layer. 7. The printed circuit board according to claim 6, characterized in that, in a direction perpendicular to the printed circuit board, the thickness of the first planar layer is greater than or equal to 60 microns and less than or equal to 80 microns, and the thickness of the second planar layer is greater than or equal to 60 microns and less than or equal to 80 microns. 8. The printed circuit board according to claim 6, characterized in that the first plane layer and the second plane layer are configured to provide power; or, one of the first plane layer and the second plane layer is configured to provide power, and the other is configured to be grounded. 9. A solid state hard disk, comprising a printed circuit board as claimed in any one of claims 1 to 8. 10. An electronic device, comprising the printed circuit board according to any one of claims 1 to 8.