CN119224632B - Programmable direct current electronic load based on multimode compatible topology and regulation and control method - Google Patents
Programmable direct current electronic load based on multimode compatible topology and regulation and control method Download PDFInfo
- Publication number
- CN119224632B CN119224632B CN202411755123.6A CN202411755123A CN119224632B CN 119224632 B CN119224632 B CN 119224632B CN 202411755123 A CN202411755123 A CN 202411755123A CN 119224632 B CN119224632 B CN 119224632B
- Authority
- CN
- China
- Prior art keywords
- mode
- pga
- voltage
- adjusts
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/40—Testing power supplies
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Automation & Control Theory (AREA)
- Control Of Voltage And Current In General (AREA)
Abstract
The invention discloses a programmable direct current electronic load based on a multimode compatible topology and a regulating and controlling method thereof, wherein a subtracter, a DAC multiplier, a PGA, an analog adder, a current feedback comparator, a main DSP controller, a DAC1 and a DAC2 in the electronic load form the multimode compatible topology, the main DSP controller is used for respectively controlling the DAC1, the DAC2, the DAC multiplier and the PGA through setting four parameters of D_Vset, D_Iset, D_Rset and D_PGA in the multimode compatible topology, so that the electronic load works in a specific mode or is switched in a mode to realize accurate test of a tested power supply, and CC, CR, CV, LED modes are realized to test the tested power supply in the multimode compatible topology, and no interruption is caused continuously under any two-to-two switching among CC, CR, CV, LED modes.
Description
Technical Field
The invention relates to the technical field of power automation, in particular to a programmable direct current electronic load based on multimode compatible topology and a regulating and controlling method.
Background
Various power supplies such as a switch power supply, a charger, a generator, an LED power supply and the like all need to be tested for output characteristics, a resistor is used as a load in the traditional testing method, but the resistor is difficult to realize quick and accurate control, the requirement of production automation is difficult to meet, and an electronic load is a technical scheme for solving the problem.
The electronic load is based on a negative feedback control technology of the MOS-FET, and the electronic load adjusts the G pole voltage of the MOS-FET according to feedback of electric signals such as voltage and current, so as to adjust the current between the D pole and the S pole of the MOS-FET, thereby realizing the accurate control of a plurality of load modes such as CC, CR, CP, CV, LED.
The traditional electronic load has the defects that the negative feedback mode is single, the switching of different load modes is based on software simulation or hardware switching of different feedback loops, the control precision and the bandwidth of the negative feedback mode are limited to a certain extent, the feedback loop hardware switching of the negative feedback mode can generate an interrupt process, and the interrupt process is limited in a plurality of detection applications, particularly in the detection applications of a programmable power supply and a digital power supply, and the range of the detection application is limited. In addition, in the conventional electronic load, the CV mode is usually easy to oscillate because the feedback depth is not adjustable, the CR mode is usually software servo to the input voltage based on the current feedback loop and is easy to oscillate, and the LED mode is usually software servo to the input voltage based on the current feedback loop and is difficult to adapt to the test requirement of the LED in the dimming mode.
Disclosure of Invention
Aiming at the defects in the prior art, the invention discloses a programmable direct current electronic load and a regulating and controlling method based on a multimode compatible topology, which realize that CC, CR, CV, LED four modes are used for testing a tested power supply in one multimode compatible topology, and any two of the CC, CR, CV, LED four modes are switched continuously without interruption.
The technical scheme is that the following technical scheme is adopted to achieve the technical purpose.
A programmable direct current electronic load based on a multimode compatible topology comprises a main DSP controller, a DAC1, a DAC2, an MOS-FET and a driving module thereof, a current signal conditioning circuit, a current feedback comparator, a sampling resistor, a voltage signal conditioning circuit, a subtracter, a DAC multiplier, a PGA and an analog adder, wherein a tested power supply is respectively connected with the MOS-FET and the driving module thereof, the sampling resistor and the voltage signal conditioning circuit, the voltage signal conditioning circuit is connected with the DAC1 through the subtracter, the DAC multiplier, the PGA, the analog adder and the current feedback comparator in sequence, the sampling resistor is connected with the current feedback comparator through the current signal conditioning circuit, the main DSP controller is respectively connected with the MOS-FET and the driving module thereof, the DAC1, the DAC multiplier and the PGA, the current feedback comparator, the main DSP controller, the DAC1 and the DAC2 form the multimode compatible topology, in the multimode compatible topology, and the main DSP controller is used for respectively controlling the DAC1, the DAC2 and the DAC multiplier through setting of four parameters of D_Vset, D_Iset, D_Rset and D_Rset, so that the specific modes of the two modes of the electric load can be switched between any two modes, namely, the two modes of the specific modes of operation and the four modes of the test are switched, and the mode of the mode is 5326.
Preferably, in the main DSP controller, d_vset is input to DAC1, and DAC1 is used for performing digital-to-analog conversion on d_vset, and outputting the voltage reference value Vset to the subtractor; the positive input signal of the subtracter is a fifth voltage Vf, the negative input signal is a voltage reference value Vset, and the voltage reference value Vset and the fifth voltage Vf are subtracted to be used as output signals and fed back to the DAC multiplier; the fifth voltage Vf is an output signal of the voltage signal conditioning circuit, the voltage signal conditioning circuit is used for collecting the voltage Vin of a tested power supply, the voltage Vin of the tested power supply is amplified by the voltage signal conditioning circuit and then outputs the fifth voltage Vf, D_Rset is input to the DAC multiplier, the DAC multiplier is used for multiplying digital-to-analog conversion and proportional amplification of output signals of the two inputs, namely D_Rset and the subtracter, the first voltage V1 is output to the PGA, the D_PGA is input to the PGA, the PGA is used for multiplying digital-to-analog conversion and gain amplification of the two inputs, namely D_PGA and the first voltage V1, the second voltage V2 is output to the analog adder, the D_Iset is input to the DAC2, the DAC2 is used for multiplying the current reference value Iset and the analog adder, the third voltage V3 is output after the analog adder is used for superposing the two inputs, namely the current reference value Iset and the second voltage V2, and is fed back to the current feedback comparator as a positive input signal of the current feedback comparator, a negative input signal of the current feedback comparator is an output signal of the current signal conditioning circuit, namely the first current signal is output to the analog signal conditioning circuit, the current signal conditioning circuit is used for comparing the current of the tested power supply, the current signal conditioning circuit is output to the current signal conditioning circuit is used for comparing the current of the measured current signal with the current signal of the measured power supply, the first current If and the third voltage V3 are compared and output, the output signal is a fourth voltage signal V4, and the fourth voltage signal V4 is used for driving the MOS-FET and the driving module thereof, so as to control the power supply to be tested.
Preferably, the system further comprises a human-computer interface and upper computer software, the external mode instruction received by the main DSP controller is obtained from the human-computer interface or the upper computer software, and the external mode instruction comprises that the electronic load works in a specific mode or is switched.
A regulating and controlling method of a programmable direct current electronic load based on multimode compatible topology is used for regulating and controlling any one of the programmable direct current electronic loads based on multimode compatible topology, a main DSP controller regulates a DAC multiplier and PGA to realize CR on-load mode control, the main DSP controller regulates the DAC multiplier, the PGA and DAC1 to realize LED on-load mode control, the main DSP controller regulates the DAC multiplier and PGA gain and servo-regulates DAC2 according to measured current to realize CV on-load mode control of adjustable feedback depth, the main DSP controller regulates DAC2 to realize CC on-load mode control, arbitrary two-two mode switching among CC, CR, CV, LED modes is realized in multimode compatible topology, and the switching process is continuous and uninterrupted.
Preferably, in the CC mode, the main DSP controller sets D_Rset to 0, D_PGA is set to the maximum value, the multimode compatible topology is used as a current negative feedback loop, in a stable state, D_Iset=Iout is represented by K4+B4, wherein Iout is a current signal of a power supply to be tested, K4 and B4 are constants, and the main DSP controller realizes constant control of the current signal of the power supply to be tested in the electronic load CC mode by adjusting the size of D_Iset.
Preferably, in CV mode, the main DSP controller adjusts d_pga, d_rset to a set feedback depth value d_rset/d_pga, and the multimode compatible topology is used as a voltage negative feedback loop, and in steady state, servo adjustment is implemented to realize d_iset=iout k4+b4, where Iout is a current signal of the power supply under test, K4 and B4 are constants, and at this time, d_vset=k6+b6, K6 and B6 are constants, and the main DSP controller implements constant control of the voltage Vin of the power supply under test in CV mode of the electronic load by adjusting the magnitude of d_vset.
Preferably, in the CR mode, the main DSP controller sets d_vset and d_iset to 0, the multimode compatible topology is used as a negative feedback loop of the resistor, d_pga/d_rset=vin/Iout k5+b5, where K5 and B5 are constants, and the main DSP controller controls the accurate control of the measured power equivalent impedance Vin/Iout in the CR mode of the electronic load by adjusting the magnitudes of d_pga and d_rset and the value of d_pga/d_rset.
Preferably, in the LED mode, the main DSP controller sets d_iset to 0 and the multimode compatible topology is used as an LED negative feedback loop, where iout=d_rset/d_pga (d_vset/65535 Vref- (k1+vjn+b1)), and the main DSP controller adjusts the magnitudes of d_vset, d_pga, and d_rset to make d_vset=k6×vf+b6, and make d_pga/d_rset=rd×k5+b5, where K1, B5, K6, and B6 are constants, and Vref is constants, so as to realize accurate control of the on-voltage VF and the equivalent series resistance Rd in the electronic load LED mode.
Preferably, when switching from the CC mode to the CV mode, the main DSP controller adjusts D_PGA and D_Rset to set feedback depth values, adjusts D_Vset to set voltage, and finally uses the measured value of the pull-up current of the electronic load to servo D_Iset to realize switching; when the CC mode is switched to the CR mode, the main DSP controller firstly adjusts D_Vset to 0, then adjusts D_Iset to 0, and finally adjusts D_PGA and D_Rset to set resistance values; when the CC mode is switched to the LED mode, the main DSP controller adjusts D_Vset to set VF value, then adjusts D_Iset to 0, and finally adjusts D_PGA and D_Rset to set resistance Rd value;
the main DSP controller adjusts D_Rset to 0, adjusts D_PGA to 65535 and then adjusts D_Iset to a set current value when switching from CV mode to CR mode, adjusts D_PGA and D_Rset to a set resistance value and then adjusts D_Vset to 0 when switching from CV mode to LED mode, adjusts D_PGA and D_Rset to a set Rd value, adjusts D_Iset to 0 and finally adjusts D_Vset to a set VF value when switching from CV mode to LED mode;
When switching from CR mode to CC mode, the main DSP controller adjusts D_Rset to 0, D_PGA to 65535, and then D_Iset to the set current value; when the CR mode is switched to the CV mode, the main DSP controller adjusts D_Vset to a set voltage value, then adjusts D_Rset and D_PGA to a set feedback depth value, and finally uses an electronic load to pull a measured value of current to servo D_Iset;
The main DSP controller adjusts D_Rset to 0, adjusts D_PGA to 65535 and then adjusts D_Iset to a set current value when switching from the LED mode to the CV mode, adjusts D_Rset and D_PGA to a set feedback depth and then adjusts D_Vset to a set voltage value, and finally uses an electronic load to pull a measured value of current to servo D_Iset when switching from the LED mode to the CR mode, and adjusts D_Rset and D_PGA to a set resistance value and then adjusts D_Vset to 0.
The beneficial effects are that:
1. The invention realizes that CC, CR, CV, LED modes test the tested power supply in a multimode compatible topology, and the power supply is continuously and uninterruptedly switched between CC, CR, CV, LED modes in any pair;
2. The invention realizes the CR mode and the LED mode through the multimode compatible topology of hardware, and the control precision and the universality are superior to those of the common electronic load adopting the software servo CR mode and the LED mode;
3. The CV mode with feedback depth control of the present invention is more versatile than CV mode with fixed feedback depth, or common electronic loads with multiple feedback depth adjusted CVs.
Drawings
FIG. 1 is a diagram of an electronic load structure in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of VI in CC mode according to an embodiment of the present invention;
FIG. 3 is a schematic diagram showing a VI in CV mode according to an embodiment of the present invention;
FIG. 4 is a schematic diagram showing a VI in CR mode according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of VI in LED mode according to an embodiment of the invention;
fig. 6 is a schematic diagram of signal flow according to an embodiment of the invention.
Detailed Description
In order to make the present application better understood by those skilled in the art, the following description will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings, and it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, unit forms are also intended to include plural forms, and furthermore, it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
As shown in FIG. 1, the Programmable DC electronic load based on the multimode compatible topology in this embodiment comprises a main DSP controller, a DAC1, a DAC2, a MOS-FET and a driving module thereof, a current signal conditioning circuit, a current feedback comparator, a sampling resistor, a voltage signal conditioning circuit, a subtracter, a DAC multiplier, a PGA (Programmable gain amplifier) and an analog adder, wherein a tested power supply is respectively connected with the MOS-FET and the driving module thereof, the sampling resistor and the voltage signal conditioning circuit, the voltage signal conditioning circuit is connected with the DAC1 through a subtracter, the DAC multiplier and the PGA, the analog adder and the current feedback comparator are sequentially connected with the sampling resistor and the current feedback comparator, the main DSP controller is respectively connected with the MOS-FET and the driving module thereof, the DAC1, the DAC2, the DAC multiplier and the PGA, the subtracter, the DAC multiplier, the analog adder, the current feedback comparator, the main DSP controller, the DAC1 and the DAC2 form the multimode compatible topology, the main DSP controller is used for switching between two specific modes of the two modes of the electric load according to the specific modes of D_et, D_Iset, D_Isset, D_Rset, and PGA_Rset, and four modes of the specific modes of the two modes of the electric load are switched between the specific modes of the two modes of the electric load, and the specific modes of the four modes of the test mode is switched.
The main DSP controller is connected with the human-computer interface and the upper computer software, external mode instructions received by the main DSP controller are obtained from the human-computer interface or the upper computer software, and the main DSP controller sets four parameters of D_Vset, D_Iset, D_Rset and D_PGA to match a feedback loop topological structure corresponding to a preset working mode and set related parameters so as to realize the adjustment and precise control of the electronic load. The main DSP controller is implemented by using an existing module, which is not described herein.
The main DSP controller is connected with the upper computer software through the RS232 communication interface and the SCPI protocol, receives instructions of the upper computer software, realizes various working modes of the electronic load and the loading of specified parameters, feeds back the measured electric parameters and the working states to the upper computer software, further realizes remote control and electric parameter monitoring of the electronic load, and linkage of the electronic load and other instruments, and further realizes automatic detection of a tested power supply. For this purpose, a programmable dc electronic load based on a multimode compatible topology in this embodiment further includes an electrical parameter measurement unit for acquiring an electrical parameter of the power under test through the main DSP controller, and the connection relationship thereof is not shown in fig. 1.
As shown in fig. 6, in the main DSP controller, d_vset is input to DAC1, and DAC1 is used for performing digital-to-analog conversion on d_vset, and outputting a voltage reference value Vset to the subtractor; the positive input signal of the subtracter is a fifth voltage Vf, the negative input signal is a voltage reference value Vset, and the voltage reference value Vset and the fifth voltage Vf are subtracted to be used as output signals and fed back to the DAC multiplier; the fifth voltage Vf is an output signal of a voltage signal conditioning circuit, the voltage signal conditioning circuit is used for collecting the voltage Vin of a tested power supply, the voltage Vin of the tested power supply is amplified by the voltage signal conditioning circuit and then outputs the fifth voltage Vf, D_Rset is input to a DAC multiplier, the DAC multiplier is used for multiplying digital-to-analog conversion and proportional amplification of output signals of the two inputs, namely D_Rset and a subtracter, the first voltage V1 to PGA is output, the D_PGA is input to the PGA, the PGA is used for multiplying digital-to-analog conversion and gain amplification of the two inputs, namely D_PGA and the first voltage V1, the second voltage V2 is output to an analog adder, the D_Iset is input to a DAC2, the DAC2 is used for digital-to-analog conversion of the D_Iset, the output current reference value Iset is output to the analog adder, the analog adder is used for superposing the two inputs, namely the current reference value Iset and the second voltage V2 and then outputting a third voltage V3, and feeding back to a current feedback comparator is used as a positive input signal of the current feedback comparator, a negative input signal of the current feedback comparator is an output signal of the current signal conditioning circuit, namely a first current signal conditioning circuit, namely an output current conditioning circuit is used for collecting a first current signal and an If, a current signal is used for comparing a current signal of the first current If is output, and an If is used for outputting a current signal conditioning circuit, the third voltage V3 is compared and output, the output signal is a fourth voltage signal V4, and the fourth voltage signal V4 is used for driving the MOS-FET and the driving module thereof so as to control the tested power supply;
The voltage signal conditioning circuit is used for collecting the voltage Vin of the tested power supply, outputting a fifth voltage Vf after the voltage Vin of the tested power supply is amplified by the voltage signal conditioning circuit, and the fifth voltage Vf is sent to the ADC converter of the electric parameter measuring unit to finish the precise detection of the voltage and is used for the servo application of various algorithms. Meanwhile, the fifth voltage Vf also participates in feedback as a positive input of the subtractor, being enabled in the CR mode, the CV mode, and the LED mode, and the output of the DAC1 participates in feedback as a negative input of the subtractor, being enabled in the CR mode, the CV mode, and the LED mode. As shown in fig. 2-5, a schematic VI diagram is shown for the CC, CV, CR, LED modes. The invention realizes the test of the tested power supply in CC, CR, CV, LED modes in a multimode compatible topology, and the continuous uninterrupted switching of any two modes among CC, CR, CV, LED modes is realized, thereby avoiding the interruption in the switching process of different modes of the common electronic load.
The sampling resistor is used for collecting the current of the tested power supply and outputting a current signal Iout to the current signal conditioning circuit, the current signal conditioning circuit is used for amplifying the current signal Iout and outputting a first current If, and the first current If is sent to the ADC converter of the electric parameter measuring unit to finish the precise detection of the current and is used for the servo application of various algorithms. Meanwhile, the first current If is also used as the negative input of a current feedback comparator, the output of the analog adder, namely the third voltage V3 is used as the positive input of the current feedback comparator, the output of the current feedback comparator, namely the fourth voltage V4 is used for driving the MOS-FET and the driving module thereof, the tested power supply, the sampling resistor, the current signal conditioning current, the analog adder, the current feedback comparator, the MOS-FET and the driving module thereof form a current negative feedback loop in a multimode compatible topology, and the current negative feedback loop is in a negative feedback stable state, the output of the current signal conditioning circuit, namely the first current If is close to the output of the analog adder, namely the third voltage V3.
The core component of the DAC multiplier is a multiplication DAC converter, the output of the subtracter is used as the analog input of the DAC multiplier, and the main DSP controller controls the proportion of the output V1 to the analog input by adjusting D_Rset. The DAC multiplier outputs in reverse, v1=d_rset/65535 (Vf-Vset), and the DAC multiplier is enabled in CR, CV and LED modes. The DAC multiplier is implemented by using an existing module, which is not described herein.
The core components of the PGA are a precision operational amplifier and a 16-bit multiplying DAC converter, the precision operational amplifier is applied to a topology structure of in-phase amplification, but the multiplying DAC converter is used for replacing two resistors for controlling gain of the same amplifying circuit, and the gain g=65535/d_pga of the PGA. PGA is enabled in CR, CV and LED modes. The PGA is implemented by using an existing module, and will not be described herein.
The analog adder is a two-channel analog adder, and the output of the analog adder is v3=v2+iset and is used as the positive input end of the current feedback comparator to act on a current negative feedback. The analog adder is implemented by using an existing module, and will not be described in detail herein.
The MOS-FET and the driving module thereof are connected in parallel by a plurality of groups of MOS-FETs and current sharing control circuits thereof, the MOS-FETs work in a linear region, electric energy of a tested power supply is converted into heat energy, the heat energy is arranged on an aluminum radiator, hot air is discharged in a forced air cooling mode, the pulling current of the MOS-FET and the driving module thereof and the output voltage of a current feedback comparator show a linear relation, and the accurate control of different working modes is realized under the negative feedback effect of a feedback loop. The MOS-FET and its driving module are realized by the existing module, and are not described here.
In the invention, CC, CR, CV, LED control modes of the electronic load are realized in the same hardware feedback loop, namely the multimode compatible topology. The mode switching does not need to carry out hardware switching, and in the same hardware feedback loop, the main DSP controller can simultaneously regulate 4 DAC converters at most, is respectively used for accurate control of CV voltage/LED starting voltage, CC current, CR equivalent resistor/LED equivalent series connection and CV feedback depth, and completes seamless switching of different working modes.
The topological structure disclosed by the invention can realize negative feedback of voltage and current together in the same feedback loop, and can realize control of 4 parameters including voltage, current, equivalent series resistance and feedback depth simultaneously through the main DSP controller.
A method for regulating and controlling a programmable direct current electronic load based on multimode compatible topology comprises the following steps:
The main DSP controller adjusts the DAC multiplier and the PGA to realize CR load mode control, the main DSP controller adjusts the DAC multiplier, the PGA and the DAC1 to realize LED load mode control, the main DSP controller adjusts the DAC multiplier and the PGA gain and servo adjusts the DAC2 according to the measured current to realize CV load mode control of adjustable feedback depth, and the main DSP controller adjusts the DAC2 to realize CC load mode control.
Wherein Vset= (D_Vset/65535) Vref, D_Vset ε [0,65535], vref is a constant for providing 2.5V voltage reference for DAC1, DAC 2;
Iset=(D_Iset/65535)*Vref;D_Iset∈[0,65535];
Vf=k1+vjn+b1, wherein K1 and B1 are constants and are obtained through a conventional calibration process;
Iout=k2×if+b2, where K2, B2 are constants, obtained by a conventional calibration process;
V1=D_Rset/65535*( Vf- Vset )ci;D_Rset∈[0,65535];
V2=V2=65535/D_PGA*V1 =D_Rset/D_PGA*(Vset-Vf);D_PGA∈[1,65535];
V3=Iset+V2;
iout=k3 v4+b3, K3, B3 being a constant;
if=v3 when the system constitutes stable negative feedback;
In the CC mode, the master DSP controller sets d_rset to 0 and d_pga to a maximum value, for example 65535, and the multimode compatible topology is used as a current negative feedback loop, and since d_rset is set to 0, the output first voltage V1 of the DAC multiplier is 0 and thus the output of PGA is 0, and at this time, the output third voltage V3 of the analog adder is equal to the reference current Iset output by the DAC 2. When the current signal Iout of the tested power supply is increased, the output first current If of the current signal conditioning circuit is synchronously increased, at the moment, the output fourth voltage V4 of the current feedback comparator is reduced, the driving voltage of the MOS-FET and the driving module thereof is reduced, the tested power supply is controlled, the current of the tested power supply collected by the sampling resistor is reduced, the current signal Iout of the tested power supply is forced to be reduced and returned, and current negative feedback is formed, so that the CC mode is realized.
When the negative feedback works stably, D_Iset=Iout is K4+B4, wherein K4 and B4 are constants and are obtained through a calibration process, and at the moment, the main DSP controller realizes accurate control of the pulling load current Iout of the electronic load CC mode by adjusting the size of D_Iset.
When the electronic load works in CV mode, the main DSP controller adjusts D_PGA and D_Rset to set feedback depth value D_Rset/D_PGA, the multimode compatible topology is used as a voltage negative feedback loop, D_Vset is set voltage in CV mode, and D_Rset/D_PGA is set feedback depth in CV mode. D_iset requires a real-time measurement of the servo pull-in current Iout.
When the input voltage Vin of the electronic load increases, the output of the subtracter, the output second voltage V2 of the PGA and the output third voltage V3 of the analog adder also synchronously increase, at this time, the output fourth voltage V4 of the current feedback comparator also synchronously increases, and then the driving voltage of the MOS-FET and the driving module thereof decreases, so as to control the current of the tested power supply collected by the sampling resistor, and further force the load current of the electronic load, that is, the current signal Iout of the tested power supply to synchronously increase, so that the input voltage Vin of the electronic load is forced to decrease and return, and negative feedback is formed.
When the negative feedback is stable, d_vset=k6+vjn+b6+k7 (Iout- (d_iset/65535 vref k2+b2)) ×d_pga/d_rset, where K6, B6, K7, K2, and B2 are constants respectively obtained through a conventional calibration process, and in this embodiment, all K and B are constants obtained during the calibration process. At this time, the main DSP controller continuously adjusts d_iset according to the collected current signal Iout value of the measured power supply, so that d_iset=iout×k4+b4, and iout=d_iset/65535×vref×k2+b2, where d_vset=k6×vin+b6. At this time, the main DSP controller realizes accurate control of the input voltage Vin of the CV mode of the electronic load by adjusting the size of d_vset, and simultaneously, the main DSP controller also controls the feedback depth in the CV mode by adjusting the sizes of d_pga and d_rset and by the value of d_pga/d_rset. The CV mode with feedback depth control of the present invention is more versatile than CV mode with fixed feedback depth, or common electronic loads with multiple feedback depth adjusted CVs.
When the electronic load works in the CR mode, the main DSP controller firstly sets D_Vset of the DAC1 to 0, sets D_Iset of the DAC2 to 0, and uses the multimode compatible topology as a resistor negative feedback loop, wherein the output reference current Iset of the DAC2 is 0, V3=V2, D_PGA/D_Rset=vin/Iout is K5+B5, wherein K5 and B5 are constants, the parameters are obtained through a calibration process, and the main DSP controller controls the accurate control of the equivalent impedance Vin/ut of the CR mode of the electronic load by adjusting the magnitudes of D_PGA and D_Rset and using the value of D_PGA/D_Rset.
When the electronic load works in an LED mode, which is equivalent to the series connection of a constant voltage source VF and an equivalent series resistor Rd, the main DSP controller firstly sets D_Iset of the DAC2 to 0, the multimode compatible topology is used as an LED negative feedback loop, iout=D_Rset/D_PGA (D_Vset/65535 Vref- (K1) and B1) are used as LED negative feedback loops, wherein K1 and B1 are constants respectively, at the moment, the main DSP controller enables D_Vset=K6+B6 by adjusting the magnitudes of D_Vset, D_PGA and D_Rset, enables D_Vset=K5+B5, K6, B6 and B5 to be calibrated constants, and enables accurate control of the starting voltage and the equivalent series resistor Rd under the LED mode of the electronic load to be realized by controlling the D_Vset and the D_PGA.
The LED mode can also be used for simulating a battery, the constant voltage source VF at the moment is equivalent to the open-circuit voltage of the battery, the equivalent series resistance Rd is equivalent to the internal resistance of the battery, and the regulation mode is the same as that described above.
When the electronic load needs to be switched from the CC mode to the CV mode, the main DSP controller adjusts the D_PGA and the D_Rset to set feedback depth values, adjusts the D_Vset to set voltage, and finally uses the measured value of the pull-load current of the electronic load to servo the D_Iset so as to realize the switching, and the whole process is continuous and uninterrupted. The feedback depth value is a preset value and can be set in a human-computer interface. The feedback depth value corresponds to D_Rset/D_PGA, and is represented by the size of a resistor, and the larger the resistor is, the shallower the feedback depth is, the smaller the resistor is, and the deeper the feedback depth is.
When the electronic load needs to be switched from the CC mode to the CR mode, the main DSP controller firstly adjusts D_Vset to 0, then adjusts D_Iset to 0, finally adjusts D_PGA and D_Rset to set resistance Rd values, and the whole process is continuous and uninterrupted.
When the electronic load needs to be switched from the CC mode to the LED mode, the main DSP controller adjusts D_Vset to a set VF value, then adjusts D_Iset to 0, finally adjusts D_PGA and D_Rset to a set resistance Rd value, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from CV mode to CC mode, the main DSP controller adjusts D_Rset to 0, D_PGA to 65535, and D_Iset to the set current value, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from CV mode to CR mode, the main DSP controller adjusts D_PGA and D_Rset to the set resistance value and then adjusts D_Vset to 0, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from CV mode to LED mode, the main DSP controller adjusts D_PGA, D_Rset to set Rd value, then adjusts D_Iset to 0, finally adjusts D_Vset to set VF value, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from CR mode to CC mode, the main DSP controller adjusts D_Rset to 0, D_PGA to 65535, and D_Iset to the set current value, and the whole process is continuous and uninterrupted.
When the electronic load needs to be switched from the CR mode to the CV mode, the main DSP controller adjusts the D_Vset to a set voltage value, then adjusts the D_Rset and the D_PGA to a set feedback depth value, and finally uses the electronic load to pull the measured value of the current to servo the D_Iset, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from the CR mode to the LED mode, the main DSP controller adjusts D_Vset to set VF value and then adjusts D_Rset and D_PGA to set Rd value, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from the LED mode to the CC mode, the main DSP controller adjusts D_Rset to 0, D_PGA to 65535 and D_Iset to the set current value, and the whole process is continuous and uninterrupted.
When the electronic load needs to be switched from the LED mode to the CV mode, the main DSP controller adjusts D_Rset and D_PGA to set feedback depth, then adjusts D_Vset to set voltage value, and finally uses the measured value of the current drawn by the electronic load to servo D_Iset, and the whole process is continuous and uninterrupted.
When the electronic load needs to switch from the LED mode to the CR mode, the main DSP controller adjusts D_Rset and D_PGA to set resistance values and then adjusts D_Vset to 0, and the whole process is continuous and uninterrupted.
In this embodiment, as shown in fig. 6, the calculation formula between variables in different modes includes:
D_rset=0, d_pga=65535 in CC mode;
Iout=D_Iset/65535*Vref*K2+B2;
Djiset=iout k4+b4, wherein K4 and B4 are constants and are obtained through a calibration process;
In CR mode; d_vset=0, d_iset=0;
Iout= D_Rset/D_PGA*(K1*Vin+B1);
dpga/drset=vin/Iout k5+b5, where K5, B5 are constants obtained by calibration;
CV mode:
Iout=D_Rset/D_PGA*(D_Vset/65535*Vref–(K1*Vin+B1))+ D_Iset/65535*Vref*K2+B2;
D_Vset= K6*Vin+B6+K7*(Iout-(D_Iset/65535*Vref*K2+B2))*D_PGA/D_Rset;
When d_iset=iout k4+b4, d_vset=k6=vin+b6, wherein K6 and B6 are constants and are obtained through a calibration process;
D_iset=0 in LED mode;
Iout= D_Rset/D_PGA*(D_Vset/65535*Vref –(K1*Vin+B1));
D_Vset= K6*VF+B6;D_PGA/D_Rset=Rd*K5+B5;
VF is the LED mode starting voltage, rd is the LED mode equivalent series resistance.
The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (8)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202411755123.6A CN119224632B (en) | 2024-12-03 | 2024-12-03 | Programmable direct current electronic load based on multimode compatible topology and regulation and control method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202411755123.6A CN119224632B (en) | 2024-12-03 | 2024-12-03 | Programmable direct current electronic load based on multimode compatible topology and regulation and control method |
Publications (2)
Publication Number | Publication Date |
---|---|
CN119224632A CN119224632A (en) | 2024-12-31 |
CN119224632B true CN119224632B (en) | 2025-03-07 |
Family
ID=94046741
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202411755123.6A Active CN119224632B (en) | 2024-12-03 | 2024-12-03 | Programmable direct current electronic load based on multimode compatible topology and regulation and control method |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN119224632B (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108776244A (en) * | 2018-07-25 | 2018-11-09 | 易事特集团股份有限公司 | Electronic load |
CN109655763A (en) * | 2018-12-07 | 2019-04-19 | 武汉精能电子技术有限公司 | The control method and circuit of constant voltage mode DC Electronic Loads |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002090406A (en) * | 2000-09-18 | 2002-03-27 | Keisoku Giken Co Ltd | Constant-current and constant-resistance electronic load device |
US6522119B1 (en) * | 2001-09-11 | 2003-02-18 | Schlumberger Technology Corporation | Power source regulator for wireline cable system |
CN2919266Y (en) * | 2006-06-30 | 2007-07-04 | 青岛艾诺电子仪器有限公司 | Direct current electronic loading device |
CA2772949A1 (en) * | 2012-03-30 | 2013-09-30 | Raffe Technologies Inc. | Antenna and device for capturing and storing ambient energy |
CN203490127U (en) * | 2013-09-25 | 2014-03-19 | 天津嘉拓电子科技有限公司 | Terminal tension testing device |
CN116191348A (en) * | 2023-02-17 | 2023-05-30 | 浙江中控研究院有限公司 | Current sampling and overcurrent protection circuit, system and method based on negative feedback adjustment |
CN118170196A (en) * | 2024-03-12 | 2024-06-11 | 湖南恩智测控技术有限公司 | Electronic load current precision control circuit, method and electronic load |
-
2024
- 2024-12-03 CN CN202411755123.6A patent/CN119224632B/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108776244A (en) * | 2018-07-25 | 2018-11-09 | 易事特集团股份有限公司 | Electronic load |
CN109655763A (en) * | 2018-12-07 | 2019-04-19 | 武汉精能电子技术有限公司 | The control method and circuit of constant voltage mode DC Electronic Loads |
Also Published As
Publication number | Publication date |
---|---|
CN119224632A (en) | 2024-12-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN105071641B (en) | A kind of control method for improving Switching Power Supply dynamic response | |
CN102299628A (en) | Power supply circuit, control circuit and method thereof | |
CN111064401B (en) | A high-precision voltage-regulated constant current source system suitable for strong inductive loads | |
US11722058B2 (en) | Emulated current generation circuit of power converting circuit and method thereof | |
CN109768693B (en) | Current sharing control method, device and system and computer readable storage medium | |
CN111786557B (en) | Power circuit and signal generator capable of automatically reducing power consumption of LDO (low dropout regulator) | |
CN109765502A (en) | A program-controlled DC electronic load | |
CN115441850B (en) | Impedance matching method and device of radio frequency power supply system and power supply system | |
CN119224632B (en) | Programmable direct current electronic load based on multimode compatible topology and regulation and control method | |
CN207965718U (en) | A kind of multifunctional power adapter | |
CN113364291A (en) | Two-mode control method and system for bidirectional reversible direct current converter | |
CN110677034B (en) | A sliding-mode controller and method for DC-DC converter based on the reaching law of idempotent constant velocity | |
CN211321248U (en) | A High Precision Voltage Regulating Constant Current Source System Suitable for Strong Inductive Loads | |
CN103561516A (en) | Controller used for visual imaging LED light source | |
CN113114136A (en) | Gradient power amplifier based on self-adaptive prediction control and design method thereof | |
CN212435583U (en) | Shared output voltage adjustable circuit | |
CN114598148A (en) | A Buck-Boost converter with multi-mode discrimination and its control method | |
CN203523122U (en) | Controller for vision imaging LED light source | |
CN112290795B (en) | Device and method for optimizing power consumption of linear current power amplifier | |
CN211377899U (en) | PD power supply circuit and PD power supply unit based on PPS standard | |
CN104699154B (en) | Adjustable power supply and average-current system with same | |
CN108400717A (en) | A kind of fast-response magnet power supply based on high power up amps | |
CN209356876U (en) | A Digital Photovoltaic Array Simulator | |
CN208174556U (en) | A kind of fast-response magnet power supply based on high power up amps | |
CN114610103B (en) | Electronic load constant voltage mode control circuit and working method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |