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CN119210398B - A low clamping voltage EMI filter with integrated electrostatic protection function - Google Patents

A low clamping voltage EMI filter with integrated electrostatic protection function Download PDF

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Publication number
CN119210398B
CN119210398B CN202411555556.7A CN202411555556A CN119210398B CN 119210398 B CN119210398 B CN 119210398B CN 202411555556 A CN202411555556 A CN 202411555556A CN 119210398 B CN119210398 B CN 119210398B
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active region
type well
heavily doped
doped active
well region
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CN119210398A (en
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杜飞波
李红
王旭耀
李硕
高东兴
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Shenzhen Jingyang Electronics Co ltd
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Shenzhen Jingyang Electronics Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/04Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
    • H02H9/045Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage adapted to a particular application and not provided for elsewhere
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00Networks using active elements
    • H03H11/46One-port networks

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Abstract

本发明提供了一种低钳位电压型集成静电保护功能的EMI滤波器,包括N型半导体衬底、NPN三极管Q1、NPN三极管Q2和电阻R,NPN三极管Q1设有第一P型阱区,NPN三极管Q2设有第二P型阱区,第一P型阱区内设有接地的P+重掺杂有源区和与I/O端口一相连的N+重掺杂有源区,N型半导体衬底的底部接地,第一P型阱区内的N+重掺杂有源区与N型半导体衬底的底部之间形成有竖直方向的正向ESD通路,第一P型阱区内的P+重掺杂有源区与N+重掺杂有源区之间形成有水平方向的反向ESD通路,第二P型阱区与第一P型阱区结构相同。本发明的有益效果为:能够同时实现静电防护和电磁干扰滤波的双重功能。

The present invention provides an EMI filter with low clamping voltage type integrated electrostatic protection function, comprising an N-type semiconductor substrate, an NPN transistor Q1, an NPN transistor Q2 and a resistor R, wherein the NPN transistor Q1 is provided with a first P-type well region, the NPN transistor Q2 is provided with a second P-type well region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected to an I/O port 1 are provided in the first P-type well region, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD path is formed between the N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD path is formed between the P+ heavily doped active region in the first P-type well region and the N+ heavily doped active region, and the second P-type well region has the same structure as the first P-type well region. The beneficial effects of the present invention are: it can simultaneously realize the dual functions of electrostatic protection and electromagnetic interference filtering.

Description

EMI filter with low clamping voltage type integrated electrostatic protection function
Technical Field
The invention relates to the technical field of electrostatic protection, in particular to an EMI filter with a low clamping voltage type integrated electrostatic protection function.
Background
Electromagnetic interference (Electromagnetic Interference, EMI) refers to the coupling of signals on an own electrical network to another electrical network by a source of interference (typically an electronic device) through a conductive medium (e.g., cable) or spatial radiation. A filter is a good EMI solution that can pass certain frequency components of a signal while greatly attenuating or suppressing other frequency components. For certain applications, signal processing circuits such as digital signals, communications, audio, image, video compression, sensor output, etc., may employ low pass filters to effectively filter out high frequency noise, preserving low frequency signal components, and thus improving signal quality.
Electrostatic discharge (Electro-STATIC DISCHARGE, ESD) is a phenomenon in which charges accumulated in a human body or a substance are discharged to surrounding objects through a conductive path, and a transient voltage suppressor (TRANSIENT VOLTAGE SUPPRESSOR, TVS) is used to perform an efficient electrostatic protection function on an electronic circuit.
Currently, the design and application environment of electronic products are complex, the sources of electromagnetic interference and electrostatic discharge events are not counted, and the independent or common occurrence of EMI and ESD events can interfere with and reduce the signal integrity of the electronic products, and even damage circuits in severe cases.
Fig. 1 (a) is a schematic circuit structure diagram of a typical p-type C-R-C low-pass filter in the prior art, where the low-pass filter circuit is composed of 1 resistor and 2 capacitors connected in series and parallel. Fig. 1 (b) is a schematic diagram of the S21 curve of a typical p-type C-R-C low pass filter, S21 being the insertion loss, reflecting the amplitude and phase variations of the signal as it passes through the device under test. The cut-off frequency (Cut off frequency) is the frequency at which the filter begins to attenuate signals at a specific frequency, at which time the low pass filter cannot normally pass signals above that frequency, and is generally defined as the cut-off frequency at point-3 dB, indicating that the output signal corresponding to f -3dB has fallen to 0.707 times the maximum value. But such a circuit can only perform a filtering function.
Fig. 2 (a) is a schematic circuit structure diagram of an EMI low-pass filter with integrated electrostatic protection function, and the design scheme uses the parasitic capacitance to ground of the TVS as the capacitance in the C-R-C low-pass filter circuit, so as to play roles of electrostatic protection and low-pass filtering. Fig. 2 (b) is a schematic diagram of a structure in which a voltage regulator tube is used as a filter capacitor, and the capacitor in the C-R-C low-pass filter circuit generally determines the cutoff bandwidth of-3 dB, and after the cutoff bandwidth is determined, the parasitic capacitance to ground of the voltage regulator tube is also determined. To save layout area and manufacturing costs, it is often desirable to increase the capacitance per unit area of the regulator. However, this generally results in poor on-resistance and clamping voltage of the TVS. Fig. 2 (c) is a schematic diagram of a structure using a PNP transistor as a filter capacitor, and as with a voltage regulator, the on-resistance and the clamp voltage of the PNP transistor are generally poor due to the increase of the capacitance per unit area.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides the EMI filter with the low-clamp voltage type integrated electrostatic protection function, and the problems that the TVS on-resistance and the clamp voltage of the typical p-type C-R-C low-pass filter with the integrated electrostatic protection function in the prior art are poor and huge layout area can be occupied by arranging the NPN triode Q1, the NPN triode Q2 and the resistor R which are matched with each other in the EMI filter with the low-clamp voltage type integrated electrostatic protection function and utilizing the NPN triode Q1 and the NPN triode Q2 as capacitors in a low-pass filter circuit can be realized simultaneously, and the very low-clamp voltage can be realized.
The invention provides an EMI filter with a low clamping voltage type integrated electrostatic protection function, which comprises an N-type semiconductor substrate, an NPN triode Q1, an NPN triode Q2 and a resistor R, wherein the NPN triode Q1 is arranged on the N-type semiconductor substrate, a first P-type well region is arranged on the NPN triode Q2, a second P-type well region is arranged in the first P-type well region, a grounded P+ heavy doping active region and an N+ heavy doping active region connected with the positive electrode of the EMI filter are arranged in the first P-type well region, the positive electrode of the EMI filter is connected with an I/O port, the bottom of the N-type semiconductor substrate is grounded, an ESD (electro-static discharge) passage in the vertical direction is formed between the N+ heavy doping active region in the first P-type well region and the bottom of the N-type semiconductor substrate, a reverse passage in the horizontal direction is formed between the P+ heavy doping active region in the first P-type well region and the N+ heavy doping active region, the second P+ heavy doping active region is arranged in the second P-type well region and is connected with the N+ heavy doping active region in the horizontal direction, and the bottom of the ESD passage in the second P+ well region is connected with the N+ active region in the vertical direction, and the bottom of the N+ active region in the P-type semiconductor substrate is formed between the P+ heavy doping active region in the second P-type well region and the second P+ heavy doping active region is connected with the bottom region in the vertical direction, and the bottom region of the N+ active region is formed.
According to the invention, the collector of the NPN triode Q1 is connected with the positive electrode of the EMI filter and one end of the resistor R, the collector of the NPN triode Q2 is connected with the negative electrode of the EMI filter and the other end of the resistor R, the base of the NPN triode Q1, the emitter of the NPN triode Q1, the base of the NPN triode Q2 and the emitter of the NPN triode Q2 are grounded, the structures of the NPN triode Q1 and the NPN triode Q2 are TVS structures, and the NPN triode Q1, the NPN triode Q2 and the resistor R can form a filter circuit.
The invention is further improved, and the resistor R is a P-type active region resistor.
The invention is further improved, and the resistor R is an N-type active region resistor.
The invention is further improved, and the resistor R is an N-well resistor or a P-well resistor or a polysilicon resistor.
According to the invention, the P+ heavily doped active region in the first P-type well region and the P+ heavily doped active region in the second P-type well region are connected with the bottom of the N-type semiconductor substrate.
According to the invention, a metal conducting layer is arranged on the top of the N-type semiconductor substrate, a P+ heavy doped active region in the first P-type well region is grounded through the metal conducting layer, the N+ heavy doped active region in the first P-type well region is connected with the positive electrode of the EMI filter through the metal conducting layer, a P+ heavy doped active region in the second P-type well region is grounded through the metal conducting layer, and the N+ heavy doped active region in the second P-type well region is connected with the positive electrode of the EMI filter through the metal conducting layer.
According to the invention, an insulating layer is further arranged on the top of the N-type semiconductor substrate, the P+ heavily doped active region in the first P-type well region is isolated from the N+ heavily doped active region in the first P-type well region through the insulating layer, and the P+ heavily doped active region in the second P-type well region is isolated from the N+ heavily doped active region in the second P-type well region through the insulating layer.
Compared with the prior art, the EMI filter with the low-clamp voltage type integrated electrostatic protection function has the beneficial effects that the NPN triode Q1, the NPN triode Q2 and the resistor R which are matched with each other are arranged in the EMI filter with the low-clamp voltage type integrated electrostatic protection function, the NPN triode Q1 and the NPN triode Q2 are utilized to serve as capacitors in a low-pass filter circuit, so that the filter can inhibit high-frequency signals, can provide excellent electrostatic protection capability, can especially realize very low clamp voltage, can realize dual functions of electrostatic protection and electromagnetic interference filtering at the same time, has small layout area, can save manufacturing cost and packaging cost, has wide application range, can meet the requirements of various applications, and provides a good integrated solution for electrostatic protection and electromagnetic interference filtering of an electronic circuit, and solves the problems that the typical p-type C-R-C low-pass filter in the prior art can only realize the filtering function, the TVS on resistance and the clamp voltage of the integrated electrostatic protection function of the low-pass filter are poor, and the layout of the integrated electrostatic protection function can occupy huge area.
Drawings
In order to more clearly illustrate the invention or the solutions of the prior art, a brief description will be given below of the drawings used in the description of the embodiments or the prior art, it being obvious that the drawings in the description below are some embodiments of the invention and that other drawings can be obtained from them without the inventive effort of a person skilled in the art.
FIG. 1 (a) is a schematic diagram of a typical p-type C-R-C low pass filter;
FIG. 1 (b) is a schematic diagram of an insertion loss curve of a typical p-type C-R-C low pass filter of the prior art;
Fig. 2 (a) is a schematic circuit diagram of a conventional EMI low-pass filter integrated with an electrostatic protection function;
FIG. 2 (b) is a schematic diagram of a conventional structure using a voltage regulator tube as a filter capacitor;
FIG. 2 (c) is a schematic diagram of a structure using PNP transistor as a filter capacitor;
Fig. 3 (a) is a schematic structural diagram of an EMI filter with integrated electrostatic protection function with low clamping voltage according to the present invention;
fig. 3 (b) is a schematic circuit diagram of an EMI filter with integrated electrostatic protection function with low clamp voltage according to the present invention;
FIG. 3 (c) is an I-V characteristic of the EMI filter integrating electrostatic protection function with low clamp voltage according to the present invention;
Fig. 4 is a schematic structural diagram of an EMI filter with integrated electrostatic protection function with low clamping voltage according to the present invention.
Detailed Description
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs, the terms used in the description of this application are for the purpose of describing particular embodiments only and are not intended to be limiting of the invention, and the terms "comprising" and "having" and any variations thereof in the description of this invention and the claims and the above description of the drawings are intended to cover non-exclusive inclusions. The terms first, second and the like in the description and in the claims or in the above-described figures, are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the invention. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In order to make the person skilled in the art better understand the solution of the present invention, the technical solution of the embodiment of the present invention will be clearly and completely described below with reference to the accompanying drawings.
As shown in fig. 3 (a) -4, the low clamping voltage type EMI filter with integrated electrostatic protection function provided by the invention comprises an N-type semiconductor substrate and an NPN triode Q1 arranged on the N-type semiconductor substrate, The NPN triode Q2 and the resistor R are provided with a first P-type well region, the NPN triode Q2 is provided with a second P-type well region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected with the positive electrode of the EMI filter are arranged in the first P-type well region, the positive electrode of the EMI filter is connected with the I/O port I, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD (electro-static discharge) passage is formed between the N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD passage is formed between the P+ heavily doped active region in the first P-type well region and the N+ heavily doped active region, a grounded P+ heavily doped active region and an N+ heavily doped active region connected with the negative electrode of the EMI filter are arranged in the second P-type well region, the negative electrode of the EMI filter is connected with the I/O port II, the bottom of the N-type semiconductor substrate is grounded, and a vertical forward ESD passage is formed between the P+ heavily doped active region in the second P-type well region and the N+ heavily doped active region, and the horizontal ESD passage is formed between the second P+ heavily doped active region and the N+ heavily doped active region in the second P-type well region. The collector of the NPN triode Q1 is connected with the positive electrode of the EMI filter and one end of a resistor R, the collector of the NPN triode Q2 is connected with the negative electrode of the EMI filter and the other end of the resistor R, the base of the NPN triode Q1, the emitter of the NPN triode Q1, the base of the NPN triode Q2 and the emitter of the NPN triode Q2 are grounded, the structures of the NPN triode Q1 and the NPN triode Q2 are TVS structures, the resistor R is a P-type active area resistor, and the NPN triode Q1, the NPN triode Q2 and the resistor R can form a filter circuit. In the embodiment, the p-type C-R-C low-pass filter is built by utilizing TVS structures of the NPN triode Q1 and the NPN triode Q2, the on-resistance and the clamping voltage can be greatly improved due to the high gain of the NPN triode, the effectiveness of ESD protection is improved, the I-V characteristic curve of the NPN triode is shown as the figure 3 (C), and secondly, the NPN triode Q1, The NPN triode Q2 adopts a planar/vertical mixed TVS architecture, realizes a reverse ESD (electrostatic discharge) passage, namely a reverse diode type electrostatic discharge passage, on a planar structure, realizes a forward ESD passage, namely a forward NPN type electrostatic discharge passage, on a vertical structure, and in addition, the top GND and the bottom GND of the N type semiconductor substrate can be communicated through wire bonding or RDL (Re-distributed layer, rewiring layer) during packaging, can be connected through wires during PCB (Printed circuit board ) board level integration, or can not be short-circuited during application, and the GND at the top floats, so that the NPN triode Q1, the TVS structure of NPN transistor Q2 becomes bidirectional. Wherein 300 represents an N-type semiconductor substrate, 310 represents a first P-type well region, 316 represents a second P-type well region, 202, 204, 311, 315, 411, 415 represents a p+ heavily doped active region, 102, 313, 413 represents a resistor R,101, 103, 201, 203, 312, 314, 412, 414 represents an n+ heavily doped active region, 140, 150, 160 represents a metal interconnect, 140 is a metal interconnect connecting the I/O port one with the positive electrode of the EMI filter, 150 represents a metal interconnect connecting the I/O port two with the negative electrode of the EMI filter, and 160 represents a metal interconnect connecting the two GNDs through off-chip shorting (package level or board level integration).
As shown in figures 3 (a) -4, the resistor R is an N-type active region resistor, an N-well resistor, a P-well resistor or a polysilicon resistor, a P+ heavily doped active region in a first P-type well region and a P+ heavily doped active region in a second P-type well region are connected with the bottom of an N-type semiconductor substrate, a metal conducting layer is arranged on the top of the N-type semiconductor substrate, the P+ heavily doped active region in the first P-type well region is grounded through the metal conducting layer, the N+ heavily doped active region in the first P-type well region is connected with the positive electrode of an EMI filter through the metal conducting layer, the P+ heavily doped active region in the second P-type well region is grounded through the metal conducting layer, the N+ heavily doped active region in the second P-type well region is connected with the positive electrode of the EMI filter through the metal conducting layer, an insulating layer is further arranged on the top of the N-type semiconductor substrate, the P+ heavily doped active region in the first P-type well region is isolated from the N+ heavily doped active region in the first P-type well region through the insulating layer, and the P+ heavily doped active region in the second P-type well region is isolated from the P+ heavily doped active region in the second P-type well region through the insulating layer. In this embodiment, the base region of the vertical NPN triode of fig. 4 is uniformly doped, which is essentially an inverted bipolar junction transistor, and has higher current gain, better on-resistance and clamping voltage, wherein deep trench isolation is adopted, better isolation between multiple channels is achieved, and the resistor R adopts an N-type active region resistor, which can form a "reverse biased PN junction" with the P-type epitaxial layer during operation, thereby being more beneficial to precisely controlling the resistance. Wherein 100 represents a P-type semiconductor substrate, 120 represents an insulating layer, and 130 represents a metal conductive layer.
The manufacturing process of the EMI filter with the low clamping voltage type integrated electrostatic protection function is suitable for various common integrated circuit manufacturing processes, such as a nanoscale complementary metal oxide semiconductor (Complementary Metal Oxide Semiconductor, abbreviated as CMOS) process, a three-dimensional fin field effect transistor (FinField-EffectTransistor, finFET) or a full-surrounding Gate transistor (Gate-All-Around FET, abbreviated as GAA) process, a Silicon-On-Insulator (SOI) process On an insulating substrate, and the like.
As can be seen from the above, the EMI filter with the low-clamp voltage type integrated electrostatic protection function is provided by the invention, the NPN triode Q1, the NPN triode Q2 and the resistor R which are mutually matched are arranged in the EMI filter with the low-clamp voltage type integrated electrostatic protection function, and the NPN triode Q1 and the NPN triode Q2 are utilized to serve as capacitors in a low-pass filter circuit, so that the filter can not only inhibit high-frequency signals, but also provide excellent electrostatic protection capability, especially can realize very low clamp voltage, can realize dual functions of electrostatic protection and electromagnetic interference filtering, has small layout area, can save manufacturing cost and packaging cost, has wide application range, can meet the requirements of various applications, provides a good integrated solution for electrostatic protection and electromagnetic interference filtering of an electronic circuit, and solves the problems that the typical p-type C-R-C low-pass filter in the prior art can only realize the filtering function, the TVS on resistance and the EMI filter with the integrated electrostatic protection function are poor in layout and can occupy huge layout area.
The above embodiments are preferred embodiments of the present invention, and are not intended to limit the scope of the present invention, which includes but is not limited to the embodiments, and equivalent modifications according to the present invention are within the scope of the present invention.

Claims (7)

1. An EMI filter with low clamping voltage type integrated electrostatic protection function, which is characterized in that: comprises an N-type semiconductor substrate, an NPN triode Q1, an NPN triode Q2 and a resistor R, wherein the NPN triode Q1 is arranged on the N-type semiconductor substrate, a first P-type well region is arranged on the NPN triode Q1, a second P-type well region is arranged on the NPN triode Q2, a grounded P+ heavily doped active region and an N+ heavily doped active region connected with the positive electrode of an EMI filter are arranged in the first P-type well region, the positive electrode of the EMI filter is connected with an I/O port I, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD (electro-static discharge) passage is formed between the N+ heavily doped active region in the first P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD passage is formed between the P+ heavily doped active region and the N+ heavily doped active region in the first P-type well region, the second P-type well region is internally provided with a grounded P+ heavily doped active region and an N+ heavily doped active region connected with the cathode of the EMI filter, the cathode of the EMI filter is connected with an I/O port II, the bottom of the N-type semiconductor substrate is grounded, a vertical forward ESD path is formed between the N+ heavily doped active region in the second P-type well region and the bottom of the N-type semiconductor substrate, a horizontal reverse ESD path is formed between the P+ heavily doped active region and the N+ heavily doped active region in the second P-type well region, the collector of the NPN triode Q1 is connected with the anode of the EMI filter and one end of the resistor R, the collector of the NPN triode Q2 is connected with the cathode of the EMI filter and the other end of the resistor R, the base of the NPN triode Q1, the emitter of the NPN triode Q1, the base of the NPN triode Q2 and the emitter of the NPN triode Q2 are grounded, the structures of the NPN triode Q1 and the NPN triode Q2 are TVS structures, and the NPN triode Q1, the NPN triode Q2 and the resistor R can form a filter circuit.
2. The EMI filter with integrated electrostatic protection function of claim 1, wherein the resistor R is a P-type active region resistor.
3. The EMI filter with integrated electrostatic protection function of claim 1, wherein the resistor R is an N-type active region resistor.
4. The EMI filter integrated with electrostatic protection function according to claim 1, wherein the resistor R is an N-well resistor, a P-well resistor, or a polysilicon resistor.
5. The EMI filter with integrated electrostatic protection function of any one of claims 2-4, wherein the P+ heavily doped active region in the first P-type well region and the P+ heavily doped active region in the second P-type well region are connected to the bottom of the N-type semiconductor substrate.
6. The EMI filter with the low clamping voltage type integrated electrostatic protection function of claim 5, wherein a metal conducting layer is arranged on the top of the N-type semiconductor substrate, a P+ heavy doped active region in the first P-type well region is grounded through the metal conducting layer, an N+ heavy doped active region in the first P-type well region is connected with a positive electrode of the EMI filter through the metal conducting layer, a P+ heavy doped active region in the second P-type well region is grounded through the metal conducting layer, and an N+ heavy doped active region in the second P-type well region is connected with a positive electrode of the EMI filter through the metal conducting layer.
7. The EMI filter with the low clamping voltage type integrated electrostatic protection function of claim 6, wherein an insulating layer is further arranged on top of the N-type semiconductor substrate, the P+ heavily doped active region in the first P-type well region is isolated from the N+ heavily doped active region in the first P-type well region by the insulating layer, and the P+ heavily doped active region in the second P-type well region is isolated from the N+ heavily doped active region in the second P-type well region by the insulating layer.
CN202411555556.7A 2024-11-04 2024-11-04 A low clamping voltage EMI filter with integrated electrostatic protection function Active CN119210398B (en)

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CN110474617A (en) * 2019-08-14 2019-11-19 天华通信科技有限公司 The filter of the filtering characteristic of common-mode filter is improved using ESD protection device
CN116783708A (en) * 2021-04-15 2023-09-19 华为技术有限公司 Integrated circuits, electronic equipment and communication devices

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Publication number Priority date Publication date Assignee Title
US8896093B2 (en) * 2012-12-19 2014-11-25 Alpha And Omega Semiconductor Incorporated Circuit configuration and manufacturing processes for vertical transient voltage suppressor (TVS) and EMI filter
CN215733477U (en) * 2021-05-31 2022-02-01 深圳市硕凯电子股份有限公司 Surge protection circuit with low clamping voltage
CN118866900B (en) * 2024-09-26 2024-11-26 深圳市晶扬电子有限公司 Flexible and adjustable electrostatic protection device for clamping voltage

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110474617A (en) * 2019-08-14 2019-11-19 天华通信科技有限公司 The filter of the filtering characteristic of common-mode filter is improved using ESD protection device
CN116783708A (en) * 2021-04-15 2023-09-19 华为技术有限公司 Integrated circuits, electronic equipment and communication devices

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