CN119170554A - Bottom electrode assembly and plasma processing apparatus - Google Patents
Bottom electrode assembly and plasma processing apparatus Download PDFInfo
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- CN119170554A CN119170554A CN202411660380.1A CN202411660380A CN119170554A CN 119170554 A CN119170554 A CN 119170554A CN 202411660380 A CN202411660380 A CN 202411660380A CN 119170554 A CN119170554 A CN 119170554A
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- 238000012545 processing Methods 0.000 title claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 238000002955 isolation Methods 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 22
- 230000008569 process Effects 0.000 claims abstract description 19
- 229910010293 ceramic material Inorganic materials 0.000 claims description 13
- 238000006243 chemical reaction Methods 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 7
- 230000007246 mechanism Effects 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 8
- 238000005530 etching Methods 0.000 description 6
- 239000007789 gas Substances 0.000 description 6
- 230000008859 change Effects 0.000 description 5
- 239000000306 component Substances 0.000 description 5
- 238000004088 simulation Methods 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 230000000087 stabilizing effect Effects 0.000 description 3
- 230000005684 electric field Effects 0.000 description 2
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- 238000010276 construction Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005315 distribution function Methods 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
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Abstract
本发明提供一种下电极组件及等离子体处理设备。所述下电极组件用于等离子体工艺处理，包括：静电吸盘，其上表面用于承载基片；位于静电吸盘中的第一电极，其与一脉冲式直流偏压源电连接；位于静电吸盘中的第二电极，其通过一隔离电路与一直流电压源电连接，所述第二电极位于所述第一电极的上方；所述隔离电路包含一二极管，所述二极管的负极与所述直流电压源的负极电连接、正极与所述第二电极电连接。本发明通过消除脉冲式直流偏压源对箝位电压的影响，解决在工艺过程中基片箝位电压的失稳问题。
The present invention provides a lower electrode assembly and plasma processing equipment. The lower electrode assembly is used for plasma process processing, and includes: an electrostatic chuck, whose upper surface is used to carry a substrate; a first electrode located in the electrostatic chuck, which is electrically connected to a pulsed DC bias source; a second electrode located in the electrostatic chuck, which is electrically connected to a DC voltage source through an isolation circuit, and the second electrode is located above the first electrode; the isolation circuit includes a diode, the cathode of the diode is electrically connected to the cathode of the DC voltage source, and the anode is electrically connected to the second electrode. The present invention solves the problem of instability of the substrate clamping voltage during the process by eliminating the influence of the pulsed DC bias source on the clamping voltage.
Description
Technical Field
The invention relates to the technical field of semiconductor equipment, in particular to a lower electrode assembly and plasma processing equipment.
Background
In a plasma processing apparatus, an electrostatic chuck is one of the core components of the apparatus. The electrostatic chuck serves mainly two purposes in plasma processing. One is to create a bias voltage on the surface of the substrate on the electrostatic chuck to accelerate the movement of ions in the plasma sheath toward the substrate. And secondly, the substrate arranged on the plasma processing device is fastened, so that the substrate is stable during the plasma processing. To achieve higher aspect ratio etching or ALE etching, one effective approach is to bias the substrate with a voltage from a pulsed dc bias source, which can produce a single peak ion energy distribution function.
The electrostatic chuck typically comprises two electrodes, and one of the prior art schemes for biasing a substrate using a pulsed dc bias source is to connect the pulsed dc bias source to one electrode of the electrostatic chuck and couple the pulsed dc bias source to the substrate via capacitive coupling, and the substrate is secured by applying a dc voltage to the other electrode embedded in the electrostatic chuck to create an electrostatic attractive force between the electrostatic chuck and the substrate. However, in the process, the pulsed dc bias voltage is adjusted according to the change of the process environment, so that the two electrodes are mutually affected, the electrostatic force between the substrates is changed according to the change of the pulsed voltage, and the substrates are insufficiently clamped or excessively clamped in the etching process, so that the substrates are scrapped, and the etching fails.
Disclosure of Invention
The invention aims to provide a lower electrode assembly and plasma processing equipment, which solve the problem of instability of substrate clamping voltage in the etching process by eliminating the influence of a pulse type direct current bias voltage source on the clamping voltage.
In order to achieve the above object, the present invention is realized by the following technical scheme:
a lower electrode assembly for plasma processing, comprising:
An electrostatic chuck having an upper surface for carrying a substrate;
A first electrode in the electrostatic chuck electrically connected to a pulsed DC bias source;
a second electrode in the electrostatic chuck electrically connected to a direct current voltage source through an isolation circuit, the second electrode being above the first electrode;
the isolation circuit comprises a diode, wherein the negative electrode of the diode is electrically connected with the negative electrode of the direct-current voltage source, and the positive electrode of the diode is electrically connected with the second electrode.
Optionally, the pulsed dc bias source outputs a negative pulse voltage.
Optionally, the positive electrode of the direct current voltage source is grounded.
Optionally, the isolation circuit further includes a resistor connected in series with the diode, and the resistance value of the resistor is 1kΩ to 1gΩ.
Optionally, an RF filter is provided between the isolation circuit and the dc voltage source.
Optionally, the electrostatic chuck comprises a layer of ceramic material and a metal base for supporting the layer of ceramic material;
The first electrode and the second electrode are both disc electrodes positioned on the ceramic material layer;
Or the first electrode is the metal base, and the second electrode is a disc electrode positioned on the ceramic material layer.
Optionally, the isolation circuit is integrated with the dc voltage source.
Optionally, the voltage range of the direct-current voltage source is 0 to-10 kV.
Optionally, the duty ratio range of the pulse type direct current bias source is 1% -95%, the frequency range is 10 kHz-5 MHz, and the output high-low level differential pressure is 100V-50 kV.
Optionally, the isolation circuit is disposed on a circuit board disposed below the electrostatic chuck.
A plasma processing apparatus, comprising:
A reaction chamber;
The air inlet mechanism is used for conveying process gas into the reaction cavity;
a source radio frequency for igniting the process gas into a plasma;
the lower electrode assembly as described above is located at the bottom of the reaction chamber.
Compared with the prior art, the invention has the following advantages:
According to the invention, the isolation circuit is arranged between the direct-current voltage source and the second electrode, and the diode has the characteristics of forward conduction and reverse cutoff, so that when the pulse direct-current bias source outputs pulses, the diode is reversely cut off and can not charge and discharge through a loop of the direct-current voltage source, so that potential difference at two ends of the second capacitor can not be brought by the addition of the pulse direct-current bias source, and only depends on the direct-current voltage source, thereby keeping the clamping voltage stable, eliminating the influence of the pulse voltage of the pulse direct-current bias source on the clamping voltage, and solving the problem of instability of the clamping voltage of the substrate in the process. The diode in the isolation circuit is also connected in series with a resistor, which can isolate the alternating current component in the pulse type direct current bias source and the radio frequency power for generating plasma, thereby stabilizing the current in the direct current voltage source loop.
Drawings
For a clearer description of the technical solutions of the present invention, the drawings that are needed in the description will be briefly introduced below, it being obvious that the drawings in the following description are one embodiment of the present invention, and that, without inventive effort, other drawings can be obtained by those skilled in the art from these drawings:
FIG. 1 is a block diagram of a plasma processing apparatus;
Fig. 2 is a structural view of a lower electrode assembly according to the related art;
FIG. 3 is an equivalent circuit diagram of the structure shown in FIG. 2;
FIG. 4 is a graph showing the voltage across capacitor C 2 over time at different pulse output voltages in a prior art simulation experiment;
FIG. 5 is a block diagram of a lower electrode assembly according to an embodiment of the present invention;
FIG. 6 is an equivalent circuit diagram of the structure of FIG. 5;
FIG. 7 is another equivalent circuit diagram of the structure shown in FIG. 5;
FIG. 8 is a graph showing the voltage across capacitor C 2 over time at different pulse output voltages in a simulation experiment using the scheme of the present invention;
Fig. 9 is a structural view of a lower electrode assembly according to another embodiment of the present invention;
fig. 10 is an equivalent circuit diagram of a lower electrode assembly according to still another embodiment of the present invention.
Detailed Description
The following provides a further detailed description of the proposed solution of the invention with reference to the accompanying drawings and detailed description. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for the purpose of facilitating and clearly aiding in the description of embodiments of the invention. For a better understanding of the invention with objects, features and advantages, refer to the drawings. It should be understood that the structures, proportions, sizes, etc. shown in the drawings are for illustration purposes only and should not be construed as limiting the invention to the extent that any modifications, changes in the proportions, or adjustments of the sizes of structures, proportions, or otherwise, used in the practice of the invention, are included in the spirit and scope of the invention which is otherwise, without departing from the spirit or essential characteristics thereof.
Fig. 1 shows a schematic configuration of a plasma processing apparatus. The plasma processing apparatus includes a reaction chamber 10, a lower electrode assembly 20 at the bottom of the reaction chamber 10, the lower electrode assembly 20 including an electrostatic chuck for carrying a substrate W. The reaction chamber 10 is further provided with an air inlet mechanism 30 for delivering process gas into the reaction chamber 10, the air inlet mechanism 20 may be adapted to feed air from the top or side wall of the reaction chamber 10, and in the capacitively coupled plasma processing apparatus, the air inlet mechanism 20 may be a gas shower head, which simultaneously serves as an upper electrode for generating plasma. And a radio frequency power supply 40 for igniting the process gas into Plasma (Plasma), wherein one or more radio frequency power supplies 40 can be separately and electrically connected with the lower electrode or the upper electrode or simultaneously connected with the upper electrode and the lower electrode, so as to transmit radio frequency power to the lower electrode or simultaneously transmit radio frequency power to the upper electrode and the lower electrode, thereby generating a large radio frequency electric field inside the reaction chamber 10, and partial gas molecules in the reaction gas lose electrons when being subjected to the strong electric fields, leaving positively charged ions, and the positively charged ions are accelerated towards the lower electrode by the action of a bias voltage and are combined with neutral substances in the processed substrate W, so that the processing of the substrate, namely etching, deposition and the like, is performed.
Fig. 2 is a schematic view showing a structure of a lower electrode assembly in a conventional plasma processing apparatus. The electrostatic chuck 21 is provided with a first electrode 22 and a second electrode 23, and the second electrode 23 is located above the first electrode 23, and the areas of the first electrode and the second electrode may be the same or different. The first electrode 22 is electrically connected to a pulsed DC bias source PDC for biasing the substrate W on the electrostatic chuck 21 to accelerate the bombardment of charged particles in the sheath above it onto the substrate W, and the second electrode 23 is electrically connected to a DC voltage source DC for generating an electrostatic attractive force between the electrostatic chuck 21 and the substrate W to thereby fix the substrate W. The high frequency rf power source that generates the plasma is not shown in fig. 2. Although a resistor Re having a larger resistance is provided between the DC voltage source DC and the second electrode 23 for isolating the rf signal from the pulsed DC signal, the pulsed voltage of the pulsed DC bias source PDC is still capacitively coupled to the second electrode 23 in the electrostatic chuck 21, thereby changing the clamping voltage, resulting in an insufficient clamping or an excessive clamping of the substrate W.
Fig. 3 is an equivalent circuit diagram of the structure shown in fig. 2, where C 1 represents the capacitance between the first electrode 22 and the second electrode 23, C 2 represents the capacitance between the second electrode 23 and the substrate W, and the capacitance value of C 1、C2 may be 1nf to 100nf. The parallel circuit of D SH、CSH and R SH represents the equivalent circuit model of the plasma sheath on the surface of the substrate W, the parallel circuit of D W、CW and R W represents the equivalent circuit model of the plasma sheath on the surface of the chamber wall, R pl represents the resistance inside the plasma, and Re represents the resistance between the direct current voltage source DC and the second electrode 23.
Fig. 4 is a graph of the Voltage across C 2, i.e., clamp Voltage (Chuck Voltage), obtained by experimental simulation, over time at different pulse output voltages (Pulsing Voltage). The voltage of the direct current voltage source DC is set to be-12 kV, the pulse output voltage of the pulse direct current bias voltage source PDC is respectively-15 kV, -10kV and-5 kV, the duty ratio is 50%, and the frequency is 400kHz. According to simulation results, when the pulse output voltage is switched between three values, the uppermost curve corresponds to the value of the clamping voltage when the pulse output voltage is-15 kV, the middle curve corresponds to the value of the clamping voltage when the pulse output voltage is-10 kV, the lowermost curve corresponds to the value of the clamping voltage when the pulse output voltage is-5 kV, the value of the clamping voltage can be obviously seen to fluctuate along with the upper and lower values, and if the proper clamping voltage value is between the uppermost curve and the lowermost curve, the substrate has the problems of excessive clamping and insufficient clamping when the pulse output voltage changes.
It will be appreciated that in fig. 3, the potential signal at point B is the potential on the substrate W, and is influenced by the pulsed DC bias source PDC, the plasma and the DC voltage source DC, the voltage output by the DC voltage source DC is unchanged, the influence of the plasma on point B is related to the source rf and the plasma equipment, and when the source rf and the equipment structure are fixed, the influence of the plasma on point B is also fixed, that is, the waveform at point B is approximately equal to the output waveform-U-0 of the pulsed DC bias source PDC (-U is approximately equal to the high-low level voltage difference of the pulsed DC bias source PDC). The potential at the point A is formed by superposing the output of a DC voltage source DC and a pulse DC bias voltage source PDC, the output voltage of the pulse DC bias voltage source PDC is shunted by a branch where the DC voltage source DC is positioned at the point A, when the output voltage of the pulse DC bias voltage source PDC is switched, in order to achieve dynamic balance at the point A, current is charged and discharged through a loop of the DC voltage source DC, for convenience of discussion, for example, the high-low level duty ratio of the PDC is 50%, the differential pressure is U, the waveform of the point A is approximately one slave~ The varying pulse shape is superimposed with the voltage of a direct current voltage source DC output. It can be seen that the pulsed dc bias source PDC creates a potential difference across the BA, and the magnitude of this potential difference depends on the pulsed output voltage of the pulsed dc bias source PDC.
During plasma processing, the pulse output voltage of the pulsed dc bias source PDC is generally different in different processing processes, and when the pulse output voltage is adjusted, the clamping voltage will also change, thereby causing unstable processes and even damage to the substrate W.
Based on this, the present invention provides a bottom electrode assembly, wherein an isolation circuit is disposed between the DC voltage source DC and the second electrode 23 to eliminate the impact of the pulse output voltage of the pulse DC bias source PDC on the clamping voltage.
Specifically, as shown in fig. 5, the lower electrode assembly 20 according to an embodiment of the present invention includes an electrostatic chuck 21 having an upper surface for carrying a substrate W, a first electrode 22 disposed in the electrostatic chuck 21 and electrically connected to a pulsed DC bias source PDC, and a second electrode 23 disposed in the electrostatic chuck 21 and electrically connected to a DC voltage source DC through an isolation circuit 24, wherein the second electrode 23 is disposed above the first electrode 22. The capacitance formed between the first electrode 22 and the second electrode 23 is referred to as a capacitance C 1, and the capacitance formed between the second electrode 23 and the substrate W is referred to as a capacitance C 2.
Fig. 6 is an equivalent circuit diagram of the structure shown in fig. 5, and in combination with fig. 6, the isolation circuit 24 includes a diode D, where a cathode of the diode D is electrically connected to a cathode of the direct current voltage source DC, and an anode of the diode D is electrically connected to the second electrode 23.
In this embodiment, the positive electrode of the DC voltage source DC is grounded, the DC voltage source DC outputs a negative voltage, the positive electrode of the pulsed DC bias source PDC is grounded, and the pulsed DC bias source PDC outputs a negative pulse voltage. As shown in connection with fig. 6, the cathode of the diode D is connected to the cathode of the direct voltage source DC. When the voltage output by the pulse type DC bias voltage source PDC is 0, the diode D is conducted, the voltage at the point A is DC output voltage-V chuck, the potential at the point B is 0, and therefore the adsorption voltage is V chuck, when the voltage output by the PDC is-V, the point A jumps along with the PDC output voltage and is (-V chuck -V) due to the fact that C 1 is large, the diode D is cut off, the corresponding potential at the point B is-V, and therefore the voltage difference between A, B is still V chuck. Therefore, no potential difference is brought between the two points of the BA due to the addition of the pulse type DC bias voltage source PDC, namely the potential difference between the two ends of the C 2 only depends on the DC voltage source DC, so that the clamping voltage is kept stable.
In this embodiment, the DC voltage source has a voltage range of 0 to-10 kV, the pulsed DC bias source has a duty cycle of 1% to 95%, a frequency of 10kHz to 5Mhz, and an output voltage range of-100V to-50 kV.
As shown in fig. 7, the isolation circuit 24 may further include a resistor R connected in series with the diode D, where the resistance value of the resistor R is 1kΩ to 1gΩ. The resistor R serves to block the ac component and the high frequency radio frequency power supply power in the pulsed DC bias source PDC, thereby stabilizing the current in the DC voltage source DC loop.
Fig. 8 is a graph of the voltage across the capacitor C 2, i.e. the clamp voltage, obtained by experimental simulation using the scheme of the present invention, over time at different pulse output voltages. In FIG. 8, the voltage of the DC voltage source DC is set to be-5 kV, the pulse output voltage of the pulse DC bias source PDC is respectively-15 kV, -10kV, -5kV, the duty ratio is 50%, and the frequency is 400kHz. It can be seen that the isolation circuit 24 can well eliminate the influence of the output of the pulsed dc bias source PDC on the clamping voltage, which does not change with the change of the output voltage of the dc bias source PDC.
In this embodiment, the two output voltages of the pulsed dc bias source may not be limited to 0V and a negative voltage, and the pulsed dc bias source may be limited to only 100V to 50kV in terms of voltage difference between high and low levels of the output voltages. The isolation circuit 24 may be disposed on a circuit board disposed below the electrostatic chuck. The isolation circuit 24 may be provided integrally with the direct current voltage source DC to simplify construction. Specifically, the components of the isolation circuit 24 are integrated on a circuit board and are fixed in a power box of the direct-current voltage source DC. Alternatively, the components of the isolation circuit 24 may be separately assembled in a power box of the direct-current voltage source DC.
The electrostatic chuck 21 includes a ceramic material layer 211 and a metal susceptor 212 for supporting the ceramic material layer 211, the metal susceptor 212 also being used to assist in controlling the temperature of the ceramic material layer 211. In the embodiment shown in fig. 5, the first electrode 22 and the second electrode 23 are both disc electrodes buried in the ceramic material layer 211, and the second electrode 23 is located above the first electrode 22. In the embodiment shown in fig. 9, the first electrode 22 is the metal base 212, and the second electrode 23 is a disc electrode buried in the ceramic material layer 211, so as to ensure that the second electrode 23 is located above the first electrode 22.
As shown in fig. 10, an RF filter 25 may be further disposed between the isolation circuit 24 and the DC voltage source DC to better block the radio frequency signal from entering the DC voltage source DC.
In summary, the isolation circuit is arranged between the direct-current voltage source and the second electrode, and the diode has the characteristics of forward conduction and reverse cut-off, so that the influence of the pulse voltage of the pulse direct-current bias voltage source on the clamping voltage is eliminated, and the problem of instability of the substrate clamping voltage in the process is solved. The diode in the isolation circuit is also connected in series with a resistor, which can block the alternating current component in the pulse type direct current bias source, thereby stabilizing the current in the direct current voltage source loop.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
While the present invention has been described in detail through the foregoing description of the preferred embodiment, it should be understood that the foregoing description is not to be considered as limiting the invention. Many modifications and substitutions of the present invention will become apparent to those of ordinary skill in the art upon reading the foregoing. Accordingly, the scope of the invention should be limited only by the attached claims.
Claims (11)
1. A lower electrode assembly for plasma processing, comprising:
An electrostatic chuck having an upper surface for carrying a substrate;
A first electrode in the electrostatic chuck electrically connected to a pulsed DC bias source;
a second electrode in the electrostatic chuck electrically connected to a direct current voltage source through an isolation circuit, the second electrode being above the first electrode;
the isolation circuit comprises a diode, wherein the negative electrode of the diode is electrically connected with the negative electrode of the direct-current voltage source, and the positive electrode of the diode is electrically connected with the second electrode.
2. The bottom electrode assembly of claim 1, wherein the pulsed dc bias source outputs a negative pulse voltage.
3. The lower electrode assembly of claim 1, wherein the positive electrode of the dc voltage source is grounded.
4. The bottom electrode assembly of claim 1, wherein the isolation circuit further comprises a resistor in series with the diode, the resistor having a resistance value of 1kΩ to 1gΩ.
5. The bottom electrode assembly of claim 1, wherein an RF filter is disposed between the isolation circuit and the dc voltage source.
6. The lower electrode assembly of claim 1, wherein the electrostatic chuck comprises a layer of ceramic material and a metal base for supporting the layer of ceramic material;
The first electrode and the second electrode are both disc electrodes positioned on the ceramic material layer;
Or the first electrode is the metal base, and the second electrode is a disc electrode positioned on the ceramic material layer.
7. The lower electrode assembly of claim 1, wherein the isolation circuit is integrally provided with the dc voltage source.
8. The lower electrode assembly of claim 1, wherein the dc voltage source has a voltage range of 0 to-10 kV.
9. The bottom electrode assembly of claim 1, wherein the pulsed dc bias source has a duty cycle in the range of 1% -95%, a frequency in the range of 10 khz-5 mhz, and an output high-low voltage differential of 100 v-50 kv.
10. The lower electrode assembly of claim 1, wherein the isolation circuit is disposed on a circuit board disposed below the electrostatic chuck.
11. A plasma processing apparatus, comprising:
A reaction chamber;
The air inlet mechanism is used for conveying process gas into the reaction cavity;
a source radio frequency for igniting the process gas into a plasma;
the lower electrode assembly according to any one of claims 1 to 10, being located at the bottom of the reaction chamber.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202411660380.1A CN119170554A (en) | 2024-11-19 | 2024-11-19 | Bottom electrode assembly and plasma processing apparatus |
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| CN202411660380.1A CN119170554A (en) | 2024-11-19 | 2024-11-19 | Bottom electrode assembly and plasma processing apparatus |
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| US5708250A (en) * | 1996-03-29 | 1998-01-13 | Lam Resarch Corporation | Voltage controller for electrostatic chuck of vacuum plasma processors |
| CN109559967A (en) * | 2017-09-27 | 2019-04-02 | 三星电子株式会社 | Plasma processing apparatus and method of plasma processing |
| CN112868083A (en) * | 2018-11-20 | 2021-05-28 | 应用材料公司 | Automatic ESC bias compensation using pulsed DC bias |
| CN112997270A (en) * | 2018-11-21 | 2021-06-18 | 应用材料公司 | Edge ring control circuit for shaped DC pulsed plasma processing apparatus |
| CN113078040A (en) * | 2019-12-17 | 2021-07-06 | 东京毅力科创株式会社 | Plasma processing apparatus and plasma processing method |
| CN116250058A (en) * | 2020-11-16 | 2023-06-09 | 应用材料公司 | Apparatus and method for controlling ion energy distribution |
| US20220367158A1 (en) * | 2021-05-12 | 2022-11-17 | Applied Materials, Inc. | Automatic electrostatic chuck bias compensation during plasma processing |
| CN117637572A (en) * | 2022-08-12 | 2024-03-01 | 中微半导体设备(上海)股份有限公司 | Electrostatic chuck with continuously adjustable voltage positive and negative, device and method thereof |
| CN118231210A (en) * | 2022-12-20 | 2024-06-21 | 中微半导体设备(上海)股份有限公司 | Method and device for triggering power source to acquire data |
| WO2024171715A1 (en) * | 2023-02-14 | 2024-08-22 | 東京エレクトロン株式会社 | Plasma processing device |
| CN221304646U (en) * | 2023-10-31 | 2024-07-09 | 中微半导体设备(上海)股份有限公司 | Electrostatic chuck and plasma processing apparatus |
| CN118969594A (en) * | 2024-10-18 | 2024-11-15 | 中微半导体(上海)有限公司 | Plasma processing device and method |
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