CN119170548B - A wafer alignment method and related device - Google Patents
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- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
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Abstract
The invention relates to a wafer alignment method and a related device, wherein the alignment method comprises the steps of selecting a proper alignment mark from chips of a wafer to establish a working menu, recording the positions of the alignment marks, recording the sizes of the chips, using a prealigner to prealign the wafer, placing the wafer on a chuck, recording the target angle of the wafer, performing rough alignment of the wafer, and performing fine alignment of the wafer. The wafer alignment method and the related device improve the alignment mark searching efficiency in the subsequent accurate alignment step by roughly aligning the wafer, and improve the alignment precision of the wafer by executing accurate alignment through the alignment mark at the far end of the wafer.
Description
Technical Field
The present invention relates to the field of semiconductor measurement technology, and in particular, to a wafer alignment method and related apparatus.
Background
The optical critical dimension (Optical Critical Dimension, OCD) measurement technology is widely applied to the field of semiconductor chip manufacturing measurement, and has important significance for quality monitoring, process optimization, cost control, yield improvement and the like of semiconductor products. In a semiconductor OCD inspection apparatus, only a specific area (about 40umx um) of each chip, i.e., die, is typically inspected, each small square in FIG. 1 is a small chip, and the contents of each Die are identical. The wafer has a fixed notch or cut mark, as shown in fig. 1, with a notch at the right middle black point below. Because the wafer detection has high requirements on position positioning, the plane precision error is usually required to be within the micrometer level and the angle precision error is usually required to be within 0.01 degree. When the wafer is taken out from the wafer box, pre-alignment is carried out through the pre-aligner, and the wafer is conveyed to the detection table, because the precision of the pre-aligner is limited, the plane error is usually at the level of fifty microns, the angle error is usually plus or minus 0.1 degree, and the precision cannot meet the detection requirement, the wafer needs to be accurately positioned on the detection table.
The semiconductor measuring device is used as a production device, the production performance efficiency of the semiconductor measuring device directly influences the productivity of a company, so that time-consuming control of accurate positioning on a detection table is particularly important, and if accurate positioning of a wafer can be realized in a short time, the throughput of the device is improved.
Semiconductor metrology equipment typically measures wafers in two steps, establishing a Recipe and performing the Recipe measurement. In the process of executing the Recipe measurement, the wafer stage of searching for the alignment mark and determining the wafer position according to the alignment mark is usually called wafer alignment, and then the wafer is moved to a preset measurement position and measured.
In order to ensure the positioning accuracy of the wafer, the current common measurement is to select a mark in a Die far from the center of the wafer for searching, and correct the wafer through two points. The prior wafer positioning method is shown in figure 1, and comprises the steps of searching a specific mark in a center Die, namely Die 1 in figure 1, recording the position A of the mark, searching the mark in a neighboring Die below the center Die, namely Die 2 in figure 1, recording the position B of the mark, roughly positioning the wafer coordinate through the position A/B, searching the mark in a far-end Die, namely Die 3 and Die 4 in figure 1, respectively, recording the positions C and D, and precisely positioning the wafer coordinate through the position C/D.
In the existing wafer positioning method, the field of view of a camera used by a machine is smaller, when the precision of a prealigner on the machine is insufficient, the initial placement position deviation of the wafer is larger, and the mark searching efficiency in Die 1 and Die 2 in FIG. 1 is lower according to the positioning mode.
Disclosure of Invention
In view of some or all of the problems in the prior art, the present invention provides a wafer alignment method, which includes the following steps:
Selecting a proper alignment mark from chips of a wafer to establish a working menu, recording the positions of the alignment marks, and recording the sizes of the chips, wherein the alignment marks are patterns with obvious shape differences from the surroundings and have obvious boundaries;
Performing pre-alignment on a wafer by using a pre-aligner, placing the wafer on a chuck, and recording a target angle of the wafer, wherein the target angle is the angle of the wafer placed on the chuck;
the method comprises the steps of determining positions of two alignment marks closest to a wafer center point and recording the positions as an optimal first position and an optimal second position when the wafer is ideally placed, determining positions of the two alignment marks closest to the optimal first position and the optimal second position and recording the positions as an actual first position and an actual second position when the wafer is actually placed, determining an actual wafer center point and recording the positions as an actual first center, determining an actual wafer angle and recording the positions as an actual first angle, calculating a difference value between the actual first angle and the target angle and recording the angles as first angle correction, executing rotation of the first angle correction operation on the chuck if the first angle correction is larger than a first set threshold, determining the actual wafer center point and recording the positions as the actual second center after rotation, and completing rough alignment of the wafer if the first angle is smaller than the first set threshold;
The fine alignment of the wafer is performed by determining positions of two alignment marks farthest from a first direction and a second direction of a center point of the wafer when the wafer is ideally placed and recording the positions as ideal first direction positions and ideal second direction positions, performing correction on the ideal first direction positions and the ideal second direction positions to obtain corrected first direction positions and corrected second direction positions, determining positions of two alignment marks closest to the corrected first direction positions and the corrected second direction positions and recording the positions as real first direction positions and real second direction positions when the wafer is actually placed, determining an actual center point of the wafer and recording the positions as a real third center, determining an actual wafer angle and recording the positions as a real second angle, calculating a difference value between the real second angle and the target angle and recording the positions as second angle correction, performing rotation on the chuck to perform the second angle correction operation if the second angle correction is larger than a second set threshold, and completing the fine alignment of the wafer if the second angle correction is smaller than the second set threshold or performing the fine alignment of the wafer.
Further, determining the positions of the two alignment marks nearest to the optimal first position and the optimal second position and recording as the true first position and the true second position when the wafer is actually placed includes:
Moving the chuck to enable the center of the camera to be aligned with the optimal first position to identify and match with the alignment mark, searching around if the alignment mark is not found, determining the position of the alignment mark closest to the optimal first position and recording the position as a real first position;
And moving the chuck to enable the center of the camera to be aligned with the optimal second position to identify and match the alignment mark, searching around if the alignment mark is not found, determining the position of the alignment mark closest to the optimal second position, and recording the position as a true second position.
Further, according to the optimal first position, the optimal second position, the real first position and the real second position, determining an actual wafer center point and recording the actual wafer center point as a real first center, and determining an actual wafer angle and recording the actual wafer angle as a real first angle;
the true first angle Represented by the following formula (i) and (ii),
Wherein, ,,
Wherein, For the x-coordinate of the true first position,For the x-coordinate of the true second position,For the y-coordinate of the true first position,For the y-coordinate of the true second position,For the x-coordinate of the optimal first position,For the x-coordinate of the optimal second position,For the y-coordinate of the optimal first position,A y-coordinate for the optimal second position;
Setting up ,
Will beRotating the true first angle to obtain a vectorIn order to achieve this, the first and second,
The true first centerIn order to achieve this, the first and second,
Wherein, 。
Further, if the first angle correction is greater than the first set threshold, performing the rotating the first angle correction operation on the chuck includes:
If the first angle correction is positive, performing a counter-rotation on the chuck, and/or
And if the first angle correction is negative, performing forward rotation on the chuck.
Further, according to the true second center and the first angle correction, correction is performed on the ideal first direction position and the ideal second direction position, and a corrected first direction position and a corrected second direction position are obtained;
the first direction position is corrected Represented by the following formula (i) and (ii),
The corrected second direction positionRepresented by the following formula (i) and (ii),
Wherein, For the desired first directional position,For the desired second directional position,Is the true second center;
Represented by the following formula (i) and (ii),
Wherein, ,And correcting the first angle.
Further, determining an actual wafer center point and recording as an actual third center, determining an actual wafer angle and recording as an actual second angle according to the corrected first direction position, the corrected second direction position, the actual first direction position and the actual second direction position;
The true second angle Represented by the following formula (i) and (ii),
Wherein, ,,
Wherein, For the x-coordinate of the true first directional position,For the x-coordinate of the true second direction position,For the y-coordinate of the true first directional position,For the y-coordinate of the true second direction position,For said correcting the x-coordinate of the first directional position,For the correction of the x-coordinate of the second direction position,For said correcting the y-coordinate of the first directional position,A y-coordinate for the corrected second direction position;
Setting up ,
Will beRotating the true second angle to obtain a vectorIn order to achieve this, the first and second,
The true third centerIn order to achieve this, the first and second,
Wherein, 。
Further, the first direction and the second direction are two of a positive transverse direction, a negative transverse direction, a positive longitudinal direction, and a negative longitudinal direction.
Further, the first set threshold is 0.01 DEG, and/or
The second set threshold is 0.01 DEG, and/or
The upper limit is set to 5 times.
The invention also provides a wafer alignment device for the wafer alignment method, which comprises the following steps:
a computer configured to calculate and store data;
a chuck configured to move or rotate a wafer;
a camera configured to identify a matching alignment mark;
a prealigner configured to perform prealignment on the wafer.
The present invention also provides a computer system comprising:
A processor configured to execute machine-readable instructions;
a display card configured to train the wafer alignment method, and
A memory configured to store machine-readable instructions that, when executed by the processor and/or the graphics card, perform the steps of the wafer alignment method.
Compared with the prior art, the invention has the following advantages:
1. according to the wafer alignment method and the related device, the rough alignment is carried out on the wafer, so that the alignment mark searching efficiency in the subsequent accurate alignment step is improved.
2. The wafer alignment method and the related device provided by the invention can reduce the requirement on the precision of the prealigner by executing rough alignment near the center of the wafer, namely, the rough alignment can be quickly realized when the prealigner with slightly poorer performance is used.
3. According to the wafer alignment method and the related device, the accurate alignment is performed through the alignment mark at the far end of the wafer, so that the alignment accuracy of the wafer is improved.
Drawings
To further clarify the above and other advantages and features of embodiments of the present invention, a more particular description of embodiments of the invention will be rendered by reference to the appended drawings. It is appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. In the drawings, for clarity, the same or corresponding parts will be designated by the same or similar reference numerals.
FIG. 1 is a schematic diagram of a prior art wafer positioning method;
FIG. 2 is a flow chart of a wafer alignment method according to one embodiment of the invention;
FIG. 3 is a schematic view showing the location of alignment marks on a wafer according to one embodiment of the present invention, and
Fig. 4 shows a schematic view of the actual placement of a wafer on a chuck according to one embodiment of the invention.
Detailed Description
In the following description, the present invention is described with reference to various embodiments. One skilled in the relevant art will recognize, however, that the embodiments may be practiced without one or more of the specific details, or with other alternative and/or additional methods or components. In other instances, well-known structures or operations are not shown or described in detail to avoid obscuring aspects of the invention. Similarly, for purposes of explanation, specific numbers and configurations are set forth in order to provide a thorough understanding of embodiments of the present invention. However, the invention is not limited to these specific details.
Reference throughout this specification to "one embodiment" or "the embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment.
It should be noted that the embodiments of the present invention describe the steps of the method in a specific order, however, this is merely for the purpose of illustrating the specific embodiments, and not for limiting the order of the steps. In contrast, in different embodiments of the present invention, the sequence of each step may be adjusted according to the adjustment of the actual requirement.
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
Fig. 2 is a flow chart of a wafer alignment method according to an embodiment of the invention. As shown in fig. 2, the wafer alignment method includes the steps of:
Firstly, selecting proper alignment marks from chips (Die) of a wafer to establish a working menu, recording the positions of the alignment marks, and recording the sizes of the chips. The alignment mark (mark) is a pattern having a distinct shape difference from the surroundings, and has a distinct boundary. In one embodiment of the present invention, the alignment marks are of various kinds, and different wafers may select different patterns as the alignment marks. In one embodiment of the present invention, a plurality of the alignment marks may be recorded at the same time, and the more the alignment marks, the more efficient it is to search for the alignment marks, but the higher the storage cost is.
Next, a pre-alignment is performed on the wafer using a pre-aligner, the wafer is placed on a chuck, and a target angle of the wafer is recorded (TARGETANGLE). The target angle refers to the angle at which the wafer is placed on the chuck (chuck) because subsequent measurements of the wafer can only be made at a specific angle. The wafer has a fixed notch or cut mark, as shown in fig. 1, with a notch at the right middle black point below. The target angle is generally referred to as notch orientation. The wafer is produced according to a specific rule, and the distribution of chips in the wafer is generally distributed along the downward transverse direction or the longitudinal direction of the wafer notch, wherein the transverse direction is the horizontal direction, and the longitudinal direction is the vertical direction. The position of each alignment mark in each chip is fixed, so that the wafer notch orientation can be calculated by the alignment mark coordinates in both chips in the horizontal direction or in the vertical direction.
Next, rough alignment of the wafer is performed. The rough alignment of the wafer includes the steps of:
And determining a first position set of the alignment marks in a plurality of chips positioned near the origin of coordinates according to the positions of the alignment marks in the working menu and the sizes of the chips, wherein the first position set comprises a plurality of first positions, and each first position is the position of the alignment mark relative to the origin of coordinates. The origin of coordinates is the ideal wafer center point. When the working menu is established, three points for identifying the edge of the wafer are recorded to calculate an ideal wafer center point. The first position set is a position set in the case that the actual center point of the wafer coincides with the origin of coordinates. The position of the alignment mark may include a plurality of positions, such as the A1/A2/A3/A4 positions shown in FIG. 3. As shown in fig. 4, the center point of the ideal placement position of the wafer is the origin of coordinates, the horizontal right side is the positive x-axis direction, and the vertical upper side is the positive y-axis direction.
And determining a first position corresponding to the alignment mark closest to the origin of coordinates in the first position set, and recording the first position as the optimal first position.
And moving the chuck to enable the center of the camera to be aligned with the optimal first position to identify and match the alignment mark, searching around if the alignment mark is not found, determining the position of the alignment mark closest to the optimal first position, and recording the position as a real first position. The camera is fixed in position and located above the origin of coordinates of the chuck, and the camera has a smaller field of view, and can only see a local small-range image on the wafer. By moving the chuck, a designated area on the wafer is displayed within the camera field of view. In one embodiment of the invention, the camera recognizes that the alignment mark is matched, and the location of the alignment mark in the field of view can be found by GMF algorithm. The size of the surrounding range is determined by the maximum distance that the maximum error of the prealigner can cause the alignment mark to be out of the camera's field of view.
And calculating the difference value between the real first position and the optimal first position and recording the difference value as a real zeroth center. The coordinates of the true zeroth center are the coordinates of the true first position minus the coordinates of the optimal first position.
And determining the position of the alignment mark nearest to the true zeroth center and recording the position as the optimal second position.
And moving the chuck to enable the center of the camera to be aligned with the optimal second position to identify and match the alignment mark, searching around if the alignment mark is not found, determining the position of the alignment mark closest to the optimal second position, and recording the position as a true second position. In one embodiment of the invention, the camera recognizes that the alignment mark is matched, and the location of the alignment mark in the field of view can be found by GMF algorithm. The size of the surrounding range is determined by the maximum distance that the maximum error of the prealigner can cause the alignment mark to be out of the camera's field of view.
And determining an actual wafer center point according to the optimal first position, the optimal second position, the actual first position and the actual second position, recording the actual wafer center point as an actual first center, and determining an actual wafer angle and recording the actual wafer angle as an actual first angle.
As shown in fig. 4, the horizontal right side is the positive x-axis direction, and the vertical upper side is the positive y-axis direction. The center point of the ideal placement position of the wafer is the origin of coordinates, and the optimal first position and the optimal second position are the positions of the alignment marks in the ideal placement position of the wafer. The actual placing position of the wafer deviates from the ideal placing position of the wafer, and the real first position and the real second position are the positions of the alignment marks in the actual placing position of the wafer.
The true first angleRepresented by the following formula (i) and (ii),
Wherein, ,
,
Wherein, For the x-coordinate of the true first position,For the x-coordinate of the true second position,For the y-coordinate of the true first position,For the y-coordinate of the true second position,For the x-coordinate of the optimal first position,For the x-coordinate of the optimal second position,For the y-coordinate of the optimal first position,A y-coordinate for the optimal second position;
Setting up ,
Will beRotating the true first angle to obtain a vectorIn order to achieve this, the first and second,
The true first centerIn order to achieve this, the first and second,
Wherein, 。
And calculating the difference between the actual first angle and the target angle and recording the difference as first angle correction. The first angle correction AngleOffset is AngleOffset 1= REALANGLE1 to TARGETANGLE.
And if the first angle correction is smaller than a first set threshold value, completing rough alignment of the wafer. In one embodiment of the present invention, the first set threshold is 0.01 degrees.
And if the first angle correction is larger than the first set threshold, rotating the chuck by the first angle correction operation, assigning the first angle correction value to be 0 after rotating, determining an actual wafer center point, and recording the actual wafer center point as a real second center. In one embodiment of the invention, reverse rotation is performed on the chuck if the first angle correction is positive and/or forward rotation is performed on the chuck if the first angle correction is negative.
Finally, fine alignment of the wafer is performed. The fine alignment of the wafer comprises the following steps:
And determining the position of the alignment mark in the chip farthest from the first direction of the origin of coordinates according to the position of the alignment mark in the working menu and the size of the chip, and recording the position as an ideal first direction position.
And performing correction on the ideal first direction position according to the real second center and the first angle correction to obtain a corrected first direction position.
The first direction position is correctedRepresented by the following formula (i) and (ii),
Wherein, For the desired first directional position,Is the true second center;
Represented by the following formula (i) and (ii),
Wherein, ,And correcting the first angle.
And determining the position of the alignment mark in the chip farthest from the second direction of the coordinate origin according to the position of the alignment mark in the working menu and the size of the chip, and recording the position as an ideal second direction position. In one embodiment of the invention, the first direction and the second direction are two of a positive lateral direction, a negative lateral direction, a positive longitudinal direction, a negative longitudinal direction. As shown in fig. 3, xmax, which is the farthest from the coordinate origin in the positive lateral direction, is the diagram E position, xmin, which is the farthest from the coordinate origin in the negative lateral direction, is the diagram D position, ymax, which is the farthest from the coordinate origin in the positive longitudinal direction, is the diagram B position, and Ymin, which is the farthest from the coordinate origin in the negative longitudinal direction, is the diagram C position.
And according to the real second center and the first angle correction, performing correction on the ideal second direction position to obtain a corrected second direction position.
The corrected second direction positionRepresented by the following formula (i) and (ii),
Wherein, For the desired second directional position,Is the true second center;
Represented by the following formula (i) and (ii),
Wherein, ,And correcting the first angle.
And moving the chuck to enable the camera center to be aligned with the corrected first direction position to identify and match the alignment mark, searching around if the alignment mark is not found, determining the position of the alignment mark closest to the corrected first direction position, and recording the position as a true first direction position. In one embodiment of the invention, the camera recognizes that the alignment mark is matched, and the location of the alignment mark in the field of view can be found by GMF algorithm. The size of the surrounding range is determined by the maximum distance that the maximum error of the prealigner can cause the alignment mark to be out of the camera's field of view.
And moving the chuck to enable the center of the camera to be aligned with the corrected second direction position to identify and match the alignment mark, searching around if the alignment mark is not found, determining the position of the alignment mark closest to the corrected second direction position, and recording the position as a true second direction position. In one embodiment of the invention, the camera recognizes that the alignment mark is matched, and the location of the alignment mark in the field of view can be found by GMF algorithm. The size of the surrounding range is determined by the maximum distance that the maximum error of the prealigner can cause the alignment mark to be out of the camera's field of view.
And determining an actual wafer center point and recording as an actual third center according to the corrected first direction position, the corrected second direction position, the actual first direction position and the actual second direction position, and determining an actual wafer angle and recording as an actual second angle.
The true second angleRepresented by the following formula (i) and (ii),
Wherein, ,
,
Wherein, For the x-coordinate of the true first directional position,For the x-coordinate of the true second direction position,For the y-coordinate of the true first directional position,For the y-coordinate of the true second direction position,For said correcting the x-coordinate of the first directional position,For the correction of the x-coordinate of the second direction position,For said correcting the y-coordinate of the first directional position,A y-coordinate for the corrected second direction position;
Setting up ,
Will beRotating the true second angle to obtain a vectorIn order to achieve this, the first and second,
The true third centerIn order to achieve this, the first and second,
Wherein, 。
And calculating the difference between the actual second angle and the target angle and recording the difference as second angle correction. The second angle correction AngleOffset is AngleOffset 2= REALANGLE2 to TARGETANGLE.
And if the second angle correction is smaller than a second set threshold value, finishing the fine alignment of the wafer. In one embodiment of the present invention, the second set threshold is 0.01 degrees.
And if the second angle correction is larger than the second set threshold, rotating the chuck by the second angle correction operation, assigning the second angle correction value to be 0 after rotating, and repeatedly executing fine alignment of the wafer.
If the number of times of performing the fine alignment of the wafer reaches the set upper limit, the fine alignment of the wafer is stopped. In one embodiment of the invention, the set upper limit is 5 times. In general, the fine alignment of the wafer is repeated 2 times, so that the requirement that the second angle correction is smaller than the second set threshold can be satisfied.
The wafer alignment method provided by the invention improves the alignment mark searching efficiency in the subsequent precise alignment step by roughly aligning the wafer, can reduce the requirement on the precision of the pre-aligner by roughly aligning the wafer near the center of the wafer, and improves the alignment precision of the wafer by precisely aligning the alignment mark at the far end of the wafer.
In one embodiment of the present invention, the present invention further provides a wafer alignment apparatus for implementing the wafer alignment method. The wafer alignment apparatus includes a computer configured to calculate and store data generated in the wafer alignment method, a chuck configured to move or rotate a wafer such that a camera center alignment requires identification of a matching alignment mark, a camera configured to identify the matching alignment mark, and a prealigner configured to perform prealignment on the wafer.
In one embodiment of the invention, the invention also provides a computer system comprising a processor, a graphics card, and a memory, the memory configured to store machine-readable instructions, the graphics card configured to train the wafer alignment method, the processor configured to execute the machine-readable instructions. When the processor and/or the display card execute machine-readable instructions, the following processing steps are realized, namely, a proper alignment mark is selected from chips of a wafer to establish a working menu, the positions of the alignment marks are recorded, the sizes of the chips are recorded, a prealigner is used for prealigning the wafer, the wafer is placed on a chuck, the target angle of the wafer is recorded, rough alignment of the wafer is executed, and fine alignment of the wafer is executed.
The graphics card can be preferably a graphics card with GPU computing power higher than 5.0 models, and the training speed can be remarkably improved by providing the graphics card configuration due to the large data size required to be trained.
The Memory may include a U disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic or optical disk, or other various media capable of storing machine-readable instructions.
It will be appreciated that the above-mentioned computer system may further include other software and hardware components not listed in the specification besides the above-mentioned memory and processor, and may be specifically determined according to the model of the specific data processing apparatus in different application scenarios, which will not be listed in detail in this specification.
While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to those skilled in the relevant art that various combinations, modifications, and variations can be made therein without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.
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Denomination of invention: A wafer alignment method and related device Granted publication date: 20250307 Pledgee: Shanghai Rural Commercial Bank Co.,Ltd. Shanghai Yangtze River Delta Integration Demonstration Zone Branch Pledgor: Shanghai Norinco Semiconductor Equipment Co.,Ltd. Registration number: Y2025310000485 |