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CN119051437B - Trimming circuit, trimming system and switching power supply - Google Patents

Trimming circuit, trimming system and switching power supply Download PDF

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Publication number
CN119051437B
CN119051437B CN202411524124.XA CN202411524124A CN119051437B CN 119051437 B CN119051437 B CN 119051437B CN 202411524124 A CN202411524124 A CN 202411524124A CN 119051437 B CN119051437 B CN 119051437B
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China
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voltage
switch
resistor
module
modules
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CN202411524124.XA
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CN119051437A (en
Inventor
刘欢
李海波
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Shenzhen Weiyuan Semiconductor Co ltd
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Shenzhen Weiyuan Semiconductor Co ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Amplifiers (AREA)

Abstract

The application is suitable for the technical field of switching power supplies, and provides a trimming circuit, a trimming system and a switching power supply. The trimming circuit comprises a first resistor module, a first switch module, a second resistor module and a second switch module. When the first switch module is in a conducting state and the c second switch module is in a conducting state, the voltage difference between the first output end and the first input end is the sum of the first voltage and the second voltage, and the voltage difference between the second output end and the second input end is the sum of the third voltage, the fourth voltage and the fifth voltage. When the first second switch module is in a conducting state and the f first switch module is in a conducting state, the voltage difference between the first output end and the first input end is the sum of the sixth voltage, the seventh voltage and the eighth voltage, and the voltage difference between the second output end and the second input end is the sum of the ninth voltage and the tenth voltage. The trimming circuit provided by the embodiment of the application can reduce the layout area of the trimming circuit.

Description

Trimming circuit, trimming system and switching power supply
Technical Field
The application belongs to the technical field of switching power supplies, and particularly relates to a trimming circuit, a trimming system and a switching power supply.
Background
With rapid development of technology, DC-DC switching power supplies are widely used in various electronic devices, including Active-Matrix Organic Light-Emitting Diode (AMOLED), which is a consumer electronic product, due to their high efficiency and flexibility. AMOLED has higher requirements on the output precision of a DC-DC switching power supply, and an error amplifier circuit is taken as an important component of the whole system, and the precision of the error amplifier circuit directly influences the performance of a chip. In general, when an input stage of an error amplifier adopts an MOS tube for input, larger offset voltage exists, which has a larger influence on the precision of a system. To solve this problem, conventional trimming circuits generally employ a transmission gate and a resistor connected correspondingly. By controlling the on and off of the transmission gate, the number of resistors in series between the input and output terminals can be selected to determine the voltage difference between the output and input terminals. However, this design allows the resistance of the transmission gate to also account for the magnitude of the voltage difference. In order to reduce the influence of the resistance of the transmission gate on the accuracy, it is necessary to reduce the electrical impedance of the transmission gate as much as possible, which requires that the size of the transmission gate must be large, resulting in a large layout area of the trimming circuit.
Disclosure of Invention
The embodiment of the application provides a trimming circuit, a trimming system and a switching power supply, which can solve the problem that the layout area of the conventional trimming circuit is large.
In a first aspect, the embodiment of the application provides a trimming circuit, which comprises a first resistor module, a first switch module, b second resistor modules and b second switch modules, wherein the a first resistor modules are sequentially connected in series, the first resistor modules and the first switch modules are in one-to-one correspondence, the first end of each first resistor module is electrically connected with the first end of the corresponding first switch module, the second ends of all the first switch modules are electrically connected with each other, the first end of the first resistor module is used as a first output end of the trimming circuit, the second end of the first resistor module is used as a first input end of the trimming circuit, and the b second resistor modules are sequentially connected in series, the first end of each second resistor module is electrically connected with the first end of the corresponding second switch module, the first ends of all the second switch modules are used as a first input end of the trimming circuit, and the second ends of the second resistor modules are used as second input ends of the trimming circuit, and the first ends of the second resistor modules are more than or equal to 2;
When a first one of the first switch modules is in an on state and a c-th one of the second switch modules is in an on state, a difference between voltages of the first output terminals and the first input terminals is a sum of a first voltage which is a product of a sum of impedances of all the first resistor modules and a first current, and a second voltage which is a product of an impedance of the first one of the first switch modules and a bias current, wherein a difference between voltages of the second output terminals and the second input terminals is a sum of a third voltage which is a product of a sum of impedances of d second resistor modules and the first current, a fourth voltage which is a product of a sum of impedances of e second resistor modules and a second current, and a fifth voltage which is a product of an impedance of c-th one of the second switch modules and the bias current, wherein c, d, e are integers, 1<c b, d=b-c=1-c-1;
When a first of the second switch modules is in an on state and a f-th of the first switch modules is in an on state, a difference between voltages of the first output terminal and the first input terminal is a sum of a sixth voltage, a seventh voltage and an eighth voltage, the sixth voltage is a product of a sum of impedances of g of the first switch modules and the first current, the seventh voltage is a product of a sum of impedances of h of the first switch modules and the second current, the eighth voltage is a product of an impedance of f of the first switch modules and the bias current, a difference between voltages of the second output terminal and the second input terminal is a sum of a ninth voltage and a tenth voltage, the ninth voltage is a product of a sum of impedances of all the second switch modules and the first current, the tenth voltage is a product of an impedance of the first switch module and the bias current, the impedance of all the first switch modules and the bias current are equal to each other, and the first and the bias currents are equal to each other, and the first and the second voltages are equal to each other, and the first and the bias currents are equal to each other, and the first and second voltages are equal to each other.
In a possible implementation manner of the first aspect, the impedance of each first resistor module is equal, the impedance of each second resistor module is equal, and the impedance of the first resistor module is equal to the impedance of the second resistor module.
In a possible implementation manner of the first aspect, the first resistor module includes a first resistor, a first resistors are sequentially connected in series, first ends of all the first resistors are electrically connected with corresponding first ends of the first switch modules, a first end of the first resistor is used as a first output end of the trimming circuit, and a second end of the a first resistor is used as a first input end of the trimming circuit and is used for receiving the first voltage signal.
In a possible implementation manner of the first aspect, the first switch module includes first switch tubes, gates of all the first switch tubes are used for receiving the first control signals, sources of all the first switch tubes are electrically connected, and drains of each of the first switch tubes are electrically connected with a first end of a corresponding first resistor module.
In a possible implementation manner of the first aspect, the second resistor module includes a second resistor, b second resistors are sequentially connected in series, a first end of each second resistor is electrically connected to a corresponding first end of the second switch module, a first end of the first second resistor is used as a second output end of the trimming circuit, and a second end of the b second resistor is used as a second input end of the trimming circuit, and is used for receiving the second voltage signal.
In a possible implementation manner of the first aspect, the second switching module includes second switching tubes, gates of all the second switching tubes are used for receiving second control signals, sources of all the second switching tubes are electrically connected, and a drain of each second switching tube is electrically connected with a first end of a corresponding second resistor module.
In a possible implementation manner of the first aspect, the first switching tube and the second switching tube are PMOS tubes.
In a possible implementation manner of the first aspect, the trimming circuit further includes a driving module, where the driving module is electrically connected to all the first switch modules and all the second switch modules, and the driving module is configured to output a first control signal to the first switch modules and is further configured to output a second control signal to the second switch modules.
In a second aspect, an embodiment of the present application provides a trimming system, including an error amplifier and any one of the trimming circuits in the first aspect, where a first input end of the error amplifier is electrically connected to a first output end of the trimming circuit, a second input end of the error amplifier is electrically connected to a second output end of the trimming circuit, and an output end of the error amplifier is used to output a target voltage.
In a third aspect, an embodiment of the present application provides a switching power supply, including the trimming system described in the second aspect.
Compared with the prior art, the embodiment of the application has the beneficial effects that:
The trimming circuit provided by the embodiment of the application comprises a first resistor module, a first switch module, b second resistor modules and b second switch modules. When the correction circuit is used, the first output end of the correction circuit is electrically connected with the first input end of the error amplifier, and the second output end of the correction circuit is electrically connected with the second input end of the error amplifier. When the first switch module is in a conducting state and the c second switch module is in a conducting state, the difference between the voltages of the first output end and the first input end is the sum of the first voltage and the second voltage, and the difference between the voltages of the second output end and the second input end is the sum of the third voltage, the fourth voltage and the fifth voltage. Therefore, if no voltage signal is input to the first input terminal and the second input terminal, the difference between the voltages of the first output terminal and the second output terminal is the sum of the first voltage and the second voltage minus the sum of the third voltage, the fourth voltage and the fifth voltage. Since the impedances of all the first switch modules are equal to those of all the second switch modules, the second voltage is equal to the fifth voltage. The voltage difference between the first output end and the second output end only has a corresponding relation with the impedance of the first resistor module, the impedance of the second resistor module and the first current and the second current, and is irrelevant to the impedance of the first switch module and the impedance of the second switch module. Similarly, when the first second switch module is in the on state and the f first switch module is in the on state, the eighth voltage is equal to the tenth voltage. The voltage difference between the first output end and the second output end only has a corresponding relation with the impedance of the first resistor module, the impedance of the second resistor module and the first current and the second current, and is irrelevant to the impedance of the first switch module and the impedance of the second switch module. Therefore, the trimming circuit provided by the embodiment of the application can offset the product of the impedance of the first switch module and the bias current from the product of the impedance of the second switch module and the bias current. Therefore, when the offset voltage of the error amplifier is trimmed, the impedance of the first switch module and the impedance of the second switch module do not need to be considered. The size of the first switch module and the second switch module can be further reduced by increasing the impedance of the first switch module and the impedance of the second switch module, so that the layout area of the trimming circuit is reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a circuit connection of an input of a conventional error amplifier;
FIG. 2 is a schematic diagram of a circuit connection of a conventional trimming circuit;
FIG. 3 is a schematic block diagram of a trimming circuit according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a circuit connection of a trimming circuit according to an embodiment of the present application;
fig. 5 is a schematic block diagram of a trimming system according to an embodiment of the present application.
In the figure, 10 parts of trimming circuit, 101 parts of first resistance module, 102 parts of first switch module, 103 parts of second resistance module, 104 parts of second switch module and 20 parts of error amplifier.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in the present description and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context. Similarly, the phrase "if a determination" or "if a [ described condition or event ] is detected" may be interpreted in the context of meaning "upon determination" or "in response to determination" or "upon detection of a [ described condition or event ]" or "in response to detection of a [ described condition or event ]".
Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
As shown in fig. 1, when the input stage of the error amplifier adopts MOS transistor input, a larger offset voltage exists, which has a larger influence on the precision of the system. In order to solve this problem, as shown in fig. 2, in the conventional trimming circuit, for example, 3 bits are adopted, and the transmission gates (S1B to S6) and the resistors (R1 to R8) are correspondingly connected. By controlling the on and off of the transmission gate, the number of resistors in series between the input and output terminals can be selected to determine the voltage difference between the output and input terminals. For example, if the transmission gate S4 is turned on, the voltage difference between OUTP and INP is Ib (r2+r3+r4), the voltage difference between OUTN and INN is Ib (r5+r6+r7+r8), and if the resistance of all resistors is R, the voltage difference between INN and INP is Ib R, i.e., 1 lsb=ib. Thus, trim for offset voltage is realized by changing the magnitude of the voltage difference between INN and INP. However, this design allows the resistance of the transmission gate to also account for the magnitude of the voltage difference. Therefore, the actual 1bit trig voltage is 1.6mv+ib×rtg, where RTG is the on-resistance of the transmission gate. In order to reduce the influence of the resistance of the transmission gate on the accuracy, it is necessary to reduce the electrical impedance of the transmission gate as much as possible, which requires that the size of the transmission gate must be large, resulting in a large layout area of the trimming circuit. And a large number of transmission gates are arranged, so that the trimming precision is affected to a certain extent.
The offset voltage of the error amplifier is the deviation between the voltage output by the output end of the error amplifier and the voltage output under ideal condition when no input signal exists. Ideally, the voltages at the two input ends of the error amplifier are equal, and the output voltage should be zero, but due to the error existing in the design of the internal circuit of the error amplifier, a differential voltage, namely an offset voltage, is often required to be applied to the input ends in actual operation.
It should be noted that, the transmission gate is composed of PMOS and NMOS, and the on-resistance of the transmission gate is inversely proportional to the size of the transmission gate. The dimensions of the transmission gate are the channel length and width of the transmission gate, and the shorter the channel length and the wider the width are, the smaller the on-resistance of the transmission gate is.
Based on the above problems, the trimming circuit provided by the embodiment of the application comprises a first resistor module, a first switch module, b second resistor modules and b second switch modules. When the correction circuit is used, the first output end of the correction circuit is electrically connected with the first input end of the error amplifier, and the second output end of the correction circuit is electrically connected with the second input end of the error amplifier. When the first switch module is in a conducting state and the c second switch module is in a conducting state, the difference between the voltages of the first output end and the first input end is the sum of the first voltage and the second voltage, and the difference between the voltages of the second output end and the second input end is the sum of the third voltage, the fourth voltage and the fifth voltage. Therefore, if no voltage signal is input to the first input terminal and the second input terminal, the difference between the voltages of the first output terminal and the second output terminal is the sum of the first voltage and the second voltage minus the sum of the third voltage, the fourth voltage and the fifth voltage. Since the impedances of all the first switch modules are equal to those of all the second switch modules, the second voltage is equal to the fifth voltage. The voltage difference between the first output end and the second output end only has a corresponding relation with the impedance of the first resistor module, the impedance of the second resistor module and the first current and the second current, and is irrelevant to the impedance of the first switch module and the impedance of the second switch module. Similarly, when the first second switch module is in the on state and the f first switch module is in the on state, the eighth voltage is equal to the tenth voltage. The voltage difference between the first output end and the second output end only has a corresponding relation with the impedance of the first resistor module, the impedance of the second resistor module and the first current and the second current, and is irrelevant to the impedance of the first switch module and the impedance of the second switch module. Therefore, the trimming circuit provided by the embodiment of the application can offset the product of the impedance of the first switch module and the bias current from the product of the impedance of the second switch module and the bias current. Therefore, when the offset voltage of the error amplifier is trimmed, the impedance of the first switch module and the impedance of the second switch module do not need to be considered. The size of the first switch module and the second switch module can be further reduced by increasing the impedance of the first switch module and the impedance of the second switch module, so that the layout area of the trimming circuit is reduced.
In order to illustrate the technical scheme of the application, the following description is made by specific examples.
Fig. 3 shows a schematic block diagram of the trimming circuit 10 according to an embodiment of the present application. Referring to fig. 3, the trimming circuit 10 includes a first resistor module 101, a first switch module 102, b second resistor modules 103 and b second switch modules 104, where the a first resistor modules 101 are sequentially connected in series, the first resistor modules 101 and the first switch modules 102 are in one-to-one correspondence, the first end of each first resistor module 101 is electrically connected with the first end of the corresponding first switch module 102, the second ends of all the first switch modules 102 are electrically connected with each other, the first end of the first resistor module 101 is used as a first output end OUTP of the trimming circuit 10, the second end of the first resistor module 101 is used as a first input end INP of the trimming circuit 10 for receiving a first voltage signal, the b second resistor modules 103 are sequentially connected in series, the first end of each second resistor module 103 is electrically connected with the first end of the corresponding second switch module 104, the second ends of all the second switch modules 104 are electrically connected with each other, the first end of the first resistor module 103 is used as a first input end INP of the trimming circuit 10, and the second end OUTP of the second resistor module 103 is used as a second output end OUTP of the trimming circuit 10, and the second output end OUTP of the second circuit 10 is equal to or more than or equal to 2.
Specifically, in use, the first output terminal OUTP of the trimming circuit 10 is electrically connected to the first input terminal of the error amplifier, and the second output terminal OUTN of the trimming circuit 10 is electrically connected to the second input terminal of the error amplifier. When the first switch module 102 is in the on state and the c second switch module 104 is in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage, which is the product of the sum of the impedances of all the first resistor modules 101 and the first current I1, and the second voltage, which is the product of the impedance of the first switch module 102 and the bias current IB. The difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of a third voltage, which is the product of the sum of the impedances of the d second resistor modules 103 and the first current I1, a fourth voltage, which is the product of the sum of the impedances of the e second resistor modules 103 and the second current I2, and a fifth voltage, which is the product of the impedance of the c-th second switch module 104 and the bias current IB, wherein c, d, e are integers, 1<c is less than or equal to b, d=b-c+1, e=c-1.
When the first second switch module 104 is in the on state and the f-th first switch module 102 is in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is a sum of a sixth voltage, which is a product of a sum of the impedances of the g first resistor modules 101 and the first current I1, a seventh voltage, which is a product of a sum of the impedances of the h first resistor modules 101 and the second current I2, and an eighth voltage, which is a product of the impedance of the f-th first switch module 102 and the bias current IB. The difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of a ninth voltage and a tenth voltage, the ninth voltage is the product of the sum of the impedances of all the second resistor modules 103 and the first current I1, the tenth voltage is the product of the impedance of the first second switch module 104 and the bias current IB, the impedance of all the first switch modules 102 is equal to the impedance of all the second switch modules 104, f, g, h are integers, 1<f is less than or equal to a, g=a-f+1, and h=f-1.
In summary, when the first switch module 102 is in the on state and the c-th second switch module 104 is in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, and the difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of the third voltage, the fourth voltage and the fifth voltage. Therefore, if no voltage signal is input to the first input terminal INP and the second input terminal INN, the difference between the voltages of the first output terminal OUTP and the second output terminal OUTN is the sum of the first voltage and the second voltage minus the sum of the third voltage, the fourth voltage and the fifth voltage. Since the impedance of all the first switch modules 102 is equal to the impedance of all the second switch modules 104, the second voltage is equal to the fifth voltage. The resulting difference between the voltages at the first output terminal OUTP and the second output terminal OUTN is only related to the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and is independent of the impedance of the first switch module 102 and the impedance of the second switch module 104. Similarly, when the first second switch module 104 is in the on state and the f first switch module 102 is in the on state, the eighth voltage is equal to the tenth voltage. The resulting difference between the voltages at the first output terminal OUTP and the second output terminal OUTN is only related to the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and is independent of the impedance of the first switch module 102 and the impedance of the second switch module 104. It can be seen that the trimming circuit 10 provided in the embodiment of the application can offset the product of the impedance of the first switch module 102 and the bias current IB from the product of the impedance of the second switch module 104 and the bias current IB. Therefore, the magnitudes of the impedances of the first switch module 102 and the second switch module 104 do not need to be considered when trimming the offset voltage of the error amplifier. That is, the layout area of the trimming circuit 10 can be reduced by increasing the impedance of the first switch module 102 and the impedance of the second switch module 104, thereby reducing the size of the first switch module 102 and the second switch module 104.
It should be noted that, the first switch module 102 and the first second switch module 104 are all default switch modules, and the remaining first switch modules 102 and the remaining second switch modules 104 are all working switch modules. If any of the first switch modules 102 is turned on, the default switch module of the second switch module 104 is turned on. If any of the second switch modules 104 is turned on, the default switch module of the first switch module 102 is turned on. That is, the normal operation of the trimming circuit 10 is ensured only by ensuring that at least one first switch module 102 is turned on and at least one second switch module 104 is turned on.
The bias current IB is a sum of vectors of the first current I1 and the second current I2, wherein the directions of the first current I1 and the second current I2 are opposite. The first current I1 may be a current flowing from the first output terminal OUTP (or the second output terminal OUTN) to the first input terminal INP (or the second input terminal INN), and the second current I2 may be a current flowing from the first input terminal INP (or the second input terminal INN) to the first output terminal OUTP (or the second output terminal OUTN).
It should be noted that, in order to achieve more balanced adjustment of offset voltages, the number of the first resistor modules 101 connected in series to the first input terminal INP and the first output terminal OUTP and the number of the second resistor modules 103 connected in series to the second input terminal INN and the second output terminal OUTN may be set to be the same. Accordingly, the number of the first switch modules 102 and the number of the second switch modules 104 are also set to be the same.
By way of example, the value of a may be set to 4 and the value of b may be set to 4. The value of c is set to 2, the value of d is set to 3,e, and the value of 1. When the 1 st first switch module 102 is in the on state and the 2 nd second switch module 104 is in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of the 4 first resistor modules 101 and the first current I1, and the second voltage is the product of the impedance of the 1 st first switch module 102 and the bias current IB. The difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of a third voltage, which is the product of the sum of the impedances of the 3 second resistor modules 103 and the first current I1, a fourth voltage, which is the product of the impedance of the 1 second resistor module 103 and the second current I2, and a fifth voltage, which is the product of the impedance of the 2 nd second switch module 104 and the bias current IB. Wherein the impedance of the 1 st first switch module 102 is equal to the impedance of the 2 nd second switch module 104. Thus, the voltage difference between the first output terminal OUTP and the second output terminal OUTN is only corresponding to the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and is independent of the impedance of the first switch module 102 and the impedance of the second switch module 104. Similarly, the value of f may be set to 2, the value of g may be set to 3, and the value of h may be set to 1. Wherein the impedance of the 2 nd first switch module 102 is equal to the impedance of the 1 st second switch module 104. The resulting difference between the voltages at the first output terminal OUTP and the second output terminal OUTN is only related to the impedance of the first resistor module 101, the impedance of the second resistor module 103, the first current I1 and the second current I2, and is independent of the impedance of the first switch module 102 and the impedance of the second switch module 104.
In one embodiment of the present application, the impedance of each first resistor module 101 is equal, the impedance of each second resistor module 103 is equal, and the impedance of the first resistor module 101 is equal to the impedance of the second resistor module 103.
Specifically, in order to achieve more balanced adjustment of offset voltages, the number of the first resistor modules 101 and the second resistor modules 103 may be designed to be equal, and it is ensured that the impedance of each first resistor module 101 is equal, the impedance of each second resistor module 103 is equal, and the impedance of the first resistor module 101 is equal to the impedance of the second resistor module 103. That is, the impedances of all the resistor modules (the first resistor module 101 and the second resistor module 103) are equal, so that the design can not only realize balanced adjustment of offset voltage, but also reduce voltage deviation caused by impedance mismatch between the resistor modules. At the same time, this balanced resistive module configuration helps to reduce electromagnetic interference due to current imbalance.
In one embodiment of the present application, taking a and b as 4 as examples, as shown in fig. 4, the first resistor module 101 includes a first resistor, a first resistors are sequentially connected in series, first ends of all the first resistors are electrically connected to first ends of the corresponding first switch modules 102, the first end of the first resistor is used as a first output end of the trimming circuit 10 and is electrically connected to a first input end of the error amplifier, and the second end of the a first resistor is used as a first input end of the trimming circuit 10 and is used for receiving the first voltage signal.
Specifically, R1-1, R1-2, R1-3, R1-4 in FIG. 4 are all first resistors, which are used to determine the difference between the voltages at the first output terminal OUTP and the first input terminal INP. If the first switch module 102 is in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of R1-1, R1-2, R1-3, R1-4 and the first current I1, and the second voltage is the product of the impedance of the first switch module 102 and the bias current IB. If the second first switch module 102 is in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is the sum of a sixth voltage, which is the product of the sum of the impedances of R1-2, R1-3, and R1-4 and the first current I1, a seventh voltage, which is the product of the impedance of R1-1 and the second current I2, and an eighth voltage, which is the product of the impedance of the second first switch module 102 and the bias current IB.
Illustratively, if the impedances of R1-1, R1-2, R1-3, and R1-4 are all equal, i.e., if the impedances of R1-1, R1-2, R1-3, and R1-4 are all R. When the first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1×4r+ib×rp1, where Rp1 is the impedance of the first switch module 102. When the second first switch module 102 is in the on state, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1×2r+ib×rp2, and if I1 is the positive direction of the current and I2 is the negative direction of the current, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1×2r+ib×rp2, where Rp2 is the impedance of the second first switch module 102, because I1 and I2 are equal and opposite.
In one embodiment of the present application, taking a case where a and b are both 4 as an example, as shown in fig. 4, the first switch module 102 includes first switch tubes, gates of all the first switch tubes are used for receiving the first control signals, sources of all the first switch tubes are electrically connected, and drains of each of the first switch tubes are electrically connected to a first end of a corresponding first resistor module 101.
Specifically, in fig. 4, Q1-1, Q1-2, Q1-3, and Q1-4 are all first switching transistors, and the first switching transistors are used as switching devices and can be turned on or off according to a first control signal, so that the bias current IB is transmitted to the first end of the first resistor through the first switching transistors. When the first switching tube is conducted according to the first control signal, the source electrode and the drain electrode of the first switching tube are conducted, and the bias current IB can be transmitted to the first end of the first resistor through the source electrode and the drain electrode of the first switching tube. After the first end of the first resistor receives the bias current IB, a voltage drop may be generated across the first resistor, thereby determining a difference between the voltages of the first output terminal OUTP and the first input terminal INP.
Illustratively, if the impedances of R1-1, R1-2, R1-3, and R1-4 are R. When the first switching tube is turned on according to the first control signal, the voltage difference between the first output terminal OUTP and the first input terminal INP is I1×4r+ib×rp1, where Rp1 is the on-resistance of the first switching tube.
For example, a designer may select the type of the first switching transistor according to the actual situation, that is, a fully-controlled power device such as a metal oxide field effect transistor or an insulated gate bipolar transistor may be used. For example, the first switch tube can be selected as a PMOS tube, the PMOS tube is adopted to replace a transmission gate in the prior art, the influence caused by the PMOS tube can be eliminated when the voltage difference between the first output end OUTP and the second output end OUTN is calculated, the trimming precision is not influenced, the structure is simpler, and the layout area is not increased.
In an embodiment of the present application, taking a and b as 4 as examples, as shown in fig. 4, the second resistor module 103 includes second resistors, b second resistors are sequentially connected in series, first ends of all the second resistors are electrically connected to first ends of the corresponding second switch modules 104, the first end of the first second resistor is used as a second output end of the trimming circuit 10 and is electrically connected to a second input end of the error amplifier, and the second end of the b second resistor is used as a second input end of the trimming circuit 10 and is used for receiving the second voltage signal.
Specifically, R2-1, R2-2, R2-3, R2-4 in FIG. 4 are each a second resistor for determining the difference between the voltages at the second output terminal OUTN and the second input terminal INN. If the first second switch module 104 is in the on state, the difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of the ninth voltage and the tenth voltage, the ninth voltage is the product of the sum of the impedances of R2-1, R2-2, R2-3, R2-4 and the first current I1, and the tenth voltage is the product of the impedance of the first second switch module 104 and the bias current IB. If the second first switch module 102 is in the on state, the difference between the voltages of the second output terminal OUTN and the second input terminal INN is the sum of the third voltage, the fourth voltage and the fifth voltage, the third voltage is the product of the sum of the impedances of R2-2, R2-3 and R2-4 and the first current I1, the fourth voltage is the product of the impedance of R2-1 and the second current I2, and the fifth voltage is the product of the impedance of the second switch module 104 and the bias current IB.
For example, if the impedances of R2-1, R2-2, R2-3, and R2-4 are equal, i.e., if the impedances of R2-1, R2-2, R2-3, and R2-4 are R. When the first second switch module 104 is in the on state, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1×4r+ib×rn1, where Rn1 is the impedance of the first second switch module 104. When the second switch module 104 is in the on state, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1×3r+i2×r+ib×rn2, and if I1 is the positive direction of the current and I2 is the negative direction of the current, the voltage difference between the second output terminal OUTN and the second input terminal INN is I1×2r+ib×rn2, where Rn2 is the impedance of the second switch module 104 because I1 and I2 are equal and opposite.
In an embodiment of the present application, taking a and b as 4 as an example, as shown in fig. 4, the second switch module 104 includes second switch tubes, gates of all the second switch tubes are used for receiving the second control signal, sources of all the second switch tubes are electrically connected, and drains of each second switch tube are electrically connected to the first end of the corresponding second resistor module 103.
Specifically, Q2-1, Q2-2, Q2-3, and Q2-4 in fig. 4 are all second switching tubes, and the second switching tubes serve as switching devices, and can be turned on or off according to a second control signal, so that the bias current IB is transmitted to the first end of the second resistor through the second switching tubes. When the second switching tube is conducted according to the second control signal, the source electrode and the drain electrode of the second switching tube are conducted, and the bias current IB can be transmitted to the first end of the second resistor through the source electrode and the drain electrode of the second switching tube. After the first end of the second resistor receives the bias current IB, a voltage drop may be generated across the second resistor, thereby determining a difference between voltages of the second output terminal OUTN and the second input terminal INN.
Illustratively, if the impedances of R2-1, R2-2, R2-3, and R2-4 are R. When the first second switching tube is turned on according to the second control signal, the voltage difference between the second output end OUTN and the second input end INN is I1×4r+ib×rn1, where Rn1 is the on-resistance of the first second switching tube.
For example, a designer may select the type of the second switching transistor according to the actual situation, that is, a fully-controlled power device such as a metal oxide field effect transistor or an insulated gate bipolar transistor may be used. For example, the second switching tube can be selected as a PMOS tube, the PMOS tube is adopted to replace a transmission gate in the prior art, the influence caused by the PMOS tube can be eliminated when the voltage difference between the first output end OUTP and the second output end OUTN is calculated, the trimming precision is not influenced, the structure is simpler, and the layout area is not increased.
The working principle of the application is explained in detail by way of example with reference to fig. 4.
Illustratively, if the impedances of R1-1, R1-2, R1-3, R1-4, R2-1, R2-2, R2-3, R2-4 are all set to R, the impedances of Q1-1, Q1-2, Q1-3, Q1-4, Q2-1, Q2-2, Q2-3, Q2-4 are all set to Ro. The bias current IB is set to be 4uA, the first current I1 is 1 uA, the second current I2 is 3 uA, and the directions of the first current I1 and the second current I2 are opposite. At this time, if Q2-2 and Q1-1 are both in the on state, the difference between the voltages of the first output terminal OUTP and the first input terminal INP is I1×4r+ib×ro, the difference between the voltages of the second output terminal OUTN and the second input terminal INN is I1×3+i2×r+ib×ro, and since the directions of I1 and I2 are opposite, the difference between the voltages of the second output terminal OUTN and the second input terminal INN is ib×ro. The voltage difference between the first output terminal OUTP and the second output terminal OUTN is I1×3r+i2×r, i.e., I1×4r. Wherein R is 400ohm, namely 1LSB is about 1.6 mV. Therefore, the trimming circuit 10 provided in the embodiment of the application can offset the product of the impedance of the first switch module 102 and the bias current IB from the product of the impedance of the second switch module 104 and the bias current IB. Therefore, the magnitudes of the impedances of the first switch module 102 and the second switch module 104 do not need to be considered when trimming the offset voltage of the error amplifier. That is, the layout area of the trimming circuit 10 can be reduced by increasing the impedance of the first switch module 102 and the impedance of the second switch module 104, thereby reducing the size of the first switch module 102 and the second switch module 104.
In one embodiment of the present application, the trimming circuit 10 further includes a driving module electrically connected to all the first switch modules 102 and all the second switch modules 104, respectively, where the driving module is configured to output a first control signal to the first switch modules 102 and is further configured to output a second control signal to the second switch modules 104.
Specifically, the driving module may output a first control signal to the first switch module 102 to turn on or off the first switch module 102. The driving module may also output a second control signal to the second switch module 104 to turn on or off the second switch module 104. When the driving module outputs the second control signal to the c second switch module 104 to turn on the c second switch module 104, the driving module outputs the first control signal to the first switch module 102 to turn on the first switch module 102. When the driving module outputs the first control signal to the f first switch module 102 to turn on the f first switch module 102, the driving module outputs the second control signal to the first second switch module 104 to turn on the first second switch module 104. It can be seen that the driving module can ensure the normal operation of the trimming circuit 10 by outputting the corresponding control signal to ensure that at least one first switch module 102 is turned on and at least one second switch module 104 is turned on.
It should be noted that the driving module may include a driver, a power circuit, a protection circuit, etc. for outputting the first control signal and the second control signal accurately and reliably to drive the first switch module 102 and the second switch module 104. The driving modules may each be a timing control circuit for generating the correct timing signals for controlling the first switch module 102 and the second switch module 104 to be turned on and off.
The application also discloses a trimming system, as shown in fig. 5, which comprises an error amplifier 20 and the trimming circuit 10, wherein a first input end of the error amplifier 20 is electrically connected with a first output end of the trimming circuit 10, a second input end of the error amplifier 20 is electrically connected with a second output end of the trimming circuit 10, and an output end of the error amplifier 20 is used for outputting a target voltage V1.
Specifically, the trimming system adopts the trimming circuit 10 to trim the offset voltage of the error amplifier 20, and can improve the output precision of the error amplifier 20, thereby improving the measurement and control precision of the whole trimming system. Meanwhile, the offset voltage is compensated in real time through the trimming circuit 10, the working parameters of the trimming circuit 10 are flexibly adjusted, the fluctuation of the system caused by the offset voltage can be reduced, and the long-term stability of the system is improved.
The application also discloses a switching power supply, which comprises the trimming system, and the switching power supply adopts the trimming system, so that the output precision of the switching power supply can be improved, the working efficiency of the switching power supply is improved, and the reliability and the applicability of the switching power supply are enhanced.
Since the processing and functions implemented by the trimming system and the switching power supply in this embodiment basically correspond to the foregoing embodiments, principles and examples of the trimming circuit, the description of this embodiment is not exhaustive, and reference may be made to the related descriptions in the foregoing embodiments, which are not repeated herein.
The foregoing embodiments are merely illustrative of the technical solutions of the present application, and not restrictive, and although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that modifications may still be made to the technical solutions described in the foregoing embodiments or equivalent substitutions of some technical features thereof, and that such modifications or substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims (10)

1.一种修调电路，其特征在于，包括a个第一电阻模块、a个第一开关模块、b个第二电阻模块和b个第二开关模块；a个所述第一电阻模块依次串联，所述第一电阻模块和所述第一开关模块一一对应，每个所述第一电阻模块的第一端与对应的所述第一开关模块的第一端电连接，所有所述第一开关模块的第二端相互电连接，第一个所述第一电阻模块的第一端作为所述修调电路的第一输出端，第a个所述第一电阻模块的第二端作为所述修调电路的第一输入端，用于接收第一电压信号；b个所述第二电阻模块依次串联，所述第二电阻模块和所述第二开关模块一一对应，每个所述第二电阻模块的第一端与对应的所述第二开关模块的第一端电连接，所有所述第二开关模块的第二端相互电连接，第一个所述第二电阻模块的第一端作为所述修调电路的第二输出端，第b个所述第二电阻模块的第二端作为所述修调电路的第二输入端，用于接收第二电压信号；其中，a、b均为整数，a≥2，b≥2；1. A trimming circuit, characterized in that it comprises a first resistor modules, a first switch modules, b second resistor modules and b second switch modules; a first resistor modules are connected in series in sequence, the first resistor modules and the first switch modules correspond one to one, the first end of each first resistor module is electrically connected to the first end of the corresponding first switch module, the second ends of all the first switch modules are electrically connected to each other, the first end of the first first resistor module serves as the first output end of the trimming circuit, the second end of the ath first resistor module serves as the first input end of the trimming circuit, for receiving a first voltage signal; b second resistor modules are connected in series in sequence, the second resistor modules and the second switch modules correspond one to one, the first end of each second resistor module is electrically connected to the first end of the corresponding second switch module, the second ends of all the second switch modules are electrically connected to each other, the first end of the first second resistor module serves as the second output end of the trimming circuit, the second end of the bth second resistor module serves as the second input end of the trimming circuit, for receiving a second voltage signal; wherein a and b are both integers, a≥2, b≥2; 当第一个所述第一开关模块处于导通状态且第c个所述第二开关模块处于导通状态时，所述第一输出端和所述第一输入端的电压之差为第一电压和第二电压之和，所述第一电压为所有所述第一电阻模块的阻抗之和与第一电流的乘积，所述第二电压为第一个所述第一开关模块的阻抗与偏置电流的乘积；所述第二输出端和所述第二输入端的电压之差为第三电压、第四电压和第五电压之和，所述第三电压为d个所述第二电阻模块的阻抗之和与所述第一电流的乘积，所述第四电压为e个所述第二电阻模块的阻抗之和与第二电流的乘积，所述第五电压为第c个所述第二开关模块的阻抗与所述偏置电流的乘积，其中，c、d、e均为整数，1＜c≤b，d=b-c+1，e=c-1；When the first first switch module is in the on state and the cth second switch module is in the on state, the voltage difference between the first output terminal and the first input terminal is the sum of the first voltage and the second voltage, the first voltage is the product of the sum of the impedances of all the first resistor modules and the first current, and the second voltage is the product of the impedance of the first first switch module and the bias current; the voltage difference between the second output terminal and the second input terminal is the sum of the third voltage, the fourth voltage and the fifth voltage, the third voltage is the product of the sum of the impedances of d second resistor modules and the first current, the fourth voltage is the product of the sum of the impedances of e second resistor modules and the second current, and the fifth voltage is the product of the impedance of the cth second switch module and the bias current, wherein c, d, and e are all integers, 1＜c≤b, d=b-c+1, and e=c-1; 当第一个所述第二开关模块处于导通状态且第f个所述第一开关模块处于导通状态时，所述第一输出端和所述第一输入端的电压之差为第六电压、第七电压和第八电压之和，所述第六电压为g个所述第一电阻模块的阻抗之和与所述第一电流的乘积，所述第七电压为h个所述第一电阻模块的阻抗之和与所述第二电流的乘积，所述第八电压为第f个所述第一开关模块的阻抗与所述偏置电流的乘积；所述第二输出端和所述第二输入端的电压之差为第九电压和第十电压之和，所述第九电压为所有所述第二电阻模块的阻抗之和与所述第一电流的乘积，所述第十电压为第一个所述第二开关模块的阻抗与所述偏置电流的乘积，所有所述第一开关模块的阻抗与所有所述第二开关模块的阻抗相等，所述偏置电流为所述第一电流和所述第二电流的矢量之和；其中，f、g、h均为整数，1＜f≤a，g=a-f+1，h=f-1。When the first second switch module is in the on state and the fth first switch module is in the on state, the voltage difference between the first output terminal and the first input terminal is the sum of a sixth voltage, a seventh voltage and an eighth voltage, the sixth voltage is the product of the sum of the impedances of g first resistor modules and the first current, the seventh voltage is the product of the sum of the impedances of h first resistor modules and the second current, and the eighth voltage is the product of the impedance of the fth first switch module and the bias current; the voltage difference between the second output terminal and the second input terminal is the sum of a ninth voltage and a tenth voltage, the ninth voltage is the product of the sum of the impedances of all the second resistor modules and the first current, the tenth voltage is the product of the impedance of the first second switch module and the bias current, the impedances of all the first switch modules are equal to the impedances of all the second switch modules, and the bias current is the vector sum of the first current and the second current; wherein f, g, and h are all integers, 1＜f≤a, g=a-f+1, and h=f-1. 2.根据权利要求1所述的修调电路，其特征在于，每个所述第一电阻模块的阻抗相等，每个所述第二电阻模块的阻抗相等，所述第一电阻模块的阻抗与所述第二电阻模块的阻抗相等。2 . The trimming circuit according to claim 1 , wherein the impedance of each of the first resistance modules is equal, the impedance of each of the second resistance modules is equal, and the impedance of the first resistance module is equal to the impedance of the second resistance module. 3.根据权利要求1所述的修调电路，其特征在于，所述第一电阻模块包括第一电阻，a个所述第一电阻依次串联，所有所述第一电阻的第一端与对应的所述第一开关模块的第一端电连接，第一个所述第一电阻的第一端作为所述修调电路的第一输出端，第a个所述第一电阻的第二端作为所述修调电路的第一输入端，用于接收所述第一电压信号。3. The trimming circuit according to claim 1 is characterized in that the first resistance module includes a first resistor, a first resistors are connected in series in sequence, the first ends of all the first resistors are electrically connected to the first ends of the corresponding first switch modules, the first end of the first first resistor serves as the first output end of the trimming circuit, and the second end of the ath first resistor serves as the first input end of the trimming circuit for receiving the first voltage signal. 4.根据权利要求1所述的修调电路，其特征在于，所述第一开关模块包括第一开关管，所有所述第一开关管的栅极均用于接收第一控制信号，所有所述第一开关管的源极电连接，每个所述第一开关管的漏极与对应的所述第一电阻模块的第一端电连接。4. The trimming circuit according to claim 1 is characterized in that the first switch module includes a first switch tube, the gates of all the first switch tubes are used to receive a first control signal, the sources of all the first switch tubes are electrically connected, and the drain of each of the first switch tubes is electrically connected to the first end of the corresponding first resistance module. 5.根据权利要求1所述的修调电路，其特征在于，所述第二电阻模块包括第二电阻，b个所述第二电阻依次串联，所有所述第二电阻的第一端与对应的所述第二开关模块的第一端电连接，第一个所述第二电阻的第一端作为所述修调电路的第二输出端，第b个所述第二电阻的第二端作为所述修调电路的第二输入端，用于接收所述第二电压信号。5. The trimming circuit according to claim 1 is characterized in that the second resistance module includes a second resistor, b second resistors are connected in series in sequence, the first ends of all the second resistors are electrically connected to the first ends of the corresponding second switch modules, the first end of the first second resistor serves as the second output end of the trimming circuit, and the second end of the bth second resistor serves as the second input end of the trimming circuit for receiving the second voltage signal. 6.根据权利要求4所述的修调电路，其特征在于，所述第二开关模块包括第二开关管，所有所述第二开关管的栅极均用于接收第二控制信号，所有所述第二开关管的源极电连接，每个所述第二开关管的漏极与对应的所述第二电阻模块的第一端电连接。6. The trimming circuit according to claim 4 is characterized in that the second switch module includes a second switch tube, the gates of all the second switch tubes are used to receive the second control signal, the sources of all the second switch tubes are electrically connected, and the drain of each second switch tube is electrically connected to the first end of the corresponding second resistance module. 7.根据权利要求6所述的修调电路，其特征在于，所述第一开关管和所述第二开关管均为PMOS管。7 . The trimming circuit according to claim 6 , wherein the first switch tube and the second switch tube are both PMOS tubes. 8.根据权利要求1-7任一项所述的修调电路，其特征在于，所述修调电路还包括驱动模块，所述驱动模块分别与所有所述第一开关模块和所有所述第二开关模块电连接；所述驱动模块用于向所述第一开关模块输出第一控制信号，还用于向所述第二开关模块输出第二控制信号。8. The trimming circuit according to any one of claims 1-7 is characterized in that the trimming circuit also includes a driving module, and the driving module is electrically connected to all the first switch modules and all the second switch modules respectively; the driving module is used to output a first control signal to the first switch module, and is also used to output a second control signal to the second switch module. 9.一种修调系统，其特征在于，包括误差放大器和权利要求1-8任一项所述的修调电路，所述误差放大器的第一输入端与所述修调电路的第一输出端电连接，所述误差放大器的第二输入端与所述修调电路的第二输出端电连接，所述误差放大器的输出端用于输出目标电压。9. A trimming system, characterized in that it comprises an error amplifier and the trimming circuit according to any one of claims 1 to 8, wherein a first input terminal of the error amplifier is electrically connected to a first output terminal of the trimming circuit, a second input terminal of the error amplifier is electrically connected to a second output terminal of the trimming circuit, and an output terminal of the error amplifier is used to output a target voltage. 10.一种开关电源，其特征在于，包括权利要求9所述的修调系统。10. A switching power supply, comprising the adjustment system according to claim 9.
CN202411524124.XA 2024-10-30 2024-10-30 Trimming circuit, trimming system and switching power supply Active CN119051437B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1724908A1 (en) * 2005-05-18 2006-11-22 Linear Technology Corporation Circuit and method for reducing overshoot in a switching regulator
WO2020147637A1 (en) * 2019-01-14 2020-07-23 上海艾为电子技术股份有限公司 Reference voltage generation circuit and switched-mode power supply

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1724908A1 (en) * 2005-05-18 2006-11-22 Linear Technology Corporation Circuit and method for reducing overshoot in a switching regulator
WO2020147637A1 (en) * 2019-01-14 2020-07-23 上海艾为电子技术股份有限公司 Reference voltage generation circuit and switched-mode power supply

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