CN118969930A - Semi-polar multi-quantum well barrier epitaxial structure and preparation method thereof, Micro LED chip - Google Patents
Semi-polar multi-quantum well barrier epitaxial structure and preparation method thereof, Micro LED chip Download PDFInfo
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Abstract
The invention provides a semi-polar multi-quantum well barrier epitaxial structure and a preparation method thereof, and a Micro LED chip.A hexagonal conical hole with a conical tip facing an n-type GaN current expansion layer is formed in a hexagonal pyramid generating layer of the semi-polar multi-quantum well barrier epitaxial structure, wherein (0001) surfaces of the hexagonal conical holes are distributed in a hexagonal pattern, and hexagonal cones Kong Mibu are arranged on (0001) surfaces; the multi-quantum well barrier layer is a semi-polar multi-quantum well barrier layer and is formed by growing along the semi-polar (1-101) side surface in the hexagonal conical hole. Before quantum wells are grown in an epitaxial structure, preparing a hexagonal pyramid generation layer with a hexagonal pyramid shape, the surface of which is continuously and tightly distributed, and forming a semi-polar multi-quantum well barrier layer on the side surface of the uniformly distributed hexagonal pyramid holes, so that the effect of localized enhancement of carriers is achieved, and the side wall effect of the Micro-LED is reduced.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a semi-polar multi-quantum well barrier epitaxial structure, a preparation method thereof and a Micro LED chip.
Background
The Micro-LED display technology has wide application prospect in the emerging fields of ultra-large screen direct display, AR glasses, micro-projection, vehicle-mounted matrix headlights and the like. However, it was found that when the pixel (pixel) size of Micro-LEDs is scaled down to around 100 μm, the external quantum efficiency (External Quantum Efficiency) drop phenomenon has begun to occur. As Micro-LED pixel size continues to shrink, the drop in external quantum efficiency is more pronounced, which is commonly referred to as the sidewall effect of Micro-LEDs. The sidewall effect of Micro-LEDs is mainly derived from material damage and crystal defects generated during the etching process of GaN sidewalls, resulting in the etched region being located as a high-density non-radiative recombination center. For example, the peak external quantum efficiency of a 1000 [ mu ] m-sized GaN-based blue light LED (power LED) chip can reach more than 85%, but the peak external quantum efficiency of a 5 [ mu ] m-sized GaN-based blue light Micro-LED is only about 10%. The low light efficiency caused by the side wall effect brings serious restrictions to the key problems of brightness, power consumption, reliability and the like of the Micro-LED display module.
In the prior art, two ways are generally used to reduce the side wall effect of Micro-LEDs: one is to carry out sidewall repair and passivation after etching the GaN sidewall, however, even after sidewall repair and passivation, the peak external quantum efficiency of a 5 μm-sized GaN-based Micro-LED can only reach about 10%; the other is selective epitaxy, such as chinese patent 202311624938.6 (publication No. CN117637930 a), in which a mask layer (SiO 2、SiNx, or metal, etc.) is deposited on a substrate or GaN layer, then a micron-sized or submicron-sized opening is lithographically formed on the mask layer, and an independent and unconnected Micro-LED pixel is directly grown in the opening of the mask layer. But the selective epitaxy not only increases the complexity and cost of epitaxy, but also brings great difficulty to chip processes such as bonding of Micro-LEDs and electrode manufacturing, and the like, and has low mass production feasibility.
Disclosure of Invention
In order to overcome the defects, the invention provides a semi-polar multi-quantum well barrier epitaxial structure, a preparation method thereof and a Micro LED chip, and quantum well barriers are formed on the side surfaces of high-density hexagonal conical holes uniformly distributed in an epitaxial layer, so that carrier localization is enhanced in the epitaxial structure, and movement of carriers to the side wall of the Micro LED is inhibited, and the side wall effect of the Micro LED is reduced.
The technical scheme provided by the invention is as follows:
In one aspect, the invention provides a semi-polar multiple quantum well barrier epitaxial structure comprising:
a semi-polar multi-quantum well barrier epitaxial structure comprising: the device comprises a nucleation layer, a dislocation distribution control layer, an n-type GaN current expansion layer, a hexagonal pyramid generation layer, a multiple quantum well barrier layer, a p-type electron blocking layer, a p-type GaN current expansion layer and a p-type ohmic contact layer which are sequentially formed on the surface of a growth substrate;
Hexagonal cone holes with cone tips facing the n-type GaN current expansion layer are formed in the hexagonal cone generation layer, the (0001) surfaces of the hexagonal cone holes are distributed in a hexagonal pattern, and the hexagonal cones Kong Mibu are on the (0001) surfaces;
the multi-quantum well barrier layer is a semi-polar multi-quantum well barrier layer and is formed by growing along the semi-polar (1-101) side face in the hexagonal conical hole.
In another aspect, the invention provides a method for preparing a semi-polar multi-quantum well barrier epitaxial structure, comprising the steps of: a nucleation layer, a dislocation distribution control layer, an n-type GaN current expansion layer, a hexagonal pyramid generation layer, a multiple quantum well barrier layer, a p-type electron blocking layer, a p-type GaN current expansion layer and a p-type ohmic contact layer are sequentially grown on the surface of a growth substrate;
When the hexagonal pyramid generation layer is grown, hexagonal conical holes with conical tips facing the n-type GaN current expansion layer are formed, the (0001) surfaces of the hexagonal conical holes are distributed in a hexagonal pattern, and the hexagonal cones Kong Mibu are on the (0001) surfaces;
and the multi-quantum well barrier layer grows along the semi-polar (1-101) side surface in the hexagonal conical hole to form a semi-polar multi-quantum well barrier layer.
In still another aspect, the present invention provides a Micro LED chip, including the above-mentioned semi-polar multi-quantum well barrier epitaxial structure, and the semi-polar multi-quantum well barrier epitaxial structure is etched into a plurality of pixel units; the first electrode is in conductive connection with the n-type GaN current expansion layer in the etched semi-polar multi-quantum well barrier epitaxial structure, and the second electrode is in conductive connection with the p-type GaN current expansion layer in the etched semi-polar multi-quantum well barrier epitaxial structure.
According to the semi-polar multi-quantum well barrier epitaxial structure and the preparation method thereof, and the Micro LED chip, uniformly distributed hexagonal cone holes are formed in the hexagonal cone generation layer in the epitaxial structure, and the hexagonal cone Kong Mibu is on the (0001) plane, namely, the surface of the hexagonal cone generation layer, which is in contact with the multi-quantum well barrier layer, is in a concave hexagonal cone shape which is continuously and tightly distributed, gaps exist on the (0001) plane of the adjacent hexagonal cone holes, the occupation ratio of the gaps is small, so that the luminescence of a gap area can be ignored, or one side edge or a plurality of sides in a hexagonal pattern are shared by the (0001) planes of the adjacent hexagonal cone holes, and then, the uniformly distributed hexagonal cone holes are formed on the side face of the hexagonal cone hole, so that the effect of enhancing carrier localization is realized in the epitaxial structure to reduce the Micro-LED side wall effect.
Drawings
FIG. 1 is a schematic diagram of a semi-polar multi-quantum well barrier epitaxy structure in accordance with an embodiment of the present invention;
FIG. 2 is a diagram of a hexagonal tapered hole of a semi-polar multi-quantum well barrier epitaxial structure according to an embodiment of the present invention;
FIG. 3 is an enlarged schematic view of a multi-quantum well barrier layer according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating a motion of carriers under an electric field according to an embodiment of the present invention;
Fig. 5 is a flow chart of preparing a semi-polar multi-quantum well barrier epitaxial structure in accordance with an embodiment of the present invention.
Reference numerals:
The semiconductor device comprises a 1-growth substrate, a 2-nucleation layer, a 3-dislocation distribution control layer, a 4-n type GaN current expansion layer, a 5-hexagonal pyramid generation layer, a 6-multiple quantum well barrier layer, a 7-p type electron blocking layer, an 8-p type GaN current expansion layer and a 9-p type ohmic contact layer.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description will explain specific embodiments of the present invention with reference to the accompanying drawings. It is evident that the drawings in the following description are only examples of the invention, from which other drawings and other embodiments can be obtained by a person skilled in the art without inventive effort.
In a first embodiment of the present invention, a semi-polar multiple quantum well barrier epitaxial structure comprises: the device comprises a nucleation layer, a dislocation distribution control layer, an n-type GaN current expansion layer, a hexagonal pyramid generation layer, a multiple quantum well barrier layer, a p-type electron blocking layer, a p-type GaN current expansion layer and a p-type ohmic contact layer which are sequentially formed on the surface of a growth substrate; hexagonal cone holes with cone tips facing the n-type GaN current expansion layer are formed in the hexagonal cone generation layer, the (0001) surfaces of the hexagonal cone holes are distributed in a hexagonal pattern, and the hexagonal cones Kong Mibu are on the (0001) surfaces; the multi-quantum well barrier layer is a semi-polar multi-quantum well barrier layer and is grown on the semi-polar (1-101) side surface in the hexagonal conical hole. In this embodiment, as shown in FIG. 1, the growth substrate 1 is a silicon substrate, and the nucleation layer 2 is a single-layer aluminum nitride (AlN) structure (150 nm-400nm in thickness) formed at 1000-1100 ℃ on the surface of the growth substrate. The dislocation distribution control layer 3 is formed on the surface of the nucleation layer and comprises an AlGaN layer and an unintentionally doped GaN layer: the AlGaN layer is formed on the surface of the nucleation layer in an island-shaped structure with high density and uniform distribution, and grows at the temperature of 700-800 ℃, the thickness is 100-300 nm, the growth rate is more than 1500nm/h, and the surface of the AlGaN layer is easy to form 3D island-shaped structure with uniform distribution in the growth process due to the low growth temperature and high growth rate of the AlGaN layer; the subsequently grown GaN layer is unintentionally doped GaN, and also has a relatively high growth rate, the growth rate is at least greater than 4500nm/h (e.g., the growth rate is 5000nm/h in one example), and the GaN layer is uniformly nucleated and grown on the surface of the AlGaN layer, so that when the GaN layer is grown on the island-shaped AlGaN layer with the surface being uniformly distributed, the nucleation growth with uniform size and distribution can be realized, and the dislocation inside the GaN layer is uniformly distributed. The presence of this dislocation facilitates the subsequent formation of uniformly distributed hexagonal tapered holes in the hexagonal pyramid-generating layer. The n-type GaN current spreading layer 4 is a GaN structure doped with Si, and the concentration of doped Si is generally 5×10 18/cm3 to 8×10 18/cm3.
The hexagonal cone generating layer 5 is a GaN/InGaN periodic structure grown at low temperature, starts with a GaN layer and ends with an InGaN layer, and in the growth process, according to the dislocation position in the dislocation distribution control layer, the cone tip of a hexagonal cone hole is led out, and gradually expands from the cone tip to the upper side along with the increase of the growth thickness until the edges of adjacent hexagonal cone holes are contacted with each other; in the hexagonal cone generating layer, a certain distance is reserved between the surface of the n-type GaN current expansion layer, which is contacted with the hexagonal cone generating layer, and the cone tip of the hexagonal cone hole, namely, the depth of the hexagonal cone hole does not penetrate through the whole layer, and a certain thickness exists at the lower end of the cone tip; in one example, the period of GaN/InGaN is 10, the thickness of GaN of a single layer in each period is 15nm-50nm, and the thickness of InGaN of a single layer is 5nm-10nm; in the hexagonal pyramid generation layer, hexagonal tapered holes having gradually enlarged diameters are formed from bottom to top as shown in fig. 2, each hollow hexagonal tapered hole has six sides (1-101 sides) and a bottom surface (0001 side) having a hexagonal edge, and it is understood that the taper tip of the hexagonal tapered hole faces the n-type GaN current spreading layer, whereas the bottom surface of the hexagonal tapered hole does not actually exist, that is, the surface is not a solid structure but a pattern surrounded by the edges of the tapered hole, the 0001 side is a plane in which the hexagonal shape of the bottom surface in the hexagonal tapered hole is located, and the 1-101 sides are sides formed by the connection of the taper tip of the hexagonal tapered hole and the bottom surface pattern.
Also, in the hexagonal pyramid generation layer, the hexagonal cone Kong Mibu is on the (0001) plane, and the hexagonal cone holes may exist in two closely distributed forms on the (0001) plane: one is that a tiny gap exists between adjacent hexagonal pyramid-shaped holes, but the gap is small in proportion, so that the luminous effect is negligible; the other is that the (0001) faces of adjacent hexagonal tapered holes share one or more sides in the hexagonal pattern, forming a tightly connected overall structure. When the (0001) surfaces of adjacent hexagonal conical holes share one side edge of the hexagonal pattern, a honeycomb-like structure is shown in the hexagonal pyramid generation layer in a top view pattern, and a plurality of hexagons are closely connected into a whole; when the (0001) planes of adjacent tapered holes share a plurality of sides in the hexagonal pattern to be connected, the adjacent hexagonal tapered holes exist in the form of partial volume sharing, and on the (0001) planes, they share a partial area in the hexagonal pattern at the same time, presenting a partial superposition of the adjacent hexagonal pattern. The upper surface of the hexagonal pyramid generation layer is formed by six sides of hexagonal conical holes which are mutually connected and is in a concave hexagonal pyramid shape which is continuously and tightly distributed; the density of hexagonal tapered holes in the hexagonal pyramid-shaped generation layer is 7×10 8/cm2 to 1×10 9/cm2, i.e., 7×10 8 to 1×10 9 number of hexagonal tapered holes are formed per square centimeter of area, and the diameter length of each hexagonal tapered hole is 350nm to 500nm, i.e., the diameter D of a circle circumscribing the hexagonal bottom surface (0001 surface) of the hexagonal tapered hole is 350nm to 500nm, so to speak, the straight line distance between two corners at diagonal positions in the hexagon of the (0001) surface in the hexagonal tapered hole is 350nm to 500nm; in one example, the depth H of the hexagonal tapered hole is about 0.816 times the diameter length, that is, h≡0.816D, and the angles formed by two angles of the hexagonal tapered hole at the diagonal positions in the (0001) plane and the connecting line of the cone tip are about 63 °, so that h=cot (63 °/2) × (D/2) is satisfied, and H/d=cot (63 °/2) × (1/2) =0.816.
The multi-quantum well barrier layer 6 is formed on six inner side surfaces of the hexagonal cone-shaped hole in the hexagonal cone-shaped generating layer completely, and grows into a semi-polar multi-quantum well barrier layer along the semi-polar (1-101) side surface in the hexagonal cone-shaped hole, and the upper surface of the multi-quantum well barrier layer also presents the same hexagonal cone side surface shape connected with each other; in one example, the multiple quantum well barrier layer is a periodic structure of In xAlyGa1-x-y N and In aAlbGa1-a-b N, and the period of the multiple quantum well barrier structure is 1-10, wherein 0+.x+.1, 0+.y+.1, 0+.a+.1, 0+.b+.1; the thickness of the single In xAlyGa1-x-y N quantum well is more than or equal to 1nm and less than or equal to 10nm, and the thickness of the single In aAlbGa1-a-b N quantum barrier layer is more than or equal to 3nm and less than or equal to 25nm. The p-type electron blocking layer 7 is an Mg-doped AlGaN layer, and as can be seen from fig. 1, the upper surface thereof is also formed in a uniform hexagonal pyramid side surface shape along the surface of the multiple quantum well barrier layer, that is, grown on the upper surface of the multiple quantum well barrier layer along the semi-polar (1-101) side surface in the hexagonal pyramid hole formed in the multiple quantum well barrier layer. The p-type GaN current spreading layer 8 is a Mg-doped GaN layer formed with a small growth rate to promote lateral growth of the GaN layer, so that the upper surface no longer exhibits a hexagonal pyramid side shape, but forms a planarized upper surface (i.e., a surface near the side of the p-type ohmic contact layer). The P-type ohmic contact layer 9 is a highly doped, mg-doped GaN layer as well, but the Mg doping concentration is greater than that in the P-type GaN current spreading layer (e.g., in one example, the Mg doping concentration in the P-type GaN current spreading layer 8 is 1×10 18/cm3, the Mg doping concentration in the P-type ohmic contact layer 9 is 3×10 20/cm3, and the Mg doping concentration in the P-type ohmic contact layer 9 is 300 times that in the P-type GaN current spreading layer 8).
It is known that non-radiative recombination of Micro-LEDs mainly occurs at the side walls of InGaN quantum well layers and is closely related to the degree of carrier localization; in a widely published report, the side wall effect of an InGaN-based green light Micro-LED (In enrichment leads to stronger carrier localization) is far smaller than that of an InGaN-based blue light Micro-LED, and the phenomenon directly proves that the side wall non-radiative recombination rate is closely related to the wavelength (i.e. In enrichment) of the InGaN-based Micro-LED. Since in this embodiment, as shown in fig. 3, the periodic multiple quantum well barrier layer 6 is grown entirely on the side of the hexagonal tapered hole in the hexagonal pyramid generation layer 5, forming a semi-polar multiple quantum well barrier that entirely covers the surface, for each hexagonal tapered hole in the hexagonal pyramid generation layer, the semi-polar multiple quantum well barrier layer grows within the hexagonal tapered hole and keeps the shape of the hexagonal tapered hole continuing upward; therefore, when a forward voltage is applied to the Micro-LED pixel, as shown in fig. 4, movement of carriers under the action of an electric field is demonstrated, and at this time, an external forward bias is directed to the cone tip from the bottom of the hexagonal cone-shaped hole, so that carriers (including electrons and holes) in the multi-quantum well barrier layer can only move up and down along the side wall in the same hexagonal cone-shaped hole, radiation recombination and emission of photons occur, but cannot move from one hexagonal cone-shaped hole to an adjacent hexagonal cone-shaped hole, and lateral diffusion of carriers to the side wall of the Micro-LED pixel is inhibited, namely, localization of carriers is enhanced, thereby effectively reducing non-radiation recombination generated at the side wall of the Micro-LED. In addition, the semi-polar multiple quantum well barrier layer has smaller polarized electric field, which is beneficial to further improving the external quantum efficiency and wavelength stability of the Micro-LED.
In this embodiment, an n GaN insertion layer with a Si concentration greater than 3×10 19/cm3 is formed between the n-type GaN current expansion layer and the hexagonal pyramid generation layer, and compared with the n-type GaN current expansion layer, the n GaN insertion layer has a Si concentration at least doubled, and the high Si concentration converts the n GaN insertion layer from a planar 2D growth mode to a stereoscopic 3D mode for growth, thereby facilitating the increase of the density of hexagonal tapered holes during the subsequent growth of the hexagonal pyramid generation layer, and the hexagonal tapered holes completely cover the surface of the epitaxial structure.
In the growth process of the semi-polar multi-quantum well barrier epitaxial structure, as shown In fig. 5, firstly, an MOCVD growth device is used, a Si (111) substrate is selected as a growth substrate layer, in an MOCVD system, the growth substrate is subjected to high-temperature surface treatment to remove an oxide layer, then required precursor sources, gas sources and carrier gases are respectively introduced into different structures at specific temperatures, wherein the precursor sources, the gas sources and the carrier gases comprise a Ga source, an Al source, an In source, mg, an Si source, an N source, N 2、H2, ar and the like, the Ga source In the following embodiments is trimethyl gallium (TMG), the Al source is trimethyl aluminum (TMAl), the In source is trimethyl indium (TMIn), the Mg source is magnesium dicyclopentadiene (Cp 2 Mg), the Si source is silane (SiH 4), the N source is ammonia (NH 3), the carrier gases are N 2 and H 2, and a nucleation layer, a distribution control layer, an N-type current spreading layer, a six-element generating layer, a multi-quantum well layer, a p-type GaN ohmic pyramid spreading layer, a p-type GaN ohmic contact layer and the like are sequentially grown on the surface of the growth substrate.
The method comprises the following specific steps:
1. Placing the Si (111) substrate into an MOCVD reaction chamber, heating to 1100 ℃, introducing H 2 for high-temperature surface treatment for 3-10 minutes, removing an oxide layer and forming a clear atomic step.
2. Setting the temperature of the reaction chamber at 1000-1100 ℃, introducing Trimethylaluminum (TMAL) and ammonia (NH 3) into the reaction chamber, and growing an AlN layer with the thickness of 200-300 nm under the condition that H 2 is used as carrier gas; a nucleation layer 2 is grown on the surface of the growth substrate.
3. The reaction chamber temperature is set at 700-800 ℃, H 2 is used as carrier gas, trimethylaluminum (TMAL), ammonia (NH 3) and trimethylgallium (TMGa) are introduced into the MOCVD reaction chamber, al 0.20Ga0.80 N is grown, and the growth rate is 1600nm/H. Al 0.20Ga0.80 N forms 3D islands with high density and uniform distribution on the surface of the nucleation layer 2 due to the compressive stress applied by the nucleation layer 2 and rapid growth at medium temperature; then, the temperature of the reaction chamber is increased to 1000-1100 ℃, ammonia (NH 3) and trimethylgallium (TMGa) are introduced into the MOCVD reaction chamber, an unintentionally doped GaN layer is grown, and the growth rate is 5000nm/h. The higher growth rate is utilized to ensure that the GaN realizes uniform nucleation growth and dislocation reaction on the Al 0.20Ga0.80 N island, thereby realizing that the dislocation is uniformly distributed in the GaN layer; the Al 0.20Ga0.80 N and the unintentionally doped GaN layer together constitute the dislocation distribution control layer 3.
4. The n-type GaN current expansion layer 4 with the thickness of 1500nm-2000nm is formed by using silane (SiH 4) as a doping agent and growing at the growth temperature of 900-1050 ℃, and the Si doping concentration is 5 multiplied by 10 18/cm3 to 8 multiplied by 10 18/cm3.
5. When growing the hexagonal pyramid generation layer, the temperature of the reaction chamber is reduced to 750-850 ℃, and TMGa and NH 3 are continuously introduced by taking N 2 as carrier gas, and trimethyl indium (TMIn) is intermittently introduced. A periodic GaN/InGaN structure was obtained with a total log of 10 pairs of alternate growth. In each period, the GaN thickness is between 15nm and 50nm, and the InGaN thickness is between 5nm and 10nm. After the hexagonal pyramid generating layer 5 is grown, the high-density hexagonal tapered holes completely cover the epitaxial surface, and in the growth process, the taper tips of the hexagonal tapered holes are led out according to the dislocation position in the dislocation distribution control layer, and the taper holes are gradually enlarged upwards from the taper tips along with the increase of the growth thickness until the edges of adjacent hexagonal tapered holes are contacted with each other; in the hexagonal cone generating layer, a certain distance is reserved between the surface of the n-type GaN current expansion layer, which is contacted with the hexagonal cone generating layer, and the cone tip of the hexagonal cone hole, namely, the depth of the hexagonal cone hole does not penetrate through the whole layer, and a certain thickness exists at the lower end of the cone tip; the cone tip is oriented toward the n-type GaN current spreading layer, while the bottom surface (0001 surface) of the hexagonal tapered hole is not actually present, that is, the surface is not a solid structure, but a pattern surrounded by the edge of the tapered hole; In the hexagonal pyramid generating layer, the (0001) plane of the hexagonal tapered holes is distributed in a hexagonal pattern, and the hexagonal taper Kong Mibu is on the (0001) plane; hexagonal tapered holes may exist in two closely distributed forms on the (0001) plane: one is that a tiny gap exists between adjacent hexagonal pyramid-shaped holes, but the gap is small in proportion, so that the luminous effect is negligible; the other is that the (0001) faces of adjacent hexagonal tapered holes share one or more sides in the hexagonal pattern, forming a tightly connected overall structure. When the (0001) surfaces of adjacent hexagonal conical holes share one side edge of the hexagonal pattern, a honeycomb-like structure is shown in the hexagonal pyramid generation layer in a top view pattern, and a plurality of hexagons are closely connected into a whole; When the (0001) planes of adjacent tapered holes share a plurality of sides in the hexagonal pattern to be connected, the adjacent hexagonal tapered holes exist in the form of partial volume sharing, and on the (0001) planes, they share a partial area in the hexagonal pattern at the same time, presenting a partial superposition of the adjacent hexagonal pattern. In another embodiment, an n-type GaN insertion layer of high Si concentration grown at medium and low temperatures may also be formed between the n-type GaN current spreading layer 4 and the hexagonal pyramid generation layer 5. In one example, an n-GaN insertion layer having a Si doping concentration greater than 3×10 19/cm3 is formed between the n-GaN current spreading layer and the hexagonal pyramid generation layer, and n-GaN having a Si doping concentration greater than 3×10 19/cm3 is converted from a 2D growth mode to a 3D growth, thereby facilitating an increase in the density of hexagonal tapered holes in the hexagonal pyramid generation layer 5 so that the hexagonal tapered holes completely cover the epitaxial surface.
6. After growing an In 0.25Ga0.75 N quantum well at 700 ℃ by taking N 2 as carrier gas, raising the reaction temperature to 950 ℃ to grow a GaN quantum barrier, wherein the In 0.25Ga0.75 N quantum well is unintentionally doped, the silicon doping concentration In the GaN quantum barrier is 3×10 17/cm3, and 4 pairs of the GaN quantum wells are repeatedly grown. 4 pairs of periodic In 0.25Ga0.75 N/GaN multi-quantum well barrier layer structures are obtained, wherein the thickness of a single-layer In 0.25Ga0.75 N In each period is 2.5nm, the thickness of a single-layer GaN In each period is 10nm, and the light-emitting wavelength of the multi-quantum well barrier layer is about 525nm and belongs to a green light wave band. In 0.25Ga0.75 N/GaN multiple quantum well barrier grows along the side surface (1-101 surface) In the hexagonal conical hole, and a semi-polar multiple quantum well barrier layer with high density and completely covering the surface is formed.
7. The growth temperature is 800-900 ℃, N 2 is used as carrier gas, TMAl, TMGa, NH 3 is introduced, magnesium dichloride (Cp 2 Mg) is used as doping agent, al 0.25Ga0.65 N with the doping concentration of 2.0 multiplied by 10 19/cm3 and the thickness of 20nm is obtained as the p-type electron blocking layer 7, the upper surface of the p-type electron blocking layer is uniformly formed along the surface of the multiple quantum well barrier layer, namely, the p-type electron blocking layer is formed by growing on the upper surface of the multiple quantum well barrier layer along the semi-polar (1-101) side surface in the hexagonal conical hole formed in the multiple quantum well barrier layer.
8. With H 2 and N 2 as carrier gases, the growth temperature is 950-1000 ℃ and the thickness is 80nm, and a GaN layer with Mg doping concentration of 1×10 18/cm3 is obtained as the p-type current expansion layer 8, and the layer adopts a small growth rate to promote the lateral growth and planarization of GaN, so that a planarized upper surface (i.e. a surface close to one side of the p-type ohmic contact layer) is formed, and one side of the p-type GaN current expansion layer close to the p-type ohmic contact layer has a flat surface.
9. H 2 or N 2 is used as carrier gas, magnesium dichloride (Cp 2 Mg) is used as dopant, and the epitaxial growth temperature is 900-1000 ℃, so that a GaN layer with the Mg doping concentration of 3X 10 20/cm3 and the thickness of 10nm is obtained as the P-type ohmic contact layer 9.
In another embodiment of the present invention, a Micro LED chip includes the above-mentioned semi-polar multi-quantum well barrier epitaxial structure, and the semi-polar multi-quantum well barrier epitaxial structure is etched into a plurality of pixel units; the first electrode is in conductive connection with the n-type GaN current expansion layer in the etched semi-polar multi-quantum well barrier epitaxial structure, and the second electrode is in conductive connection with the p-type GaN current expansion layer in the etched semi-polar multi-quantum well barrier epitaxial structure. The Micro LED chip in this embodiment contains a plurality of pixel units, and is etched by adopting the semi-polar multi-quantum well barrier epitaxial structure, and according to the predetermined Micro LED size, for example, 5 μm-30 μm, the specific size is designed according to practical application requirements, and the semi-polar multi-quantum well barrier epitaxial structure is subjected to pixelation etching by adopting an ICP dry etching technology, so that at least multi-quantum well barrier layers among different pixel units are mutually independent, and a pixel structure capable of being driven independently is formed; the first electrode is in conductive connection with the n-type GaN current spreading layer in the Micro LED chip, the second electrode is in conductive connection with the p-type GaN current spreading layer in the Micro LED chip, so that external current is conducted into the Micro LED chip through the first electrode and the second electrode, and at least one electrode in the first electrode or the second electrode is in independent conductive connection for each pixel unit in the Micro LED chip for the Micro LED chip which can be independently driven by each pixel unit. In addition, in other embodiments, the Micro LED chip is formed with a bonding layer, a reflecting layer, a passivation layer, a connection metal layer, a transparent conductive layer, and other structures to enhance the light emitting effect of the chip, so long as the Micro LED chip can emit light normally.
It should be understood that, because the multiple quantum well barrier layer in the semi-polar multiple quantum well barrier epitaxial structure in the Micro LED chip is completely grown on the side surface of the hexagonal cone hole in the hexagonal cone generating layer, when a forward voltage is applied to the Micro LED chip, carriers (including electrons and holes) are acted by an external electric field pointing to the cone tip from the bottom of the hexagonal cone hole, so that the carriers move up and down along the side wall of the hexagonal cone hole to form radiation recombination and emit photons, and the lateral diffusion to the side wall of the Micro-LED is effectively inhibited, the localization of the carriers in the Micro-LED is enhanced, and the non-radiation recombination is reduced; compared with a Micro-LED chip with a traditional epitaxial structure, the side wall effect of the Micro-LED is effectively reduced, and the external quantum efficiency of the Micro-LED is improved.
It should be noted that the above embodiments can be freely combined as needed. The foregoing is merely a preferred embodiment of the present invention and it should be noted that modifications and adaptations to those skilled in the art may be made without departing from the principles of the present invention, which are intended to be comprehended within the scope of the present invention.
Claims (11)
1. A semi-polar multi-quantum well barrier epitaxial structure, comprising: the device comprises a nucleation layer, a dislocation distribution control layer, an n-type GaN current expansion layer, a hexagonal pyramid generation layer, a multiple quantum well barrier layer, a p-type electron blocking layer, a p-type GaN current expansion layer and a p-type ohmic contact layer which are sequentially formed on the surface of a growth substrate;
Hexagonal cone holes with cone tips facing the n-type GaN current expansion layer are formed in the hexagonal cone generation layer, the (0001) surfaces of the hexagonal cone holes are distributed in a hexagonal pattern, and the hexagonal cones Kong Mibu are on the (0001) surfaces;
the multi-quantum well barrier layer is a semi-polar multi-quantum well barrier layer and is formed by growing along the semi-polar (1-101) side face in the hexagonal conical hole.
2. The semipolar multiple quantum well barrier epitaxial structure of claim 1, wherein an n-GaN insertion layer having a Si doping concentration greater than 3 x 10 19/cm3 is formed between the n-type GaN current spreading layer and the hexagonal pyramid generation layer.
3. The semipolar multiple quantum well barrier epitaxial structure of claim 1 or 2, wherein the nucleation layer is an AlN layer formed at 1000-1100 ℃ and has a thickness of 150-400 nm.
4. The semi-polar multi-quantum well barrier epitaxial structure of claim 1 or 2, wherein,
The dislocation distribution control layer includes an AlGaN layer and an unintentionally doped GaN layer, wherein,
The AlGaN layer is in an island-shaped structure with high density and uniform distribution and is formed on the surface of the nucleation layer, the thickness is 100nm-300nm, the growth rate is greater than 1500nm/h, and the growth temperature is 700-800 ℃;
the growth rate of the unintended doped GaN layer is larger than 4500nm/h, the growth temperature is 1000-1100 ℃, and the unintended doped GaN layer is uniformly nucleated and grows on the surface of the AlGaN layer.
5. The semipolar multi-quantum well barrier epitaxial structure of claim 1 or 2, wherein the hexagonal pyramid generation layer has a density of hexagonal tapered holes of 7 x 10 8/cm2 to 1 x 10 9/cm2; the diameter length of the hexagonal tapered hole (0001) plane is 350nm to 500nm.
6. The semi-polar multiple quantum well barrier epitaxial structure of claim 1 or 2, wherein the multiple quantum well barrier layer is a periodic structure of In xAlyGa1-x-y N and In aAlbGa1-a-b N, and the period of the multiple quantum well barrier structure is 1-10, wherein 0+.x+.1, 0+.y+.1, 0+.a+.1, 0+.b+.1; the thickness of the single In xAlyGa1-x-y N quantum well is more than or equal to 1nm and less than or equal to 10nm, and the thickness of the single In aAlbGa1-a-b N quantum barrier layer is more than or equal to 3nm and less than or equal to 25nm.
7. The semipolar multiple quantum well barrier epitaxial structure of claim 1 or 2, wherein the p-type electron blocking layer is grown along the semipolar (1-101) side surfaces within hexagonal tapered holes formed in the multiple quantum well barrier layer.
8. The semi-polar multiple quantum well barrier epitaxial structure of claim 1 or 2, wherein the p-type GaN current spreading layer has a flat surface on a side close to the p-type ohmic contact layer.
9. The preparation method of the semi-polar multi-quantum well barrier epitaxial structure is characterized by comprising the following steps of: a nucleation layer, a dislocation distribution control layer, an n-type GaN current expansion layer, a hexagonal pyramid generation layer, a multiple quantum well barrier layer, a p-type electron blocking layer, a p-type GaN current expansion layer and a p-type ohmic contact layer are sequentially grown on the surface of a growth substrate;
When the hexagonal pyramid generation layer is grown, hexagonal conical holes with conical tips facing the n-type GaN current expansion layer are formed, the (0001) surfaces of the hexagonal conical holes are distributed in a hexagonal pattern, and the hexagonal cones Kong Mibu are on the (0001) surfaces;
and the multi-quantum well barrier layer grows along the semi-polar (1-101) side surface in the hexagonal conical hole to form a semi-polar multi-quantum well barrier layer.
10. The method of fabricating a semi-polar multiple quantum well barrier epitaxial structure of claim 9, further comprising the step of growing an n-GaN insertion layer having a Si doping concentration greater than 3 x 10 19/cm3 after growing the n-GaN current spreading layer and before the hexagonal pyramid generation layer.
11. A Micro LED chip, characterized by comprising a semi-polar multi-quantum well barrier epitaxial structure according to any of claims 1-8, and the semi-polar multi-quantum well barrier epitaxial structure being etched into a plurality of pixel cells; the first electrode is in conductive connection with the n-type GaN current expansion layer in the etched semi-polar multi-quantum well barrier epitaxial structure, and the second electrode is in conductive connection with the p-type GaN current expansion layer in the etched semi-polar multi-quantum well barrier epitaxial structure.
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