CN118969792B - SCR electrostatic protection device - Google Patents
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- CN118969792B CN118969792B CN202411441802.6A CN202411441802A CN118969792B CN 118969792 B CN118969792 B CN 118969792B CN 202411441802 A CN202411441802 A CN 202411441802A CN 118969792 B CN118969792 B CN 118969792B
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Abstract
The invention belongs to the technical field of electronic devices, in particular to an SCR electrostatic protection device which is used for solving the problem of reduced device failure current in the existing method for improving the maintaining voltage of an SCR device by dividing a device emitter. The N-type well adopts a structure that a plurality of first N-type heavily doped active regions and a plurality of first P-type heavily doped active regions are alternately arranged around a second N-type heavily doped active region to form a ring, a plurality of third N-type heavily doped active regions and a plurality of third P-type heavily doped active regions adopted in the P-type well are alternately arranged around the second P-type heavily doped active region to form a ring, and in addition, the adjacent part of the N-type well and the P-type well is also provided with a cross heavily doped active region and polysilicon. After the arrangement is adopted, the device can obtain more current paths while the maintaining voltage is improved, and the starting voltage of the SCR electrostatic protection device is reduced.
Description
Technical Field
The invention relates to the technical field of electronic devices, in particular to an SCR electrostatic protection device.
Background
Electrostatic discharge refers to an electrical phenomenon in which objects carrying electrostatic charges are transferred when they are in contact with each other, and a transient high voltage and large current is generated. As semiconductor dimensions become smaller and integrated circuit scales continue to expand, the capability of semiconductor devices to withstand ESD events becomes increasingly smaller.
SCR is the device with highest robustness in unit area in the basic ESD protection device, has simple structure, is not limited by the process in the manufacturing process, does not need to additionally increase layering, and the like, but has lower maintenance voltage Vh and is easy to generate latch-up effect. There are many methods of increasing the sustain voltage, such as increasing the size of the base region, using a stacked structure, dividing the emitter, and the like. The emitter of the split device can effectively improve the maintaining voltage, but can greatly reduce the failure current at the same time.
Disclosure of Invention
The invention aims to provide an SCR electrostatic protection device, which aims to solve the problem of reduced device failure current in a method for improving the maintaining voltage of an SCR device by dividing the emitter of the device.
In order to achieve the above purpose, the invention adopts the following technical scheme:
An SCR electrostatic protection device comprises a substrate, an N-type well and a P-type well which are formed in the substrate, wherein the N-type well and the P-type well are adjacent;
The N-type well is internally provided with a plurality of first N-type heavily doped active regions, a plurality of first P-type heavily doped active regions and a second N-type heavily doped active region; the first N-type heavily doped active regions and the first P-type heavily doped active regions are alternately arranged around the second N-type heavily doped active region to form a ring; the second N-type heavily doped active region is connected with the N-type well potential, and is isolated from the first N-type heavily doped active region and the first P-type heavily doped active region through the first isolation structure; the P-type well is internally provided with a plurality of third N-type heavily doped active regions, a plurality of third P-type heavily doped active regions and a second P-type heavily doped active region, the third N-type heavily doped active regions and the plurality of third P-type heavily doped active regions are alternately arranged around the second P-type heavily doped active region to form a ring, the second P-type heavily doped active region is connected with a P-type well potential and isolated from the third N-type heavily doped active region and the third P-type heavily doped active region through a second isolation structure, and the plurality of third N-type heavily doped active regions, the plurality of third P-type heavily doped active regions and the second P-type heavily doped active region are all connected to a cathode;
And a third isolation structure is adopted at the adjacent part of the N-type well and the P-type well to isolate the first N-type heavily doped active region and the first P-type heavily doped active region in the N-type well from the third N-type heavily doped active region and the third P-type heavily doped active region in the P-type well.
Further, a crossing heavy doping active region crossing the N-type well and the P-type well is arranged at the adjacent position of the N-type well and the P-type well, and the crossing heavy doping active region is a fourth N-type heavy doping active region or a fourth P-type heavy doping active region.
Further, the SCR electrostatic protection device further comprises polysilicon formed above the N-type well or the P-type well, wherein when the polysilicon is formed above the N-type well, the crossing heavy doped active region is a P-type heavy doped active region which is arranged on the upper surface of the crossing heavy doped active region and between a first N-type heavy doped active region adjacent to the crossing heavy doped active region and the first P-type heavy doped active region and is connected with the anode, and when the polysilicon is formed above the P-type well, the crossing heavy doped active region is an N-type heavy doped active region which is arranged on the upper surface of the crossing heavy doped active region and between a third N-type heavy doped active region adjacent to the crossing heavy doped active region and the third P-type heavy doped active region and is connected with the cathode.
Further, the substrate material is silicon.
Further, the first isolation structure, the second isolation structure and the third isolation structure are shallow trench isolation structures or local field oxide isolation structures.
Further, the N-type well and the P-type well are high-voltage wells or low-voltage wells.
Further, a fourth isolation structure is formed in the N-type well, one end of the fourth isolation structure, which is far away from the first N-type heavily doped active region or the first P-type heavily doped active region, extends outwards into the substrate, and surrounds the first N-type heavily doped active regions, the first P-type heavily doped active regions and the second N-type heavily doped active region together with the third isolation structure, a fifth isolation structure is also formed in the P-type well, one end of the fifth isolation structure, which is far away from the third N-type heavily doped active region or the third P-type heavily doped active region, extends outwards into the substrate, and surrounds the third N-type heavily doped active regions, the third P-type heavily doped active regions and the second P-type heavily doped active region together with the third isolation structure.
According to the SCR electrostatic protection device provided by the invention, the plurality of first N-type heavily doped active regions and the plurality of first P-type heavily doped active regions are alternately arranged in the N-type well to form the ring around the second N-type heavily doped active region, and the structure that the plurality of third N-type heavily doped active regions and the plurality of third P-type heavily doped active regions are alternately arranged around the second P-type heavily doped active region to form the ring is matched with the method that the plurality of third N-type heavily doped active regions and the plurality of third P-type heavily doped active regions are adopted in the P-type well, so that the device can obtain more current discharge paths while the maintaining voltage is improved, and the problem of reduced device failure current in the existing method that the SCR device maintaining voltage is improved by dividing the emitter of the device is solved. In addition, the starting voltage of the SCR electrostatic protection device is reduced by arranging a cross heavily doped active region at the adjacent part of the N-type well and the P-type well and arranging polysilicon in the N-type well or the P-type well.
Drawings
FIG. 1 is a schematic diagram of a cross-sectional structure and an equivalent circuit diagram of a conventional SCR electrostatic protection device;
FIG. 2 is a schematic top view of a conventional SCR electrostatic protection device;
FIG. 3 is a schematic top view of a prior SCR electrostatic protection device after emitter segmentation;
fig. 4 is a schematic cross-sectional structure of the SCR electrostatic protection device provided in embodiment 1;
fig. 5 is an equivalent circuit diagram of the SCR electrostatic protection device provided in embodiment 1;
Fig. 6 is a schematic view showing an emitter division of an SCR electrostatic protection device provided in embodiment 1 in a top view;
Fig. 7 is a schematic cross-sectional structure of an SCR electrostatic protection device of embodiment 2 with an N-type heavily doped active region crossing the heavily doped active region;
fig. 8 is an emitter segmentation schematic diagram of an SCR electrostatic protection device of embodiment 2 with an N-type heavily doped active region crossing the heavily doped active region;
fig. 9 is a schematic cross-sectional structure of an SCR electrostatic protection device provided in embodiment 2, wherein the P-type heavily doped active region is crossing the heavily doped active region;
Fig. 10 is a schematic view of emitter segmentation of an SCR electrostatic protection device of embodiment 2 in which P-type heavily doped active regions are crossed over heavily doped active regions;
fig. 11 is a schematic cross-sectional view of an SCR electrostatic protection device formed on a P-well with polysilicon according to embodiment 3;
fig. 12 is a schematic view illustrating an emitter division of an SCR electrostatic protection device formed on a P-well with polysilicon according to embodiment 3;
fig. 13 is a schematic cross-sectional view of an SCR electrostatic protection device formed on an N-well with polysilicon according to embodiment 3;
Fig. 14 is a schematic top view of an SCR electrostatic protection device with polysilicon formed on an N-well according to embodiment 3;
Reference numeral 1 is a first current path, 2 is a second current path, 3 is a third current path, 4 is a fourth current path, 5 is a fifth current path, 100 is a substrate, 101 is an N-type well, 102 is a P-type well, 103 is a first STI isolation region, 104 is a first N+ doped active region, 105 is a first P+ doped active region, 106 is a second N+ doped active region, 107 is a second P+ doped active region, 108 is a second STI isolation region, 109 is a third STI isolation region, 110 is a fourth STI isolation region, 111 is a fifth STI isolation region, 203 is a first isolation structure, 204 is a third isolation structure, 205 is a second isolation structure, 206 is a second P-type heavily doped active region, 207 is a second N-type heavily doped active region, 208 is a cross heavily doped active region, 209 is polysilicon, 210 is a fourth isolation structure, and 211 is a fifth isolation structure.
Detailed Description
Fig. 1 is a schematic cross-sectional structure diagram and an equivalent circuit diagram of a conventional SCR electrostatic protection device, and fig. 2 is a schematic top view diagram of the conventional SCR electrostatic protection device. As shown in fig. 1-2, the semiconductor device comprises a substrate 100, wherein the substrate 100 is a P-type substrate. Adjacent N-type well 101 and P-type well 102 are formed in substrate 100, with the upper surface of N-type well 101 being flush with the upper surface of P-type well 102. The N-type well 101 is provided with a first STI isolation region 103, a first N+ doped active region 104, a second STI isolation region 108 and a first P+ doped active region 105 in sequence from left to right, the P-type well 102 is provided with a second N+ doped active region 106, a third STI isolation region 109, a second P+ doped active region 107 and a fourth STI isolation region 110 in sequence from left to right, the adjacent part of the N-type well 101 and the P-type well 102 is provided with a fifth STI isolation region 111, one end of the first STI isolation region 103 away from the first N+ doped active region 104 extends downwards into the left side substrate 100, and one end of the fourth STI isolation region 110 away from the second P+ doped active region 107 extends downwards into the right side P-type well 102. The first n+ doped active region 104 and the first p+ doped active region 105 are connected to the anode, and the second n+ doped active region 106 and the second p+ doped active region 107 are connected to the cathode.
The N-type well 101, the P-type well 102 and the second n+ doped active region 106 form a parasitic NPN tube, the first p+ doped active region 105, the N-type well 101 and the P-type well 102 form a parasitic PNP tube, as shown in fig. 1, the equivalent resistance of the N-type well 101 is r_nwell, the equivalent resistance of the P-type well 102 is r_pwell, when the anode is subjected to an ESD event, a large amount of current enters from the anode, the anode voltage gradually increases, so that avalanche breakdown occurs between the N-type well 101 and the P-type well 102, and voltage drops occur when the current flows through r_nwell and r_pwell, so that the parasitic NPN and PNP are turned on, and a large current is discharged.
In the existing SCR electrostatic protection device, if in a higher voltage working environment, the ESD sustain voltage is lower than the normal working voltage of the protected circuit, so that after the ESD event is ended, the ESD device cannot be normally turned off under the normal working voltage, and the normal working of the circuit is affected.
Fig. 3 is a schematic plan view of a conventional SCR electrostatic protection device after the emitter is divided, and as can be seen from fig. 3, the conventional method for dividing the emitter can raise the SCR device holding voltage, but causes a problem of decreasing the device failure current.
Therefore, the invention provides an SCR electrostatic protection device, which is formed by alternately arranging N-type heavy doping and P-type heavy doping on the emitter of a split NPN tube and PNP tube, so that the maintenance voltage is improved, and meanwhile, more current paths are obtained by utilizing the annular emitter, so that the reduction of the failure current of the device is inhibited.
The present invention will be described in detail with reference to the drawings and examples.
In embodiment 1, as shown in fig. 4 and 6, the SCR electrostatic protection device provided in this embodiment includes a substrate 100, where the substrate 100 is made of silicon, and an N-type well 101 and a P-type well 102 are formed in the substrate 100, and the upper surfaces of the two wells are flush.
The N-type well 101 is provided with a plurality of first N-type heavily doped active regions, a plurality of first P-type heavily doped active regions and a second N-type heavily doped active region 207, the plurality of first N-type heavily doped active regions and the plurality of first P-type heavily doped active regions are alternately arranged around the second N-type heavily doped active region 207 to form a ring, and the second N-type heavily doped active region 207 is connected to the potential of the N-type well 101 and isolated from the first N-type heavily doped active region and the first P-type heavily doped active region through a first isolation structure 203.
The P-well 102 is provided with a plurality of third N-type heavily doped active regions, a plurality of third P-type heavily doped active regions, and a second P-type heavily doped active region 206, the plurality of third N-type heavily doped active regions and the plurality of third P-type heavily doped active regions are alternately arranged in a ring around the second P-type heavily doped active region 206, and the second P-type heavily doped active region 206 is connected to the potential of the P-well 102 and isolated from the third N-type heavily doped active region and the third P-type heavily doped active region by a second isolation structure 205.
The third isolation structure 204 is used at the adjacent position of the N-type well 101 and the P-type well 102 to isolate the first N-type heavily doped active region and the first P-type heavily doped active region in the N-type well 101 from the third N-type heavily doped active region and the third P-type heavily doped active region in the P-type well 102.
The fourth isolation structure 210 extends out into the substrate 100 away from one end of the first N-type heavily doped active region or the first P-type heavily doped active region, and the fourth isolation structure 210 and the third isolation structure 204 together enclose the plurality of first N-type heavily doped active regions, the plurality of first P-type heavily doped active regions, and the second N-type heavily doped active region 207. The end of the fifth isolation structure 211 away from the third N-type heavily doped active region or the third P-type heavily doped active region extends outwards into the substrate 100, and the fifth isolation structure 211 and the third isolation structure 204 together enclose a plurality of third N-type heavily doped active regions, a plurality of third P-type heavily doped active regions, and a second P-type heavily doped active region 206.
The first isolation structure 203, the second isolation structure 205, and the third isolation structure 204 are shallow trench isolation structures or local field oxide isolation structures, and trench isolation structures are preferred in this embodiment. In use, the plurality of first P-type heavily doped active regions, the N-type well 101 and the P-type well 102 constitute a PNP transistor, the plurality of first P-type heavily doped active regions serve as emitter, the N-type well 101 serves as base, and the P-type well 102 serves as collector. The third N-type heavily doped active regions, the P-type well 102 and the N-type well 101 form an NPN transistor, the third N-type heavily doped active regions serve as emitters, the P-type well 102 serves as a base, and the N-type well 101 serves as a collector. The first N-type heavily doped active regions, the first P-type heavily doped active regions and the second N-type heavily doped active regions 207 in the N-type well 101 are all connected to the anode, and the third N-type heavily doped active regions, the third P-type heavily doped active regions and the second P-type heavily doped active regions 206 in the P-type well 102 are all connected to the cathode.
The equivalent circuit of the SCR electrostatic protection device of this embodiment is shown in fig. 5, and when ESD high current is input from the anode, the anode voltage gradually increases until the voltage is higher than the breakdown voltage of the N-type well 101 and the P-type well 102, and avalanche breakdown occurs between the N-type well 101 and the P-type well 102, so that a large amount of current is generated. The current flowing through the N-type well 101 generates voltage drop through the resistance of the N-type well 101, so that PN junctions formed between a plurality of first P-type heavily doped active regions in the N-type well 101 and the N-type well 101 are opened, and a PNP tube is opened, and the current flowing through the P-type well 102 generates voltage drop through the resistance of the P-type well 102, so that PN junctions formed between a plurality of third N-type heavily doped active regions in the P-type well 102 and the P-type well 102 are opened, and an NPN tube is opened. The collector current of the NPN tube provides base current for the PNP tube, the collector current of the PNP tube provides base current for the NPN tube, the SCR path is formed, and ESD current is discharged.
In this embodiment, the N-type well 101 adopts a design structure in which a plurality of first N-type heavily doped active regions and a plurality of first P-type heavily doped active regions are alternately arranged around the second N-type heavily doped active region 207 to form a ring, and a plurality of third N-type heavily doped active regions and a plurality of third P-type heavily doped active regions are alternately arranged around the second P-type heavily doped active region 206 in the P-type well 102 to form a ring, so that the device can obtain more drain current paths while maintaining voltage is increased, and thus failure current of the device is increased. The added partial current paths are shown in fig. 6, and it can be seen from fig. 6 that the SCR electrostatic protection device of the present embodiment has more circuit paths than the existing SCR electrostatic protection device shown in fig. 1. Only the first current path 1, the second current path 2, the third current path 3, the fourth current path 4, and the fifth current path 5 are given in fig. 6 for illustration.
In embodiment 2, the SCR electrostatic protection device provided in this embodiment is based on the SCR electrostatic protection device structure provided in embodiment 1, and the turn-on voltage of the SCR electrostatic protection device is reduced by providing a heavily doped active region 208 crossing the N-type well 101 and the P-type well 102 at the adjacent position of the N-type well 101 and the P-type well 102. Crossing the heavily doped active region 208 is an N-type heavily doped active region or a P-type heavily doped active region. The structure of the N-type heavily doped active region across the heavily doped active region 208 is shown in fig. 7-8, and the structure of the P-type heavily doped active region across the heavily doped active region 208 is shown in fig. 9-10.
In the case of an N-type heavily doped active region across heavily doped active region 208, when a large ESD current is injected from the anode, the anode voltage gradually increases until it is higher than the breakdown voltage across heavily doped active region 208 and P-type well 102, and avalanche breakdown occurs across heavily doped active region 208 and P-type well 102, producing a large amount of current. The current flowing through the P-well 102 generates a voltage drop through the resistance of the P-well 102, so that PN junctions formed between a plurality of third N-type heavily doped active regions in the P-well 102 and the P-well 102 are opened, and an NPN tube is opened, and the current flowing through the N-well 101 generates a voltage drop through the resistance of the N-well 101, so that PN junctions formed between a plurality of first P-type heavily doped active regions in the N-well 101 and the N-well 101 are opened, and PNP is opened. The collector current of the NPN tube provides base current for PNP, the collector current of PNP provides base current for NPN, SCR path is formed, and ESD current is discharged.
In the case of a P-type heavily doped active region across heavily doped active region 208, when a large ESD current is injected from the anode, the anode voltage gradually increases until it is higher than the breakdown voltage across heavily doped active region 208 and N-type well 101, and avalanche breakdown occurs across heavily doped active region 208 and N-type well 101, producing a large amount of current. The current flowing through the N-well 101 generates a voltage drop through the resistance of the N-well 101, so that PN junctions formed between a plurality of first P-type heavily doped active regions in the N-well 101 and the N-well 101 are opened, thereby opening PNP, and the current flowing through the P-well 102 generates a voltage drop through the resistance of the P-well 102, so that PN junctions formed between a plurality of third N-type heavily doped active regions in the P-well 102 and the P-well 102 are opened, thereby opening an NPN tube. The collector current of the NPN tube provides base current for PNP, the collector current of PNP provides base current for NPN, SCR path is formed, and ESD current is discharged.
In embodiment 3, an SCR electrostatic protection device according to this embodiment is provided, in which polysilicon 209 is disposed above an N-type well 101 or a P-type well 102 on the basis of the SCR electrostatic protection device according to embodiment 2.
As shown in fig. 13-14, when the polysilicon 209 is formed over the N-well 101, the cross heavily doped active region 208 is a P-type heavily doped active region that is disposed across the heavily doped active region 208 and on an upper surface between the plurality of first N-type heavily doped active regions and the plurality of first P-type heavily doped active regions adjacent to the cross heavily doped active region 208 and is connected to the anode. By setting the polysilicon 209, a PMOS structure can be formed in the N-type well 101, so that the turn-on voltage of the SCR electrostatic protection device is further reduced. When ESD high current is input from the anode, the anode voltage gradually increases until the voltage is higher than the breakdown voltage of a MOS transistor composed of a plurality of first P-type heavily doped active regions crossing the heavily doped active region 208, the polysilicon 209, the N-type well 101 and the N-type well 101, and the MOS transistor breaks down to generate a large amount of current. The current flowing through the N-well 101 generates a voltage drop through the resistance of the N-well 101, so that PN junctions formed between a plurality of first P-type heavily doped active regions in the N-well 101 and the N-well 101 are opened, thereby opening PNP, and the current flowing through the P-well 102 generates a voltage drop through the resistance of the P-well 102, so that PN junctions formed between a plurality of third N-type heavily doped active regions in the P-well 102 and the P-well 102 are opened, thereby opening an NPN tube. The collector current of the NPN tube provides base current for PNP, the collector current of PNP provides base current for NPN, SCR path is formed, and ESD current is discharged.
As shown in fig. 11-12, when the polysilicon 209 is formed over the P-well 102, the cross heavily doped active region 208 is an N-type heavily doped active region that is disposed across the heavily doped active region 208 and on the upper surface between the third N-type heavily doped active region and the third P-type heavily doped active region adjacent to the cross heavily doped active region 208 and is connected to the cathode. By setting the polysilicon 209, an NMOS structure can be formed in the P-type well 102, so that the turn-on voltage of the SCR electrostatic protection device is further reduced. When a large current of ESD is input from the anode, the anode voltage gradually increases until the voltage is higher than the breakdown voltage of a MOS transistor composed of a plurality of third N-type heavily doped active regions crossing the heavily doped active region 208, the polysilicon 209, the P-type well 102 and the P-type well 102, and the MOS transistor breaks down to generate a large amount of current. The current flowing through the P-well 102 generates a voltage drop through the resistance of the P-well 102, so that PN junctions formed between a plurality of third N-type heavily doped active regions in the P-well 102 and the P-well 102 are opened, and an NPN tube is opened, and the current flowing through the N-well 101 generates a voltage drop through the resistance of the N-well 101, so that PN junctions formed between a plurality of first P-type heavily doped active regions in the N-well 101 and the N-well 101 are opened, and PNP is opened. The collector current of the NPN tube provides base current for PNP, the collector current of PNP provides base current for NPN, SCR path is formed, and ESD current is discharged.
It should be noted that all the structural equivalent circuits given in embodiments 1-3 are the same, so the structural equivalent circuit diagrams are only required to refer to fig. 5.
In summary, according to the SCR electrostatic protection device provided by the present invention, the N-type well 101 is provided with the first N-type heavily doped active regions and the first P-type heavily doped active regions which are alternately arranged around the second N-type heavily doped active region 207 to form a ring, and the third N-type heavily doped active regions and the third P-type heavily doped active regions which are used in the P-type well 102 are alternately arranged around the second P-type heavily doped active region 206 to form a ring structure, so that the device can obtain more paths of drain current while increasing the maintaining voltage, and the problem of device failure current reduction existing in the existing method of increasing the maintaining voltage of the SCR device by using the emitter of the split device is solved. In addition, the turn-on voltage of the SCR electrostatic protection device is further reduced by providing a cross heavily doped active region 208 at the junction of the N-well 101 and the P-well 102, and providing polysilicon 209 in either the N-well 101 or the P-well 102.
It will be understood that the application has been described in terms of several embodiments, and that various changes and equivalents may be made to these features and embodiments by those skilled in the art without departing from the spirit and scope of the application. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the application without departing from the essential scope thereof. Therefore, it is intended that the application not be limited to the particular embodiment disclosed, but that the application will include all embodiments falling within the scope of the appended claims.
Claims (7)
1. An SCR electrostatic protection device, comprising a substrate, an N-type well and a P-type well formed in the substrate, the N-type well and the P-type well being adjacent, and the SCR electrostatic protection device is characterized in that:
The N-type well is internally provided with a plurality of first N-type heavily doped active regions, a plurality of first P-type heavily doped active regions and a second N-type heavily doped active region, wherein the plurality of first N-type heavily doped active regions and the plurality of first P-type heavily doped active regions are alternately arranged around the second N-type heavily doped active region to form a ring;
The P-type well is internally provided with a plurality of third N-type heavily doped active regions, a plurality of third P-type heavily doped active regions and a second P-type heavily doped active region, wherein the plurality of third N-type heavily doped active regions and the plurality of third P-type heavily doped active regions are alternately arranged around the second P-type heavily doped active region to form a ring;
and a third isolation structure is adopted at the adjacent position of the N-type well and the P-type well to isolate a plurality of first N-type heavily doped active regions and a plurality of first P-type heavily doped active regions in the N-type well from a plurality of third N-type heavily doped active regions and a plurality of third P-type heavily doped active regions in the P-type well.
2. The SCR electrostatic protection device of claim 1, wherein the junction of the N-type well and the P-type well is provided with a cross heavily doped active region crossing the N-type well and the P-type well, and the cross heavily doped active region is a fourth N-type heavily doped active region or a fourth P-type heavily doped active region.
3. The SCR electrostatic protection device of claim 2, further comprising polysilicon formed over the N-type well or the P-type well, wherein the cross heavily doped active region is a P-type heavily doped active region disposed across the upper surface of the heavily doped active region and between the first N-type heavily doped active region and the first P-type heavily doped active region adjacent to the cross heavily doped active region and connected to the anode, and wherein the cross heavily doped active region is an N-type heavily doped active region disposed across the upper surface of the heavily doped active region and between the third N-type heavily doped active region and the third P-type heavily doped active region adjacent to the cross heavily doped active region and connected to the cathode when the polysilicon is formed over the P-type well.
4. The SCR electrostatic protection device of claim 1, wherein the substrate material is silicon.
5. The SCR electrostatic protection device of claim 1, wherein the first isolation structure, the second isolation structure, and the third isolation structure are shallow trench isolation structures or local field oxide isolation structures.
6. The SCR electrostatic protection device of claim 1, wherein the N-type well and the P-type well are high-voltage wells or low-voltage wells.
7. The SCR electrostatic protection device of any one of claims 1 to 6, wherein a fourth isolation structure is further formed in the N-well, the fourth isolation structure extends outwards into the substrate away from one end of the first N-type heavily doped active region or the first P-type heavily doped active region, and surrounds the first N-type heavily doped active regions, the first P-type heavily doped active regions and the second N-type heavily doped active regions together with the third isolation structure, a fifth isolation structure is further formed in the P-type well, and extends outwards into the substrate away from one end of the third N-type heavily doped active region or the third P-type heavily doped active region, and surrounds the third N-type heavily doped active regions, the third P-type heavily doped active regions and the second P-type heavily doped active regions together with the third isolation structure.
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| US7842971B2 (en) * | 2008-02-22 | 2010-11-30 | Intersil Americas Inc. | Silicon-controlled rectifier (SCR) device for high-voltage electrostatic discharge (ESD) applications |
| US9082620B1 (en) * | 2014-01-08 | 2015-07-14 | Macronix International Co., Ltd. | Semiconductor device |
| US10217733B2 (en) * | 2015-09-15 | 2019-02-26 | Semiconductor Components Industries, Llc | Fast SCR structure for ESD protection |
| KR102410020B1 (en) * | 2015-12-21 | 2022-06-22 | 에스케이하이닉스 주식회사 | ESD protection device having a low trigger voltage |
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| CN118645504A (en) * | 2024-06-21 | 2024-09-13 | 中国电子科技集团公司第五十八研究所 | A high voltage radiation hardened ESD device structure |
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