CN118969039A - A writing circuit, method and array - Google Patents
A writing circuit, method and array Download PDFInfo
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- CN118969039A CN118969039A CN202411441868.5A CN202411441868A CN118969039A CN 118969039 A CN118969039 A CN 118969039A CN 202411441868 A CN202411441868 A CN 202411441868A CN 118969039 A CN118969039 A CN 118969039A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1697—Power supply circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/10—Combined modulation, e.g. rate modulation and amplitude modulation
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Abstract
本申请提供了一种写入电路、方法以及阵列，包括用于产生多个脉冲信号的多脉冲发生模块；其中，多个脉冲信号包括多个依次交叠的第一脉冲信号和第二脉冲信号，第一脉冲信号和第二脉冲信号的写入方向相反；第一脉冲信号的幅值呈逐渐递减趋势，且处于相邻两个第一脉冲信号之间的第二脉冲信号的幅值小于相邻两个第一脉冲信号的幅值，和/或，第一脉冲信号的脉宽呈逐渐递减趋势，且处于相邻两个第一脉冲信号之间的第二脉冲信号的脉宽小于相邻两个第一脉冲信号的脉宽；通过多个脉冲信号使处于中间状态的磁存储器进行确定性翻转。本申请能够提供一种不需要优化MTJ刻蚀工艺，就能够提高磁存储器件的数据写入成功率的技术方案。
The present application provides a write circuit, method and array, including a multi-pulse generation module for generating multiple pulse signals; wherein the multiple pulse signals include multiple first pulse signals and second pulse signals that overlap in sequence, and the writing directions of the first pulse signals and the second pulse signals are opposite; the amplitude of the first pulse signal is gradually decreasing, and the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of the two adjacent first pulse signals, and/or the pulse width of the first pulse signal is gradually decreasing, and the pulse width of the second pulse signal between two adjacent first pulse signals is smaller than the pulse width of the two adjacent first pulse signals; a magnetic storage device in an intermediate state is deterministically flipped by multiple pulse signals. The present application can provide a technical solution that can improve the data writing success rate of a magnetic storage device without optimizing the MTJ etching process.
Description
Technical Field
The present application relates to the field of integrated circuit design, and in particular, to a write circuit, a write method, and an array.
Background
Spin-orbit Torque magnetic memory (SOT-MRAM) has the advantages of non-volatility, high speed and low power consumption, fast data writing, high device durability, etc., and has become a main candidate for the next generation memory technology. The SOT-MRAM basic memory cell structure is a multi-layer film structure of heavy metal/free layer/barrier layer/fixed layer formed by adding a heavy metal layer at the adjacent position of the free layer of the MTJ (Magnetic Tunnel Junction ). The current flowing through the heavy metal can generate a self-rotational flow, and the self-rotational flow can turn over the magnetization direction of the free layer, so that data writing is realized.
In the existing SOT-MTJ data writing mode, one-time pulse writing is mostly adopted, but due to the film layer or process defects of the magnetic memory device, the magnetic moment of the free layer of the MTJ is easy to be pinned by defects during data writing, so that the state is in an intermediate state, and the data writing of the magnetic memory device is unsuccessful.
At present, the defects of the MTJ are eliminated by adopting a mode of compounding a continuous free layer, optimizing the etching process of the MTJ and the like, but the method is limited by the performance level of a film plating machine device and an etching machine device, and the defects generated by the MTJ are difficult to avoid.
Disclosure of Invention
The application provides a write circuit, a write method and an array, which are used for providing a technical scheme capable of improving the data write success rate of a magnetic memory device without optimizing an MTJ etching process.
In a first aspect, the present application provides a write circuit comprising a multi-pulse generating module for generating a plurality of pulse signals and providing the plurality of pulse signals to a write terminal of a magnetic memory device;
The plurality of pulse signals comprise a plurality of first pulse signals and second pulse signals which are overlapped in sequence, and the writing directions of the first pulse signals and the second pulse signals are opposite.
The amplitude of the latter first pulse signal in the plurality of pulse signals is not larger than the amplitude of the former first pulse signal, and the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of two adjacent first pulse signals, and/or the pulse width of the latter first pulse signal in the plurality of pulse signals is not larger than the pulse width of the former first pulse signal, and the pulse width of the second pulse signal between two adjacent first pulse signals is smaller than the pulse width of two adjacent first pulse signals.
The magnetic memory in the intermediate state is deterministic flipped by a plurality of pulse signals.
In an alternative embodiment, the plurality of pulse signals includes a first pulse sub-signal, a second pulse sub-signal, and a third pulse sub-signal, the first pulse sub-signal and the third pulse sub-signal being the first pulse signal, and the second pulse sub-signal being the second pulse signal.
The amplitude of the first pulse sub-signal is larger than the amplitude of the third pulse sub-signal, and/or the pulse width of the first pulse sub-signal is larger than the pulse width of the third pulse sub-signal.
The amplitude of the second pulse sub-signal is smaller than the amplitudes of the first pulse sub-signal and the third pulse sub-signal at the same time, and/or the pulse width of the second pulse sub-signal is smaller than the pulse width of the first pulse sub-signal and the third pulse sub-signal at the same time.
In an alternative embodiment, the falling edge widths of the first pulse sub-signal and the third pulse sub-signal are each greater than the respective rising edge widths.
In one possible implementation, the multiple pulse generation module includes a pulse generation unit.
The pulse generation unit is used for generating a plurality of first pulse signals and second pulse signals which are overlapped in sequence, and the amplitude and/or the pulse width of the first pulse signals in the plurality of pulse signals are reduced in sequence according to time sequence.
In one possible implementation, the multi-pulse generating module further comprises an amplitude modulation unit, and/or a pulse width modulation unit.
The amplitude modulation unit is used for carrying out amplitude adjustment on the first pulse signal or the second pulse signal.
The pulse width modulation unit is used for performing pulse width modulation on the first pulse signal or the second pulse signal.
In one possible implementation, a switching module and a magnetic storage device are also included.
The multi-pulse generating module, the switch module and the writing end of the magnetic storage device are sequentially connected, and a plurality of pulse signals are provided to the writing end of the magnetic storage device through the switch module.
In one possible implementation, the switching module includes at least two switching units, and the switching units are used for inputting a first pulse signal or a second pulse signal to the writing terminals on two sides of the magnetic memory device after being gated.
When a first pulse signal is input to one writing end of the magnetic memory device through one of the switch units, a second pulse signal is correspondingly input to the other writing end of the magnetic memory device.
In one possible implementation, the magnetic memory device is a spin-orbit torque magnetic memory, and writing of the first pulse signal or the second pulse signal is performed through both ends of a spin-orbit torque layer in the spin-orbit torque magnetic memory.
In one possible implementation, the magnetic memory device is a Nand type spin-orbit torque magnetic memory that includes at least a single spin-orbit torque layer and a plurality of magnetic tunnel junctions disposed over the single spin-orbit torque layer.
The multi-pulse generation module generates a plurality of first pulse signals and second pulse signals, and the first pulse signals and the second pulse signals which are overlapped in sequence are input through the top end of a single spin-orbit torque layer or a Nand-type spin-orbit torque magnetic memory.
In a second aspect, the present application also provides a write array comprising: a plurality of write circuits as in any one of the first aspects arranged in an array; the write array may enable parallel writing of a plurality of magnetic memory devices.
In a third aspect, the present application also provides a writing method, including the steps of:
Sequentially providing a plurality of pulse signals to a writing end of the magnetic memory device; wherein the plurality of pulse signals comprise a plurality of first pulse signals and second pulse signals which are overlapped in sequence;
The amplitude of the latter first pulse signal in the plurality of pulse signals is not larger than the amplitude of the former first pulse signal, and the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of two adjacent first pulse signals, and/or the pulse width of the latter first pulse signal in the plurality of pulse signals is not larger than the pulse width of the former first pulse signal, and the pulse width of the second pulse signal between two adjacent first pulse signals is smaller than the pulse width of two adjacent first pulse signals.
The magnetic memory in the intermediate state is deterministic flipped by a plurality of pulse signals.
In the technical scheme provided by the application, the multi-pulse generating module is used for generating a plurality of pulse signals and sequentially providing the pulse signals to the writing end of the magnetic memory device. The plurality of pulse signals includes a plurality of first pulse signals and second pulse signals that overlap in sequence. It should be understood that the intermediate state is that in the process of magnetic moment inversion of the MTJ free layer, the magnetic moment is stabilized in a multi-domain state due to defects, pinning, and the like, and in the multiple pulse signals of the present application, by setting a second pulse signal between two first pulse signals, the second pulse signal can consume the multi-domain state of the magnetic memory device, thereby changing the intermediate state of the magnetic memory device, and then providing the first pulse signal to the magnetic memory device, the magnetic memory device can be inverted, so as to implement writing of data.
It should be further appreciated that in actual operation, when the applied pulse amplitude, and/or pulse width is large, it is easy to cause the magnetic memory device to flip back again after the flip is successful, thereby causing unsuccessful data writing and reducing the writing yield. Based on this, in time sequence, the amplitude of the next first pulse signal in the plurality of pulse signals is not greater than the amplitude of the previous first pulse signal, and/or the pulse width of the next first pulse signal in the plurality of pulse signals is not greater than the pulse width of the previous first pulse signal, preferably the amplitude of the first pulse signal, and/or the pulse width is in a decreasing trend in order to ensure that a larger amplitude is provided in the initial stage, and/or the pulse width of the pulse signal realizes the flipping of the magnetic memory device, and for the magnetic memory device whose flipping rebound is caused due to an excessively large pulse amplitude, and/or the pulse width, the appropriate amplitude is provided by gradually decreasing the pulse amplitude, and/or the pulse width in the subsequent stage, and/or the pulse width is ensured to realize the flipping of the magnetic memory device, and thus the writing of data. That is, for a magnetic memory device in which the write current is relatively small, the present application can achieve data writing by applying a plurality of first pulse signals having magnitudes, and/or pulse widths gradually decreasing.
The second pulse signal can also be used for canceling partial forward pulse which is reversed back by the magnetic memory when the applied pulse amplitude is larger, and then providing a write current with smaller amplitude for the magnetic memory device, so that the magnetic memory device can be smoothly turned over, and the writing of data is ensured. Thus, the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of the previous first pulse signal. In order to ensure that the subsequently applied first pulse signal can enable the magnetic memory to realize smooth turnover, the amplitude value and/or the pulse width of the second pulse signal should be smaller than that of the later first pulse signal, so as to avoid that the later applied first pulse signal cannot realize smooth turnover of the magnetic memory due to insufficient energy.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
FIG. 1 is a schematic diagram of a write circuit according to an embodiment of the present application;
FIG. 2 is a circuit diagram of a write circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram illustrating a data writing direction in a write circuit according to an embodiment of the present application;
fig. 4 is a schematic diagram of a multi-pulse signal according to an embodiment of the present application;
FIG. 5 is a schematic diagram illustrating a data writing direction in another write circuit according to an embodiment of the present application;
FIG. 6 is a schematic diagram of another multi-pulse signal according to an embodiment of the present application;
FIG. 7 is a schematic diagram of another multiple pulse signals according to an embodiment of the present application;
FIG. 8 is a schematic diagram of a Nand-type SOT-MRAM according to an embodiment of the application;
FIG. 9 is a schematic diagram of a multi-pulse signal applied to a Nand-type SOT-MRAM according to an embodiment of the application;
FIG. 10 is a graph of the corresponding MTJ resistance when writing with a single pulse according to an embodiment of the present application;
FIG. 11 is a schematic diagram of another multi-pulse signal applied to a Nand-type SOT-MRAM in accordance with an embodiment of the present application;
fig. 12 is a graph of MTJ resistance relationships corresponding to writing with a single pulse according to another embodiment of the present application.
Specific embodiments of the present application have been shown by way of the above drawings and will be described in more detail below. The drawings and the written description are not intended to limit the scope of the inventive concepts in any way, but rather to illustrate the inventive concepts to those skilled in the art by reference to the specific embodiments.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the application. Rather, they are merely examples of apparatus and methods consistent with aspects of the application as detailed in the accompanying claims.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. It will be understood that the terms first, second, etc. as used herein may be used to describe various information or data, but these elements are not limited by these terms. These terms are only used to distinguish one item of information from another. For example, the first action information may be referred to as second action information, and similarly, the second action information may be referred to as first action information, without departing from the scope of the application. Both the first action information and the second action information are action information, but they are not the same action information.
Spin-orbit Torque magnetic memory (SOT-MRAM) has the advantages of non-volatility, high speed and low power consumption, fast data writing, high device durability, etc., and has become a main candidate for the next generation memory technology. The SOT-MRAM basic memory cell structure is a multi-layer film structure of heavy metal/free layer/barrier layer/fixed layer formed by adding a heavy metal layer at the adjacent position of the free layer of the MTJ (Magnetic Tunnel Junction ). The current flowing through the heavy metal can generate a self-rotational flow, and the self-rotational flow can turn over the magnetization direction of the free layer, so that data writing is realized.
The existing SOT-MTJ data writing mode usually adopts one-time pulse writing, but write currents of all devices in a chip array are different, and for memories with smaller write currents, when the applied pulse amplitude is larger, the devices are easily turned back after being turned over successfully, so that data writing is unsuccessful, and the chip writing yield is reduced.
In view of the above problems, the present application provides a technical solution capable of continuously generating a plurality of write pulse signals, where the plurality of pulse signals includes a first pulse signal and a second pulse signal that are overlapped, and the second pulse signal is used to avoid that a magnetic tunnel junction of a magnetic memory device is in a write intermediate state, so that the first pulse signal is provided to the magnetic memory device again, and successful writing of data can be achieved.
The following describes the technical scheme of the present application and how the technical scheme of the present application solves the above technical problems in detail with specific embodiments. The following embodiments may be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.
In a first aspect, referring to FIG. 1, an embodiment of the present application provides a write circuit comprising a multi-pulse generation module 10; the multi-pulse generating module 10 is used for generating a plurality of pulse signals and providing the pulse signals to a writing end of the magnetic memory device 20.
The multi-pulse generating module 10 is used for generating a plurality of write pulse signals. These pulse signals may have different amplitudes and/or pulse widths to optimize the data writing process of the magnetic memory device.
The plurality of pulse signals comprise a plurality of first pulse signals and second pulse signals which are overlapped in sequence, and the writing directions of the first pulse signals and the second pulse signals are opposite.
The amplitude of the next first pulse signal in the plurality of pulse signals is not larger than the amplitude of the previous first pulse signal, and preferably, the amplitude of the first pulse signal is gradually decreased. And the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of the two adjacent first pulse signals, and/or the amplitude of the next first pulse signal in the plurality of pulse signals is not larger than the amplitude of the previous first pulse signal, preferably, the pulse width of the first pulse signal is gradually decreasing, and the pulse width of the second pulse signal between two adjacent first pulse signals is smaller than the pulse width of the two adjacent first pulse signals.
The magnetic memory in the intermediate state is deterministic flipped by a plurality of pulse signals.
It is understood that the intermediate state is during the moment inversion of the MTJ free layer, the moment stabilizes in a multi-domain state due to the presence of defects, pinning, etc.
Deterministic flipping of a magnetic memory in an intermediate state by a plurality of pulse signals may include: when the magnetic memory is in the intermediate state after the first pulse signal is applied, the multi-domain state of the magnetic memory device can be consumed by utilizing the second pulse signal after the first pulse signal, so that the intermediate state of the magnetic memory device is changed, and then the first pulse signal is provided for the magnetic memory device, so that the magnetic memory device can be turned over to realize the writing of data.
It will be appreciated that in actual operation, when the applied pulse amplitude, and/or pulse width is large, it is likely to cause the magnetic memory device to flip back again after the flip is successful, thereby causing unsuccessful data writing and reducing the write yield.
Based on this, in time sequence, the amplitude and/or pulse width of the subsequent first pulse signal is not greater than the amplitude and/or pulse width of the previous first pulse signal, preferably, the amplitude and/or pulse width of the first pulse signal is sequentially reduced to ensure that the pulse signal with the greater amplitude and/or pulse width is provided in the initial stage to realize the overturn of the magnetic storage device, and for the overturn rebound caused by the overlarge pulse amplitude and/or pulse width, the pulse amplitude and/or pulse width is gradually reduced in the subsequent stage to provide the pulse signal with the proper amplitude and/or pulse width to ensure the overturn of the magnetic storage device, thereby realizing the writing of data. That is, for a magnetic memory device in which the write current is relatively small, the present application can achieve data writing by applying a plurality of first pulse signals whose magnitudes and/or pulse widths are gradually reduced.
And a second pulse signal is arranged between two first pulse signals in the plurality of pulse signals, and is used for counteracting partial forward pulse reversed by the magnetic memory when the applied pulse amplitude is larger, and then providing a write current with smaller amplitude for the magnetic memory device, so that the magnetic memory device can smoothly realize overturn, and the writing of data is ensured. Therefore, the second pulse signal between two adjacent first pulse signals can be used for canceling out the part of the forward pulse which is reversed back by the magnetic memory, so that the amplitude of the second pulse signal is smaller than that of the previous first pulse signal. In order to ensure that the subsequently applied first pulse signal can enable the magnetic memory to smoothly overturn, the amplitude and/or the pulse width of the second pulse signal should be smaller than the amplitude and/or the pulse width of the later first pulse signal, so as to avoid that the later applied first pulse signal influences the smooth overturn of the magnetic memory due to insufficient energy.
Based on the above description, the application can realize the data writing of the magnetic memory device without optimizing the MTJ etching process, so the application can provide the success rate of the data writing of the magnetic memory device.
In some examples, the write circuit described above may further include a switch module and a magnetic memory device;
The multi-pulse generating module, the switch module and the writing end of the magnetic storage device are sequentially connected, and a plurality of pulse signals are provided to the writing end of the magnetic storage device through the switch module.
The multi-pulse generating module is connected with the writing end of the magnetic storage device.
The magnetic memory device may be any type of magnetic memory device, such as: magnetoresistive Random Access Memory (MRAM), spin-transfer torque random access memory (STT-RAM), or spin-orbit torque magnetic memory (SOT-MRAM), as embodiments of the application are not particularly limited in this regard. It should be appreciated that the write terminal of the magnetic memory device 20 is configured to receive a write signal to change its memory state.
The switch module is used for controlling the transmission of the write signal. The switching module may include one or more switching elements, such as transistors, relays, and the like. The input end of the switch module is connected with the output end of the multi-pulse generation module 10, and the output end is connected with the writing-in end of the magnetic storage device.
The foregoing describes the overall structure and principles of a write circuit for a magnetic memory device, which may be an MRAM, STT-RAM, or SOT-MRAM, provided by embodiments of the application. The following will focus on describing the structure of SOT-MRAM.
Alternatively, the SOT-MRAM can include, from bottom to top, a SOT layer, a free layer, a barrier layer, a reference layer, a pinned layer, and a top electrode layer.
In one example, an interposer layer may be provided between adjacent layers to enhance SOT-MRAM performance. For example, a metallic Hf (hafnium) layer or a non-metallic MgO (magnesium oxide) layer may be disposed between the SOT (Spin-orbit Torque) layer and the free layer for controlling magnetic anisotropy of the free layer and controlling an interface Rashba effect, thereby reducing write current power consumption. The Rashba effect is a spin-orbit coupling phenomenon caused by structural inversion symmetry break. In particular, when electrons move in a material having an interface or surface, the inversion symmetry of the material is broken due to the presence of the interface or surface, resulting in coupling between the spin and momentum of the electrons, which can lead to splitting of the electron band structure and spin splitting.
The SOT layer material may be a heavy metal material such as Pt, pd, hf, au, auPt, ptHf, ptCr, ptMn, irMn, ir, feMn, niMn, ta, W, WO, WN, W (O, N) or TaN, taB, WTaB, a topological insulator such as Bi xSe1-x,BixSb1-x,(Bi,Sb)2Te3, a two-dimensional material such as MoS 2、WTe2, or a multi-layer film structure including two or more of the above materials.
It will be appreciated that when current flows through the SOT layer, a spin flow is generated which can change the direction of the magnetic moment of the upper free layer, thereby enabling the MTJ to switch between a high and low resistance state, and thus enabling the writing of data.
The free layer and the reference layer are typically ferromagnetic materials, but may also be ferrimagnetic or antiferromagnetic materials. The ferromagnetic material may be Co, fe, ni, coFe, coFeB, feB, coB, niFe or a combination of one or more of them; the ferrimagnetic material may be one or more combinations of GdFeCo, cdFe, coTb, etc.; the antiferromagnetic material may be IrMn, ptMn, feMn, pdMn, mn Sn, mn3Pt, mn3Ir, mn3Ge, or a combination of one or more thereof. The free layer and the reference layer may also be composite layers, e.g., composed of two magnetic layers, with a layer of metal, e.g., ru, W, mo, ta, ir, sandwiched in between, such that the upper and lower magnetic layers form ferromagnetic (magnetic moments parallel to each other) or antiferromagnetic coupling (magnetic moment antiparallel).
The barrier layer may be an insulator such as an oxide of MgO, al2O3, or the like.
The pinning layer may be an antiferromagnetic material such as IrMn, ptMn, feMn, pdMn or a combination of one or more of the above.
The specific structure of the SOT-MRAM and the principle of writing data are described above, and the switch modules of the write circuit are described below.
Optionally, the switch module includes at least two switch units, and the switch units are used for inputting the first pulse signal or the second pulse signal to the writing ends on two sides of the magnetic storage device after being gated.
When a first pulse signal is input to one writing end of the magnetic storage device through one of the switch units, a second pulse signal is correspondingly input to the other writing end of the magnetic storage device.
In a specific example, the switching module includes a first switching unit and a second switching unit, and the write terminal of the magnetic memory device includes a first write terminal and a second write terminal.
The multi-pulse generating module is connected with the first writing end through the first switch unit and connected with the second writing end through the second switch unit.
Based on this, the first switching unit may be used to control the transmission of the first pulse signal, and the second switching unit may be used to control the transmission of the second pulse signal. The first switch unit and the second switch unit may be implemented by using a switch tube or other electronic switches, which is not limited in particular in the embodiment of the present application.
It should be understood that the first switch unit may also be used to control the transmission of the second pulse signal, and the second switch unit may also be used to control the transmission of the first pulse signal, which is not particularly limited in the embodiment of the present application.
And the multi-pulse generation module is used for providing the positive pulse signal to the first writing end through the first switch module under the condition that the current output signal is a first pulse signal, so as to realize data writing of the magnetic storage device of the storage device, and is used for providing the negative pulse signal to the second writing end through the second switch module under the condition that the current output signal is a second pulse signal, so as to change the intermediate state of the magnetic storage device of the storage device.
In one example, the first switching module may include a first switching tube and a second switching tube.
The first end of the first switching tube is connected with the multi-pulse generating module, the control end is connected with an external control signal end, the second end of the first switching tube is connected with the first end and the first writing end of the second switching tube, the control end of the second switching tube is connected with an external control signal end, and the second end of the second switching tube is connected with the first writing end and the grounding end.
The current output signal of the multi-pulse generation module is a first pulse signal, an external control signal end generates a corresponding control signal, and the control signal is used for controlling the first switching tube to be conducted and the second switching tube to be turned off. At this time, the first pulse signal is applied to the first writing end through the first switch Guan Shi, so as to implement writing of data.
In another example, the second switching module includes a third switching tube and a fourth switching tube.
The first end of the third switching tube is connected with the multi-pulse generating module, the second end of the third switching tube is connected with an external control signal end, the third end of the third switching tube is connected with the first end of the fourth switching tube and the second writing end, the control end of the fourth switching tube is connected with the external control signal end, and the third end of the fourth switching tube is connected with the second writing end and the grounding end.
The current output signal of the multi-pulse generating module is a second pulse signal, an external control signal end generates a corresponding control signal, and the control signal is used for controlling the third switching tube to be conducted and the fourth switching tube to be turned off. At this time, a second pulse signal is applied to the second write terminal through the third switch Guan Shi for changing the intermediate state of the magnetic memory device.
Alternatively, referring to fig. 2, the first switching unit 201 includes a first switching tube N1 and a second switching tube P1, and the second switching unit 202 includes a third switching tube P2 and a fourth switching tube N2. The control ends of the first switching tube N1, the second switching tube P1, the third switching tube P2 and the fourth switching tube N2 are all connected with an external control signal end, and the external control signal end is used for providing a control signal Vg.
The current output signal of the multi-pulse generation module is a first pulse signal, an external control signal end generates a high-level control signal, the first switching tube and the fourth switching tube are conducted, forward pulses are applied to the magnetic storage device through the first switching tube, the generated current flows to the first switching tube, and the magnetic storage device and the fourth switching tube are connected to the ground end, so that data writing is completed.
That is, in the case that the current output signal of the multi-pulse generating module is the first pulse signal, the first switching tube, the magnetic memory device, the fourth switching tube and the ground terminal form a first loop to implement data writing to the magnetic memory device.
The current output signal of the multi-pulse generation module is a second pulse signal, an external control signal end generates a low-level control signal, the second switching tube and the third switching tube are conducted, negative pulses are applied to the magnetic storage device through the third switching tube, the generated current flows to the third switching tube, and the magnetic storage device and the second switching tube are connected to the ground end and used for changing the intermediate state of the magnetic storage device.
That is, in case that the current output signal of the multi-pulse generating module is the second pulse signal, the third switching tube, the magnetic memory device, the second switching tube and the ground terminal form a second loop to change the intermediate state of the magnetic memory device.
The above section is used to describe the structure and function of the switch module, and the following section is used to describe the multi-pulse generating module.
Alternatively, the multi-pulse generating module may include a pulse generating unit. The pulse generating unit is used for generating a plurality of first pulse signals and second pulse signals which are overlapped in sequence, and the amplitude of the first pulse signals in the plurality of pulse signals is reduced in sequence according to time sequence.
According to the foregoing description, the amplitude of the first pulse signal in the plurality of pulse signals is sequentially reduced, so that it is ensured that the magnetic memory device is turned over by providing the pulse signal with a larger amplitude in the initial stage, and for the rebound of the turn over caused by the excessively large pulse amplitude, the pulse amplitude is gradually reduced in the subsequent stage to provide the pulse signal with a proper amplitude, so that the magnetic memory device is turned over to realize the writing of data. That is, for a magnetic memory device in which the write current is relatively small, the embodiment of the present application implements data writing by applying a plurality of first pulse signals whose magnitudes are gradually reduced.
It should be appreciated that the multi-pulse generating module in embodiments of the present application may further include a pulse width modulation unit and an amplitude modulation unit corresponding to different amplitude and pulse width requirements.
The pulse width modulation unit is used for performing pulse width modulation on the first pulse signal or the second pulse signal, so that the pulse width of the pulse signal output by the multi-pulse generation module can be adjusted according to requirements so as to adapt to different requirements, and further, the writing process of the magnetic storage device can be optimized, and the stability and reliability of the magnetic storage device under different operation conditions are ensured.
The amplitude modulation unit is used for carrying out amplitude adjustment on the first pulse signal or the second pulse signal. By adjusting the amplitude of the pulse signal, the energy of the pulse signal applied to the magnetic memory device can be controlled, and the problem of overturning rebound caused by overlarge pulse amplitude is avoided, so that the success rate of data writing is improved.
In a specific embodiment, referring to fig. 3 and 4, assuming that the writing direction of the magnetic memory device is the direction indicated by the arrow in fig. 3 (from left to right), the plurality of sequentially overlapped first pulse signals and second pulse signals include a first pulse sub-signal S1, a second pulse sub-signal S2, and a third pulse sub-signal S3. The first pulse sub-signal S1 and the third pulse sub-signal S3 are first pulse signals, and the second pulse sub-signal S2 is a second pulse signal.
Wherein the pulse width d1 and/or amplitude of the first pulse sub-signal S1 is larger than the pulse width d3 and/or amplitude of the second pulse sub-signal S3, and/or the pulse width d1 and amplitude of the first pulse sub-signal S1 is larger than the pulse width d3 and amplitude of the third pulse sub-signal S3.
In a specific embodiment, referring to fig. 5 and 6, assuming that the writing direction of the magnetic memory device is the direction indicated by the arrow in fig. 5 (from right to left), the plurality of sequentially overlapped first pulse signals and second pulse signals include a first pulse sub-signal S1, a second pulse sub-signal S2, and a third pulse sub-signal S3. The first pulse sub-signal S1 and the third pulse sub-signal S3 are first pulse signals, and the second pulse sub-signal S2 is a second pulse signal.
Wherein the pulse width d1 and/or amplitude of the first pulse sub-signal S1 is larger than the pulse width d3 and/or amplitude of the second pulse sub-signal S3, and/or the pulse width d1 and amplitude of the first pulse sub-signal S1 is larger than the pulse width d3 and amplitude of the third pulse sub-signal S3.
According to the foregoing, the first pulse sub-signal S1 is used for providing a pulse signal with larger energy to write data into the magnetic memory device with larger write current, and the magnetic memory device with smaller write current may cause the magnetic memory device to flip back again after the flip-flop is successful, at this time, a second pulse sub-signal S2 with reduced amplitude and/or pulse width is input into the magnetic memory device to cancel a part of the first forward pulse that the magnetic memory device has flipped back, and then a third pulse sub-signal S3 with smaller energy is applied to the magnetic memory device to enable the magnetic memory device to flip smoothly, thereby ensuring the write of data.
It should be understood that, in the embodiment of the present application, the plurality of sequentially overlapped first pulse signals and second pulse signals may include not only the three pulse signals, but also more pulse signals.
Optionally, the plurality of sequentially overlapped first pulse signals and second pulse signals include 2n+1 pulse signals, and it should be understood that, by setting more pulse signals, the amplitude of the first pulse signals may be gradually reduced, so as to ensure that the magnetic memory device smoothly realizes overturn, and further ensure writing of data.
In another embodiment, referring to fig. 7, the first pulse sub-signal S1, the second pulse sub-signal S2 and the third pulse sub-signal S3 may be pulse signals having rising edges and falling edges.
It should be appreciated that the pulse signal having the rising and falling edges may comprise a plurality of instantaneous pulse signals of pulse widths, and thus, accurate data write control may be provided, ensuring the writing of data. The second pulse signal S2 is used to cancel out a portion of the first forward pulse S1 that is inverted back by the magnetic memory device and consume the multi-domain state of the magnetic memory device, so as to change the intermediate state of the magnetic memory device, and then, provide a third pulse signal S3 with smaller amplitude to the magnetic memory device, so that the magnetic memory device can smoothly realize the inversion, and realize the writing of data.
It should be further understood that in this embodiment, since the first pulse sub-signal S1, the second pulse sub-signal S2 and the third pulse sub-signal S3 are pulse signals having rising edges and falling edges, each pulse signal includes a plurality of instantaneous pulse signals with pulse widths, so that the embodiment of the application does not need to set more pulse signals, thereby saving the writing time of data and improving the writing efficiency of the device.
Preferably, the falling edge widths of the first pulse sub-signal S1 and the third pulse sub-signal S3 are larger than the rising edge widths corresponding to the first pulse sub-signal S1 and the third pulse sub-signal S3. It will be further appreciated that the falling edges of the first pulse sub-signal S1 and the third pulse sub-signal S3 are used to provide a plurality of transient pulse signals of different magnitudes of pulse width and/or amplitude when writing magnetic memory data. If the width of the falling edge is smaller, the variation of the plurality of transient pulse signals is faster, so that the difficulty of data writing is increased, and the data writing is possibly unsuccessful, therefore, the falling edge widths of the first pulse sub-signal S1 and the third pulse sub-signal S3 need to be set larger, so that the success rate of data writing is improved.
In some examples, the magnetic memory device is a spin-orbit torque magnetic memory in which writing of the first pulse signal or the second pulse signal is achieved through both ends of a spin-orbit torque layer.
As a specific example, the magnetic memory device in the embodiment of the present application is a spin-orbit torque magnetic memory, where the first writing end is a first end of a spin-orbit torque layer (SOT layer) of the spin-orbit torque magnetic memory, and the second writing end is a second end of the spin-orbit torque layer of the spin-orbit torque magnetic memory.
Based on this, when the first pulse signal is applied to the SOT layer, the SOT layer generates a self-rotational flow, and the self-rotational flow can change the magnetic moment direction of the free layer above the SOT layer, so that the MTJ can be switched between a high-resistance state and a low-resistance state, and further, the writing of data can be realized. When the second pulse signal is applied to the SOT layer, not only part of forward pulse which is inverted back by the last first pulse signal applied to the SOT layer can be offset, but also the multi-domain state of the SOT layer can be consumed to change the intermediate state of the magnetic memory device, so that the first pulse signal applied to the SOT layer can be ensured to change the magnetic moment direction of the free layer above the SOT layer, and the writing of data is realized.
In other examples, the magnetic memory device is a Nand type spin-orbit torque magnetic memory that includes at least a single spin-orbit torque layer and a plurality of magnetic tunnel junctions disposed over the single spin-orbit torque layer.
The multi-pulse generation module generates a plurality of first pulse signals and second pulse signals, and the first pulse signals and the second pulse signals which are overlapped in sequence are input through the top end of a single spin-orbit torque layer or a Nand-type spin-orbit torque magnetic memory.
The amplitude of the first pulse signal is gradually decreased, the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of the two adjacent first pulse signals, and/or the pulse width of the first pulse signal is gradually decreased, and the pulse width of the second pulse signal between two adjacent first pulse signals is smaller than the pulse width of the two adjacent first pulse signals.
Optionally, the magnetic memory device in the embodiment of the application is a Nand type spin-orbit torque magnetic memory, and the Nand type spin-orbit torque magnetic memory includes a first writing end and a second writing end, where the first writing end is one end of a spin-orbit torque layer and a top end of a magnetic tunnel junction in the Nand type spin-orbit torque magnetic memory.
The second writing end is one end of a spin orbit moment layer of the Nand type spin orbit moment magnetic memory or the top end of a magnetic tunnel junction.
Referring to FIG. 8, the nand-type SOT-MRAM shares one SOT layer for multiple MTJs. The gating of the MTJs is accomplished by applying a current to the corresponding MTJs, e.g., selecting a second MTJ, which may be selected by applying a current to the top electrode layer of the second MTJ.
For Nand-type SOT-MRAM, since the application of a pulse signal to the SOT layer alone is insufficient to flip the MTJ free layer magnetic moment, a pulse signal needs to be applied to the top electrode layer of the corresponding gated MTJ to effect data writing to the selected MTJ. By controlling the timing of the pulse signal applied to the SOT and the pulse signal applied to the MTJ, multi-state storage of the selected MTJ can be achieved.
The following sections describe the data writing process of a Nand-type SOT-MRAM by applying different pulse sequences. Referring to FIG. 9, the pulse signal applied to the SOT layer and the pulse signal applied to the MTJ top electrode layer overlap, and the width of the overlapping portion is 0 or more. Data writing can be achieved at this time, but the ability to eliminate intermediate states is poor. Referring to fig. 10, when the pulse signal applied to the Nand-type SOT-MRAM is the first pulse signal sequence in fig. 9 and the MTJ has a defect or pinning, it is easy to stabilize it in an intermediate state.
Referring to fig. 11, the pulse signal applied to the SOT layer and the pulse signal applied to the MTJ top electrode layer in the first pulse signal sequence do not overlap. The pulse signal is similar to the form of the above-described multi-pulse signal, and the intermediate state can be effectively eliminated, and referring to fig. 12, stable data writing is easily realized based on the second pulse signal sequence in fig. 11. Wherein the initial position represents the position of the initial pulse signal of the second pulse signal sequence.
Therefore, by combining the first pulse signal sequence and the second pulse signal sequence, the embodiment of the application can realize multi-state storage of the MTJ and improve the storage capacity of the MTJ, thereby improving the storage density of the Nand-type SOT-MRAM chip.
Alternatively, when data is written into the Nand-type SOT-MRAM, a first pulse signal can be applied to the SOT layer through the first end of the SOT layer, then a second pulse signal is applied to the SOT layer, and finally the first pulse signal is applied to the top electrode layer of the MTJ, so that the data is written into the Nand-type SOT-MRAM.
Alternatively, when data is written into the Nand-type SOT-MRAM, a first pulse signal can be applied to the SOT layer through the first end of the SOT layer, then a second pulse signal is applied to the top electrode layer of the MTJ, and finally the first pulse signal is applied to the top electrode layer of the MTJ, so that the data writing into the Nand-type SOT-MRAM is completed.
Based on the above, the embodiment of the application adopts a multi-pulse writing mode to effectively reduce the storage intermediate state of the Nand type SOT-MRAM, thereby improving the storage yield of the Nand type SOT-MRAM chip. In addition, multi-state storage can be realized by combining multi-pulse writing, and the storage density can be improved. In comparison with the existing multi-state storage methods, without introducing complex processes, without introducing multiple devices.
In a second aspect, the present application also provides a write array comprising a plurality of write circuits of any one of the first aspects arranged in an array.
The write array may enable parallel writing of a plurality of magnetic memory devices.
It should be understood that, since the read-write array includes the write circuit described above, the read-write array has the same advantages as those of the write circuit provided in the embodiments shown in fig. 1-12 and will not be described herein.
In a third aspect, an embodiment of the present application further provides a writing method, including the following steps:
Sequentially providing a plurality of pulse signals to a writing end of the magnetic memory device; wherein the plurality of pulse signals comprise a plurality of first pulse signals and second pulse signals which are overlapped in sequence;
the amplitude of the first pulse signal is gradually decreased, the amplitude of the second pulse signal between two adjacent first pulse signals is smaller than the amplitude of the two adjacent first pulse signals, and/or the pulse width of the first pulse signal is gradually decreased, and the pulse width of the second pulse signal between two adjacent first pulse signals is smaller than the pulse width of the two adjacent first pulse signals;
And carrying out deterministic inversion on the magnetic memory in the intermediate state through the pulse signals.
The writing method provided by the application provides a plurality of pulse signals to a writing end of a magnetic memory device. The plurality of pulse signals includes a plurality of first pulse signals and second pulse signals that overlap in sequence. It should be understood that the intermediate state is that during the magnetic moment inversion of the MTJ free layer, the magnetic moment is stabilized in a multi-domain state due to the presence of defects, pinning, etc., and a second pulse signal is provided between two first pulse signals of the above-mentioned plurality of pulse signals, and the second pulse signal may consume the multi-domain state of the magnetic memory device, thereby changing the intermediate state of the magnetic memory device, and then the first pulse signal is provided to the magnetic memory device, so that the magnetic memory device may be inverted to implement writing of data.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
Claims (11)
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