Disclosure of Invention
Accordingly, the embodiments of the present disclosure desirably provide a signal state detection circuit, a signal state detection method, and an electronic device.
The technical scheme of the present disclosure is realized as follows:
in a first aspect, the present disclosure provides a signal state detection circuit.
The signal state detection circuit provided by the embodiment of the disclosure comprises:
the current sensor is connected with the annunciator and is used for converting the annunciator current signal into a voltage signal;
the voltage follower is connected with the current sensor and used for isolating and stabilizing the voltage signal after passing through the blocking capacitor; the blocking capacitor is used for isolating direct current signals in the voltage signals;
the amplifying circuit is connected with the voltage follower and is used for amplifying the voltage signal output by the voltage follower by a preset multiple;
The ADC acquisition circuit is electrically connected with the current sensor, the voltage follower and the amplifying circuit, and is used for acquiring a first reference voltage of the current sensor, a second reference voltage of the voltage follower, a third reference voltage of the amplifying circuit and a voltage signal output by the amplifying circuit, and converting the voltage signal output by the amplifying circuit into a digital voltage value;
The double CPU module is connected with the ADC acquisition circuit and used for determining the current value of the signal machine current signal based on the digital voltage value output by the ADC acquisition circuit and determining the signal machine state based on the comparison of the current value of the signal machine current signal with a preset threshold value.
In some embodiments, the dual CPU module includes a first CPU and a second CPU;
the first CPU and the second CPU are connected with the ADC acquisition circuit and are used for respectively acquiring the digital voltage value output by the ADC acquisition circuit;
the first CPU is used for determining a first current value of the signal machine current signal based on the digital voltage value output by the ADC acquisition circuit;
The second CPU is used for determining a second current value of the signal machine current signal based on the digital voltage value output by the ADC acquisition circuit;
The dual CPU module is used for comparing the first current value and the second current value and determining whether the signal machine state detection circuit has a circuit fault or not.
In some embodiments, the dual CPU module is configured to determine a mean square value of the digital value of the voltage in the predetermined period of time based on the digital value of the voltage output by the ADC acquisition circuit in the predetermined period of time;
And determining the current value of the current signal of the signal machine based on the mean square value of the digital voltage value in the preset time period and the linear relation between the mean square value and the current value of the current signal of the signal machine.
In some embodiments, the amplifying circuit comprises a fixed multiple amplifying circuit, a resistor R3 and an amplifying multiple control switch;
The amplification factor control switch is connected with the resistor R3 in series and then is connected with the fixed multiple amplification circuit in parallel in the signal state detection circuit.
In some embodiments, comprising:
A power supply for the signal machine; the power supply line of the signal machine power supply penetrates through the threading hole of the current sensor and is connected with the signal machine; the signal machine power supply is used for supplying power to the signal machine.
In a second aspect, the disclosure provides a signal state detection method, which is executed based on a signal state detection circuit, wherein the signal state detection circuit comprises a current sensor connected with a signal machine and used for converting a signal machine current signal into a voltage signal; the voltage follower is connected with the current sensor and used for isolating and stabilizing the voltage signal after passing through the blocking capacitor; the blocking capacitor is used for isolating direct current signals in the voltage signals; the amplifying circuit is connected with the voltage follower and is used for amplifying the voltage signal output by the voltage follower by a preset multiple; the ADC acquisition circuit is electrically connected with the current sensor, the voltage follower and the amplifying circuit, and is used for acquiring a first reference voltage of the current sensor, a second reference voltage of the voltage follower, a third reference voltage of the amplifying circuit and a voltage signal output by the amplifying circuit, and converting the voltage signal output by the amplifying circuit into a digital voltage value; the double CPU module is connected with the ADC acquisition circuit;
The method comprises the following steps:
based on a double CPU module, acquiring the digital voltage value output by the ADC acquisition circuit, and determining the current value of the current signal of the annunciator based on the digital voltage value;
the traffic signal state is determined based on a comparison of the current value of the traffic signal current signal to a predetermined threshold.
In some embodiments, the dual CPU module includes a first CPU and a second CPU;
The method for determining the current value of the signal machine current signal based on the digital quantity voltage value output by the ADC acquisition circuit and the digital quantity voltage value comprises the following steps:
Based on the first CPU, acquiring the digital quantity voltage value output by the ADC acquisition circuit, and determining a first current value of the annunciator current signal based on the digital quantity voltage value;
based on the second CPU, acquiring the digital quantity voltage value output by the ADC acquisition circuit, and determining a second current value of the annunciator current signal based on the digital quantity voltage value;
the determining the traffic signal state based on comparing the current value of the traffic signal current signal with a predetermined threshold value comprises: determining whether a circuit fault exists in the signal state detection circuit based on the comparison of the first current value and the second current value;
And if the signal state detection circuit has no circuit fault, determining the signal state based on the comparison of the current value of the signal current signal and a preset threshold value.
In some embodiments, the predetermined threshold includes an upper current limit, a lower current limit;
the determining the traffic signal state based on comparing the current value of the traffic signal current signal with a predetermined threshold value comprises:
the current value of the current signal of the signal machine is between the upper current limit value and the lower current limit value, and the working state of the signal machine is determined to be normal;
and if the current value of the current signal of the signal machine is larger than the upper current limit value or smaller than the lower current limit value, determining that the working state of the signal machine is abnormal.
In some embodiments, the determining a current value of the traffic signal current signal based on the digital magnitude voltage value comprises:
Determining a mean square value of the digital quantity voltage value in a preset time period based on the digital quantity voltage value output by the ADC acquisition circuit in the preset time period;
And determining the current value of the current signal of the signal machine based on the mean square value of the digital voltage value in the preset time period and the linear relation between the mean square value and the current value of the current signal of the signal machine.
In a third aspect, the present disclosure provides an electronic device comprising:
the signal state detection circuit according to the first aspect; the signal machine state detection circuit is connected with the signal machine;
The electronic equipment is used for detecting the working state of the annunciator through the annunciator state detection circuit.
The signal state detection circuit provided by the embodiment of the disclosure comprises: the current sensor is connected with the signal machine and used for converting the current signal of the signal machine into a voltage signal; the voltage follower is connected with the current sensor and used for isolating and stabilizing a voltage signal passing through the blocking capacitor; the DC blocking capacitor is used for isolating a DC signal in the voltage signal; the amplifying circuit is connected with the voltage follower and is used for amplifying the voltage signal output by the voltage follower by a preset multiple; the ADC acquisition circuit is electrically connected with the current sensor, the voltage follower and the amplifying circuit and is used for acquiring a first reference voltage of the current sensor, a second reference voltage of the voltage follower, a third reference voltage of the amplifying circuit and a voltage signal output by the amplifying circuit, and converting the voltage signal output by the amplifying circuit into a digital voltage value; the double CPU module is connected with the ADC acquisition circuit and used for determining the current value of the current signal of the signal machine based on the digital voltage value output by the ADC acquisition circuit and determining the state of the signal machine based on the comparison of the current value of the current signal of the signal machine with a preset threshold value. According to the application, the alternating current voltage signal output by the current sensor is isolated into the direct current offset component through the blocking capacitor, the ADC acquisition circuit adopts multi-channel acquisition, and is provided with the self-detection channel, so that the first reference voltage of the current sensor, the second reference voltage of the voltage follower, the third reference voltage of the amplifying circuit and the like are detected, the detection of the acquisition circuit and the self-detection function of the ADC chip are realized, the current value of the current signal of the annunciator is determined under the condition that the functions of the current sensor, the voltage follower and the amplifying circuit are normal, and the state of the annunciator is determined based on the comparison of the current value of the current signal of the annunciator and a preset threshold value. Thus being beneficial to improving the state determination accuracy of the annunciator.
Additional aspects and advantages of the disclosure will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the disclosure.
Detailed Description
Embodiments of the present disclosure are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are exemplary and intended for the purpose of explaining the present disclosure and are not to be construed as limiting the present disclosure.
The signal machine is a trackside foundation device of railway and rail transit, and is one of important components of a railway signal system. In a railway signal system using a ground signal as a main signal, a driver must operate according to the display of a signal machine. The reliability of the signal machine directly affects the performance of the signal system, so that it is important to effectively and reliably detect the state of the signal machine.
In view of the foregoing, the present disclosure provides a signal state detection circuit. Fig. 1 is a schematic diagram of a signal state detection circuit according to an exemplary embodiment. As shown in fig. 1, the signal state detection circuit includes:
The current sensor 10 is connected with the annunciator and is used for converting the annunciator current signal into a voltage signal;
the voltage follower 11 is connected with the current sensor and is used for isolating and stabilizing the voltage signal after passing through the blocking capacitor; the blocking capacitor is used for isolating direct current signals in the voltage signals;
an amplifying circuit 12 connected to the voltage follower for amplifying the voltage signal output from the voltage follower by a predetermined multiple;
The ADC acquisition circuit 13 is electrically connected with the current sensor, the voltage follower and the amplifying circuit, and is used for acquiring a first reference voltage of the current sensor, a second reference voltage of the voltage follower, a third reference voltage of the amplifying circuit and a voltage signal output by the amplifying circuit, and converting the voltage signal output by the amplifying circuit into a digital voltage value;
The dual-CPU module 14 is connected with the ADC acquisition circuit and is used for determining the current value of the signal machine current signal based on the digital voltage value output by the ADC acquisition circuit and determining the signal machine state based on the comparison of the current value of the signal machine current signal with a preset threshold value.
In the present exemplary embodiment, the current sensor has a blocking capacitance. The main function of the blocking capacitor is to allow the ac signal to pass while preventing the dc signal from passing. In the circuit, a blocking capacitor is used to isolate the dc component so that only the ac signal is transmitted. In the application, the alternating voltage signal output by the current sensor is isolated by the blocking capacitor to obtain the direct current offset component. And transmitting the voltage signal output by the blocking capacitor to a voltage follower. The voltage follower serves as an isolation buffer to isolate the current sensor from the amplifying circuit, so that the circuit is very little disturbed.
The amplifying circuit amplifies the voltage signal after primary isolation, so that the voltage range is suitable for the input range of the ADC acquisition chip. The amplifying circuit can dynamically control the amplification factor, so that the input voltage signal is overturned and output according to the preset multiple.
The ADC chip of the ADC acquisition circuit adopts multichannel acquisition, and is provided with a self-detection channel, so that the output reference voltage of the current sensor, the reference voltage of the amplifying circuit, the output voltage of the voltage follower and the like are detected, and the detection of the acquisition circuit and the self-detection function of the ADC chip are realized. The ADC sampling chip converts the acquired voltage value analog quantity into digital quantity and sends the digital quantity value to the CPU through the SPI bus.
According to the application, the alternating current voltage signal output by the current sensor is isolated into the direct current offset component through the blocking capacitor, the ADC acquisition circuit adopts multi-channel acquisition, and is provided with the self-detection channel, so that the first reference voltage of the current sensor, the second reference voltage of the voltage follower, the third reference voltage of the amplifying circuit and the like are detected, the detection of the acquisition circuit and the self-detection function of the ADC chip are realized, the current value of the current signal of the annunciator is determined under the condition that the functions of the current sensor, the voltage follower and the amplifying circuit are normal, and the state of the annunciator is determined based on the comparison of the current value of the current signal of the annunciator and a preset threshold value. Thus being beneficial to improving the state determination accuracy of the annunciator.
In some embodiments, the dual CPU module includes a first CPU and a second CPU;
the first CPU and the second CPU are connected with the ADC acquisition circuit and are used for respectively acquiring the digital voltage value output by the ADC acquisition circuit;
the first CPU is used for determining a first current value of the signal machine current signal based on the digital voltage value output by the ADC acquisition circuit;
The second CPU is used for determining a second current value of the signal machine current signal based on the digital voltage value output by the ADC acquisition circuit;
The dual CPU module is used for comparing the first current value and the second current value and determining whether the signal machine state detection circuit has a circuit fault or not.
In the present exemplary embodiment, the tolerance value is determined as a difference in current values acquired by the two CPUs through the respective independent acquisition circuits. I.e. the current value difference between the first current value and the second current value. The tolerance value is set according to 10%, namely if the current value collected by the CPU1 is 120mA and the current value collected by the CPU2 exceeds 120mA plus or minus 10%, the fault early warning of the collecting circuit is judged and output.
In some embodiments, the dual CPU module is configured to determine a mean square value of the digital value of the voltage in the predetermined period of time based on the digital value of the voltage output by the ADC acquisition circuit in the predetermined period of time;
And determining the current value of the current signal of the signal machine based on the mean square value of the digital voltage value in the preset time period and the linear relation between the mean square value and the current value of the current signal of the signal machine.
In the present exemplary embodiment, for example, the voltage value sampled and output by the ADC is a sinusoidal waveform with a frequency of 50HZ and a period of 20mS, the CPU collects 32 voltage values every 20mS, and calculates the mean square value in the period of 20mS by the root mean square algorithm, with the following formula:
and (3) a mean square error calculation formula: s ∈2=1/n [ (X 1-Xavg)∧2+(X2-Xavg)∧2+……(Xn-Xavg) ∈2], wherein Xavg is the initial reference voltage sample mean value, X1, X2...xn is the n acquired voltage values, respectively, S is the calculated mean square value over a fixed period. I.e. n=32, the cpu calculates the mean square value S.
The acquisition principle can be known that the mean square error S has a linear relation with the current of an actual signal machine, and the principle is as follows:
Wherein the calculated mean square value S and the corresponding actual current value Ixh of the annunciator satisfy a linear relationship formula: the mean square value s=w× Ixh +b, w is the weight coefficient, b is the intercept, ixh is the traffic signal current. Wherein w=n1×n2, N1 is a ratio value of the voltage output by the current sensor to the current input by the acquisition, and N2 is an amplification factor of the amplifying circuit; wherein, N1 and N2 can be determined by circuit parameters.
The corresponding values can be flexibly configured according to different actual used annunciator currents by configuring the annunciator current tolerance value, the nominal value, the upper limit value and the lower limit value through software, so that judgment output is realized, a hardware circuit is not required to be changed, and the adaptability of a system is improved.
The current tolerance value, the nominal value, the upper limit value and the lower limit value of the annunciator are set by configuration files of the upper computer, the upper computer sends the values to the annunciator current acquisition board card, and the annunciator current acquisition board card compares the acquired actual current value with the configuration files to judge and output results.
For example, the nominal value of the current of the annunciator is a current value when a certain lamp position is normally lighted, the nominal current value is different according to the type of an actual annunciator and the color of the lamp position, for example, the nominal value of the current of the annunciator in the embodiment is 120mA, the upper limit value and the lower limit value of the current are set according to +/-20%, namely, the upper limit value of the current is 144mA, the lower limit value of the current is 96mA, and if the current value collected by a CPU exceeds the range, an overrun alarm is judged and output to indicate that the working state of the annunciator is abnormal.
In some embodiments, fig. 2 is a schematic diagram of a signal state detection circuit according to an exemplary embodiment. As shown in fig. 2, the amplifying circuit 22 includes a fixed-multiple amplifying circuit, a resistor R3, and an amplifying-multiple control switch S;
the amplification factor control switch S is connected with the resistor R3 in series and then is connected with the fixed multiple amplification circuit in parallel in the signal state detection circuit.
In the present exemplary embodiment, an amplification speed control switch may be added on the amplification circuit side, and the CPU issues a control signal to control the switching state, thereby controlling the amplification factor of the amplification circuit, and by setting a desired factor, the CPU periodically transmits a control signal so that the signal amplification factor is inverted.
As shown in fig. 2, the dual CPU includes a control switch S, and sets whether to connect in series with a resistor R3 by periodically controlling the on/off of the switch S, and adjusts the amplification factor of the amplifying circuit by connecting in series with R3. According to the preset period, the voltage amplification factor is turned over, namely, the value acquired by the final CPU is turned over according to the expected factor. The dynamic acquisition of the signal machine current acquisition circuit is realized in the mode, and the reliability of the system is enhanced.
In some embodiments, comprising:
A power supply for the signal machine; wherein, the power supply line of the signal machine power supply passes through the threading hole of the current sensor 20 and is connected with the signal machine; the signal machine power supply is used for supplying power to the signal machine.
In the present exemplary embodiment, the power supply for the annunciator of fig. 1 is typically 50HZ ac, typically 110VAC/220VAC, and one of the power supply wires is passed through the threading hole of the current sensor and then the annunciator is powered. The current sensor is adapted to various alternating voltage-powered annunciators, and the current value of the annunciator is converted into a voltage value through electromagnetic induction. When the default annunciator current is zero, the current sensor works to output a reference voltage Vref1, and when the annunciator is lighted and has current, the current sensor outputs a 50HZ sine wave voltage with the direct current paranoid of Vref1 because the current is 50HZ alternating current.
The current sensor is independently isolated for power supply, the voltage value is V+, and the stable operation of the current sensor is ensured. The voltage waveform output by the current sensor passes through the blocking capacitor, removes the Vref1 direct current offset, and then outputs the voltage to the voltage follower, wherein the reference voltage of the voltage follower is Vref2, and the voltage waveform outputs an alternating voltage with the direct current offset Vref2 after passing through the voltage follower.
The amplifying circuit amplifies the sine voltage waveform output by the voltage follower according to the multiple N1, and is used for adjusting the waveform range and adapting to the input range of the ADC sampling chip.
The invention provides a signal machine state detection method which is executed based on a signal machine state detection circuit, wherein the signal machine state detection circuit comprises a current sensor, a signal machine and a signal machine controller, wherein the current sensor is connected with the signal machine and is used for converting a signal machine current signal into a voltage signal; the voltage follower is connected with the current sensor and used for isolating and stabilizing the voltage signal after passing through the blocking capacitor; the blocking capacitor is used for isolating direct current signals in the voltage signals; the amplifying circuit is connected with the voltage follower and is used for amplifying the voltage signal output by the voltage follower by a preset multiple; the ADC acquisition circuit is electrically connected with the current sensor, the voltage follower and the amplifying circuit, and is used for acquiring a first reference voltage of the current sensor, a second reference voltage of the voltage follower, a third reference voltage of the amplifying circuit and a voltage signal output by the amplifying circuit, and converting the voltage signal output by the amplifying circuit into a digital voltage value; and the double CPU module is connected with the ADC acquisition circuit.
Fig. 3 is a flowchart illustrating a method for detecting a state of a signal according to an exemplary embodiment. As shown in fig. 3, the signal state detection method includes:
Step 30, based on a double CPU module, acquiring the digital quantity voltage value output by the ADC acquisition circuit, and determining the current value of the annunciator current signal based on the digital quantity voltage value;
Step 31, determining the state of the annunciator based on the comparison of the current value of the annunciator current signal with a predetermined threshold value.
In the present exemplary embodiment, the current sensor has a blocking capacitance. The main function of the blocking capacitor is to allow the ac signal to pass while preventing the dc signal from passing. In the circuit, a blocking capacitor is used to isolate the dc component so that only the ac signal is transmitted. In the application, the alternating voltage signal output by the current sensor is isolated by the blocking capacitor to obtain the direct current offset component. And transmitting the voltage signal output by the blocking capacitor to a voltage follower. The voltage follower serves as an isolation buffer to isolate the current sensor from the amplifying circuit, so that the circuit is very little disturbed.
The amplifying circuit amplifies the voltage signal after primary isolation, so that the voltage range is suitable for the input range of the ADC acquisition chip. The amplifying circuit can dynamically control the amplification factor, so that the input voltage signal is overturned and output according to the preset multiple.
The ADC chip of the ADC acquisition circuit adopts multichannel acquisition, and is provided with a self-detection channel, so that the output reference voltage of the current sensor, the reference voltage of the amplifying circuit, the output voltage of the voltage follower and the like are detected, and the detection of the acquisition circuit and the self-detection function of the ADC chip are realized. The ADC sampling chip converts the acquired voltage value analog quantity into digital quantity and sends the digital quantity value to the CPU through the SPI bus.
According to the application, the alternating current voltage signal output by the current sensor is isolated into the direct current offset component through the blocking capacitor, the ADC acquisition circuit adopts multi-channel acquisition, and is provided with the self-detection channel, so that the first reference voltage of the current sensor, the second reference voltage of the voltage follower, the third reference voltage of the amplifying circuit and the like are detected, the detection of the acquisition circuit and the self-detection function of the ADC chip are realized, the current value of the current signal of the annunciator is determined under the condition that the functions of the current sensor, the voltage follower and the amplifying circuit are normal, and the state of the annunciator is determined based on the comparison of the current value of the current signal of the annunciator and a preset threshold value. Thus being beneficial to improving the state determination accuracy of the annunciator.
In some embodiments, the dual CPU module includes a first CPU and a second CPU;
The method for determining the current value of the signal machine current signal based on the digital quantity voltage value output by the ADC acquisition circuit and the digital quantity voltage value comprises the following steps:
Based on the first CPU, acquiring the digital quantity voltage value output by the ADC acquisition circuit, and determining a first current value of the annunciator current signal based on the digital quantity voltage value;
based on the second CPU, acquiring the digital quantity voltage value output by the ADC acquisition circuit, and determining a second current value of the annunciator current signal based on the digital quantity voltage value;
the determining the traffic signal state based on comparing the current value of the traffic signal current signal with a predetermined threshold value comprises: determining whether a circuit fault exists in the signal state detection circuit based on the comparison of the first current value and the second current value;
And if the signal state detection circuit has no circuit fault, determining the signal state based on the comparison of the current value of the signal current signal and a preset threshold value.
In the present exemplary embodiment, the tolerance value is determined as a difference in current values acquired by the two CPUs through the respective independent acquisition circuits. I.e. the current value difference between the first current value and the second current value. The tolerance value is set according to 10%, namely if the current value collected by the CPU1 is 120mA and the current value collected by the CPU2 exceeds 120mA plus or minus 10%, the fault early warning of the collecting circuit is judged and output.
In some embodiments, the predetermined threshold includes an upper current limit, a lower current limit;
the determining the traffic signal state based on comparing the current value of the traffic signal current signal with a predetermined threshold value comprises:
the current value of the current signal of the signal machine is between the upper current limit value and the lower current limit value, and the working state of the signal machine is determined to be normal;
and if the current value of the current signal of the signal machine is larger than the upper current limit value or smaller than the lower current limit value, determining that the working state of the signal machine is abnormal.
In the present exemplary embodiment, the corresponding values can be flexibly configured according to the difference of the actual signal current through software configuration of the signal current tolerance value, the nominal value, the upper limit value and the lower limit value, so that judgment output is realized, a hardware circuit is not required to be changed, and the adaptability of the system is increased.
The current tolerance value, the nominal value, the upper limit value and the lower limit value of the annunciator are set by configuration files of the upper computer, the upper computer sends the values to the annunciator current acquisition board card, and the annunciator current acquisition board card compares the acquired actual current value with the configuration files to judge and output results.
For example, the nominal value of the current of the annunciator is a current value when a certain lamp position is normally lighted, the nominal current value is different according to the type of an actual annunciator and the color of the lamp position, for example, the nominal value of the current of the annunciator in the embodiment is 120mA, the upper limit value and the lower limit value of the current are set according to +/-20%, namely, the upper limit value of the current is 144mA, the lower limit value of the current is 96mA, and if the current value collected by a CPU exceeds the range, an overrun alarm is judged and output to indicate that the working state of the annunciator is abnormal.
In some embodiments, the determining a current value of the traffic signal current signal based on the digital magnitude voltage value comprises:
Determining a mean square value of the digital quantity voltage value in a preset time period based on the digital quantity voltage value output by the ADC acquisition circuit in the preset time period;
And determining the current value of the current signal of the signal machine based on the mean square value of the digital voltage value in the preset time period and the linear relation between the mean square value and the current value of the current signal of the signal machine.
In the present exemplary embodiment, for example, the voltage value sampled and output by the ADC is a sinusoidal waveform with a frequency of 50HZ and a period of 20mS, the CPU collects 32 voltage values every 20mS, and calculates the mean square value in the period of 20mS by the root mean square algorithm, with the following formula:
and (3) a mean square error calculation formula: s ∈2=1/n [ (X 1-Xavg)∧2+(X2-Xavg)∧2+……(Xn-Xavg) ∈2], wherein Xavg is the initial reference voltage sample mean value, X1, X2...xn is the n acquired voltage values, respectively, S is the calculated mean square value over a fixed period. I.e. n=32, the cpu calculates the mean square value S.
The acquisition principle can be known that the mean square error S has a linear relation with the current of an actual signal machine, and the principle is as follows:
Wherein the calculated mean square value S and the corresponding actual current value Ixh of the annunciator satisfy a linear relationship formula: the mean square value s=w× Ixh +b, w is the weight coefficient, b is the intercept, ixh is the traffic signal current. Wherein w=n1×n2, N1 is a ratio value of the voltage output by the current sensor to the current input by the acquisition, and N2 is an amplification factor of the amplifying circuit; wherein, N1 and N2 can be determined by circuit parameters.
The present disclosure provides an electronic device, comprising:
the signal state detection circuit according to each of the above embodiments; the signal machine state detection circuit is connected with the signal machine;
The electronic equipment is used for detecting the working state of the annunciator through the annunciator state detection circuit.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, for example, may be considered as a ordered listing of executable instructions for implementing logical functions, and may be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can determine and execute instructions from the instruction execution system, apparatus, or device. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium may even be paper or other suitable medium upon which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It should be understood that portions of the present disclosure may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as is well known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present disclosure, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element being referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present disclosure.
Furthermore, the terms "first," "second," and the like, as used in embodiments of the present disclosure, are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated in the present embodiment. Thus, a feature of an embodiment of the present disclosure that is defined by terms such as "first," "second," and the like may explicitly or implicitly indicate that at least one such feature is included in the embodiment. In the description of the present disclosure, the word "plurality" means at least two or more, for example, two, three, four, etc., unless explicitly specified otherwise in the examples.
In this disclosure, unless expressly specified or limited otherwise in the examples, the terms "mounted," "connected," and "secured" and the like as used in the examples are intended to be broadly construed, as for example, the connection may be a fixed connection, may be a removable connection, or may be integral, and as may be a mechanical connection, an electrical connection, or the like; of course, it may be directly connected, or indirectly connected through an intermediate medium, or may be in communication with each other, or in interaction with each other. The specific meaning of the terms in this disclosure will be understood by those of ordinary skill in the art depending on the specific implementation.
In this disclosure, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact through an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
Although embodiments of the present disclosure have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the present disclosure, and that variations, modifications, alternatives, and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the present disclosure.